Fabrication method of high-k metal gate device

Abstract

The present application relates to a manufacturing method of a high-k metal gate device, and relates to the field of integrated circuits. The manufacturing method includes: providing a substrate, the substrate including an active region and an isolation structure, the isolation structure and the active region being disposed at intervals; the substrate having a first region and a second region, the active region protruding from the isolation structure to form a first fin portion in the first region and a second fin portion in the second region; forming a first work function layer covering the first fin portion and the second fin portion; removing dangling bonds free on the surface of the first work function layer by contacting the surface of the first work function layer with free radicals generated by exciting a first gas with metastable particles; forming a second work function layer on the first work function layer; etching and removing the second work function layer on the first fin portion; treating the surface of the first work function layer with free radicals generated by exciting a second gas with metastable particles. To improve the problem of material loss of the first work function layer when devices with different threshold voltages are formed on the same substrate.

Description

Technical Field

[0001] This application relates to the field of integrated circuit technology, and particularly to a method for fabricating a high-k metal gate device. Background Art

[0002] Currently, semiconductor devices are continuously miniaturized, and high-k metal gate devices (HKMG) have replaced traditional silicon dioxide / polysilicon gates. High-k metal gate devices use high-k dielectric constant materials to replace silicon dioxide as the gate dielectric layer. On the premise of keeping the equivalent oxide thickness (EOT) unchanged, the thickness of the high-k dielectric constant gate dielectric layer is thicker than that of the silicon dioxide gate dielectric layer, effectively curbing the gate leakage current, reducing the static power consumption (Pstatic) of the device to less than 1 / 10 of the original, and significantly improving the energy efficiency ratio of the device.

[0003] However, with the miniaturization of semiconductor device sizes, the thickness of the high-k dielectric constant gate dielectric layer is getting thinner and thinner, and there are still many problems with high-k metal gate devices. Summary of the Invention

[0004] Based on this, it is necessary to provide a method for fabricating a high-k metal gate device to address the problems in the prior art.

[0005] This application provides a method for fabricating a high-k metal gate device, including:

[0006] Providing a substrate, the substrate includes an active region and an isolation structure, and the isolation structure and the active region are spaced apart;

[0007] Forming a first work function layer, the first work function layer covering the active region;

[0008] Exciting a first gas by metastable particles to generate free radicals, and the free radicals generated by the first gas contact the surface of the first work function layer to remove the dangling bonds on the surface of the first work function layer.

[0009] Optionally, the free radicals generated by the first gas combine with the dangling bonds on the surface of the first work function layer to generate volatile reactants.

[0010] Optionally, the substrate has a first region and a second region, the active region protrudes from the isolation structure to form a first fin portion in the first region and a second fin portion in the second region; the first work function layer covers the surfaces of the first fin portion and the second fin portion; the fabrication method further includes:

[0011] Forming a second work function layer on the first work function layer;

[0012] Etch away the second work function layer on the first fin;

[0013] Generate free radicals by exciting a second gas with metastable particles, and the free radicals generated by the second gas process the surface of the first work function layer to repair the etching damage of the first work function layer.

[0014] Optionally, before forming the second work function layer on the first work function layer, generate free radicals by exciting a first gas with metastable particles, and the free radicals generated by the first gas contact the surface of the first work function layer to remove the dangling bonds free on the surface of the first work function layer.

[0015] Optionally, after etching away the second work function layer on the first fin, generate free radicals by exciting a first gas with metastable particles, and the free radicals generated by the first gas contact the surface of the first work function layer to remove the dangling bonds free on the surface of the first work function layer.

[0016] Optionally, the free radicals generated by the second gas contact the first work function layer to induce atomic rearrangement of the first work function layer to repair the etching damage of the first work function layer.

[0017] Optionally, etching away the second work function layer on the first fin includes:

[0018] Form a dielectric layer that covers the first work function layer, the second work function layer and fills between the first fins, between the second fins, and between the first fin and the second fin;

[0019] Etch away part of the dielectric layer to expose the second work function layer on the first fin;

[0020] Etch away the second work function layer on the first fin to expose the first work function layer on the first fin;

[0021] Remove the dielectric layer on the second fin.

[0022] Optionally, removing the dielectric layer on the second fin includes:

[0023] Ionize a third gas to generate plasma, and etch away part of the dielectric layer through the plasma;

[0024] Generate free radicals by exciting a fourth gas with metastable particles, and etch away the remaining dielectric layer through the free radicals generated by the fourth gas.

[0025] Optionally, the manufacturing method includes:

[0026] Provide a substrate, the substrate includes an active region and an isolation structure, the isolation structure and the active region are spaced apart, the substrate has a first region and a second region, the active region protrudes from the isolation structure to form a first fin portion in the first region and a second fin portion in the second region;

[0027] Form a first work function layer, the first work function layer covers the surfaces of the first fin portion and the second fin portion;

[0028] Form a second work function layer on the first work function layer;

[0029] Form a dielectric layer to cover the first work function layer, the second work function layer and fill between the first fin portions, between the second fin portions, and between the first fin portion and the second fin portion;

[0030] Etch away part of the dielectric layer to expose the second work function layer on the first fin portion;

[0031] Etch away the second work function layer on the first fin portion to expose the first work function layer on the first fin portion;

[0032] Generate free radicals by exciting a first gas with metastable particles, the free radicals generated by the first gas contact the first work function layer on the first fin portion to remove the dangling bonds free on the surface of the first work function layer;

[0033] Remove the dielectric layer on the second fin portion;

[0034] Generate free radicals by exciting a second gas with metastable particles, the free radicals generated by the second gas process the surface of the first work function layer to repair the etching damage of the first work function layer.

[0035] Optionally, after etching away the second work function layer on the first fin portion, transfer the substrate to a process chamber, and sequentially perform the steps of removing the dangling bonds free on the surface of the first work function layer, removing the dielectric layer on the second fin portion, and repairing the etching damage on the surface of the first work function layer in the process chamber.

[0036] The manufacturing method of the high-k metal gate device of the present application, after forming the first work function layer, treats the surface of the first work function layer with radicals generated by metastable particles exciting a first gas to remove the dangling bonds free on the surface of the first work function layer, reducing the dangling bonds free on the surface of the first work function layer, and can improve the defect that the work function of the first work function layer decreases due to the combination of the free dangling bonds and the material of the first work function layer. After etching and removing the second work function layer on the first fin, the first work function layer on the first fin is treated with radicals generated by metastable particles exciting a second gas to reduce the material loss of the first work function layer and improve the problem that the dielectric constant of the gate dielectric layer of the device decreases due to the material loss of the first work function layer, thereby improving the problem of the gate leakage current of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0038] Figure 1 It is a process flow chart of the manufacturing method of the high-k metal gate device provided in an embodiment;

[0039] Figure 2 It is a schematic structural diagram after forming the first work function layer on the substrate in an embodiment;

[0040] Figure 3 It is a schematic diagram of treating the first work function layer with radicals provided in an embodiment;

[0041] Figure 4 It is a process flow chart of the manufacturing method of the high-k metal gate device provided in another embodiment;

[0042] Figure 5 It is a schematic structural diagram after forming the first work function layer covering the first fin and the second fin in an embodiment;

[0043] Figure 6 It is a schematic structural diagram after forming the second work function layer, the dielectric layer and the hard mask layer in an embodiment;

[0044] Figure 7 It is a schematic structural diagram after etching the hard mask layer to expose the dielectric layer in the first region in an embodiment;

[0045] Figure 8 It is a schematic structural diagram after etching and removing the dielectric layer in the first region in an embodiment;

[0046] Figure 9 It is a schematic diagram of the structure after etching and removing the remaining hard mask layer in an embodiment;

[0047] Figure 10 It is a schematic diagram of the structure after etching and removing the second work function layer in the first region in an embodiment;

[0048] Figure 11 It is a schematic diagram of the structure after etching and removing the remaining dielectric layer in an embodiment;

[0049] Figure 12 It is a schematic diagram of the structure after forming a gate conductive layer in an embodiment;

[0050] Figure 13 It is a schematic diagram of the structure after forming a first device in the first region and a second device in the second region in an embodiment.

[0051] Description of the reference numerals:

[0052] 10. Substrate; 11. Active region; 111. First fin; 211. Second fin; 12. Isolation structure; 21. First work function layer; 22. Second work function layer; 30. Dielectric layer; 40. Hard mask layer; 50. Photoresist layer; 23. Gate conductive layer; 60. First device; 70. Second device; A1. First region; A2. Second region. Detailed implementation manners

[0053] To facilitate the understanding of the present application, the present application will be described more comprehensively below with reference to the relevant drawings. The preferred embodiments of the present application are given in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided to make the disclosure of the present application more thorough and comprehensive.

[0054] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which the present application belongs. The terms used in the specification of the present application herein are only for the purpose of describing specific embodiments and are not intended to limit the present application.

[0055] As described in the background art, as the size of semiconductor devices is miniaturized, the thickness of the high-k gate dielectric layer is getting thinner and thinner, and there are still many problems with high-k metal gate devices.

[0056] As the size of semiconductor devices decreases, the thickness of the corresponding high-k gate dielectric layer becomes thinner and thinner. The process of depositing the high-k gate dielectric layer may cause chlorine elements to be incorporated into the high-k layer, and the free chlorine can react with the high-k gate dielectric layer, reducing the dielectric constant of the high-k gate dielectric layer. Moreover, during the patterning process or etching the film layer on the high-k gate dielectric layer, plasma bombardment or chemical etching may cause damage to the high-k gate dielectric layer, reducing the dielectric constant of the high-k gate dielectric layer.

[0057] According to an exemplary embodiment, this embodiment provides a manufacturing method for a high-k metal gate device, as Figure 1 shown. The manufacturing method for the high-k metal gate device includes the following steps:

[0058] Step S101: Provide a substrate 10, where the substrate 10 includes an active region 11 and an isolation structure 12, and the isolation structure 12 and the active region 11 are arranged at intervals.

[0059] Referring to Figure 2 shown, the substrate 10 can be a semiconductor substrate, and the material of the semiconductor substrate can include silicon (Si), silicon germanium (SiGe), silicon germanium carbon (SiGeC), silicon carbide (SiC), gallium arsenide (GaAs), indium arsenide (InAs), indium phosphide (InP), or other III / V semiconductor materials or II / VI semiconductor materials. Or, for another example, the semiconductor substrate can be a layered substrate including, such as, Si / SiGe, Si / SiC, silicon-on-insulator (SOI), or silicon germanium-on-insulator.

[0060] The substrate 10 includes an active region 11 and an isolation structure 12, and the active regions 11 are arranged at intervals. The isolation structure 12 is arranged between the active regions 11 to isolate adjacent active regions 11. The material of the isolation structure 12 can include at least one of silicon oxide, silicon nitride, or silicon oxynitride.

[0061] Step S102: Form a first work function layer 21, and the first work function layer 21 covers the active region 11.

[0062] Continuing to refer to Figure 2 shown, the first work function layer 21 can be deposited by an atomic layer deposition process (ALD), and the first work function layer 21 covers the surfaces of the active region 11 and the isolation structure 12.

[0063] During the process of depositing the first work function layer 21, when the precursor gas does not react completely or the cleaning is not thorough, the precursor gas may react with the material of the first work function layer 21 or may be incorporated into the first work function layer 21, forming dangling bonds. Dangling bonds are unsaturated chemical bonds that will become charge traps, affecting the dielectric properties of the first work function layer 21 and possibly causing leakage current problems.

[0064] The first work function layer 21 includes a material with a high dielectric constant value. Herein, a high dielectric constant means that the dielectric constant value is greater than 3.9. By way of example, the material of the first work function layer 21 may include at least one of hafnium silicate (HfSiO x ), hafnium silicon oxynitride (HfSiON), hafnium silicate oxide compound (HfSiO4), or hafnium dioxide (HfO2). Alternatively, the material of the first work function layer 21 may also include alumina or lanthanum oxide, etc.

[0065] Taking the material of the first work function layer 21 including hafnium dioxide as an example, during the process of depositing hafnium dioxide, if the precursor does not react completely, residual chloride ions or organic substances may remain in the first work function layer 21, forming free chlorine dangling bonds.

[0066] Step S103: Excite the first gas by metastable particles to generate free radicals, and the free radicals generated by the first gas contact the surface of the first work function layer 21 to remove the free dangling bonds on the surface of the first work function layer 21.

[0067] Referring to Figure 3 As shown, metastable particles are atoms in an excited state but with a relatively long lifetime. The energy of metastable particles is higher than the ground state but they cannot quickly transition through spontaneous emission. The energy of the free radicals generated by exciting the first gas by metastable particles is small. The free radicals generated by the first gas combine with the free dangling bonds on the surface of the first work function layer 21, which can reduce the free dangling bonds, so as to prevent the free dangling bonds from combining with the material of the first work function layer 21 and causing a change in the work function of the first work function layer 21, and the contact between the free radicals and the surface of the first work function layer 21 causes little damage to the first work function layer 21 and does not damage the first work function layer 21.

[0068] In this embodiment, metastable particles are obtained by exciting a metastable gas source under the first process conditions. The first gas is excited by the metastable particles to generate free radicals, and the free radicals generated by the first gas contact the surface of the first work function layer 21 and combine with the free dangling bonds on the surface of the first work function layer 21 to remove the free dangling bonds on the surface of the first work function layer 21.

[0069] The first process conditions are as follows: temperature 100°C - 200°C; source power 100W - 1000W; pressure 100 mTorr - 1000 mTorr. The metastable gas source is a noble gas, such as helium (He) or neon (Ne); the first gas may include at least one of nitrogen (N2) or hydrogen (H2); the processing duration is 10s - 30s.

[0070] For example, helium can be used as the metastable gas source. Helium has a low excitation energy and is easy to generate metastable particles through electron collision or radio frequency discharge. Helium is ionized by radio frequency and excited to the metastable state to form high metastable particles (He*). The first gas is excited by the metastable particles. The first gas includes a mixture of N2 and H2, and the ratio of H2 to N2 is 1:4. The metastable particles transfer energy through collision to dissociate the first gas to obtain hydrogen radicals ·H and nitrogen radicals ·N. The hydrogen radicals ·H and nitrogen radicals ·N combine with the free dangling bonds in the first work function layer 21 to prevent the free dangling bonds from reacting or combining with the material of the first work function layer 21.

[0071] In the manufacturing method of the high-k metal gate device of this embodiment, after the first work function layer 21 is formed, the surface of the first work function layer 21 is treated with radicals generated by exciting the first gas with metastable particles to remove the free dangling bonds on the surface of the first work function layer 21, reducing the free dangling bonds on the surface of the first work function layer 21. It can improve the defect that the work function of the first work function layer 21 decreases due to the combination of free dangling bonds and the material of the first work function layer 21, which is beneficial to precisely regulating the work function of the first work function layer 21 and improving the defect of the gate leakage current of the high-k metal gate device.

[0072] In some embodiments, the radicals generated by the first gas combine with the free dangling bonds on the surface of the first work function layer 21 to generate volatile reactants. In this way, it can prevent the products of the radicals generated by the first gas and the dangling bonds from attaching to the first work function layer 21 and affecting the accuracy of the work function of the first work function layer 21.

[0073] For example, the metastable particles excite the first gas to generate hydrogen radicals ·H. The hydrogen radicals ·H combine with the free chlorine dangling bonds on the surface of the first work function layer 21 to generate hydrogen chloride (HCl) gas. The hydrogen chloride gas escapes into the process space and can be removed by suction.

[0074] In some embodiments, refer to Figure 5 As shown, the substrate 10 has a first region A1 and a second region A2. The active region 11 protrudes from the isolation structure 12 to form a first fin portion 111 in the first region A1 and a second fin portion 211 in the second region A2; the first work function layer 21 covers the surfaces of the first fin portion 111 and the second fin portion 211. In this embodiment, the manufacturing method of the high-k metal gate device further includes the following steps:

[0075] Step S104: Form a second work function layer 22 on the first work function layer 21.

[0076] Refer to Figure 6 As shown, the second work function layer 22 can be deposited by an atomic layer deposition process. The second work function layer 22 is located on the first fin 111 and the second fin 211, and the second work function layer 22 covers the first work function layer 21. The second work function layer 22 can include a single-layer work function layer or a multi-layer work function layer.

[0077] The second work function layer 22 has a dielectric constant greater than 3.9. The material of the second work function layer 22 is different from that of the first work function layer 21. Exemplarily, the material of the second work function layer 22 can include titanium nitride (TiN), tantalum nitride (TaN), titanium aluminum nitride (TiAlN). The second work function layer 22 is used to adjust the dielectric constant of the device gate dielectric layer to form devices with different threshold voltages on the same substrate 10.

[0078] Step S105: Etch and remove the second work function layer 22 on the first fin 111.

[0079] Refer to Figure 10 As shown, the second work function layer 22 on the first fin 111 can be removed through multiple processes such as light exposure and etching. A single layer of the first work function layer 21 is provided on the first fin 111, and two layers of the first work function layer 21 and the second work function layer 22 are provided on the second fin 211. By providing different numbers of work function layers on the first fin 111 and the second fin 211, the dielectric constants of the gate dielectric layers of the devices in the first region A1 and the second region A2 are made different, and the threshold voltages of the devices in the first region A1 and the second region A2 are made different.

[0080] Step S106: Generate free radicals by exciting a second gas with metastable particles, and the free radicals generated by the second gas process the surface of the first work function layer 21 to repair the etching damage of the first work function layer 21.

[0081] Refer to Figure 10As shown in the figure, since the process of etching away the second work function layer 22 on the first fin 111 may damage the first work function layer 21, in this embodiment, after etching away the second work function layer 22 on the first fin 111, a metastable gas source is excited to obtain metastable particles, and the metastable particles are used to excite a second gas to generate free radicals. The free radicals generated by the second gas contact the first work function layer 21 on the first fin 111 to induce atomic rearrangement of the first work function layer 21, so as to repair the etching damage of the first work function layer 21 on the first fin 111. In this way, the problem that the work function of the first work function layer 21 decreases due to surface damage of the first work function layer 21 can be improved, which is beneficial to improving the adjustment accuracy of the dielectric constant of the gate dielectric layer of the device.

[0082] In this embodiment, a metastable gas source is excited under a second process condition to obtain metastable particles, and the metastable particles are used to excite a second gas to generate free radicals.

[0083] The second process condition is as follows: temperature 100°C - 200°C; source power 100W - 1000W; pressure 100mTorr - 1000mTorr. The metastable gas source is a noble gas, such as helium (He) or neon (Ne); the second gas may include at least one of nitrogen (N2) or hydrogen (H2); the processing duration is 10s - 100s.

[0084] In this embodiment, the second gas includes a mixture of N2 and H2, and the ratio of H2 to N2 is 1:4. That is to say, the second gas can use the same gas as the first gas. In this way, it is beneficial to simplify the production equipment line and reduce the manufacturing cost.

[0085] The metastable particles excite the second gas to generate hydrogen free radicals ·H and nitrogen free radicals ·N. The hydrogen free radicals ·H and nitrogen free radicals ·N contact the surface of the first work function layer 21 to induce rearrangement of the material of the first work function layer 21. Taking the material of the first work function layer 21 including hafnium dioxide as an example, the hydrogen free radicals ·H and nitrogen free radicals ·N react with the hafnium dioxide on the surface of the first work function layer 21, prompting the migration of hafnium dioxide atoms to fill surface defects. The surface of the repaired first work function layer 21 is flat and uniform hafnium dioxide, which can improve the problem that the dielectric constant of the first work function layer 21 decreases due to etching.

[0086] In some embodiments, step S103 is performed before step S104 of forming the second work function layer 22 on the first work function layer 21. In step S103, the first gas is excited by metastable particles to generate free radicals, and the free radicals generated by the first gas contact the surface of the first work function layer 21 to remove the dangling bonds free on the surface of the first work function layer 21.

[0087] Thus, after forming the first work function layer 21, the free radicals treat the entire surface of the first work function layer 21, which can remove more free dangling bonds, further improving the defect that the combination of the free dangling bonds and the material of the first work function layer 21 causes the work function of the first work function layer 21 to decrease. This can not only improve the control accuracy of the dielectric constant of the gate dielectric layer of the device in the first region A1, but also improve the control accuracy of the dielectric constant of the gate dielectric layer of the device formed in the second region A2, and can improve the problem that the dielectric constant of the gate dielectric layer decreases due to the material loss of the work function layer, thereby improving the problem of gate leakage current of the device.

[0088] In some embodiments, in step S103, metastable particles are used to excite the first gas to generate free radicals, and the free radicals generated by the first gas contact the surface of the first work function layer 21 to remove the free dangling bonds on the surface of the first work function layer 21, which is performed after etching and removing the second work function layer 22 on the first fin 111 in step S104.

[0089] In this embodiment, only the exposed first work function layer 21 in the first region A1 is treated with free radicals to remove the free dangling bonds on the surface of the first work function layer 21 in the first region A1. The step of removing the free dangling bonds by free radicals and subsequent etching steps can be concentrated and executed in the same chamber, which is beneficial to saving production line equipment, reducing production line costs, and at the same time can reduce the number of substrate 10 transfers and the losses caused by substrate 10 transfers.

[0090] In some embodiments, step S105: etching and removing the second work function layer 22 on the first fin 111 includes steps S1051 - S1054:

[0091] Step S1051: forming a dielectric layer 30, the dielectric layer 30 covering the first work function layer 21 and the second work function layer 22 and filling between the first fins 111, between the second fins 211, and between the first fin 111 and the second fin 211.

[0092] Referring to Figure 6 As shown, a chemical vapor deposition (CVD) dielectric layer 30 can be used. After depositing the dielectric layer 30, a chemical mechanical polishing process is used to polish the dielectric layer 30 to grind the top surface of the dielectric layer 30 into a flat surface, and the top surface of the polished dielectric layer 30 is higher than the second work function layer 22 on the first fin 111 and the second fin 211, so as to provide a flat process surface for subsequent steps.

[0093] Exemplarily, the material of the dielectric layer 30 can include silicon oxide, silicon oxynitride, or silicon carbonitride.

[0094] In this embodiment, after forming the dielectric layer 30, a hard mask layer 40 is formed on the dielectric layer 30. The hard mask layer 40 can be deposited by chemical vapor deposition or atomic layer deposition process.

[0095] The material of the hard mask layer 40 has a high etching ratio with respect to the dielectric layer 30. In this embodiment, the material of the dielectric layer 30 includes silicon oxide, and the material of the hard mask layer 40 includes silicon nitride.

[0096] Step S1052: Etch away a part of the dielectric layer 30 to expose the second work function layer 22 on the first fin 111;

[0097] Referring to Figure 6 、 Figure 7 As shown, a photoresist layer 50 is formed on the hard mask layer 40, and the pattern of the first region A1 is exposed on the photoresist layer 50. The hard mask layer 40 is etched according to the exposed photoresist layer 50. The photoresist layer 50 is ashed, and then the dielectric layer 30 is etched using the hard mask layer 40 as a mask to remove the dielectric layer 30 located in the first region A1, exposing the second work function layer 22 on the first fin 111.

[0098] Exemplarily, a dry process can be used to etch the hard mask layer 40 and the dielectric layer 30.

[0099] Step S1053: Etch away the second work function layer 22 on the first fin 111 to expose the first work function layer 21 on the first fin 111;

[0100] In this embodiment, referring to Figure 9 As shown, the remaining hard mask layer 40 can be etched away first to expose the top surface of the dielectric layer 30 to facilitate the subsequent removal of the dielectric layer 30. Then, referring to Figure 10 As shown, the second work function layer 22 on the first fin 111 is etched away.

[0101] Exemplarily, the hard mask layer 40 can be removed by cleaning with a diluted hydrofluoric acid (HF) solution.

[0102] Exemplarily, the second work function layer 22 on the first fin 111 can be removed by cleaning with a mixture of ammonium hydroxide (NH4OH) and hydrogen peroxide (H2O2).

[0103] Step S1054: Remove the dielectric layer 30 on the second fin 211.

[0104] In this embodiment, to remove the dielectric layer 30 on the second fin 211, the following implementation manner can be adopted:

[0105] First, a third gas is ionized to generate plasma, and a part of the dielectric layer 30 is removed by plasma etching.

[0106] Then, metastable particles are used to excite a fourth gas to generate free radicals, and the remaining dielectric layer 30 is etched away by the free radicals generated by the fourth gas.

[0107] Among them, the third gas may include oxygen. First, oxygen is ionized by radio frequency to generate oxygen plasma, and the dielectric layer 30 is etched by the oxygen plasma to accelerate the etching rate and quickly etch away most of the dielectric layer 30. Before the second work function layer 22 is exposed by etching, the plasma etching of the dielectric layer 30 is stopped. Instead, metastable particles are used to excite a fourth gas to generate free radicals, and the remaining dielectric layer 30 is etched away by the free radicals. The etching rate of the dielectric layer 30 by the dielectric layer 30 is slower and gentler, which can effectively reduce the etching damage of the first work function layer 21 of the first fin 111.

[0108] In this embodiment, the fourth gas includes a mixture of N2 and H2. For example, the ratio of H2 to N2 is 1:4. In this way, the first gas, the second gas, and the fourth gas are the same gas, reducing the gas sources required for manufacturing the high-k metal gate device, streamlining the production line, and reducing the production cost.

[0109] According to an exemplary embodiment, the manufacturing method of the high-k metal gate device of this embodiment is as Figure 4 shown, and includes the following steps:

[0110] Step S201: Provide a substrate 10, the substrate 10 includes an active region 11 and an isolation structure 12, the isolation structure 12 and the active region 11 are arranged at intervals, the substrate 10 has a first region A1 and a second region A2, the active region 11 protrudes from the isolation structure 12 to form a first fin 111 in the first region A1, and a second fin 211 is formed in the second region A2.

[0111] Referring to Figure 5 shown, the substrate 10 provided in this embodiment includes a first region A1 and a second region A2. The first fin 111 in the first region A1 and the second fin 211 in the second region A2 are respectively used to form high-k metal gate devices with different turn-on voltages, and the dielectric constants of the gate dielectric layers of the high-k metal gate devices in the first region A1 and the second region A2 are different.

[0112] Step S202: Form a first work function layer 21, and the first work function layer 21 covers the surfaces of the first fin 111 and the second fin 211.

[0113] In this embodiment, continuing to refer to Figure 5 shown, hafnium chloride (HfCl4) and gaseous water are used as precursors, and the first work function layer 21 is deposited by an atomic layer deposition process. The material of the first work function layer 21 includes hafnium dioxide.

[0114] During the deposition process, chlorine elements remain on the first work function layer 21, forming free chlorine dangling bonds on the surface of the first work function.

[0115] Step S203: Form a second work function layer 22 on the first work function layer 21.

[0116] In this embodiment, referring to Figure 6 as shown, the second work function layer 22 is deposited by atomic layer deposition process, and the material of the second work function layer 22 includes titanium nitride.

[0117] Step S204: Form a dielectric layer 30 to cover the first work function layer 21, the second work function layer 22 and fill between the first fin 111, between the second fin 211, and between the first fin 111 and the second fin 211.

[0118] In this embodiment, continuing to refer to Figure 6 as shown, the dielectric layer 30 is formed by chemical vapor deposition, and the material of the dielectric layer 30 includes silicon oxide.

[0119] Step S205: Etch away part of the dielectric layer 30 to expose the second work function layer 22 on the first fin 111.

[0120] In this embodiment, continuing to refer to Figure 6 as shown, first, a hard mask layer 40 is formed on the dielectric layer 30 by chemical vapor deposition, and the material of the hard mask layer 40 includes silicon nitride. A photoresist layer 50 is formed on the hard mask layer 40, and a pattern of the first region A1 is exposed on the photoresist layer 50. Referring to Figure 7 as shown, the hard mask layer 40 is etched according to the exposed photoresist layer 50. In this embodiment, the hard mask layer 40 is etched with a fluorine-containing gas, such as nitrogen trifluoride (NF3).

[0121] Then, referring to Figure 8 as shown, the dielectric layer 30 is etched according to the hard mask layer 40 until the second work function layer 22 on the first fin 111 is exposed and then the etching stops.

[0122] Exemplarily, the dielectric layer 30 can be etched under the process conditions of 10°C - 60°C, source power of 100W - 1000W, and pressure of 10mTorr - 100mTorr, using at least one of methane (CH4), nitrogen, hydrogen, and oxygen.

[0123] Step S206: Etch away the second work function layer 22 on the first fin 111 to expose the first work function layer 21 on the first fin 111.

[0124] In this embodiment, referring to Figure 9As shown, first, a diluted hydrofluoric acid (HF) solution is used to clean and remove the remaining hard mask layer 40 on the dielectric layer 30. Then, referring to Figure 10 As shown, a mixture of ammonium hydroxide (NH4OH) and hydrogen peroxide (H2O2) is used to clean and remove the second work function layer 22 on the first fin 111.

[0125] Step S207: Metastable particles are used to excite the first gas to generate free radicals. The free radicals generated by the first gas contact the first work function layer 21 on the first fin 111 to remove the dangling bonds free on the surface of the first work function layer 21.

[0126] In this embodiment, referring to Figure 10 As shown, under the process conditions of a temperature of 100°C - 200°C, a source power of 100W - 1000W, and a pressure of 100 mTorr - 1000 mTorr, helium gas is excited to generate metastable particles, and then nitrogen and / or hydrogen gas is excited by the metastable particles to generate free radicals. The free radicals combine with the chlorine dangling bonds on the surface of the first work function layer 21 to form gas products, removing the dangling bonds free on the surface of the first work function layer 21. In this embodiment, the treatment duration of the free radicals on the first work function layer 21 is 10s - 30s.

[0127] Step S208: Remove the dielectric layer 30 on the second fin 211.

[0128] In this embodiment, referring to Figure 10 、 Figure 11 As shown, oxygen is ionized with a radio frequency power of 500W to generate oxygen plasma, and the remaining most of the dielectric layer 30 is removed by oxygen plasma etching.

[0129] Then, under the process conditions of 100 mTorr - 2000 mTorr, helium gas is excited with a source power of 1000W to generate metastable particles, nitrogen and / or hydrogen gas is excited by the metastable particles to generate free radicals, and the remaining dielectric layer 30 is removed by free radical etching, so as to reduce the damage of the etched dielectric layer 30 to the first work function, reduce the material loss of the first work function layer 21, and be beneficial to maintaining the accuracy of the dielectric constant of the first work function layer 21.

[0130] Step S209: Metastable particles are used to excite the second gas to generate free radicals, and the free radicals generated by the second gas are used to treat the surface of the first work function layer 21 to repair the etching damage of the first work function layer 21.

[0131] In this embodiment, referring to Figure 11As shown, under the process conditions of 100 °C and 100 mTorr - 1000 mTorr, metastable particles are generated by exciting helium gas with a source power of 100 W - 1000 W. Free radicals are generated by exciting nitrogen and / or hydrogen gas with the metastable particles. The material of the first work function layer 21 in the first region A1 is rearranged by the free radicals, promoting the migration of hafnium dioxide atoms to fill surface defects. The surface of the repaired first work function layer 21 is flat and uniform hafnium dioxide, which can improve the problem of the reduction of the dielectric constant of the first work function layer 21 caused by etching.

[0132] In some embodiments, after step S209, the following steps are further performed:

[0133] Step S210: Form a gate conductive layer 23, and the gate conductive layer 23 covers the first work function layer 21 in the first region A1 and the second work function layer 22 in the second region A2.

[0134] Referring to Figure 12 As shown, the gate conductive layer 23 can be formed by atomic layer deposition, chemical vapor deposition, or physical vapor deposition (Physical Vapor Deposition, PVD).

[0135] Exemplarily, the gate conductive layer 23 can include a conductive metal. For example, the gate conductive layer 23 can include tungsten.

[0136] Step S211: Pattern the gate conductive layer 23, the second work function layer 22, and the first work function layer 21 to form a first device 60 in the first region A1 and a second device 70 in the second region A2 at the same time.

[0137] In this embodiment, after a interlayer dielectric layer (not shown in the figure) is formed, a mask layer can be formed on the interlayer dielectric layer. Referring to Figure 13 As shown, the gate conductive layer 23, the second work function layer 22, and the first work function layer 21 are etched according to the mask layer, so that the gate conductive layer 23 in the first region A1 and the gate conductive layer 23 in the second region A2 are disconnected. The first work function layer 21 and the gate conductive layer 23 in the first region A1 form a first device 60, and the gate dielectric layer of the first device 60 includes a single layer of the first work function layer 21. The first work function layer 21, the second work function layer 22, and the gate conductive layer 23 in the second region A2 form a second device 70, and the gate dielectric layer of the second device 70 includes a stack of the first work function layer 21 and the second work function layer 22. The dielectric constants of the gate dielectric layers of the first device 60 and the second device 70 are different, and the threshold voltages of the first device 60 and the second device 70 are different.

[0138] The manufacturing method of the high-k metal gate device in this embodiment divides the substrate 10 into a first region A1 and a second region A2. A first work function layer 21 is formed on the first fin 111 in the first region A1 as the gate dielectric layer of the device in the first region A1, and a stack of a first work function layer 21 and a second work function layer 22 is formed on the second fin 211 in the second region A2 as the gate dielectric layer of the device in the second region A2, realizing the integration of high-k metal gate devices with different threshold voltages on the same substrate 10. The first region A1 forms a high-threshold voltage device, and the second region A2 forms a low-threshold voltage, providing support for the design and manufacturing of complex semiconductor circuits, and capable of improving device performance and reducing power consumption.

[0139] In the manufacturing method of the high-k metal gate device in this embodiment, after etching and removing the second work function layer 22 on the first fin 111, free radicals generated by metastable particle excitation are used to remove the chlorine dangling bonds remaining on the surface of the first work function layer 21, which can reduce the influence of chlorine dangling bonds on the electrical performance of the device, and is beneficial to improving the dielectric constant of the gate dielectric layer of the device in the first region A1 and enhancing the stability of the device; after etching and removing, metastable particle excitation is used to repair the surface damage of the first work function layer 21, which is beneficial to reducing the material loss of the first work function layer 21, applicable to forming a thinner first work function layer 21, applicable to manufacturing devices with smaller size nodes, and improving the manufacturing requirements for the high-k gate dielectric layer due to the reduction of size nodes.

[0140] In some embodiments, after etching and removing the second work function layer 22 on the first fin 111, the substrate 10 is transferred into a process chamber, and in the process chamber, steps of removing the free dangling bonds on the surface of the first work function layer 21, removing the dielectric layer 30 on the second fin 211, and repairing the etching damage on the surface of the first work function layer 21 are sequentially performed.

[0141] In this embodiment, after etching and removing the second work function layer 22 on the first fin 111 in step S206, the structure is transferred into a process chamber. First, the process chamber is adjusted to the metastable excitation free radical mode, free radicals are generated by metastable excitation, and the dangling bonds on the surface of the first work function layer 21 are removed by the free radicals; then, the process chamber is adjusted to the inductively coupled plasma excitation mode, and the plasma generated by inductively coupling and exciting the etching gas is used to etch the dielectric layer 30. After most of the dielectric layer 30 is etched and removed, the process chamber is adjusted to the metastable excitation free radical mode to etch and remove the remaining dielectric layer 30, and the etching on the surface of the first work function layer 21 is repaired by the free radicals.

[0142] The manufacturing method of this embodiment optimizes the process flow so that multiple steps can be performed in the same chamber, reducing the transfer process of the substrate 10, capable of reducing the yield decline caused by multiple transfers, and at the same time reducing the number of devices on the production line and the production line cost.

[0143] The manufacturing method of the high-k metal gate device of the present application can reduce the dangling bonds on the surface of the first work function layer 21, repair the surface damage of the first work function layer 21, improve the surface uniformity of the first work function layer 21, reduce the loss of the work function material of the first work function layer 21, and improve the control accuracy of the thickness and work function of the first work function layer 21 by optimizing the process flow and using free radicals generated by metastable excitation to treat the first work function layer 21. This is beneficial to improving the gate control ability of the device, is suitable for forming a thinner high-k gate dielectric layer, and is suitable for the fabrication of smaller-sized devices.

[0144] In the manufacturing method of the high-k metal gate device of the present application, free radicals generated by metastable excitation are used to treat the first work function layer 21. The energy of the free radicals generated by metastable excitation is relatively low, and the damage to the first work function layer 21 is very small, which is beneficial to improving the yield and stability of the device. The temperature of the processing procedure of the manufacturing method of the high-k metal gate device of the present application is relatively low, which can reduce the thermal damage to the device and further improve the yield and stability of the device. At the same time, the manufacturing method of the high-k metal gate device of the present application has good compatibility with the existing production line and process, and can be implemented on the existing production line without adding new production lines or production equipment, and the process cost is low.

[0145] According to an exemplary embodiment, the present disclosure also provides a high-k metal gate device, which is fabricated by using the manufacturing method of the high-k metal gate device of the above embodiment.

[0146] Among them, the high-k metal gate device of this embodiment can be a dynamic random access memory (DRAM), a static random access memory (SRAM), a flash EPROM, a ferroelectric random access memory (FeRAM), a magnetic random access memory (MRAM), or other types of memories.

[0147] According to an exemplary embodiment, the present disclosure also provides an electronic device, including the high-k metal gate device of the above embodiment or a high-k metal gate device fabricated by using the manufacturing method of the high-k metal gate device of the above embodiment. The electronic device can be a storage device, a mobile phone, a computer, a tablet computer, a television, an artificial intelligence device, etc.

[0148] The electronic device is, for example but not limited to, consumer electronic products, home electronic products, vehicle-mounted electronic products, financial terminal products, and other suitable types of electronic products. Examples of consumer electronic products include mobile phones, tablet computers, laptop computers, desktop monitors, all-in-one computers, etc. Examples of home electronic products include smart door locks, televisions, refrigerators, wearable devices, etc. Examples of vehicle-mounted electronic products include vehicle navigation devices, in-vehicle DVDs, etc. Examples of financial terminal products include ATMs, terminals for self-service business handling, etc.

[0149] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features of the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as within the scope described in this specification.

[0150] The above-described embodiments only represent several implementation manners of the present application, and the description thereof is relatively specific and detailed. However, it should not be construed as a limitation to the scope of the patent application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the appended claims.

Claims

1. A manufacturing method of a high-k metal gate device, characterized in that Including: Providing a substrate, the substrate including an active region and an isolation structure, the isolation structure and the active region being spaced apart; the substrate having a first region and a second region, the active region protruding from the isolation structure to form a first fin portion in the first region and a second fin portion in the second region; Forming a first work function layer, the first work function layer covering the surfaces of the first fin portion and the second fin portion; Exciting a first gas by metastable particles to generate free radicals, the free radicals generated by the first gas contacting the surface of the first work function layer to remove dangling bonds free on the surface of the first work function layer; the first gas includes a mixture of nitrogen and hydrogen; Forming a second work function layer on the first work function layer; Etching and removing the second work function layer on the first fin portion; Processing the surface of the first work function layer by free radicals generated by exciting a second gas by metastable particles; the second gas includes a mixture of nitrogen and hydrogen; Exciting a metastable gas source under a first process condition to obtain metastable particles, the first process condition being: temperature 100°C - 200°C; source power 100W - 1000W; pressure 100mTorr - 1000mTorr, exciting a first gas by metastable particles to generate free radicals, the first gas includes a mixture of nitrogen and hydrogen, and the ratio of H2 to N2 is 1:

4.

2. The manufacturing method of the high-k metal gate device according to claim 1, wherein Before forming the second work function layer on the first work function layer, exciting a first gas by metastable particles to generate free radicals, the free radicals generated by the first gas contacting the surface of the first work function layer to remove dangling bonds free on the surface of the first work function layer.

3. The manufacturing method of the high-k metal gate device according to claim 1, characterized in that, After etching and removing the second work function layer on the first fin portion, exciting a first gas by metastable particles to generate free radicals, the free radicals generated by the first gas contacting the surface of the first work function layer to remove dangling bonds free on the surface of the first work function layer.

4. The manufacturing method of the high-k metal gate device according to claim 3, characterized in that, Etching and removing the second work function layer on the first fin portion includes: Forming a dielectric layer, the dielectric layer covering the first work function layer, the second work function layer and filling between the first fin portions, between the second fin portions, and between the first fin portion and the second fin portion; Etching and removing a part of the dielectric layer to expose the second work function layer on the first fin portion; Etching and removing the second work function layer on the first fin portion to expose the first work function layer on the first fin portion; Removing the dielectric layer on the second fin portion.

5. The manufacturing method of the high-k metal gate device according to claim 4, wherein Removing the dielectric layer on the second fin portion includes: Ionizing a third gas to generate plasma, and etching and removing a part of the dielectric layer by the plasma; the third gas includes oxygen; Exciting a fourth gas by metastable particles to generate free radicals, and etching and removing the remaining dielectric layer by the free radicals generated by the fourth gas.

6. The manufacturing method of the high-k metal gate device according to claim 5, characterized in that, After etching away the second work function layer on the first fin, transfer the substrate into a process chamber, and sequentially perform steps of removing dangling bonds on the surface of the first work function layer, removing the dielectric layer on the second fin, and treating the surface of the first work function layer with radicals generated by metastable particles exciting a second gas in the process chamber.

7. The manufacturing method of the high-k metal gate device according to claim 5, characterized in that The first gas, the second gas, and the fourth gas are the same gas.

8. The manufacturing method of the high-k metal gate device according to any one of claims 1-7, characterized in that, The metastable particles are obtained by ionizing helium gas, and the metastable particles are metastable helium.

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