Monolithic heterogeneous integrated structure based on silicon-based 3C-SiC and preparation method thereof

Abstract

The invention provides a monolithic heterogeneous integrated structure based on silicon-based 3C-SiC and a preparation method thereof. In the integrated structure, a 3C-SiC layer is arranged on a top silicon layer; the top silicon layer is sequentially provided with a first functional area, a second functional area, a third functional area, a fourth functional area and a fifth functional area; the 3C-SiC layer is sequentially provided with a first sub 3C-SiC layer, a second sub 3C-SiC layer and a third sub 3C-SiC layer; the first functional area is used for forming a silicon optical device; the first sub 3C-SiC layer, the second sub 3C-SiC layer and the third sub 3C-SiC layer are respectively arranged corresponding to the second functional region, the third functional region and the fourth functional region, and are respectively used for arranging a photoelectric device, a radio frequency device and a power device; and the fifth functional region is used for arranging an MEMS device so as to construct and form a multi-device heterogeneous integrated structure. The integrated structure is suitable for integrating multi-element materials; the thermal management capability of the integrated chip is improved, the crosstalk isolation design of monolithic integration is realized, and integration of various devices or modules can be realized according to different application scenes.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor devices, and in particular to a silicon-based 3C-SiC-based monolithic heterogeneous integrated structure and a preparation method thereof. Background Art

[0002] Electronic systems are developing towards miniaturization, diversification and intelligence, aiming to form multifunctional microsystems with perception, communication, processing, transmission, etc. The core technology of microsystems lies in integration, and three-dimensional heterogeneous integration has gradually become the link from chip manufacturing to system integration; under this integration method, different chips can have different functions, processes and characteristics, thereby achieving more diverse applications and higher levels of performance.

[0003] Monolithic integration in heterogeneous integration refers to the integration of various devices with different functions on a single chip. The chip packaging step can be omitted, but the process manufacturing requirements that need to be met are somewhat difficult. Currently, monolithic heterogeneous integration is mainly based on Si substrates; for example, in microelectronic devices, the main development direction is the monolithic heterogeneous integration of III-V group and Si-based CMOS electronic devices; in optoelectronics and MEMS devices, the main development direction is the monolithic heterogeneous integration of III-V group optoelectronic devices, Si-based CMOS electronic devices and MEMS devices.

[0004] However, to achieve the integration of multifunctional modules, it is necessary to rely on multiple materials to complete different functions; there is a large lattice mismatch and thermal mismatch between Si and most compound semiconductors, especially III-V compounds; and the production of III-V devices, quantum wells, thermistors and other devices is not compatible with standard CMOS processes. In addition, the isolation problem between multiple devices and multiple modules also increases the complexity of the manufacturing process; the increased integration of chips also introduces heat dissipation problems.

[0005] In view of the current status of the prior art, the present invention provides a new silicon-based 3C-SiC monolithic heterogeneous integrated structure and a preparation method thereof. Summary of the invention

[0006] Based on the above description, the present invention provides a monolithic heterogeneous integrated structure based on silicon-based 3C-SiC and a preparation method thereof, so as to solve the technical problems of large mismatch between Si substrate and compound semiconductor materials in the existing integration technology, and thermal management and isolation design difficulties between multiple devices and multiple modules.

[0007] The technical solution of the present invention to solve the above technical problems is as follows: In a first aspect, the present invention provides a monolithic heterogeneous integrated structure based on silicon-based 3C-SiC, comprising: a silicon substrate, a buried oxide layer, a top silicon layer, a 3C-SiC layer, a silicon optical device, a radio frequency device, an optoelectronic device, a power device and a MEMS device; The buried oxide layer is disposed between the silicon substrate and the top silicon layer; the 3C-SiC layer is disposed on the top silicon layer; The top silicon layer is provided with a first functional area, a second functional area, a third functional area, a fourth functional area and a fifth functional area in sequence; the 3C-SiC layer is provided with a first sub-3C-SiC layer, a second sub-3C-SiC layer and a third sub-3C-SiC layer in sequence; Among them, the first functional area is used to form the silicon photonic device; the first sub-3C-SiC layer, the second sub-3C-SiC layer and the third sub-3C-SiC layer are respectively arranged corresponding to the second functional area, the third functional area and the fourth functional area, and are respectively used to set the optoelectronic device, the radio frequency device and the power device; the fifth functional area is used to set the MEMS device to construct a multi-device heterogeneous integrated structure.

[0008] Based on the above technical solution, the present invention can also be improved as follows.

[0009] Furthermore, the top silicon layer located in the first functional area is etched at different depths for multiple times, and / or subjected to doping, thin film deposition, local opening, and germanium epitaxial growth processes to construct the silicon optical device.

[0010] Furthermore, the silicon optical device is one or more of a waveguide, a grating, a modulator and a germanium device.

[0011] Furthermore, the radio frequency device is provided on the second sub-3C-SiC layer located in the third functional area; The radio frequency device includes an epitaxial material disposed on the second sub-3C-SiC layer and a dielectric layer and an electrode located on the epitaxial material.

[0012] Furthermore, the epitaxial material is a III-V group material.

[0013] Furthermore, the radio frequency device is GaN HEMT, GaAs HBT, InP HBT or Ga2O3 HEMT.

[0014] Furthermore, the optoelectronic device is bonded to the first sub-3C-SiC layer located in the second functional area; The optoelectronic device is a III-V laser or a light-emitting device.

[0015] Furthermore, the power device is formed on the third sub-3C-SiC layer located in the fourth functional area; The power device is a lateral MOSFET, a lateral SBD or a lateral IGBT.

[0016] Furthermore, the MEMS device is formed on the top silicon layer located in the fifth functional area; The MEMS device is a piezoresistive pressure sensor, a capacitive pressure sensor, a micro-vibrator, a MEMS optical sensor or a biosensor.

[0017] In a second aspect, the present invention further provides a method for preparing a monolithic heterogeneous integrated structure based on silicon-based 3C-SiC as described in the first aspect, comprising: A 3C-SiC layer is grown and deposited on top of a silicon wafer including a buried oxide layer to obtain an integrated substrate; the integrated substrate is provided with five functional areas; After etching the 3C-SiC layer of the second functional area and the first functional area, depositing an insulating layer and planarizing the layer, etching the 3C-SiC layer at different depths for multiple times to form a waveguide and expose the surface of the top silicon layer; At the first functional area, after etching, ion implantation, insulating layer deposition and planarization treatment are performed on the exposed top silicon layer, silicon etching is performed multiple times at different depths to form a silicon optical device; At the third functional area, epitaxially growing semiconductor material on the 3C-SiC layer, etching, dielectric deposition and electrode preparation are performed on the semiconductor material to form a radio frequency device; At the second functional area, bonding is performed on the 3C-SiC layer to form an optoelectronic device; At the fourth functional area, the 3C-SiC layer is etched, dielectric deposited and electrode prepared to form a power device; At the fifth functional area, dielectric deposition, etching, thin film deposition and electrode preparation are performed on the exposed top silicon layer to form a MEMS device.

[0018] Compared with the prior art, the technical solution of this application has the following beneficial technical effects: The monolithic heterogeneous integrated structure based on silicon-based 3C-SiC provided by the present invention is formed with a silicon substrate, a buried oxide layer, a top silicon layer, a 3C-SiC layer, a silicon optical device, a radio frequency device, an optoelectronic device, a power device and a MEMS device; the buried oxide layer is arranged between the silicon substrate and the top silicon layer; the 3C-SiC layer is arranged on the top silicon layer; the top silicon layer is provided with five functional areas in sequence; the first functional area is used to form a silicon optical device; the first sub-3C-SiC layer, the second sub-3C-SiC layer and the third sub-3C-SiC layer are respectively arranged corresponding to the second functional area, the third functional area and the fourth functional area, and are respectively used to set optoelectronic devices, radio frequency devices and power devices; the fifth functional area is used to set MEMS devices, so as to construct a multi-device heterogeneous integrated structure. Compared with the prior art, it has the following beneficial effects: (1) The 3C-SiC layer is placed on the top silicon layer, providing a 3C-SiC-on-Si substrate. This structure combines the advantages of Si's large size and low cost with the advantages of the wide bandgap semiconductor 3C-SiC. Among them, 3C-SiC can be used as a functional layer for some devices, such as the drift layer of power devices, micro-cantilever beams and sensor films of MEMS devices; it can also be used as a buffer layer for epitaxial growth of other materials (radio frequency devices), such as III-V group materials GaN, Ga2O3, etc., which can effectively improve the mismatch and stress between Si and compound semiconductor materials; it can also be used as a bonding layer (optoelectronic devices) to improve the bonding strength between Si and other materials or modules; therefore, the 3C-SiC / Si integrated platform is suitable for multi-material and multi-device integration.

[0019] (2) The 3C-SiC layer has high thermal conductivity, which can improve the thermal management capability of multi-device integration and improve the heat dissipation problem of chips with increased integration. By setting up multiple spaced sub-3C-SiC layers, thermal isolation can be performed between devices or modules, such as isolating heat transfer between thermosensitive devices and heat-generating devices.

[0020] (3) The 3C-SiC layer can inhibit the atomic diffusion between the substrate and the epitaxial layer thereon. It can effectively improve the RF loss when used in RF devices and can realize the crosstalk isolation design of improved monolithic integration using 3C-SiC.

[0021] In summary, in the monolithic heterogeneous integrated structure based on silicon-based 3C-SiC and its preparation method provided by the present invention, the mismatch problem between 3C-SiC / Si and other compound semiconductors is improved relative to Si, and it is suitable for integrating multi-materials; 3C-SiC has high thermal conductivity, and the thermal management capability of the integrated chip can be improved through the spacing layout design; in addition, 3C-SiC can inhibit atomic diffusion and realize the crosstalk isolation design of monolithic integration. Therefore, the monolithic heterogeneous integrated structure based on silicon-based 3C-SiC can realize the integration of multiple devices or modules according to different application scenarios, and realize a heterogeneous integrated chip with multi-functional modules. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 A schematic structural diagram of a monolithic heterogeneous integrated structure based on silicon-based 3C-SiC provided in Example 1 of the present invention; Figures 2 to 9 A schematic diagram of each step of the preparation process of a monolithic heterogeneous integrated structure based on silicon-based 3C-SiC provided in Example 2 of the present invention; Fig.10 A schematic diagram of the integration of optoelectronic devices provided in Example 3 of the present invention; In the accompanying drawings, the components represented by the reference numerals are listed as follows: 1. Silicon substrate; 2. Buried oxide layer; 3. Top silicon layer; 4. 3C-SiC layer; 5. Silicon optical devices; 6. RF devices; 7. Optoelectronic devices; 8. Power devices; 9. MEMS devices. DETAILED DESCRIPTION

[0023] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0024] The present invention provides a monolithic heterogeneous integrated structure based on silicon-based 3C-SiC.

[0025] The following embodiments of the present invention are further described in detail in conjunction with the accompanying drawings and examples. The following examples are used to illustrate the present invention but cannot be used to limit the scope of the present invention.

[0026] Example 1 like Figure 1 As shown, the monolithic heterogeneous integrated structure based on silicon-based 3C-SiC provided in this embodiment includes: a silicon substrate 1, a buried oxide layer 2, a top silicon layer 3, a 3C-SiC layer 4, a silicon optical device 5, a radio frequency device 6, an optoelectronic device 7, a power device 8 and a MEMS device 9.

[0027] The buried oxide layer 2 is disposed between the silicon substrate 1 and the top silicon layer 3 ; and the 3C—SiC layer 4 is disposed on the top silicon layer 3 .

[0028] The top silicon layer 3 is provided with a first functional area, a second functional area, a third functional area, a fourth functional area and a fifth functional area arranged side by side and at intervals in sequence; the 3C-SiC layer 4 is provided with a first sub-3C-SiC layer, a second sub-3C-SiC layer and a third sub-3C-SiC layer in sequence.

[0029] The first functional area is used to form a silicon optical device 5 .

[0030] The top silicon layer 3 located in the first functional area is etched multiple times at different depths, and / or subjected to doping, thin film deposition, local opening, and germanium epitaxial growth processes to form a silicon optical device 5 .

[0031] Specifically, a photoelectric device 7 is bonded on the first sub-3C-SiC layer located in the second functional area.

[0032] In a specific example, the silicon optical device 5 is one or more of a waveguide, a grating, a modulator and a germanium device.

[0033] When the silicon optical device 5 is a waveguide, Figure 1As shown, a waveguide is provided at the first sub-3C-SiC layer of the second functional area. The significance of this is that light is emitted from the optoelectronic device, transmitted to the silicon waveguide through the 3C-SiC waveguide, and then the light is transmitted or emitted, otherwise the light cannot be directly transmitted to the silicon waveguide.

[0034] In a specific example, the optoelectronic device 7 is a III-V laser or a light emitting device.

[0035] The first sub-3C-SiC layer, the second sub-3C-SiC layer and the third sub-3C-SiC layer are respectively arranged corresponding to the second functional area, the third functional area and the fourth functional area, and are respectively used to set the optoelectronic device 7, the radio frequency device 6 and the power device 8; the fifth functional area is used to set the MEMS device 9 to construct a multi-device heterogeneous integrated structure.

[0036] Specifically, a radio frequency device 6 is provided on the second sub-3C-SiC layer located in the third functional area.

[0037] The radio frequency device 6 includes an epitaxial material disposed on the second sub-3C-SiC layer and a dielectric layer and an electrode located on the epitaxial material.

[0038] The epitaxial material is a III-V group material.

[0039] In a specific example, the radio frequency device 6 is a GaN HEMT, a GaAs HBT, an InP HBT or a Ga2O3 HEMT.

[0040] Furthermore, a power device 8 is formed on the third sub-3C-SiC layer located in the fourth functional area. The power device 8 is a lateral MOSFET, a lateral SBD or a lateral IGBT.

[0041] Furthermore, a MEMS device 9 is formed on the top silicon layer 3 located in the fifth functional area.

[0042] The MEMS device 9 is a piezoresistive pressure sensor, a capacitive pressure sensor, a micro-vibrator, a MEMS optical sensor or a biosensor.

[0043] Compared with the prior art, the monolithic heterogeneous integrated structure based on silicon-based 3C-SiC provided in this embodiment has the following beneficial effects: (1) The 3C-SiC layer is placed on the top silicon layer, providing a 3C-SiC-on-Si substrate. This structure combines the advantages of Si's large size and low cost with the advantages of the wide bandgap semiconductor 3C-SiC. Among them, 3C-SiC can be used as a functional layer for some devices, such as the drift layer of power devices, micro-cantilever beams and sensor films of MEMS devices; it can also be used as a buffer layer for epitaxial growth of other materials (radio frequency devices), such as III-V group materials GaN, Ga2O3, etc., which can effectively improve the mismatch and stress between Si and compound semiconductor materials; it can also be used as a bonding layer (optoelectronic devices) to improve the bonding strength between Si and other materials or modules; therefore, the 3C-SiC / Si integrated platform is suitable for multi-material and multi-device integration.

[0044] (2) The 3C-SiC layer has high thermal conductivity, which can improve the thermal management capability of multi-device integration and improve the heat dissipation problem of chips with increased integration. By setting up multiple spaced sub-3C-SiC layers, thermal isolation can be performed between devices or modules, such as isolating heat transfer between thermosensitive devices and heat-generating devices.

[0045] (3) The 3C-SiC layer can inhibit the atomic diffusion between the substrate and the epitaxial layer thereon. It can effectively improve the RF loss when used in RF devices and can realize the crosstalk isolation design of improved monolithic integration using 3C-SiC.

[0046] In summary, the silicon-based 3C-SiC-based monolithic heterogeneous integrated structure and its preparation method provided in this embodiment can realize the integration of various devices or modules according to different application scenarios, and realize a multifunctional module integrated heterogeneous integrated chip.

[0047] Example 2 This embodiment provides a method for preparing a monolithic heterogeneous integrated structure based on silicon-based 3C-SiC provided in Embodiment 1, such as Figures 2 to 9 As shown, including: Step S1: growing and depositing a 3C-SiC layer on the top of a silicon wafer including a buried oxide layer to obtain an integrated substrate; the integrated substrate is provided with five functional areas.

[0048] Specifically, Figure 2 As shown, a layer of 3C-SiC with a thickness of 500nm~5μm is deposited on the top of the Si wafer containing the buried oxide layer by chemical or physical growth method as a subsequent integrated substrate.

[0049] The Si wafer includes a Si substrate, a buried oxide BOX SiO2 of 1~3μm, and a top silicon of 100~400nm. 3C-SiC can be synthesized at a relatively low temperature (below 1300℃), and belongs to the same cubic crystal system as Si. It is the only SiC crystal type that can grow on a Si substrate with excellent performance. Therefore, 3C-SiC / Si substrate is more suitable to replace Si substrate as a monolithic integration platform, combining the advantages of large size and low cost of Si and the advantages of wide bandgap semiconductor 3C-SiC.

[0050] Step S2: After etching, insulating layer deposition and planarization of the 3C-SiC layer in the second functional area and the first functional area, 3C-SiC etching is performed multiple times at different depths to form a waveguide and expose the surface of the top silicon layer.

[0051] Specifically, Figure 3 As shown, the 3C-SiC in some areas is etched, an insulating layer is deposited, and flattened. A waveguide is formed by etching 3C-SiC at different depths multiple times, and the Si surface is exposed, which is convenient for the subsequent production of Si devices.

[0052] Step S3: At the first functional area, after etching, ion implantation, insulating layer deposition and planarization treatment are performed on the exposed top silicon layer, silicon etching at different depths is performed multiple times to form a silicon optical device.

[0053] Specifically, Figure 4 As shown, etching, ion implantation, insulating layer deposition, planarization and other processes are performed on the Si in some areas. Silicon optical devices are formed by etching Si at different depths for multiple times. The silicon optical devices can be waveguides, gratings and modulators, as well as germanium devices formed by local opening and germanium epitaxial growth. Figure 4 Silicon waveguide is used as an illustration, which does not constitute a limitation to the present invention.

[0054] Step S4: at the third functional area, epitaxially grow semiconductor materials on the 3C-SiC layer, etch the semiconductor materials, perform dielectric deposition and electrode preparation, and manufacture radio frequency devices.

[0055] Specifically, Figure 5 As shown, III-V compound semiconductor materials are locally epitaxially grown on 3C-SiC, and the III-V materials can be GaN / AlGaN heterojunction, AlGaAs / GaAs heterojunction, InAlAs / InP or InP / InGaAs / InP heterojunction, (AlxGa1-x)2O3 / Ga2O3 heterojunction, etc. 3C-SiC can be used as a buffer layer for epitaxial growth of other compound semiconductor materials on Si substrate, which can effectively improve the mismatch and stress between Si and III-V materials and improve the crystal quality of the epitaxial layer.

[0056] like Figure 6 As shown, the III-V group materials are etched, dielectric deposited, and electrodes are prepared to manufacture radio frequency devices, and part of the 3C-SiC is etched to isolate the radio frequency devices from crosstalk. The radio frequency devices that can be manufactured based on the above-mentioned epitaxial III-V group materials include GaN HEMT, GaAs HBT, InP HBT, Ga2O3HEMT, etc.

[0057] Studies have shown that 3C-SiC can inhibit atomic diffusion between the substrate layer and the epitaxial layer, and can effectively improve RF losses when used in RF devices. Therefore, 3C-SiC can be used to improve the crosstalk isolation design of monolithic integration.

[0058] Step S5: bonding on the 3C-SiC layer to form a photoelectric device at the second functional area.

[0059] Specifically, Figure 7 As shown, the optoelectronic device is bonded to 3C-SiC by coupon to wafer. The optoelectronic device can be a III V group laser (LD), including InP LD, GaAs LD, VCSEL (vertical cavity surface emitting laser), etc.; it can also be a light-emitting device, including GaN-based LED (light-emitting diode), mini LED, microLED, etc.

[0060] First, quantum well growth, etching, coating and other processes are performed on a separate III-V epitaxial wafer to prepare optoelectronic devices. Then the wafer is thinned and cut into small pieces to form a sample for bonding. Then, the sample containing the optoelectronic device is integrated on the 3C-SiC / Si platform through surface activation bonding or plasma activation bonding technology. 3C-SiC can be used as a bonding layer to improve the bonding strength between Si and other materials or devices. Based on the 3C-SiC / Si platform, multiple materials can be heterogeneously integrated through bonding.

[0061] In addition, 3C-SiC has high thermal conductivity, which can improve the thermal management capabilities of multi-device integration: such as improving the heat dissipation problem of chips with increased integration; or by controlling the layout of 3C-SiC, thermal isolation between devices or modules can be performed, such as isolating heat transfer between thermosensitive devices and heat-generating devices.

[0062] Step S6: At the fourth functional area, the 3C-SiC layer is etched, dielectric deposited and electrode prepared to form a power device.

[0063] Specifically, Figure 8 As shown, etching, dielectric deposition, electrode preparation and other processes are performed on a part of the 3C-SiC to manufacture a power device. The power device may be a lateral MOSFET, a lateral SBD, a lateral IGBT and the like.

[0064] Figure 8 3C-SiC MOSFET is used as an example. 3C-SiC has a wider bandgap (2.36 eV) than Si, and has higher carrier mobility, lower interface defect state density and higher electron affinity (3.7 eV) than 4H-SiC which is widely used in power devices. Therefore, 3C-SiC has certain advantages in preparing power devices.

[0065] Step S7: At the fifth functional area, dielectric deposition, etching, thin film deposition and electrode preparation are performed on the exposed top silicon layer to form a MEMS device.

[0066] Specifically, Fig. 9 As shown, amorphous SiC and dielectric deposition, etching, 3C-SiC deposition and etching, thin film deposition, electrode preparation and other processes are performed on Si in a partial area to manufacture a MEMS device.

[0067] MEMS devices can be piezoresistive pressure sensors, capacitive pressure sensors, micro-vibrators, MEMS optical sensors, biosensors, etc.

[0068] 3C-SiC has good band gap width and electrochemical and mechanical stability, as well as high hardness and elastic modulus, high conductivity, high critical electric field, high electron mobility, diverse surface chemical properties and good biocompatibility. 3C-SiC film is suitable for the preparation of MEMS devices.

[0069] Finally, after completing the window filling and planarization processing, the multi-layer metal layer interconnection of the chip is carried out to complete a monolithic heterogeneous integrated chip with integrated multifunctional modules based on the 3C-SiC / Si integrated platform.

[0070] Since this preparation method is used to prepare a monolithic heterogeneous integrated structure based on silicon-based 3C-SiC, the beneficial effects of the monolithic heterogeneous integrated structure based on silicon-based 3C-SiC are also applicable to this preparation method. For its beneficial effects, please refer to the above-mentioned effect description and will not be repeated here.

[0071] Example 3 The difference between this embodiment and Embodiment 1 and Embodiment 2 is that: Step S3 is performed first to complete the production of Si devices (silicon optical devices), and then the deposition of the 3C-SiC layer in Step S1 is performed - 3C-SiC is grown on the Si substrate, and then subsequent processes are performed.

[0072] In addition, the order of the processes of each device is not fixed, and depends on the complexity of the process and the compatibility between processes, as well as the impact of subsequent processes on the current device. If the process conditions allow, the preparation of a certain layer structure of multiple devices can be completed simultaneously in a certain step of the process.

[0073] For the rest of the same structures and preparation methods, please refer to the introduction of Example 1 and Example 2, which will not be repeated here.

[0074] Example 4 The difference between this embodiment and Embodiment 1 and Embodiment 2 is that, in addition to being prepared from the InP, GaN or Ga2O3 material based on epitaxy as described in Embodiment 1 (step S4 in Embodiment 2), the RF device in this embodiment may also be an independently manufactured RF module bonded to 3C-SiC using a coupon to wafer method.

[0075] For the rest of the same structures and preparation methods, please refer to the introduction of Example 1 and Example 2, which will not be repeated here.

[0076] Example 5 The difference between this embodiment and the embodiment 1 and the embodiment 2 is that: in addition to bonding the optoelectronic device to 3C-SiC by the coupon to wafer method described in the embodiment 1 (step S5 in the embodiment 2), the optoelectronic device can also be bonded to Si, such as Fig.10 As shown, deep grooves for placing optical components are first etched into Si, and then the optoelectronic devices are bonded into the Si grooves using a coupon to wafer method. It can also be prepared by epitaxially growing InP, GaAs, GaN and other materials with photoelectric effects on 3C-SiC, and then preparing the optoelectronic materials based on epitaxy.

[0077] For the rest of the same structures and preparation methods, please refer to the introduction of Example 1 and Example 2, which will not be repeated here.

[0078] Example 6 The difference between this embodiment and the embodiments 1 and 2 is that: in addition to being prepared based on 3C-SiC as described in the above embodiment 1 (step S6 in the embodiment 2), the power device can also be prepared based on a 3C-SiC buffer layer epitaxially grown wide bandgap semiconductor material (GaN, Ga2O3), and then based on epitaxial materials; or independently manufactured power devices can be bonded to 3C-SiC using a coupon to wafer method.

[0079] For the rest of the same structures and preparation methods, please refer to the introduction of Example 1 and Example 2, which will not be repeated here.

[0080] Example 7 The difference between this embodiment and the embodiments 1 and 2 is that, in addition to being prepared based on Si and 3C-SiC materials as described in the embodiment 1 (step S7 in the embodiment 2), the MEMS module can also be a MEMS device independently manufactured and bonded to 3C-SiC using a coupon to wafer method.

[0081] For the rest of the same structures and preparation methods, please refer to the introduction of Example 1 and Example 2, which will not be repeated here.

[0082] In the description of this specification, the description with reference to the terms "specific example" or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the embodiments of the present invention. In this specification, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine different embodiments or examples described in this specification and the features of different embodiments or examples, unless they are contradictory.

[0083] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A monolithic heterogeneous integrated structure based on silicon-based 3C-SiC, characterized in that: include: Silicon substrate, buried oxide layer, top silicon layer, 3C-SiC layer, silicon optical devices, RF devices, optoelectronic devices, power devices and MEMS devices; The buried oxide layer is disposed between the silicon substrate and the top silicon layer; the 3C-SiC layer is disposed on the top silicon layer; The top silicon layer is provided with a first functional area, a second functional area, a third functional area, a fourth functional area and a fifth functional area in sequence; the 3C-SiC layer is provided with a first sub-3C-SiC layer, a second sub-3C-SiC layer and a third sub-3C-SiC layer in sequence; Among them, the first functional area is used to form the silicon photonic device; the first sub-3C-SiC layer, the second sub-3C-SiC layer and the third sub-3C-SiC layer are respectively arranged corresponding to the second functional area, the third functional area and the fourth functional area, and are respectively used to set the optoelectronic device, the radio frequency device and the power device; the fifth functional area is used to set the MEMS device to construct a multi-device heterogeneous integrated structure.

2. The monolithic heterogeneous integrated structure based on silicon-based 3C-SiC according to claim 1, characterized in that: The top silicon layer located in the first functional area is etched multiple times at different depths, and / or subjected to doping, thin film deposition, local opening, and germanium epitaxial growth processes to form the silicon optical device.

3. The monolithic heterogeneous integrated structure based on silicon-based 3C-SiC according to claim 2, characterized in that: The silicon optical device is one or more of a waveguide, a grating, a modulator and a germanium device.

4. The monolithic heterogeneous integrated structure based on silicon-based 3C-SiC according to claim 1, characterized in that: The radio frequency device is provided on the second sub-3C-SiC layer located in the third functional area; The radio frequency device includes an epitaxial material disposed on the second sub-3C-SiC layer and a dielectric layer and an electrode located on the epitaxial material.

5. The monolithic heterogeneous integrated structure based on silicon-based 3C-SiC according to claim 4, characterized in that: The epitaxial material is a III-V group material.

6. The monolithic heterogeneous integrated structure based on silicon-based 3C-SiC according to claim 4, characterized in that: The radio frequency device is GaN HEMT, GaAs HBT, InP HBT or Ga2O3 HEMT.

7. The monolithic heterogeneous integrated structure based on silicon-based 3C-SiC according to claim 1, characterized in that: The optoelectronic device is bonded to the first sub-3C-SiC layer located in the second functional area; The optoelectronic device is a III-V laser or a light-emitting device.

8. The monolithic heterogeneous integrated structure based on silicon-based 3C-SiC according to claim 1, characterized in that: The power device is formed on the third sub-3C-SiC layer located in the fourth functional area; The power device is a lateral MOSFET, a lateral SBD or a lateral IGBT.

9. The monolithic heterogeneous integrated structure based on silicon-based 3C-SiC according to claim 1, characterized in that: The MEMS device is formed on the top silicon layer located in the fifth functional area; The MEMS device is a piezoresistive pressure sensor, a capacitive pressure sensor, a micro-vibrator, a MEMS optical sensor or a biosensor.

10. A method for preparing a monolithic heterogeneous integrated structure based on silicon-based 3C-SiC as claimed in any one of claims 1 to 9, characterized in that: include: Growing and depositing a 3C-SiC layer on top of a silicon wafer including a buried oxide layer to obtain an integrated substrate; The integrated substrate is provided with five functional areas; After etching the 3C-SiC layer of the second functional area and the first functional area, depositing an insulating layer and planarizing the layer, etching the 3C-SiC layer at different depths for multiple times to form a waveguide and expose the surface of the top silicon layer; At the first functional area, after etching, ion implantation, insulating layer deposition and planarization treatment are performed on the exposed top silicon layer, silicon etching is performed multiple times at different depths to form a silicon optical device; At the third functional area, epitaxially growing semiconductor material on the 3C-SiC layer, etching, dielectric deposition and electrode preparation are performed on the semiconductor material to form a radio frequency device; At the second functional area, bonding is performed on the 3C-SiC layer to form an optoelectronic device; At the fourth functional area, the 3C-SiC layer is etched, dielectric deposited and electrode prepared to form a power device; At the fifth functional area, dielectric deposition, etching, thin film deposition and electrode preparation are performed on the exposed top silicon layer to form a MEMS device.

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