Quantum chip testing method, system and device

Abstract

The invention discloses a quantum chip testing method, system and device. The system comprises a control device and a plurality of test units, wherein each test unit comprises a plurality of radio frequency lines of specified types, a change-over switch connected with each radio frequency line, and at least two test ports connected with each change-over switch; and the control device is used for controlling each change-over switch to communicate the radio frequency circuit with each test port corresponding to the current tested quantum chip, testing the current tested quantum chip, and controlling each change-over switch to switch after determining that the test of the current tested quantum chip is completed. And communicating the radio frequency circuit with the test port corresponding to the next tested quantum chip until all the tested quantum chips are tested. Under the condition of not increasing a radio frequency circuit, more samples can be tested, and the test efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the field of quantum computing technology, and in particular to a quantum chip testing method, system and device. Background Art

[0002] The testing and calibration of quantum chips, such as but not limited to superconducting quantum chips, are generally carried out in the low-temperature environment of a dilution refrigerator. Due to the capacity of the dilution refrigerator, the low-temperature RF circuits it can accommodate are limited. The number of RF circuits that can be arranged limits the number of quantum chip samples and quantum bits that can be tested at a single time.

[0003] Taking the Oxford MX450 dilution refrigerator and frequency-tunable quantum chip as an example, the MX450 dilution refrigerator is loaded with 86 SMA RF coaxial cables. Each bit in the frequency-tunable quantum chip requires at least two RF coaxial cables, and one input and one readout line are required for every approximately 10 bits. By discarding individual quantum bits, two 20-bit quantum chips can barely be measured.

[0004] Since quantum chip testing needs to be performed in a high vacuum and extremely low temperature environment, changing samples in each test cycle requires several days of temperature rise and fall operations. Generally, this operation takes up more than half of each test cycle, during which time one can only wait for the dilution refrigerator to rise and fall in temperature. In order to improve test efficiency and reduce waiting time, it is generally hoped that more quantum chips to be tested can be loaded into each test cycle. To achieve this goal, the existing practice is to use thinner and denser low-temperature RF lines, so that more RF lines can be loaded in the same space, thereby achieving the purpose of measuring and controlling more samples. The disadvantage of this approach is that it is more expensive and not convenient for expansion. Summary of the invention

[0005] In view of the above problems, the present invention is proposed to provide a quantum chip testing method, system and device that overcome the above problems or at least partially solve the above problems.

[0006] An embodiment of the present invention provides a quantum chip testing system, including: a control device and a plurality of testing units, each of which includes a plurality of radio frequency lines of a specified type, a switching switch connected to each radio frequency line, and at least two test ports connected to each switching switch;

[0007] The control device is used to control each switching switch to connect the radio frequency line with each test port corresponding to the currently tested quantum chip, test the currently tested quantum chip, and after determining that the test of the currently tested quantum chip is completed, control each switching switch to switch, connect the radio frequency line with the test port corresponding to the next tested quantum chip, until all the tested quantum chips are tested.

[0008] In some optional embodiments, the types of the RF circuits include RF control circuits, RF read-in circuits, and RF read-out circuits; correspondingly, the test ports include RF control ports, RF read-in ports, and RF read-out ports; and the RF control circuits include at least one of an XY control circuit and a Z control circuit.

[0009] In some optional embodiments, the RF control circuit is connected to an arbitrary waveform generator to generate a control signal; the RF read circuit is connected to the arbitrary waveform generator to generate a read signal; and the RF read circuit is connected to an analog-to-digital converter to perform analog-to-digital conversion on the read signal.

[0010] In some optional embodiments, the switching switch is a single-pole multi-throw switch, a source terminal of the single-pole multi-throw switch is connected to the radio frequency line, and the single-pole multi-throw switch includes at least two output terminals, each output terminal is connected to a test port; the type of the test port is the same as the type of the connected radio frequency line.

[0011] In some optional embodiments, the control device is connected to the switching switch via a switching control circuit, and the switching switch is connected to the power supply via a power supply circuit.

[0012] In some optional embodiments, the control device is specifically used to:

[0013] Determine the current quantum chip to be tested, and control each switch to connect the radio frequency line to each test port of the current quantum chip to be tested;

[0014] Set the test parameters of the experimental items to be performed for the currently tested quantum chip. For each experimental item, input a control signal from the radio frequency control circuit to control the quantum bits of the currently tested quantum chip to perform the current experimental item. Input a read signal from the radio frequency read-in circuit and output a read signal from the radio frequency read-out circuit. After determining that the test of the current experimental item is completed according to the read signal, proceed to the next experimental item. After all experimental items are completed, determine that the test of the currently tested quantum chip is completed.

[0015] After the test of the current quantum chip is completed, each switch is controlled to switch to connect the RF line to the test port of the next quantum chip to be tested until all the quantum chips to be tested are tested.

[0016] In some optional embodiments, the control device is specifically used to:

[0017] Set the following experimental items and test parameters for the currently set chip: the test parameters of experimental item 1 are the chip's read cavity frequency and Z-line voltage, the test parameters of experimental item 2 are the bit frequency of the quantum bit, and the test parameters of experimental item 3 are the chip's decoherence time T1 value;

[0018] For experimental project 1: control the XY control circuit and the Z control circuit to input control signals, control the RF read-in circuit to input read signals, and the RF read-out circuit to output the frequency state change signal of the read cavity. According to the frequency state change signal, determine the cavity frequency point and Z line voltage of the read cavity;

[0019] For Experiment 2: Based on the cavity frequency point and Z line voltage of the reading cavity determined in Experiment 1, control the XY control circuit to input a driving signal to the quantum bit in the chip to drive the quantum bit, obtain the amplitude peak when the quantum bit is excited, and use the frequency corresponding to the amplitude peak as the bit frequency; if the amplitude peak is not obtained, an error is reported;

[0020] For experimental project three: input a pulse signal at the bit frequency determined in experimental project two, excite the quantum bit to state 1, measure the bit state after waiting for different preset times, obtain the decoherence time T1 curve of the quantum bit, fit the decoherence time curve, and obtain the T1 value of the chip.

[0021] In some optional embodiments, the quantum chip under test is at least one of a superconducting quantum chip, a semiconductor quantum chip, and an ion trap quantum chip; the test unit is arranged in a low temperature environment of a dilution refrigerator, the control device is arranged in a room temperature environment, and the control device is a separate control device or is arranged in a host computer.

[0022] An embodiment of the present invention provides a quantum chip testing method, comprising:

[0023] Determine the current quantum chip to be tested, and control each switch to connect each specified type of radio frequency line to the corresponding type of test port of the current quantum chip to be tested;

[0024] Test the currently tested quantum chip;

[0025] After determining that the test of the currently tested quantum chip is completed, control each switch to switch, and connect each specified type of radio frequency line with the corresponding type of test port of the next tested quantum chip until all the tested quantum chips are tested.

[0026] In some optional embodiments, the testing of the currently tested quantum chip includes:

[0027] The test parameters of the experimental items to be performed for the currently tested quantum chip are set. For each experimental item, a control signal is input from the RF control line to control the quantum bits of the currently tested quantum chip to execute the current experimental item. A read signal is input from the RF read-in line and a read signal is output from the RF read-out line. After the test of the current experimental item is completed according to the read-out signal, the next experimental item is continued until all experimental items are completed, and the test of the currently tested quantum chip is determined to be completed.

[0028] In some optional embodiments, the setting of test parameters of the experimental items to be performed for the currently tested quantum chip includes: setting the following experimental items and test parameters for the currently set chip: the test parameters of experimental item one are the reading cavity frequency and Z line voltage of the chip, the test parameters of experimental item two are the bit frequency of the quantum bit, and the test parameters of experimental item three are the decoherence time T1 value of the chip;

[0029] The process of testing each experimental item in turn includes:

[0030] For experimental project 1: control the XY control circuit and the Z control circuit to input control signals, control the RF read-in circuit to input read signals, and the RF read-out circuit to output the frequency state change signal of the read cavity. According to the frequency state change signal, determine the cavity frequency point and Z line voltage of the read cavity;

[0031] For Experiment 2: Based on the cavity frequency point and Z line voltage of the reading cavity determined in Experiment 1, control the XY control circuit to input a driving signal to the quantum bit in the chip to drive the quantum bit, obtain the amplitude peak when the quantum bit is excited, and use the frequency corresponding to the amplitude peak as the bit frequency; if the amplitude peak is not obtained, an error is reported;

[0032] For experimental project three: input a pulse signal at the bit frequency determined in experimental project two, excite the quantum bit to state 1, measure the quantum bit state after waiting for different preset times, obtain the decoherence time T1 curve of the quantum bit, fit the decoherence time curve, and obtain the T1 value of the chip.

[0033] An embodiment of the present invention provides a quantum chip test control device, comprising:

[0034] A control unit is used to determine the current quantum chip to be tested, and control each switching switch to connect each specified type of radio frequency line with the test port of the corresponding type on the current quantum chip to be tested; after determining that the test of the current quantum chip to be tested is completed, control each switching switch to switch, and connect each specified type of radio frequency line with the test port of the corresponding type on the next quantum chip to be tested, until all the quantum chips to be tested are tested;

[0035] The testing unit is used to test the quantum chip currently being tested.

[0036] The beneficial effects of the above technical solution provided by the embodiment of the present invention include at least:

[0037] The quantum chip testing system provided by the embodiment of the present invention adds a switching switch on the radio frequency line so that one radio frequency line can be switched to connect to multiple different chip samples, and multiple chips can be tested. More chips can be loaded at one time in a limited space. Without adding radio frequency lines, more samples can be tested, the waiting time for temperature rise and fall operations can be reduced, and the test efficiency can be improved.

[0038] Other features and advantages of the present invention will be described in the following description, and partly become apparent from the description, or understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained by the structures particularly pointed out in the written description, claims, and drawings.

[0039] The technical solution of the present invention is further described in detail below through the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings:

[0041] Figure 1 Schematic diagram of the structure of a quantum chip testing system in an embodiment of the present invention.

[0042] Figure 2 Schematic diagram of a quantum chip testing system in an embodiment of the present invention that does not use a single-pole multi-throw switch.

[0043] Figure 3 It is a schematic diagram of the structure after adding a single-pole multi-throw switch to the XY line in an embodiment of the present invention.

[0044] Figure 4 1 is an example diagram of a curve of reading cavity frequency and Z-line voltage in an embodiment of the present invention.

[0045] Figure 5 This is an example diagram of the amplitude change of the reading cavity in an embodiment of the present invention.

[0046] Figure 6 This is an example diagram of the decoherence time curve of a quantum bit in an embodiment of the present invention.

[0047] Figure 7 Flow chart of the quantum chip testing method in an embodiment of the present invention.

[0048] Figure 8 Schematic diagram of the structure of a quantum chip testing device in an embodiment of the present invention.

[0049] Description of reference numerals:

[0050] 1. Test unit; 2. Control device; 3. Chip

[0051] 11. RF circuit; 12. Switch; 13. Test port; 14. Switch control circuit; 15. Power circuit; 21. Control unit; 22. Test unit. DETAILED DESCRIPTION

[0052] The exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although the exemplary embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided to enable a more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.

[0053] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0054] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0055] In order to solve the problem that more chip samples cannot be tested in one test cycle during the testing of existing quantum chips, the scalability is poor, and the testing efficiency is low, the embodiments of the present invention provide a quantum chip testing system and method, by adding a switching switch in the radio frequency line, such as but not limited to a single-pole multi-throw switch, the electronic test circuit in the low-temperature environment is expanded, so that more quantum chip samples can be tested in one heating and cooling cycle. The method can still be expanded on the basis of the existing high-density line. When the internal space of the dilution refrigerator is limited and no more radio frequency lines are added, the number of quantum chip samples that can be tested in each test cycle is further increased, thereby improving the testing efficiency.

[0056] Before describing the solution of this application, some related concepts are introduced:

[0057] Circuit switches are basic components used to control current interruption. They are divided into different types of switches according to the way the circuit is controlled and the way it is connected. They are named after different poles (the number of independent circuits controlled by the switch) and throws (the number of different positions the switch can be connected to). There are SPST (single pole single throw), SPDT (single pole double throw), SP4T (single pole 4 throw), DPST (double pole single throw), etc., among which a single pole is also called a single pole. In this application, switches greater than or equal to single pole double throw are classified as single pole multiple throw switches.

[0058] In the description of this application, the sample in quantum computing refers to a quantum chip after micro-nano processing, and the quantum chip can be packaged in a sample box, for example. The quantum chip is, for example but not limited to, at least one of a superconducting quantum chip, a semiconductor quantum chip, and an ion trap quantum chip.

[0059] A dilution refrigerator is a high-end scientific research instrument that can provide an environment close to absolute zero. It is widely used in scientific research fields such as condensed matter physics, material science, particle physics, and even astronomical detection. A dilution refrigerator can be used to provide an extremely low temperature environment for superconducting quantum computing. The machine is equipped with a low-temperature radio frequency line, which can be a radio frequency coaxial line. The radio frequency line can be connected from the room temperature section of the dilution refrigerator to the sample hanging on the low-temperature cold plate in the dilution refrigerator. Users control the quantum bits in the quantum chip through the radio frequency line.

[0060] In the subsequent description of this application, superconducting quantum chips are used as an example. Similar quantum chip testing systems and methods can also be used to test other types of quantum chips. In practical applications, when testing quantum chips in a dilution refrigerator, different types of chips can also be placed in one test cycle. It is only necessary to set the test items and parameters separately for different types of chips.

[0061] The embodiment of the present invention provides a quantum chip testing system. The structure of the system is shown in Figure 1 As shown, it includes: a control device 2 and a plurality of test units 1, each test unit 1 includes a plurality of radio frequency lines 11 of a specified type, a switch 12 connected to each radio frequency line 11, and at least two test ports 13 connected to each switch 12;

[0062] The control device 2 is used to control each switching switch 12 to connect the radio frequency line 11 with each test port 13 corresponding to the currently tested quantum chip 3, test the currently tested quantum chip 3, and after determining that the test of the currently tested quantum chip 3 is completed, control each switching switch 12 to switch, connect the radio frequency line 11 with the test port 13 corresponding to the next tested quantum chip 3, until all the tested quantum chips 3 are tested.

[0063] The above-mentioned quantum chip testing system, by adding a switching switch on the RF line, allows one RF line to be switched and connected to multiple different chip samples, and multiple chips can be tested. More chips can be loaded at one time in a limited space, and more samples can be tested without adding RF lines, reducing the waiting time for temperature rise and fall operations and improving test efficiency.

[0064] In some optional embodiments, the switch 12 is a single-pole multi-throw switch, the source terminal of the single-pole multi-throw switch is connected to the radio frequency line, and the single-pole multi-throw switch includes at least two output terminals, each of which is connected to a test port; the type of the test port is the same as the type of the connected radio frequency line. In the following description, the switch 12 uses a single-pole multi-throw switch as an example, and the single-pole multi-throw switch uses a single-pole 4-throw (SP4T) as an example.

[0065] In some optional embodiments, the types of the radio frequency circuit 11 include radio frequency control circuits, radio frequency read-in circuits, and radio frequency read-out circuits; accordingly, the test port 13 includes radio frequency control ports, radio frequency read-in ports, and radio frequency read-out ports; the radio frequency control circuit includes at least one of an XY control circuit and a Z control circuit. In the following description, the radio frequency circuit includes an XY control circuit, a Z control circuit, a read-in circuit, and a read-out circuit as an example. Accordingly, the test port includes an XY port, a Z port, a Read in port, and a Read out port as an example.

[0066] Optionally, the RF control circuit can be connected to an arbitrary waveform generator to generate a control signal; the RF read circuit can be connected to an arbitrary waveform generator to generate a read signal; the RF read circuit can be connected to an analog-to-digital converter to perform analog-to-digital conversion on the read signal. The control device 2 can be connected to the switch 12 via the control circuit 14, and the switch 12 can be connected to a power supply (not shown in the figure) via a power supply circuit 15.

[0067] Figure 2 The figure shows an example of a test system without using a switching switch. In the circuit layout of the dilution refrigerator used in the superconducting quantum computing, the RF circuit includes an XY control circuit, a Z control circuit, an RF read-in circuit, and an RF read-out circuit, which are respectively connected to the XY port, Z port, read-in port, and read-out port of the quantum chip under test. The XY control circuit, the Z control circuit, and the RF read-in circuit are respectively connected to an arbitrary waveform generator (AWG), and the RF read-out circuit is connected to an analog-to-digital converter (ADC). After using the switching switch 12, taking SP4T as an example, the connection of the XY control circuit is shown in FIG. Figure 3 As shown, a single-pole four-throw switch is connected on the basis of the original XY control circuit, the source end of the single-pole four-throw switch is connected to the original XY control circuit, and the four output ends are respectively connected to the XY ports of the tested quantum chips Chip1, Chip2, Chip3, and Chip4. After using SP4T to connect to the chip, the hardware circuit remains unchanged, and the number of tested quantum chips can be increased to four. The original one XY control circuit can now control four quantum bits.

[0068] The SP4T switch is also connected to the power supply line and the control line. You can use the DC line configured by the dilution refrigerator to connect the power supply and control line of the switch, use the high and low levels to control the switch channel selection, and use the adjustable voltage source input at room temperature. For example, the input level 00 connects the switch to 1, 01 to 2, 10 to 3, and 11 to channel 4. The control voltage can be configured according to the specific situation.

[0069] The design of the Z control circuit, read-in circuit, and read-out circuit is similar to that of the XY circuit, so they will not be described one by one. The XY control circuit, Z control circuit, read-in circuit, and read-out circuit are all divided into four. Each RF circuit is divided into four connection ports in a low-temperature environment, so that four times the sample loading can be achieved under the same dilution refrigerator capacity.

[0070] In the above system, the quantum chip being tested is at least one of a superconducting quantum chip, a semiconductor quantum chip, and an ion trap quantum chip; the test unit 1 is arranged in a low-temperature environment of a dilution refrigerator, the control device 2 is arranged in a room temperature environment, and the control device 2 is a separate control device or is arranged in a host computer.

[0071] The above system adds a single-pole multi-throw switch at low temperature to expand the hardware circuit. For example, using SP4T, the original RF circuit that can test one chip sample can be connected to four samples in this system, that is, under the condition that the calibration time remains unchanged, the time for three temperature rise and fall sample changes is reduced, greatly improving the test efficiency. In other words, when the space of the dilution refrigerator is limited and the RF circuit is not added, more chip samples can be loaded at one time for testing in each test cycle, greatly reducing the waiting time.

[0072] In some optional embodiments, the control device 2 is specifically used to determine the current quantum chip under test to be tested, control each switching switch 12 to connect the radio frequency line with each test port of the current quantum chip under test; set the test parameters of the experimental project to be performed for the current quantum chip under test, input a control signal from the radio frequency control line for each experimental project, control the quantum bits of the current quantum chip under test to execute the current experimental project, input a read signal from the radio frequency read-in line, output a read signal from the radio frequency read-out line, determine that the test of the current experimental project is completed according to the read-out signal, and continue to the next experimental project, until all experimental projects are completed, and determine that the test of the current quantum chip under test is completed; after the test of the current quantum chip under test is completed, control each switching switch 12 to switch, connect the radio frequency line with the test port of the next quantum chip under test, until all quantum chips under test are tested.

[0073] In actual testing, see Figure 2 and Figure 3 As shown, first control the input of the voltage source, connect all the RF line channels to the quantum chip Chip1, and then set the test parameters of the experimental items to be carried out, such as but not limited to the experiments such as measurement and control and parameter calibration based on the set parameters, input the control signal from the XY control line and the Z control line to control the operation of the quantum bit, and input the read signal from the read in line. The control signal and the read signal can be generated by the AWG connected to the RF line, and the value quantum bit is input after being processed by the RF line; the read out line outputs the read signal to the analog-to-digital converter (analog-to-Digital Converter, ADC). The ADC provides the read signal to the host computer, and the host computer processes the read signal and judges the experimental results corresponding to the read signal. The experimental results can be judged according to the preset conditions. If successful, the parameters are extracted and the next experiment is carried out. If failed, an error is reported. After all the measurement and control and parameter calibration experiments are completed to obtain the quantum chip parameters, the voltage source is controlled to adjust the output voltage to switch the switch, and the RF line channel is switched to the next quantum chip Chip2. The measurement and control system at room temperature does not need to be changed, and the measurement, control and calibration of the next quantum chip sample can be started directly until the testing of quantum chips Chip3, Chip4, etc. is completed.

[0074] In some optional embodiments, taking the acquisition of the reading cavity frequency point and Z line voltage of the quantum chip, the bit frequency of the quantum bit, and the decoherence time T1 value of the quantum chip as an example, the control device 2 is specifically used to:

[0075] The following experimental items and test parameters are set for the currently tested quantum chip: the test parameters of experimental item 1 are the reading cavity frequency and Z line voltage of the quantum chip, the test parameters of experimental item 2 are the bit frequency of the quantum bit, and the test parameters of experimental item 3 are the decoherence time T1 value of the quantum chip;

[0076] For experimental project 1: control the XY control circuit and the Z control circuit to input control signals, control the RF read-in circuit to input read signals, and the RF read-out circuit to output the frequency state change signal of the read cavity. According to the frequency state change signal, determine the cavity frequency point of the read cavity and the corresponding applied Z line voltage, where the Z line voltage refers to the voltage on the Z control line;

[0077] For Experiment 2: Based on the cavity frequency point and Z line voltage of the reading cavity determined in Experiment 1, control the XY control circuit to input a driving signal to the quantum bit in the chip to drive the quantum bit, obtain the amplitude peak when the quantum bit is excited, and use the frequency corresponding to the amplitude peak as the bit frequency; if the amplitude peak is not obtained, an error is reported;

[0078] For experimental project three: input a pulse signal at the bit frequency determined in experimental project two, excite the quantum bit to state 1, measure the quantum bit state after waiting for different preset times, obtain the decoherence time T1 curve of the quantum bit, fit the decoherence time curve, and obtain the T1 value of the quantum chip.

[0079] After the control device has executed all experimental items of the currently tested quantum chip in sequence, it can switch to test the next tested quantum chip by switching the switch.

[0080] The decoherence time T1 of a quantum chip refers to the time it takes for a quantum bit to return from an excited state to a ground state within the coherence time, and is usually used to measure the coherence of a quantum bit. The longer the T1 value, the longer the quantum bit remains stable within the coherence time, which is crucial for applications such as quantum computing and quantum communication.

[0081] The following describes specific experimental examples of the above experimental projects:

[0082] Experimental project 1: Obtain the chip's reading cavity frequency and Z-line voltage.

[0083] Principle: The qubit is usually coupled to the reading cavity, and the state of the qubit can be read by reading the state of the cavity. The frequency of the qubit will be affected by the DC voltage on the Z control line, and the frequency of the cavity will change through coupling. Figure 4 As shown in the figure, the curve of the read cavity frequency and Z line voltage is generated after the obtained quantum chip's read cavity frequency and Z line voltage, with the horizontal axis being the frequency and the vertical axis being the voltage. Use the algorithm to find the rightmost point in the cavity cycle as the next measurement point. That is, the DC voltage is 0.4. The cavity frequency is 6.8023. This parameter can be used in the next experimental project 2. Experimental project 1 generally requires that a cycle must be scanned to determine whether the rightmost point in the figure is the true maximum cavity frequency.

[0084] Experimental Project 2: Scanning quantum bit frequency.

[0085] Using the cavity frequency point and Z line voltage obtained in Experiment 1, input the drive signal from the XY control line to drive the qubit, and then read the cavity frequency point, and continuously scan the drive signal frequency of XY. When it scans the qubit frequency, the qubit is excited. Because of the coupling between the qubit and the reading cavity, the amplitude of the reading cavity frequency point changes at this time, see Figure 5 As shown, the horizontal axis is frequency, the vertical axis is amplitude, and the point where the amplitude changes is represented as a peak on the graph. Use the peak-finding algorithm to determine this peak, and the frequency corresponding to this peak is the bit frequency under the Z line voltage. If the peak is not found, the experiment is interrupted and an error message is given indicating that the bit frequency was not found.

[0086] Experimental project three:

[0087] After obtaining the bit frequency of the quantum bit, input a pulse at this frequency to excite the quantum bit to the 1 state, then read the signal after waiting for a period of time, scan this waiting time, and obtain the T1 curve, see Figure 6 The decoherence time curve of the quantum bit is shown in the figure, where the horizontal axis is the waiting time, the vertical axis is the probability of the quantum bit in the 1 state, ADC is the collected data point, and Fitting is the curve fitted by the data point. Fit this curve and save the value of T1. T1 is one of the important parameters of the chip and determines the upper limit of the chip's performance. If you just want to calibrate the chip quickly, after getting a good T1, you can control the switch to switch to the next sample and start a new round of calibration. If T1 is not ideal, the data will be marked and wait for manual troubleshooting.

[0088] The above-mentioned experiments, project one and project two, belong to the experiment of determining experimental parameters. They scan the unknown parameters step by step, take values ​​according to the algorithm, and assign fixed values ​​to the parameters. Then the fixed parameters are brought into the next experimental project. The parameters in between are all scanned out. Experiment project three is a calibration of the chip parameters after obtaining all experimental parameters. This parameter is fitted from the scanned curve, will be recorded in the end, and has physical meaning.

[0089] Based on the same inventive concept, the embodiment of the present invention also provides a quantum chip testing method, the process of which is as follows: Figure 7 As shown, the following steps are included:

[0090] Step S101: determine the current quantum chip to be tested, and control each switch to connect each specified type of radio frequency line to the corresponding type of test port of the current quantum chip to be tested.

[0091] Step S102: Testing the currently tested quantum chip.

[0092] In this step, the test parameters of the experimental items to be performed can be set for the currently tested quantum chip. For each experimental item, a control signal is input from the RF control circuit to control the quantum bits of the currently tested quantum chip to execute the current experimental item. A read signal is input from the RF read-in circuit and a read signal is output from the RF read-out circuit. After determining that the test of the current experimental item is completed according to the read-out signal, the next experimental item is continued until all experimental items are completed and the test of the currently tested quantum chip is determined to be completed.

[0093] Step S103: After determining that the test of the currently tested quantum chip is completed, control each switch to switch, and connect each specified type of RF line to the corresponding type of test port of the next tested quantum chip until all the tested quantum chips are tested.

[0094] Based on the same inventive concept, the embodiment of the present invention also provides a quantum chip testing device, the process of which is as follows: Figure 8 As shown, the following steps are included:

[0095] The control unit 21 is used to determine the current quantum chip to be tested, and control each switch to connect each specified type of radio frequency line with the test port of the corresponding type on the current quantum chip to be tested; after determining that the test of the current quantum chip to be tested is completed, control each switch to switch, and connect each specified type of radio frequency line with the test port of the corresponding type on the next quantum chip to be tested, until all the quantum chips to be tested are tested.

[0096] The testing unit 22 is used to test the quantum chip currently being tested.

[0097] Regarding the methods and devices in the above embodiments, the relevant contents have been described in detail in the system embodiments and will not be elaborated in detail in the method and device part.

[0098] In the above-mentioned system architecture of the embodiment of the present invention, the same low-temperature RF line can control multiple quantum bits, the switching switch can connect multiple chips externally, and can also be integrated into the chip packaging box to connect multiple chip samples. Without adding or replacing RF lines, more chips can be tested in one cycle, thereby improving test efficiency and reducing the cost of chip testing; at the same time, on this basis, if the system of the present application is further expanded to use high-density lines and increase the number of lines, the number of chips that can be tested will be further increased.

[0099] It should be understood that the specific order or hierarchy of steps in the disclosed process is an example of an exemplary method. Based on design preferences, it should be understood that the specific order or hierarchy of steps in the process can be rearranged without departing from the scope of protection of the present disclosure. The attached method claims present the elements of the various steps in an exemplary order and are not intended to be limited to the specific order or hierarchy described.

[0100] In the above detailed description, various features are grouped together in a single embodiment to simplify the disclosure. This method of disclosure should not be interpreted as reflecting an intention that the embodiments of the claimed subject matter require more features than are clearly stated in each claim. On the contrary, as reflected in the appended claims, the invention is in a state of having less than all the features of the disclosed individual embodiments. Therefore, the appended claims are hereby expressly incorporated into the detailed description, with each claim standing on its own as a separate preferred embodiment of the invention.

[0101] The above description includes examples of one or more embodiments. Of course, it is impossible to describe all possible combinations of components or methods for the purpose of describing the above embodiments, but it should be recognized by those skilled in the art that the various embodiments may be further combined and arranged. Therefore, the embodiments described herein are intended to cover all such changes, modifications and variations that fall within the scope of protection of the appended claims. In addition, with respect to the term "comprising" used in the specification or claims, the word is covered in a manner similar to the term "including", just as "including," is explained as a transitional word in the claims. In addition, any term "or" used in the specification of the claims is intended to mean "non-exclusive or".

Claims

1. A quantum chip testing system, characterized in that: include: A control device and a plurality of test units, each test unit comprising a plurality of radio frequency lines of a specified type, a switch connected to each radio frequency line, and at least two test ports connected to each switch; The control device is used to control each switching switch to connect the radio frequency line with each test port corresponding to the currently tested quantum chip, test the currently tested quantum chip, and after determining that the test of the currently tested quantum chip is completed, control each switching switch to switch, connect the radio frequency line with the test port corresponding to the next tested quantum chip, until all the tested quantum chips are tested.

2. The system according to claim 1, characterized in that The types of the RF circuits include RF control circuits, RF read-in circuits and RF read-out circuits; correspondingly, the test ports include RF control ports, RF read-in ports and RF read-out ports; the RF control circuits include at least one of XY control circuits and Z control circuits.

3. The system according to claim 1, characterized in that The radio frequency control circuit is connected to an arbitrary waveform generator to generate a control signal; the radio frequency read-in circuit is connected to the arbitrary waveform generator to generate a read-in signal; and the radio frequency read-out circuit is connected to an analog-to-digital converter to perform analog-to-digital conversion on the read-out signal.

4. The system according to claim 1, characterized in that The switching switch is a single-pole multi-throw switch, a source terminal of the single-pole multi-throw switch is connected to the radio frequency line, and the single-pole multi-throw switch includes at least two output terminals, each output terminal is connected to a test port; The type of the test port is the same as the type of the connected radio frequency line.

5. The system according to claim 1, wherein: The control device is connected to the switch via a switching control line, and the switch is connected to the power supply via a power supply line.

6. The system according to claim 1, characterized in that The control device is specifically used for: Determine the current quantum chip to be tested, and control each switch to connect the radio frequency line to each test port of the current quantum chip to be tested; Set the test parameters of the experimental items to be performed for the currently tested quantum chip. For each experimental item, input a control signal from the radio frequency control circuit to control the quantum bits of the currently tested quantum chip to perform the current experimental item. Input a read signal from the radio frequency read-in circuit and output a read signal from the radio frequency read-out circuit. After determining that the test of the current experimental item is completed according to the read signal, proceed to the next experimental item. After all experimental items are completed, determine that the test of the currently tested quantum chip is completed. After the test of the current quantum chip is completed, each switch is controlled to switch to connect the RF line to the test port of the next quantum chip to be tested until all the quantum chips to be tested are tested.

7. The system according to any one of claims 1 to 4, characterized in that: The control device is specifically used for: Set the following experimental items and test parameters for the currently set chip: the test parameters of experimental item 1 are the chip's read cavity frequency and Z-line voltage, the test parameters of experimental item 2 are the bit frequency of the quantum bit, and the test parameters of experimental item 3 are the chip's decoherence time T1 value; For experimental project 1: control the XY control circuit and the Z control circuit to input control signals, control the RF read-in circuit to input read signals, and the RF read-out circuit to output the frequency state change signal of the read cavity. According to the frequency state change signal, determine the cavity frequency point and Z line voltage of the read cavity; For Experiment 2: Based on the cavity frequency point and Z line voltage of the reading cavity determined in Experiment 1, control the XY control circuit to input a driving signal to the quantum bit in the chip to drive the quantum bit, obtain the amplitude peak when the quantum bit is excited, and use the frequency corresponding to the amplitude peak as the bit frequency; if the amplitude peak is not obtained, an error is reported; For experimental project three: input a pulse signal at the bit frequency determined in experimental project two, excite the quantum bit to state 1, measure the bit state after waiting for different preset times, obtain the decoherence time T1 curve of the quantum bit, fit the decoherence time curve, and obtain the T1 value of the chip.

8. The system according to any one of claims 1 to 4, characterized in that: The quantum chip under test is at least one of a superconducting quantum chip, a semiconductor quantum chip, and an ion trap quantum chip; the test unit is arranged in a low-temperature environment of a dilution refrigerator, the control device is arranged in a room temperature environment, and the control device is a separate control device or is arranged in a host computer.

9. A quantum chip testing method, characterized in that: include: Determine the current quantum chip to be tested, and control each switch to connect each specified type of radio frequency line to the corresponding type of test port of the current quantum chip to be tested; Test the currently tested quantum chip; After determining that the test of the currently tested quantum chip is completed, control each switch to switch, and connect each specified type of radio frequency line with the corresponding type of test port of the next tested quantum chip until all the tested quantum chips are tested.

10. The method according to claim 9, characterized in that The testing of the currently tested quantum chip includes: The test parameters of the experimental items to be performed for the currently tested quantum chip are set. For each experimental item, a control signal is input from the RF control line to control the quantum bits of the currently tested quantum chip to execute the current experimental item. A read signal is input from the RF read-in line and a read signal is output from the RF read-out line. After the test of the current experimental item is completed according to the read-out signal, the next experimental item is continued until all experimental items are completed, and the test of the currently tested quantum chip is determined to be completed.

11. The method according to claim 9 or 10, characterized in that The step of setting the test parameters of the experimental items to be performed for the currently tested quantum chip includes: setting the following experimental items and test parameters for the currently set chip: the test parameters of the experimental item one are the reading cavity frequency and Z line voltage of the chip, the test parameters of the experimental item two are the bit frequency of the quantum bit, and the test parameters of the experimental item three are the decoherence time T1 value of the chip; The process of testing each experimental item in turn includes: For experimental project 1: control the XY control circuit and the Z control circuit to input control signals, control the RF read-in circuit to input read signals, and the RF read-out circuit to output the frequency state change signal of the read cavity. According to the frequency state change signal, determine the cavity frequency point and Z line voltage of the read cavity; For Experiment 2: Based on the cavity frequency point and Z line voltage of the reading cavity determined in Experiment 1, control the XY control circuit to input a driving signal to the quantum bit in the chip to drive the quantum bit, obtain the amplitude peak when the quantum bit is excited, and use the frequency corresponding to the amplitude peak as the bit frequency; if the amplitude peak is not obtained, an error is reported; For experimental project three: input a pulse signal at the bit frequency determined in experimental project two, excite the quantum bit to state 1, measure the quantum bit state after waiting for different preset times, obtain the decoherence time T1 curve of the quantum bit, fit the decoherence time curve, and obtain the T1 value of the chip.

12. A quantum chip test control device, characterized in that: include: A control unit is used to determine the current quantum chip to be tested, and control each switching switch to connect each specified type of radio frequency line with the test port of the corresponding type on the current quantum chip to be tested; after determining that the test of the current quantum chip to be tested is completed, control each switching switch to switch, and connect each specified type of radio frequency line with the test port of the corresponding type on the next quantum chip to be tested, until all the quantum chips to be tested are tested; The testing unit is used to test the quantum chip currently being tested.

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