High-reliability three-dimensional integrated direct sampling software radio architecture radio frequency microsystem

Abstract

The invention discloses a high-reliability three-dimensional integrated direct sampling software radio architecture radio frequency microsystem, which is based on a direct sampling software radio system architecture and a multi-layer glass-based TGV adapter plate wafer-level bonded POP three-dimensional stacked packaging architecture. A high-performance glass antenna, silicon-based single core particle Fan-in and Fan-out packaging, mixed multi-core particle integration of an embedded glass-based TGV adapter plate, mixed bonding integration of a silicon-based digital TSV adapter plate and the glass-based TGV adapter plate are combined, and a glass antenna, a direct sampling core particle, a silicon-based computing power circuit, a silicon-based storage circuit and a silicon-based interface circuit are integrated. And the three-dimensional heterogeneous integration of the microsystem is realized. According to the micro-system, a glass substrate is used as a main body packaging material, a radio frequency circuit and a digital-analog hybrid circuit are fused, three-dimensional heterogeneous integration from a glass antenna to a baseband storage and calculation integrated processing circuit is realized, and a complete integrated airtight packaging micro-system is formed and can cover a DC-20GHz frequency band.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of radio frequency microsystem technology, in particular to a high-reliability three-dimensional integrated direct sampling software radio architecture radio frequency microsystem. BACKGROUND

[0002] The concept of software radio has a long history, but for a long time, due to the limitations of integrated circuit design and process level, the software radio chip technology has been developing slowly. In recent years, with the explosive growth of the demand for computing power of cutting-edge technologies such as big data, artificial intelligence, and cloud computing, the integrated circuit technology has made great progress, and the software radio chip technology has also made great progress. At present, the radio frequency direct sampling chip is one of the mainstream software radio chips in the industry.

[0003] The existing radio frequency direct sampling chip can already integrate a single chip with a multi-channel ultra-high sampling rate direct sampling radio frequency analog-to-digital converter, a multi-channel ultra-high sampling rate direct sampling radio frequency digital-to-analog converter, a clock multiplier, and a digital intermediate frequency processing circuit, which can completely replace the traditional 20GHz below frequency band traditional radio frequency transceiver circuit, moving all the original signal links that need to be processed in the analog domain to the digital domain to greatly simplify the system architecture.

[0004] The traditional radio frequency microsystem, represented by the zero intermediate frequency architecture, directly converts the radio frequency signal to a baseband I / Q signal through an analog I / Q mixer, which reduces the design difficulty of the ADC and DAC modules in applications with narrow bandwidth, and has low power consumption and high integration. Its defects are also obvious: ① The DC and local oscillator leakage problems caused by process mismatch of analog filters and mixers need to be calibrated, and the frequency conversion needs to be recalibrated; ② The analog I / Q signal generated by the analog PLL module cannot be perfectly orthogonal due to process defects, and the QEC module is needed for I / Q calibration; ③ The linearity of the analog mixer and low-pass filter is often lower than that of the ADC and DAC, greatly limiting the linearity of the entire transceiver; ④ The LOPLL module generally uses a fractional-N PLL module to achieve, and the phase noise of the fractional-N PLL module is much worse than that of the integer-N PLL module, and there is a fractional-N spurious.

[0005] Many problems encountered by the traditional zero intermediate frequency architecture radio frequency microsystem are rooted in the fact that its mixing and filtering must be done in the analog domain, and the fundamental reason is that it was extremely costly or simply impossible to implement an ADC and DAC chip that could directly sample and transmit radio frequency signals in the era of backward technology.

[0006] RF direct sampling architecture is a truly software radio transceiver architecture, which moves all the problems in the analog domain to the digital domain, flexible and high performance. More advanced process and design to ensure that compared to zero IF architecture power consumption increases limited. RF direct sampling architecture micro system solves the defects of traditional zero IF architecture RF micro system: ① since ADC directly collects RF signals, there is no need to consider the DC offset problem of the device itself; ② digital NCO module can realize perfect I / Q signal, without QEC calibration, and no fear of frequency hopping; ③ there is no analog mixer and filter, and the linearity is better; ④ the sampling clock of ADC and DAC is provided by the integer frequency division PLL module, and the phase noise is better than the fractional frequency division PLL which provides the local oscillator. SUMMARY

[0007] The problem to be solved by the present application is to provide a high-reliability three-dimensional integrated direct sampling software radio architecture RF micro system, which integrates glass antenna, direct sampling chip, silicon-based computing circuit, silicon-based storage circuit and silicon-based interface circuit, combines RF circuit and digital-analog hybrid circuit, and uses glass-based as the main packaging material to form a complete integrated hermetic packaging micro system, while realizing high performance, high frequency, high density and high reliability, and covering the DC-20GHz frequency band.

[0008] The present application adopts the following technical scheme: a high-reliability three-dimensional integrated direct sampling software radio architecture RF micro system, comprising: a glass antenna, a glass-based TGV adapter plate, a silicon-based digital TSV adapter plate, a direct sampling chip, an RF chip, a baseband processor chip, a digital memory chip, a digital interface chip, a silicon-based single-chip Fan-in packaging, and a silicon-based single-chip Fan-out packaging.

[0009] The glass antenna realizes vertical signal transmission through a glass antenna TGV.

[0010] The glass-based TGV adapter plate, as the main packaging material, comprises a glass-based RF TGV adapter plate, a glass-based digital TGV adapter plate, and a buried glass-based digital TGV adapter plate, forms an RF direct sampling micro module and a digital signal processing micro module through multi-layer wafer-level bonding technology, and stacks through POP to form a multi-layer signal vertical transmission three-dimensional packaging architecture.

[0011] The silicon-based digital TSV adapter plate is integrated with the glass-based TGV adapter plate through hybrid bonding.

[0012] The direct sampling chip and the RF chip are arranged inside the cavity of the glass-based RF TGV adapter plate and are isolated by a three-dimensional electromagnetic shielding structure, and are respectively used to realize the RF direct sampling core circuit and the peripheral circuit.

[0013] Baseband processor chip, digital memory chip: Set in the glass-based digital TGV adapter plate cavity, stacked on the silicon-based digital TSV adapter plate through digital micro-bump and Fan-out bump, used to realize baseband storage and computing integrated circuit;

[0014] Digital interface chip: There are many kinds, respectively embedded in the embedded glass-based digital TGV adapter plate cavity, and the glass-based digital adapter plate RDL is used to realize the leadless mixed high-density integration of various digital chips.

[0015] Silicon-based single-chip Fan-in packaging and silicon-based single-chip Fan-out packaging: Respectively convert the lead bonding type radio frequency chip and digital memory chip into flip-chip packaging form.

[0016] Preferably, the glass-based radio frequency TGV adapter plate has three layers, namely: upper glass-based radio frequency TGV adapter plate, middle glass-based radio frequency TGV adapter plate, and lower glass-based radio frequency TGV adapter plate, which are wafer bonded through glass-based radio frequency adapter wafer bonding area to form a radio frequency direct sampling micro module.

[0017] Preferably, the glass-based digital TGV adapter plate has four layers, namely: top glass-based digital TGV adapter plate, upper glass-based digital TGV adapter plate, middle glass-based digital TGV adapter plate, and lower glass-based digital TGV adapter plate, and the embedded glass-based digital TGV adapter plate is wafer bonded through glass-based digital adapter wafer bonding area to form a digital signal processing micro module.

[0018] Preferably, the glass-based TGV adapter plate transmits signals vertically through TGV and reconstructs signals in the plane through RDL;

[0019] The three-layer glass-based radio frequency TGV adapter plate transmits signals vertically through the glass-based radio frequency adapter TGV and reconstructs signals in the plane through the glass-based radio frequency adapter RDL;

[0020] The four-layer glass-based digital TGV adapter plate and the embedded glass-based digital TGV adapter plate transmit signals vertically through the glass-based digital adapter TGV and reconstruct signals in the plane through the glass-based digital adapter RDL.

[0021] Preferably, the middle glass-based radio frequency TGV adapter plate has a micro-nano precision electromagnetic shielding micro-cavity structure etched inside, and the direct sampling chip and the radio frequency chip are arranged inside the electromagnetic shielding micro-cavity.

[0022] The middle glass-based radio frequency TGV adapter plate and the upper glass-based radio frequency TGV adapter plate and the lower glass-based radio frequency TGV adapter plate together form a three-dimensional electromagnetic shielding structure.

[0023] Preferably, the direct sampling core particle is stacked above the lower layer glass base radio frequency TGV adapter board through radio frequency micro-bump, and the baseband processor core particle is stacked above the silicon base digital TSV adapter board through digital micro-bump, realizing high-density interconnection.

[0024] Preferably, the radio frequency core particle adopts a silicon base single core particle Fan-in package: the lead bonding PAD of the radio frequency core particle is converted into a Fan-in bump through a Fan-in RDL to form a flip-chip package form, and the chip size is reduced.

[0025] The digital memory core particle adopts a silicon base single core particle Fan-out package: the lead bonding PAD of the digital memory core particle is converted into a Fan-out bump through a Fan-out RDL to form a flip-chip package form, and the interconnection density is improved.

[0026] Preferably, the silicon base digital TSV adapter board realizes vertical signal transmission through a silicon base digital adapter board TSV and realizes plane signal reconstruction through a silicon base digital adapter board RDL.

[0027] Preferably, the microsystem further comprises IPD, and each passive device is made into an IPD and integrated in the interior of the three-layer glass base radio frequency TGV adapter board, the four-layer glass base digital TGV adapter board, the embedded glass base digital TGV adapter board and the silicon base digital TSV adapter board.

[0028] Preferably, the microsystem stacks a glass antenna above a radio frequency direct sampling micro module through a radio frequency antenna BGA solder ball, stacks a radio frequency direct sampling micro module above a digital signal processing micro module through a digital-analog hybrid BGA solder ball, and fans out a baseband digital signal below the digital signal processing micro module through a baseband digital BGA solder ball.

[0029] Preferably, the direct sampling core particle is integrated with a dynamically configurable digital signal processing module on the chip, including: a transmitting signal processing circuit and a receiving signal processing circuit.

[0030] The transmitting signal processing circuit comprises: a radio frequency DAC, a programmable finite-length unit impulse response filter, a two-stage digital up-conversion, an inverse Sine function, a power amplifier protection circuit multiplexer and the like.

[0031] The receiving signal processing circuit comprises: a radio frequency ADC, a programmable finite-length unit impulse response filter, a two-stage digital down-conversion, a fast detection circuit, a spectrum sniffer multiplexer and the like.

[0032] Compared with the prior art, the above technical scheme has the following technical effects:

[0033] 1. The microsystem of the present application adopts a direct sampling software radio system architecture, takes a direct sampling chip as the core, combines a high-performance glass antenna, a silicon-based computing circuit, a silicon-based storage circuit and a silicon-based interface circuit, forms a new microsystem functional architecture from the glass antenna to the baseband storage and computing integrated processing circuit, and can realize radio frequency direct sampling analog-digital conversion with a maximum sampling rate of 20 GSPS and radio frequency direct sampling digital-analog conversion with a maximum sampling rate of 28 GSPS.

[0034] 2. The direct sampling chip of the present application integrates a 4-channel 12bit / maximum 20GSPS sampling rate direct sampling radio frequency analog-digital converter, a 4-channel 16bit / maximum 28GSPS sampling rate direct sampling radio frequency digital-analog converter, a clock multiplier, a digital intermediate frequency processing circuit, and omits the traditional 20GHz or below frequency band compound-based radio frequency transceiver circuit, moves all the original signal links needing to be processed in the analog domain to the digital domain, greatly simplifies the system architecture, significantly reduces the system power consumption, and breaks through the traditional radio frequency microsystem functional architecture.

[0035] 3. The microsystem of the present application takes the direct sampling chip as the core and integrates a digital signal processing (DSP) module on the chip, can offload the computing task of the traditional baseband digital signal processor (such as FPGA) to the DSP module, reduces the computing power requirement of the baseband digital signal processor from the root, thereby reducing the integrated circuit size, and reducing the size, weight, power consumption and cost; and the DSP module can be dynamically reconfigured without the need for recalibration, provides highly flexible computing power resources, forms a brand-new ultra-wideband mixed signal front-end platform, realizes a revolutionary radio frequency microsystem computing power architecture, and has strong practicability.

[0036] 4. The microsystem of the present application adopts a POP three-dimensional stacked packaging architecture of multi-layer glass-based TGV adapter wafer-level bonding, combines a high-performance glass antenna, a silicon-based single-chip Fan-in packaging and a silicon-based single-chip Fan-out packaging, a hybrid multi-chip integration of a buried glass-based TGV adapter, a hybrid bonding ultra-high-density integration of a silicon-based digital TSV adapter and a glass-based TGV adapter, integrates a glass antenna, a direct sampling chip, a silicon-based computing circuit, a silicon-based storage circuit and a silicon-based interface circuit in an integrated manner, and realizes ultra-high-density integration of the microsystem; at the same time, the entire microsystem takes glass-based as the main packaging material, fully plays the excellent mechanical properties, radio frequency properties and heat transfer properties of the glass material, combines the respective advantages of other packaging materials, takes the advantages and compensates for the disadvantages, efficiently realizes three-dimensional heterogeneous integration of the glass antenna to the baseband storage and computing integrated processing circuit, and realizes a brand-new microsystem packaging architecture.

[0037] 5, The microsystem of the application adopts silicon-based single-chip Fan-in packaging and silicon-based single-chip Fan-out packaging technology, converts all the radio frequency chips and storage chips of the lead bonding type into flip-chip packaging form; adopts buried glass-based TGV adapter plate technology to mix and integrate various interface chips of the lead bonding type; completely replaces the traditional lead bonding chip integration process, greatly improves the interconnection density and reliability, realizes high-density and high-reliability integration of microsystem chips, and is suitable for wide promotion in engineering. BRIEF DESCRIPTION OF DRAWINGS

[0038] Figure 1 is a high-reliability three-dimensional integrated direct sampling software radio architecture radio frequency microsystem functional architecture block diagram of the application;

[0039] Figure 2 is a top view of the high-reliability three-dimensional integrated direct sampling software radio architecture radio frequency microsystem of the application;

[0040] Figure 3 is a bottom view of the high-reliability three-dimensional integrated direct sampling software radio architecture radio frequency microsystem of the application;

[0041] Figure 4 is a sectional view of the high-reliability three-dimensional integrated direct sampling software radio architecture radio frequency microsystem of the application;

[0042] Fig. 5(a), Fig. 5(b), Fig. 5(c), Fig. 5(d) are schematic diagrams of the glass-based radio frequency TGV adapter plate of the application;

[0043] Fig. 6(a), Fig. 6(b), Fig. 6(c), Fig. 6(d), Fig. 6(e) are schematic diagrams of the glass-based digital TGV adapter plate of the application;

[0044] Fig. 7(a), Fig. 7(b) are schematic diagrams of the buried glass-based digital TGV adapter plate of the application;

[0045] Figure 8 is a schematic diagram of the TGV structure of the glass-based adapter plate of the application;

[0046] Figure 9 is a schematic diagram of the RDL structure of the glass-based adapter plate of the application;

[0047] Figure 10 is a schematic diagram of the three-dimensional electromagnetic shielding structure of the application;

[0048] Figure 11 is a schematic diagram of the silicon-based single-chip Fan-in packaging of the application;

[0049] Figure 12 is a schematic diagram of the silicon-based single-chip Fan-out packaging of the application;

[0050] Fig. 13(a), Fig. 13(b) are schematic diagrams of silicon-based digital TSV interposer of the present application;

[0051] Figure 14 is a schematic diagram of hybrid bonding of the present application;

[0052] Figure 15 is a schematic diagram of IPD of the present application;

[0053] Figure 16 is a schematic diagram of high-density core particle interconnection technology of the present application;

[0054] Fig. 17(a), Fig. 17(b) are schematic diagrams of glass antenna of the present application;

[0055] Figure 18 is a schematic diagram of BGA solder ball of the present application;

[0056] Legend of the figures: 1 - glass antenna, 2 - upper glass-based RF TGV interposer, 3 - middle glass-based RF TGV interposer, 4 - lower glass-based RF TGV interposer, 5 - top glass-based digital TGV interposer, 6 - upper glass-based digital TGV interposer, 7 - middle glass-based digital TGV interposer, 8 - lower glass-based digital TGV interposer, 9 - buried glass-based digital TGV interposer, 10 - three-dimensional electromagnetic shielding structure, 11 - glass antenna TGV, 12 - glass antenna RDL, 13 - glass-based RF interposer TGV, 14 - glass-based RF interposer RDL, 15 - glass-based RF interposer wafer-level bonding area, 16 - IPD, 17 - direct sampling core particle, 18 - RF micro-bump, 19 - RF core particle, 20 - wire bonding PAD, 21 - Fan-in RDL, 22 - Fan-in bump, 23 - silicon-based single core particle Fan-in package, 24 - glass-based digital interposer RDL, 25 - glass-based digital interposer TGV, 26 - glass-based digital interposer wafer-level bonding area, 27 - silicon-based digital TSV interposer, 28 - silicon-based digital interposer TSV, 29 - silicon-based digital interposer RDL, 30 - hybrid bonding area, 31 - baseband processor core particle, 32 - digital micro-bump, 33 - digital memory core particle, 34 - silicon-based single core particle Fan-out package, 35 - Fan-out RDL, 36 - Fan-out bump, 37 - digital interface core particle, 38 - RF antenna BGA solder ball, 39 - digital-analog hybrid BGA solder ball, 40 - digital baseband BGA solder ball. DETAILED DESCRIPTION

[0057] In order to make the purposes, technical solutions and advantages of the present application clearer, the technical solutions of the application will be further described in detail below with reference to the drawings, and the described embodiments are only a part of the embodiments involved in the present application. All non-innovative embodiments of other researchers in the field on the basis of the embodiments belong to the protection scope of the present application.

[0058] In an embodiment of the present application, a high-reliability three-dimensional integrated direct sampling software radio architecture radio frequency microsystem adopts direct sampling technology, replaces a single chip for a traditional four-channel 12bit / maximum 20GSPS sampling rate direct sampling radio frequency analog-to-digital converter, a four-channel 16bit / maximum 28GSPS sampling rate direct sampling radio frequency digital-to-analog converter, a clock multiplier, a digital intermediate frequency processing circuit, and omits a traditional 20GHz or below frequency band compound base radio frequency transceiver circuit, moves all signal links originally needing to be processed in an analog domain to a digital domain to be implemented, greatly simplifies an existing radio frequency transceiver microsystem architecture, and realizes a direct sampling software radio microsystem architecture.

[0059] Specifically, in the present embodiment, a high-reliability three-dimensional integrated direct sampling software radio architecture radio frequency microsystem functional architecture, as shown in Figure 1 includes a glass antenna, a radio frequency circuit, a direct sampling chip, and a baseband signal processing circuit.

[0060] The microsystem of the present embodiment takes a direct sampling chip as a core, integrates a digital signal processing module on a chip, and includes

[0061] (1) a transmit signal processing circuit, including a radio frequency DAC, a programmable finite-length unit impulse response filter (FIR Filter), a two-stage digital up-conversion (DUC), an inverse Sine function (InvSinc), a power amplifier protection circuit (PA Protect), a multiplexer (MUX), a high-speed interface, and the like;

[0062] (2) a receive signal processing circuit, including a radio frequency ADC, a programmable finite-length unit impulse response filter (FIR Filter), a two-stage digital down-conversion (DDC), a fast detection circuit (Fast Detect), a spectrum sniffer (Spectrum Sniffer), a multiplexer (MUX), a high-speed interface, and the like.

[0063] The baseband signal processing circuit includes a baseband processor chip, a digital memory chip, and a digital interface chip.

[0064] The RF circuit receives the input signal from the glass antenna and transmits it to the RF ADC unit in the direct sampling chip. After passing through a programmable finite-length unit impulse response filter, two-stage digital downconversion, and a fast detection circuit, it is transmitted to the multiplexer. Then, it is transmitted to the baseband signal processing circuit through a high-speed interface. After processing by the baseband processor chip, digital memory chip, and digital interface chip, it returns to the direct sampling chip. Then, it is transmitted to the multiplexer through a high-speed interface. After passing through the power amplifier protection circuit, two-stage digital upconversion, and the RF DAC unit, it is transmitted to the glass antenna through the RF circuit.

[0065] In particular, the direct sampling chip in this embodiment can offload the computing tasks of traditional baseband digital signal processors (such as FPGAs) to DSP modules, thereby reducing the computing power requirements of baseband digital signal processors from the source, thus reducing the integrated circuit size, size, weight, power consumption and cost; and the direct sampling chip in this embodiment can be dynamically reconfigured without recalibration, providing highly flexible computing power resources, forming a brand-new ultra-wideband mixed signal front-end platform, realizing a revolutionary RF microsystem computing power architecture.

[0066] Specifically, this embodiment describes a high-reliability three-dimensional integrated direct-sampling software radio architecture RF microsystem, such as... Figures 2 to 4 As shown, it includes: a glass antenna 1, an upper glass-based RF TGV adapter board 2, a middle glass-based RF TGV adapter board 3, a lower glass-based RF TGV adapter board 4, a top glass-based digital TGV adapter board 5, an upper glass-based digital TGV adapter board 6, a middle glass-based digital TGV adapter board 7, a lower glass-based digital TGV adapter board 8, an embedded glass-based digital TGV adapter board 9, a three-dimensional electromagnetic shielding structure 10, a glass antenna TGV 11, a glass antenna RDL 12, a glass-based RF adapter board TGV 13, a glass-based RF adapter board RDL 14, a wafer-level bonding area of ​​the glass-based RF adapter board 15, an IPD 16, a direct sampling chip 17, an RF microbump 18, an RF chip 19, a wire bonding PAD 20, and a Fan-in. 21. RDL, Fan-in bump; 22. Silicon-based single-chip Fan-in package; 23. Glass-based digital adapter board RDL; 24. Glass-based digital adapter board TGV; 25. Glass-based digital adapter board wafer-level bonding area; 26. Silicon-based digital TSV adapter board; 27. Silicon-based digital adapter board TSV; 28. Silicon-based digital adapter board RDL; 29. ​​Hybrid bonding area; 30. Baseband processor chip; 31. Digital microbump; 32. Digital memory chip; 33. Silicon-based single-chip Fan-out package; 34. Fan-out RDL; 35. Fan-out bump; 36. Digital interface chip; 37. RF antenna BGA solder ball; 38. Mixed-signal BGA solder ball; 39. Digital baseband BGA solder ball; 40.

[0067] The microsystem of the embodiment takes a glass-based TGV adapter plate as a main packaging material, and includes: a glass-based radio frequency TGV adapter plate, a glass-based digital TGV adapter plate, and a buried glass-based digital TGV adapter plate 9. The microsystem is divided into 9 layers from top to bottom, which are: one layer of glass antenna 1, three layers of glass-based radio frequency TGV adapter plates, four layers of glass-based digital TGV adapter plates, and one layer of buried glass-based digital TGV adapter plate 9.

[0068] The three layers of glass-based radio frequency TGV adapter plates are shown in FIGS. 5(a), 5(b), 5(c), and 5(d), and are respectively: an upper layer of glass-based radio frequency TGV adapter plate 2, a middle layer of glass-based radio frequency TGV adapter plate 3, and a lower layer of glass-based radio frequency TGV adapter plate 4.

[0069] The microsystem adopts a glass-based radio frequency TGV adapter plate technology, and performs wafer-level bonding on the upper layer of glass-based radio frequency TGV adapter plate 2, the middle layer of glass-based radio frequency TGV adapter plate 3, and the lower layer of glass-based radio frequency TGV adapter plate 4 through a glass-based radio frequency adapter plate wafer-level bonding area 15, to form a high-reliability air-tight radio frequency direct sampling micro module.

[0070] The four layers of glass-based digital TGV adapter plates are shown in FIGS. 6(a), 6(b), 6(c), 6(d), and 6(e), and are respectively: a top layer of glass-based digital TGV adapter plate 5, an upper layer of glass-based digital TGV adapter plate 6, a middle layer of glass-based digital TGV adapter plate 7, and a lower layer of glass-based digital TGV adapter plate 8.

[0071] The microsystem adopts a glass-based digital TGV adapter plate technology, and performs wafer-level bonding on the top layer of glass-based digital TGV adapter plate 5, the upper layer of glass-based digital TGV adapter plate 6, the middle layer of glass-based digital TGV adapter plate 7, the lower layer of glass-based digital TGV adapter plate 8, and the buried glass-based digital TGV adapter plate 9 through a glass-based digital adapter plate wafer-level bonding area 26, to form a high-reliability air-tight digital signal processing micro module.

[0072] The buried glass-based digital TGV adapter plate 9 is shown in FIGS. 7(a) and 7(b). The microsystem adopts a buried glass-based digital TGV adapter plate technology, and etches a plurality of cavity structures inside the buried glass-based digital TGV adapter plate 9 according to a plurality of chip sizes. A plurality of digital interface chips 37 are buried inside the cavities, and a glass-based digital adapter plate RDL 24 is used to realize leadless mixed high-density integration of the plurality of digital chips.

[0073] Further, in the embodiment, the glass-based TGV adapter plate realizes planar signal reconstruction through an RDL, and realizes vertical signal transmission through a TGV.

[0074] As Figure 8As shown, the microsystem in this embodiment uses glass-based TGV technology. Vertical signal transmission of glass antenna 1 is achieved through glass antenna TGV11. Vertical signal transmission of upper glass-based TGV 2, middle glass-based TGV 3 and lower glass-based TGV 4 is achieved through glass-based RF TGV13. Vertical signal transmission of top glass-based digital TGV 5, upper glass-based digital TGV 6, middle glass-based digital TGV 7, lower glass-based digital TGV 8 and embedded glass-based digital TGV 9 is achieved through glass-based digital TGV25.

[0075] like Figure 9 As shown, the microsystem in this embodiment adopts glass-based adapter board (RDL) technology. The planar signal reconstruction of the upper glass-based TGV adapter board 2, the middle glass-based TGV adapter board 3, and the lower glass-based TGV adapter board 4 is achieved through the glass-based RF adapter board RDL14. The planar signal reconstruction of the top glass-based digital TGV adapter board 5, the upper glass-based digital TGV adapter board 6, the middle glass-based digital TGV adapter board 7, the lower glass-based digital TGV adapter board 8, and the embedded glass-based digital TGV adapter board 9 is achieved through the glass-based digital adapter board RDL24.

[0076] Furthermore, the microsystem in this embodiment employs three-dimensional electromagnetic shielding technology, such as... Figure 10 As shown, by etching a micro-nano precision electromagnetic shielding microcavity structure inside the middle glass-based RF TGV adapter board 3, a three-dimensional electromagnetic shielding structure 10 is constructed together with the upper glass-based RF TGV adapter board 2 and the lower glass-based RF TGV adapter board 4, thereby realizing micro-nano level electromagnetic shielding of the microsystem.

[0077] Furthermore, the microsystem in this embodiment employs silicon-based single-chip Fan-in advanced packaging technology, such as... Figure 11 As shown, the lead bonding PAD20 of the RF chip 19 is converted into Fan-in bumps 22 through Fan-in RDL21 to form a flip-chip package, thereby reducing the package size.

[0078] Furthermore, the microsystem in this embodiment employs silicon-based single-chip Fan-out advanced packaging technology, such as... Figure 12 As shown, the wire bonding PAD20 of the digital memory chip 33 is converted into Fan-out bumps 36 through Fan-out RDL35 to form a high-density flip-chip package, thereby improving interconnection density.

[0079] Furthermore, the microsystem in this embodiment adopts silicon-based digital TSV adapter board technology, as shown in Figures 13(a) and 13(b). The vertical signal transmission of the silicon-based digital TSV adapter board 27 is realized through the silicon-based digital TSV adapter board 28, and the planar signal reconstruction of the silicon-based digital TSV adapter board 27 is realized through the silicon-based digital TSV adapter board RDL29.

[0080] Furthermore, the microsystem in this embodiment employs a hybrid bonding technique, such as... Figure 14 As shown, the baseband processor chip 31 and the digital memory chip 33 are stacked on top of the silicon-based digital TSV adapter board 27 via digital microbumps 32 and Fan-out bumps 36, respectively; the silicon-based digital TSV adapter board 27 and the lower glass-based digital TGV adapter board 8 are interconnected through hybrid bonding technology to achieve ultra-high density integration of the baseband in-memory computing circuit.

[0081] Furthermore, the microsystem in this embodiment employs IPD technology, such as... Figure 15 As shown, passive components are fabricated as IPD16 and integrated inside the upper glass-based RF TGV adapter board 2, the middle glass-based RF TGV adapter board 3, the lower glass-based RF TGV adapter board 4, the top glass-based digital TGV adapter board 5, the upper glass-based digital TGV adapter board 6, the middle glass-based digital TGV adapter board 7, the lower glass-based digital TGV adapter board 8, the embedded glass-based digital TGV adapter board 9, and the silicon-based digital TSV adapter board 27.

[0082] Furthermore, the microsystem in this embodiment employs a variety of high-density chip interconnect technologies, including bump and micro-bump processes, and achieves high-density assembly of various chips through high-density flip-chip interconnect processes in advanced packaging.

[0083] like Figure 16 As shown, the direct sampling chip 17 achieves high-density interconnection through RF microbumps 18, the baseband processor chip 31 achieves ultra-high-density interconnection through digital microbumps 32, the silicon-based single-chip Fan-in package 23 achieves interconnection through Fan-in bumps 22, and the silicon-based single-chip Fan-out package 34 achieves high-density interconnection through Fan-out bumps 36.

[0084] Furthermore, the microsystem in this embodiment adopts glass antenna technology, as shown in Figures 17(a) and 17(b). Based on the excellent radio frequency performance of glass material, the antenna pattern is constructed through glass antenna RDL12, and the vertical signal transmission of glass antenna 1 is realized through glass antenna TGV11, forming an ultra-thin high-performance glass antenna structure, which meets the requirements of high performance, miniaturization, and low profile of microsystem antennas.

[0085] Furthermore, such as Figure 18As shown, the microsystem of the embodiment adopts BGA technology, the glass antenna 1 is stacked above the upper glass-based RF TGV adapter plate 2 through the RF antenna BGA solder ball 38, the lower glass-based RF TGV adapter plate 4 is stacked above the top glass-based digital TGV adapter plate 5 through the digital-analog hybrid BGA solder ball 39, and the baseband digital signal fan-out below the embedded glass-based digital TGV adapter plate 9 is realized through the digital baseband BGA solder ball 40.

[0086] It can be seen that the high-reliability three-dimensional integrated direct sampling software radio architecture RF microsystem provided by the application is based on a direct sampling software radio system architecture, a POP three-dimensional stacked packaging architecture of wafer-level bonding of upper / middle / lower glass-based RF TGV adapter plates, top / upper / middle / lower glass-based digital TGV adapter plates and embedded glass-based digital TGV adapter plates, a silicon-based single-core particle Fan-in packaging and a silicon-based single-core particle Fan-out packaging, a hybrid multi-core particle integration of the embedded glass-based digital TGV adapter plate, a hybrid bonding ultra-high-density integration of the silicon-based digital TSV adapter plate and the embedded glass-based digital TGV adapter plate, an integrated glass antenna, a direct sampling core particle, a silicon-based computing circuit, a silicon-based storage circuit and a silicon-based interface circuit, and three-dimensional heterogeneous integration of the microsystem is realized.

[0087] At the same time, in combination with the advantages of the glass antenna 1, the upper / middle / lower glass-based RF TGV adapter plates 2 / 3 / 4, the top / upper / middle / lower glass-based digital TGV adapter plates 5 / 6 / 7 / 8, the embedded glass-based digital TGV adapter plate 9, the silicon-based single-core particle Fan-in packaging 23 / silicon-based single-core particle Fan-out packaging 34, the RF micro-bump 18 / digital micro-bump 32 / Fan-in bump 22 / Fan-out bump 36, the RF antenna BGA solder ball 38 / digital-analog hybrid BGA solder ball 39 and the digital baseband BGA solder ball 40 technology, multiple functions are realized, and DC~20GHz frequency bands can be covered.

[0088] In use, the high-reliability three-dimensional integrated direct sampling software radio architecture RF microsystem of the application has the following advantages:

[0089] (1) The glass-based RF TGV adapter plate technology is adopted to construct a high-reliability airtight RF direct sampling micro module.

[0090] (2) The glass-based digital TGV adapter plate technology is adopted to construct a high-reliability airtight digital signal processing micro module.

[0091] (3) The embedded glass-based digital TGV adapter plate technology is adopted to realize a variety of digital core particles without lead hybrid high-density integration.

[0092] (4) Using glass-based transition plate TGV technology, vertical signal transmission of glass-based transition plate is realized.

[0093] (5) Using glass-based transition plate RDL technology, planar signal reconstruction of glass-based transition plate is realized.

[0094] (6) Using three-dimensional electromagnetic shielding technology, a three-dimensional electromagnetic shielding structure 10 of the microsystem is constructed by etching a microcavity structure of micro-nano precision in the middle layer glass-based radio frequency TGV transition plate 3.

[0095] (7) Using silicon-based single-core particle Fan-in advanced packaging technology, a flip-chip packaging form is formed, and the packaging size is reduced.

[0096] (8) Using silicon-based single-core particle Fan-out advanced packaging technology, a high-density flip-chip packaging form is formed, and the interconnection density is improved.

[0097] (9) Using silicon-based digital TSV transition plate technology, vertical signal transmission is realized through the silicon-based digital transition plate TSV 28, and planar signal reconstruction is realized through the silicon-based digital transition plate RDL 29.

[0098] (10) Using hybrid bonding technology, ultra-high density integration of baseband computing integrated circuits is realized.

[0099] (11) Using IPD technology, passive devices are made into IPD 16 and integrated in the glass-based TGV transition plate and the silicon-based TSV transition plate.

[0100] (12) Using a variety of high-density core particle interconnection technologies, including bump and micro-bump processes, high-density assembly of various core particles is realized.

[0101] (13) Using glass antenna technology, an ultra-thin high-performance glass antenna structure is formed, meeting the needs of microsystem antenna high performance, miniaturization and low profile.

[0102] (14) Using BGA technology, three-dimensional stacking and signal fan-out of the microsystem are realized through radio frequency antenna BGA solder balls 38, digital-analog hybrid BGA solder balls 39 and digital baseband BGA solder balls 40.

[0103] The above only describes the preferred embodiments of the present application, and it should be noted that for ordinary skilled persons in the art, without departing from the principles of the present application, a number of improvements and refinements can be made, and these improvements and refinements should be considered as the protection scope of the present application.

Claims

1. A high-reliability three-dimensional integrated direct sampling software radio architecture radio frequency microsystem, characterized in that, Comprise: Glass antenna (1): vertical signal transmission is realized through glass antenna TGV (11); Glass-based TGV adapter plate, as the main body packaging material, comprises: glass-based radio frequency TGV adapter plate, glass-based digital TGV adapter plate, and embedded glass-based digital TGV adapter plate (9), radio frequency direct sampling micro module and digital signal processing micro module are formed through multi-layer wafer level bonding technology, and multi-layer signal vertical transmission three-dimensional packaging architecture is formed through POP stacking; Silicon-based digital TSV adapter plate (27): ultra-high density integration is realized through hybrid bonding with the glass-based TGV adapter plate; Direct sampling chip (17) and radio frequency chip (19): arranged in the cavity of the glass-based radio frequency TGV adapter plate, isolated through the three-dimensional electromagnetic shielding structure (10), and used for realizing radio frequency direct sampling core circuit and peripheral circuit respectively; Baseband processor chip (31) and digital memory chip (33): arranged in the cavity of the glass-based digital TGV adapter plate, stacked above the silicon-based digital TSV adapter plate (27) through digital micro bumps (32) and Fan-out bumps (36) respectively, and used for realizing baseband calculation integrated circuit; Digital interface chip (37): a plurality of digital interface chips are embedded in the cavity of the embedded glass-based digital TGV adapter plate (9), and the plurality of digital chips are realized in the form of leadless hybrid high-density integration through the glass-based digital adapter plate RDL (24); Silicon-based single-chip Fan-in packaging (23) and silicon-based single-chip Fan-out packaging (34): respectively convert the lead bonding type radio frequency chip (19) and the digital memory chip (33) into flip-chip packaging.

2. The high-reliability three-dimensional integrated direct sampling software defined radio architecture radio frequency microsystem of claim 1, wherein, The glass-based radio frequency TGV adapter plate has three layers, namely: upper glass-based radio frequency TGV adapter plate (2), middle glass-based radio frequency TGV adapter plate (3) and lower glass-based radio frequency TGV adapter plate (4), wafer level bonding is performed through the glass-based radio frequency adapter plate wafer level bonding area (15), and a radio frequency direct sampling micro module is formed.

3. The high-reliability three-dimensional integrated direct sampling software defined radio architecture radio frequency microsystem of claim 2, wherein, The glass-based digital TGV adapter plate has four layers, namely: top glass-based digital TGV adapter plate (5), upper glass-based digital TGV adapter plate (6), middle glass-based digital TGV adapter plate (7) and lower glass-based digital TGV adapter plate (8), and the embedded glass-based digital TGV adapter plate (9) are wafer level bonded through the glass-based digital adapter plate wafer level bonding area (26), and a digital signal processing micro module is formed.

4. The high-reliability three-dimensional integrated direct sampling software defined radio architecture radio frequency microsystem of claim 3, wherein, The glass-based TGV adapter plate realizes vertical signal transmission through TGV and realizes plane signal reconstruction through RDL; The three-layer glass-based radio frequency TGV adapter plate realizes vertical signal transmission through the glass-based radio frequency adapter plate TGV (13) and realizes plane signal reconstruction through the glass-based radio frequency adapter plate RDL (14); The four-layer glass-based digital TGV adapter plate and the embedded glass-based digital TGV adapter plate (9) realize vertical signal transmission through the glass-based digital adapter plate TGV (25) and realize plane signal reconstruction through the glass-based digital adapter plate RDL (24).

5. The high-reliability three-dimensional integrated direct sampling software defined radio architecture radio frequency microsystem of claim 3, wherein, The middle layer glass-based RF TGV adapter plate (3) is internally etched with electromagnetic shielding microcavity structures of micro-nano precision, and the direct sampling die (17) and the RF die (19) are arranged inside the electromagnetic shielding microcavities. The middle layer glass-based RF TGV adapter plate (3), the upper layer glass-based RF TGV adapter plate (2) and the lower layer glass-based RF TGV adapter plate (4) jointly form a three-dimensional electromagnetic shielding structure (10).

6. The high-reliability three-dimensional integrated direct sampling software defined radio architecture radio frequency microsystem of claim 3, wherein, The direct sampling die (17) is stacked above the lower layer glass-based RF TGV adapter plate (4) through RF micro-bumps (18), and the baseband processor die (31) is stacked above the silicon-based digital TSV adapter plate (27) through digital micro-bumps (32), so as to realize high-density interconnection.

7. The high-reliability three-dimensional integrated direct sampling software defined radio architecture radio frequency microsystem of claim 1, wherein, The RF die (19) adopts a silicon-based single-die Fan-in package (23), that is, the lead bonding PAD (20) of the RF die (19) is converted into a Fan-in bump (22) through a Fan-in RDL (21) to form a flip-chip package form, thereby reducing the chip size. The digital memory die (33) adopts a silicon-based single-die Fan-out package (34), that is, the lead bonding PAD (20) of the digital memory die (33) is converted into a Fan-out bump (36) through a Fan-out RDL (35) to form a flip-chip package form, thereby improving the interconnection density.

8. The high-reliability three-dimensional integrated direct sampling software defined radio architecture radio frequency microsystem of claim 1, wherein, The silicon-based digital TSV adapter plate (27) realizes vertical signal transmission through a silicon-based digital adapter plate TSV (28) and realizes planar signal reconstruction through a silicon-based digital adapter plate RDL (29).

9. The high-reliability three-dimensional integrated direct sampling software defined radio architecture radio frequency microsystem of claim 1, wherein, The microsystem further comprises IPDs (16), each passive device is made into an IPD (16) and integrated in the three-layer glass-based RF TGV adapter plate, the four-layer glass-based digital TGV adapter plate, the embedded glass-based digital TGV adapter plate (9) and the silicon-based digital TSV adapter plate (27).

10. The high-reliability three-dimensional integrated direct sampling software defined radio architecture radio frequency microsystem of claim 1, wherein, The microsystem stacks the glass antenna (1) above the RF direct sampling micro module through RF antenna BGA solder balls (38), stacks the RF direct sampling micro module above the digital signal processing micro module through digital-analog hybrid BGA solder balls (39), and fans out the baseband digital signal below the digital signal processing micro module through baseband digital BGA solder balls (40).

11. The high-reliability three-dimensional integrated direct sampling software defined radio architecture radio frequency microsystem of claim 1, wherein, The direct sampling die (17) is integrated with a dynamically configurable digital signal processing module on the chip, which includes a transmitting signal processing circuit and a receiving signal processing circuit. The transmitting signal processing circuit includes an RF DAC, a programmable finite-length unit impulse response filter, a two-stage digital up-conversion, an inverse Sine function and a power amplifier protection circuit multiplexer. The receiving signal processing circuit includes an RF ADC, a programmable finite-length unit impulse response filter, a two-stage digital down-conversion, a fast detection circuit and a spectrum sniffer multiplexer.

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