Chip resistor

Abstract

A chip resistor mainly comprises a substrate, a first conductive structure, a second conductive structure, a first front electrode, a second front electrode, a third front electrode, a first back electrode, a third back electrode, a first resistive layer, a second resistive layer, a first external electrode layer and a second external electrode layer. The first and second conductive structures are disposed in the substrate. The first to third front electrodes and the first to third back electrodes are respectively arranged on the front and back surfaces of the substrate and are opposite to each other. The first back surface and the first front surface electrode are jointed with the first conductive structure. The first resistance layer is arranged on the front surface and is connected with the second front surface electrode and the second conductive structure. The second resistive layer is disposed on the back surface, and is bonded to the first and third back surface electrodes, and the first and second conductive structures. The first external electrode layer connects the first front surface and the first back surface electrode. The second external electrode layer connects the second front surface and the second back surface electrode. The double-layer resistor series connection structure can improve the maximum resistance value of the chip resistor, and enables the chip resistor to have higher service power and higher maximum service voltage.

Description

Technical Field

[0001] The present disclosure relates to a passive component, and more particularly to a chip resistor. Background Art

[0002] Traditional chip resistors mainly include a pair of electrodes and a resistor layer spanning between the pair of electrodes. Traditional chip resistors use laser cutting to change the current path of the resistor layer. According to Ohm's law of resistance, the longer the current path, the greater the resistance. At present, under the same resistor material, there are generally two ways to increase the resistance of chip resistors. The first way is to reduce the thickness of the resistor layer, and the second way is to increase the circuit pattern of the resistor layer. If the first way is used to increase the resistance of the chip resistor, the resistor layer may be too thin, resulting in a decrease in the product's withstand power.

[0003] On the other hand, if the second method is used to increase the resistance of the chip resistor, the number of laser cut lines needs to be increased to increase the current path of the resistor layer. Increasing the number of laser cuts requires the resistor layer to be thickened first, and then the laser is used to cut the winding pattern of the resistor layer. Moreover, increasing the number of cuts makes the spacing between the lines of the winding pattern of the resistor layer too close, for example, the line width is <7μm. At this time, the thermal effect of laser processing will affect the resistor layer itself, and then affect the stability of the chip resistor's electrical performance.

[0004] In addition, the rated power and maximum operating voltage of resistors are marked in the specification sheet. This specification means that when the product resistance is greater than a certain resistance, the product specification only applies to the maximum operating voltage instead of the rated power. To increase the withstand voltage of the product under the same rated power, it is necessary to increase the current path of the resistor layer, that is, more resistor layers with curved circuit patterns are required to reduce the potential on the resistor layer circuit, thereby reducing the voltage difference per unit length. However, according to Ohm's law, increasing the current path of the resistor layer will shorten the cross-sectional area of ​​the current path of the resistor layer, resulting in a decrease in the power stability of the product. Summary of the invention

[0005] Therefore, one purpose of the present disclosure is to provide a chip resistor, which includes a two-layer series resistor structure of a front resistor layer and a back resistor layer. Therefore, under the same resistor material, the maximum resistance value of the chip resistor can be increased by at least 1.5 times, or even nearly 2 times.

[0006] Another object of the present disclosure is to provide a chip resistor having a double-layer series resistor structure, which can increase the resistor path and the cross-sectional area of ​​the path. Therefore, under a fixed voltage, the voltage gradient per unit length of the resistor can be reduced. In addition, such a structure enables the chip resistor to have a larger heat dissipation area, so that the chip resistor has a higher power consumption and a higher maximum voltage.

[0007] According to the above-mentioned purpose of the present disclosure, a chip resistor is proposed, comprising a substrate, a first conductive structure, a second conductive structure, a first front electrode, a second front electrode, a third front electrode, a first back electrode, a second back electrode, a third back electrode, a first resistor layer, a second resistor layer, a first protective layer, a second protective layer, a first external electrode layer, and a second external electrode layer. The substrate has a front side and a back side, and a first through hole and a second through hole extend from the front side to the back side. The first conductive structure is disposed in the first through hole. The second conductive structure is disposed in the second through hole. The first front electrode, the second front electrode, and the third front electrode are disposed on the front side in a manner separated from each other. The first front electrode and the second front electrode are respectively located on two opposite edge regions of the substrate, and the third front electrode is between the first front electrode and the second front electrode. The first back electrode, the second back electrode, and the third back electrode are disposed on the back side, and are respectively opposite to the first front electrode, the second front electrode, and the third front electrode. The first back electrode and the first front electrode are respectively bonded to opposite ends of the first conductive structure. The first resistor layer is disposed on the front side, and is bonded to the second front electrode and the second conductive structure. The second resistor layer is disposed on the back surface and is bonded to the first back electrode, the third back electrode, the first conductive structure, and the second conductive structure. The first protective layer covers the first resistor layer, the third front electrode, a portion of the first front electrode, and a portion of the second front electrode. The second protective layer covers the second resistor layer, the third back electrode, a portion of the first back electrode, and a portion of the second back electrode. The first external electrode layer extends from the first front electrode through the first side of the substrate to the first back electrode. The second external electrode layer extends from the second front electrode through the second side of the substrate to the second back electrode.

[0008] According to an embodiment of the present disclosure, the substrate is a ceramic substrate, and the material of the substrate is aluminum oxide, aluminum nitride, boron nitride, silicon carbide, or a glass-containing material.

[0009] According to one embodiment of the present disclosure, the diameters of the first through hole and the second through hole are both about 0.1 mm to about 1.0 mm, the distance between the center of the second through hole and the short side of the adjacent substrate is 1 / 4 to 1 / 3 of the length of the substrate, and the distance between the center of the second through hole and the long side of the adjacent substrate is 1 / 5 to 1 / 2 of the width of the substrate.

[0010] According to one embodiment of the present disclosure, the above-mentioned first through hole and second through hole are respectively filled with the material of the first front electrode and the third front electrode, the material of the first back electrode and the third back electrode, or the material of the first front electrode and the first back electrode, and the material of the third front electrode and the third back electrode.

[0011] According to an embodiment of the present disclosure, the first resistance layer and the second resistance layer are connected in series.

[0012] According to an embodiment of the present disclosure, the materials of the first front electrode, the second front electrode, the third front electrode, the first back electrode, the second back electrode, and the third back electrode are copper, copper-nickel alloy, nickel-phosphorus alloy, or sintered silver paste containing silver and glass.

[0013] According to one embodiment of the present disclosure, the materials of the first resistance layer and the second resistance layer are nickel-chromium alloy, copper-nickel alloy, nickel-chromium-silicon alloy, nickel-chromium-aluminum alloy, nickel-chromium-aluminum-silicon alloy, nickel-chromium-aluminum-yttrium alloy, nickel-chromium-tantalum-molybdenum alloy, tantalum nitride, copper-manganese-tin alloy, or copper-manganese-nickel alloy.

[0014] According to an embodiment of the present disclosure, the materials of the first protection layer and the second protection layer are epoxy resin, polyimide (PI), resin, or glass-containing material.

[0015] According to an embodiment of the present disclosure, the first external electrode layer and the second external electrode layer both include a nickel-chromium layer, a nickel layer, and a tin layer stacked in sequence, or a nickel-chromium layer, a nickel layer, a copper layer, another nickel layer, and a tin layer stacked in sequence.

[0016] According to an embodiment of the present disclosure, the first external electrode layer and the second external electrode layer are higher than the first protection layer and the second protection layer by more than 5 μm. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The following detailed description in conjunction with the accompanying drawings will provide a better understanding of the aspects of the present disclosure. It should be noted that, in accordance with standard industry practice, the features are not drawn to scale. In fact, the size of each feature may be increased or decreased at will to make the discussion clearer.

[0018] Figures 1A to 8 A schematic diagram of a chip resistor process according to an embodiment of the present disclosure is shown. Figure 1A , Figure 2A , Figure 3A , Figure 4A , Figure 5A , Figure 6 and Fig. 7A For the top view, Figure 1B , Figure 2B , Figure 3B , Figure 4B , Figure 5B and Figure 7B For the bottom view, Figure 8 It is a three-dimensional picture.

[0019] Fig. 9 FIG. 4 is a schematic diagram illustrating an equivalent circuit model of a chip resistor according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0020] The following is a detailed discussion of the embodiments of the present disclosure. However, it is to be understood that the embodiments provide many applicable concepts that can be implemented in a variety of specific contexts. The embodiments discussed and disclosed are for illustration only and are not intended to limit the scope of the present disclosure. All embodiments of the present disclosure disclose a variety of different features, but these features can be implemented individually or in combination as needed.

[0021] In addition, the terms “first”, “second”, etc. used in this document do not particularly refer to an order or sequence, but are only used to distinguish elements or operations described with the same technical terminology.

[0022] The spatial relationship between two elements described in the present disclosure is applicable not only to the orientations shown in the drawings, but also to orientations not shown in the drawings, such as an inverted orientation. In addition, the term "connection", "electrical connection", or the like between two components in the present disclosure is not limited to direct connection or electrical connection between the two components, but may also include indirect connection or electrical connection as required.

[0023] Please refer to Figures 1A to 8 , which is a schematic diagram illustrating a process of manufacturing a chip resistor 100 according to an embodiment of the present disclosure. The chip resistor 100 may mainly include Figure 1A and Figure 1B The substrate 110 shown, Figure 2A and Figure 2B The first conductive structure 120, the second conductive structure 122, the first front electrode 130, the second front electrode 132, the third front electrode 134, the first back electrode 140, the second back electrode 142, and the third back electrode 144 are shown. Figure 6 The first resistance layer 150 shown, Figure 5B The second resistance layer 160 shown, Fig. 7A and Figure 7B The first protective layer 170 and the second protective layer 180 are shown, and Figure 8 The first external electrode layer 190 and the second external electrode layer 200 are shown.

[0024] When manufacturing the chip resistor 100, a substrate 110 may be provided first. The substrate 110 may be a ceramic substrate. For example, the material of the substrate 110 may be aluminum oxide, aluminum nitride, boron nitride, silicon carbide, or a glass-containing material. The substrate 110 may be a flat plate structure. For example, Figure 1A As shown, the substrate 110 may be a rectangular flat plate structure, and has a length L and a width W. The substrate 110 has a front surface 112 and a back surface 114 opposite to each other, wherein the front surface 112 and the back surface 114 may both be planes.

[0025] exist Figure 1AIn the illustrated embodiment, the substrate 110 has two through holes, namely, a first through hole 116 and a second through hole 118. In other embodiments, the substrate 110 may have more than two through holes according to the architectural design requirements. The first through hole 116 and the second through hole 118 both extend from the front surface 112 of the substrate 110 to the back surface 114. The first through hole 116 and the second through hole 118 are adjacent to the short side 110a of the substrate 110. In some embodiments, the first through hole 116 and the second through hole 118 may be formed in the substrate 110 by laser processing. Therefore, the first through hole 116 and the second through hole 118 may be circular through holes. For example, the diameter of the first through hole 116 and the diameter of the second through hole 118 may be about 0.1 mm to about 1.0 mm. By designing the position of the second through hole 118 in the substrate 110, better utilization of the effective area of ​​the substrate 110 may be obtained. In some exemplary embodiments, a distance D1 between a center 118 a of the second through hole 118 and an adjacent short side 110 a of the substrate 110 is 1 / 4 to 1 / 3 of a length L of the substrate 110 , and a distance D2 between a center 118 a of the second through hole 118 and an adjacent long side 110 b of the substrate 110 is 1 / 5 to 1 / 2 of a width W of the substrate 110 .

[0026] Next, if Figure 2A As shown, the first front electrode 130, the second front electrode 132, and the third front electrode 134 can be formed on the front surface 112 of the substrate 110 by printing, sputtering, or electroplating. The first front electrode 130, the second front electrode 132, and the third front electrode 134 are separated from each other. Figure 2A In the illustrated embodiment, the first front electrode 130 and the second front electrode 132 are respectively located on two opposite edge regions 110c and 110d of the substrate 110, and the third front electrode 134 is between the first front electrode 130 and the second front electrode 132. The third front electrode 134 may be, for example, adjacent to the first front electrode 130. The materials of the first front electrode 130, the second front electrode 132, and the third front electrode 134 may be low-resistance materials, such as copper, copper-nickel alloy, nickel-phosphorus alloy, or sintered silver paste containing silver and glass.

[0027] Then, if Figure 2BAs shown, the first back electrode 140, the second back electrode 142, and the third back electrode 144 can also be formed on the back side 114 of the substrate 110 by printing, or by sputtering and electroplating. The first back electrode 140, the second back electrode 142, and the third back electrode 144 are respectively opposite to the first front electrode 130, the second front electrode 132, and the third front electrode 134. Therefore, the first back electrode 140, the second back electrode 142, and the third back electrode 144 are also separated from each other, and the third back electrode 144 is between the first back electrode 140 and the second back electrode 142. The materials of the first back electrode 140, the second back electrode 142, and the third back electrode 144 can be low resistance materials, such as copper, copper-nickel alloy, nickel-phosphorus alloy, or sintered silver paste containing silver and glass. The manufacturing order of the front electrode and the back electrode can be adjusted, and the back electrode can also be manufactured first.

[0028] The first through hole 116 and the second through hole 118 of the substrate 110 may be filled with the materials of the first front electrode 130 and the third front electrode 134, respectively, or filled with the materials of the first back electrode 140 and the third back electrode 144, respectively, or filled with the materials of the first front electrode 130 and the first back electrode 140, and the materials of the third front electrode 134 and the third back electrode 144. The electrode material filled in the first through hole 116 forms the first conductive structure 120. The electrode material filled in the second through hole 118 forms the second conductive structure 122. The first front electrode 130 and the first back electrode 140 are respectively bonded to opposite ends of the first conductive structure 120.

[0029] Next, the resistor layer of the chip resistor 100 may be fabricated. In some embodiments, shielding layers 210 and 212 may be formed on the front surface 112 and the back surface 114 of the substrate 110, respectively. The shielding layers 210 and 212 may respectively shield the areas of the front surface 112 and the back surface 114 where the resistor layer is not to be formed, and thus have respective predetermined patterns. Figure 3A As shown, the shielding layer 210 shields the first front electrode 130, part of the second front electrode 132, part of the third front electrode 134, and part of the substrate 110, but exposes the third front electrode 134 on the second conductive structure 122 and the area between the first front electrode 130 and the second front electrode 132. Figure 3BAs shown, the shielding layer 212 shields part of the first back electrode 140, the second back electrode 142, part of the third back electrode 144, and part of the substrate 110, but exposes the third back electrode 144 on the second conductive structure 122 and a part of the area between the first back electrode 140 and the second back electrode 142. For example, the shielding layers 210 and 212 are made of removable ink or photoresist. The shielding layers 210 and 212 can be formed by, for example, printing, laminating, or coating.

[0030] Next, if Figure 4A and Figure 4B As shown, the resistive material layers 152 and 162 can be formed by, for example, sputtering to cover the front surface 112 and the back surface 114 of the substrate 110. Subsequently, the shielding layers 210 and 212 are removed by solvent or water washing. When the shielding layers 210 and 212 are removed, the resistive material layers 152 and 162 on the shielding layers 210 and 212 are also removed, and the first resistive layer 150 and the second resistive layer 160 having a predetermined pattern are formed on the front surface 112 and the back surface 114 of the substrate 110, respectively. Figure 5A and Figure 5B As shown. For example, the material of the first resistor layer 150 and the second resistor layer 160 can be a metal alloy such as nickel-chromium alloy, copper-nickel alloy, nickel-chromium-silicon alloy, nickel-chromium-aluminum alloy, nickel-chromium-aluminum-silicon alloy, nickel-chromium-aluminum-yttrium alloy, nickel-chromium-tantalum-molybdenum alloy, tantalum nitride, copper-manganese-tin alloy, or copper-manganese-nickel alloy. The present disclosure can use other suitable resistor materials, but is not limited thereto.

[0031] like Figure 5A and Figure 5B As shown, the first resistor layer 150 is directly bonded to the second front electrode 132, and the first resistor layer 150 is indirectly bonded to and electrically connected to the second conductive structure 122 through the second front electrode 132. The second resistor layer 160 is directly bonded to the first back electrode 140 and the third back electrode 144, and the second resistor layer 160 is indirectly bonded to and electrically connected to the first conductive structure 120 and the second conductive structure 122 through the first back electrode 140 and the third back electrode 144, respectively. Please refer to Fig. 9 , which is a schematic diagram of an equivalent circuit model of a chip resistor 100 according to an embodiment of the present disclosure. The first resistor layer 150 on the front side 112 of the substrate 110 and the second resistor layer 160 on the back side 114 can be connected in series through the second conductive structure 122 .

[0032] Such a double-layer series resistor structure can significantly increase the maximum resistance of the chip resistor 100 under the same resistor material, for example, by at least 1.5 times. Secondly, due to the design of the double-layer series resistor, the path of the resistor and the cross-sectional area of ​​the path can be increased. In this way, under a fixed voltage, the voltage gradient per unit length of the resistor can be reduced. Furthermore, the architecture of the double-layer series resistor can significantly increase the heat dissipation area of ​​the chip resistor 100, thereby increasing the power consumption and maximum operating voltage of the chip resistor 100.

[0033] Next, the resistance value can be selectively adjusted according to the product requirements of the chip resistor 100. In some embodiments, Figure 6 As shown, the first resistor layer 150 is patterned by laser or physical processing to adjust the resistance of the chip resistor 100. The resistance adjustment operation can also be performed by patterning the second resistor layer 160.

[0034] like Fig. 7A and Figure 7B As shown, after the resistance adjustment operation of the chip resistor 100 is completed, a first protective layer 170 and a second protective layer 180 are formed on the front surface 112 and the back surface 114 of the substrate 110 respectively by printing, deposition and photolithography. The first protective layer 170 covers the entire first resistor layer 150, the entire third front electrode 134, a portion of the first front electrode 130, and a portion of the second front electrode 132. The second protective layer 180 covers the entire second resistor layer 160, the entire third back electrode 144, a portion of the first back electrode 140, and a portion of the second back electrode 142. In some embodiments, the materials of the first protective layer 170 and the second protective layer 180 are epoxy resin, polyimide, resin, or glass-containing materials.

[0035] Subsequently, the first external electrode layer 190 and the second external electrode layer 200 of the chip resistor 100 may be fabricated. The first external electrode layer 190 extends from the first front electrode 130 through the first side surface 110e of the substrate 110 to the first back electrode 140. The second external electrode layer 200 extends from the second front electrode 132 through the second side surface 110f of the substrate 110 to the second back electrode 142. The second side surface 110f and the first side surface 110e of the substrate 110 are opposite to each other. In some embodiments, the first external electrode layer 190 covers the first front electrode 130 and the first back electrode 140 to form a C-shaped structure; and the second external electrode layer 200 covers the second front electrode 132 and the second back electrode 142 to form an inverted C-shaped structure. In some exemplary embodiments, the first external electrode layer 190 and the second external electrode layer 200 are higher than the first protective layer 170 and the second protective layer 180 by more than about 5 μm.

[0036] In some embodiments, a nickel-chromium layer is first formed on the first side 110e and the second side 110f of the substrate 110 by, for example, sputtering as a side connection layer, and then a nickel layer and a tin layer are sequentially formed by, for example, electroplating, or a nickel layer, a copper layer, another nickel layer, and a tin layer are sequentially formed. Therefore, the first external electrode layer 190 and the second external electrode layer 200 may include a nickel-chromium layer, a nickel layer, and a tin layer stacked in sequence, or include a nickel-chromium layer, a nickel layer, a copper layer, another nickel layer, and a tin layer stacked in sequence.

[0037] From the above-mentioned embodiments, it can be known that one advantage of the present disclosure is that the chip resistor of the present disclosure includes a two-layer series resistor structure of a front resistor layer and a back resistor layer, so the maximum resistance value of the chip resistor can be greatly increased.

[0038] Another advantage of the present disclosure is that the chip resistor of the present disclosure has a double-layer series resistor structure, which can increase the resistor path and the cross-sectional area of ​​the path. Therefore, under a fixed voltage, the voltage gradient per unit length of the resistor can be reduced. In addition, such a structure allows the chip resistor to have a larger heat dissipation area, so that the chip resistor has a higher power consumption and a higher maximum voltage.

[0039] Although the present disclosure has been disclosed as above by way of embodiments, it is not intended to limit the present disclosure. Any person skilled in the art may make various changes and modifications without departing from the spirit and scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be determined by the appended claims.

[0040]

Explanation of symbols

[0041] 100: Chip resistor

[0042] 110:Substrate

[0043] 110a: short side

[0044] 110b: long side

[0045] 110c: Marginal area

[0046] 110d: Marginal area

[0047] 110e: First side

[0048] 110f: Second side

[0049] 112: Front

[0050] 114: Back

[0051] 116: first through hole

[0052] 118: Second through hole

[0053] 118a: Center

[0054] 120: first conductive structure

[0055] 122: second conductive structure

[0056] 130: first front electrode

[0057] 132: Second front electrode

[0058] 134: Third front electrode

[0059] 140: first back electrode

[0060] 142: Second back electrode

[0061] 144: third back electrode

[0062] 150: first resistance layer

[0063] 152: resistance material layer

[0064] 160: Second resistance layer

[0065] 162: Resistance material layer

[0066] 170: First protective layer

[0067] 180: Second protective layer

[0068] 190: first external electrode layer

[0069] 200: second external electrode layer

[0070] 210: Occlusion layer

[0071] 212: Occlusion layer

[0072] D1: Distance

[0073] D2: Distance

[0074] L: Length

[0075] W: width.

Claims

1. A chip resistor, characterized in that: The chip resistor contains: A substrate having a front surface and a back surface, and a first through hole and a second through hole extending from the front surface to the back surface; A first conductive structure is disposed in the first through hole; A second conductive structure is disposed in the second through hole; A first front electrode, a second front electrode, and a third front electrode are disposed on the front surface in a manner separated from each other, wherein the first front electrode and the second front electrode are respectively located on two opposite edge regions of the substrate, and the third front electrode is between the first front electrode and the second front electrode; A first back electrode, a second back electrode, and a third back electrode are disposed on the back surface and are respectively opposite to the first front electrode, the second front electrode, and the third front electrode, and the first back electrode and the first front electrode are respectively connected to opposite ends of the first conductive structure; A first resistance layer is disposed on the front surface and is bonded to the second front electrode and the second conductive structure; A second resistance layer is disposed on the back surface and is bonded to the first back surface electrode, the third back surface electrode, the first conductive structure, and the second conductive structure; A first protective layer, covering the first resistance layer, the third front electrode, a portion of the first front electrode, and a portion of the second front electrode; A second protective layer covering the second resistance layer, the third back electrode, a portion of the first back electrode, and a portion of the second back electrode; A first external electrode layer extending from the first front electrode through the first side surface of the substrate to the first back electrode; as well as The second external electrode layer extends from the second front electrode through the second side surface of the substrate to the second back electrode.

2. The chip resistor according to claim 1, characterized in that: The substrate is a ceramic substrate, and the material of the substrate is aluminum oxide, aluminum nitride, boron nitride, silicon carbide, or a glass-containing material.

3. The chip resistor according to claim 1, characterized in that: The diameter of each of the first through hole and the second through hole is 0.1mm to 1.0mm, the distance between the center of the second through hole and the adjacent short side of the substrate is 1 / 4 to 1 / 3 of the length of the substrate, and the distance between the center of the second through hole and the adjacent long side of the substrate is 1 / 5 to 1 / 2 of the width of the substrate.

4. The chip resistor according to claim 1, characterized in that: The first through hole and the second through hole are respectively filled with the material of the first front electrode and the third front electrode, the material of the first back electrode and the third back electrode, or the material of the first front electrode and the first back electrode, and the material of the third front electrode and the third back electrode.

5. The chip resistor according to claim 1, characterized in that: The first resistance layer is connected in series with the second resistance layer.

6. The chip resistor according to claim 1, characterized in that: The materials of the first front electrode, the second front electrode, the third front electrode, the first back electrode, the second back electrode, and the third back electrode are copper, copper-nickel alloy, nickel-phosphorus alloy, or sintered silver paste containing silver and glass.

7. The chip resistor according to claim 1, characterized in that: The materials of the first resistance layer and the second resistance layer are nickel-chromium alloy, copper-nickel alloy, nickel-chromium-silicon alloy, nickel-chromium-aluminum alloy, nickel-chromium-aluminum-silicon alloy, nickel-chromium-aluminum-yttrium alloy, nickel-chromium-tantalum-molybdenum alloy, tantalum nitride, copper-manganese-tin alloy, or copper-manganese-nickel alloy.

8. The chip resistor according to claim 1, characterized in that: The materials of the first protection layer and the second protection layer are epoxy resin, polyimide, resin, or glass-containing material.

9. The chip resistor according to claim 1, characterized in that: Each of the first external electrode layer and the second external electrode layer includes a nickel-chromium layer, a nickel layer, and a tin layer stacked in sequence, or a nickel-chromium layer, a nickel layer, a copper layer, another nickel layer, and a tin layer stacked in sequence.

10. The chip resistor according to claim 1, characterized in that: The first external electrode layer and the second external electrode layer are higher than the first protection layer and the second protection layer by more than 5 μm.

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