Method for adjusting thickness of oxide on side wall of deep groove

Abstract

The invention provides a method for adjusting the thickness of oxide on the side wall of a deep trench, which comprises the following steps of: providing a substrate, forming an epitaxial layer on the surface of the substrate, forming a laminated layer on the surface of the epitaxial layer, and sequentially comprising a pad oxygen layer, a nitride layer, a polycrystalline silicon layer and a hard mask layer from bottom to top; etching the laminated layer, the epitaxial layer and the substrate by using a photoetching process to form a deep groove; etching the hard mask layer to enlarge the opening of the deep trench at the position of the hard mask layer and expose the polycrystalline silicon layer with a certain size; growing an oxide layer on the surface of the deep trench; etching to remove the oxide layer formed at the bottom of the deep trench, so that the bottom of the deep trench is communicated with the substrate; and filling polycrystalline silicon in the deep trench. According to the method, the top side wall oxide layer of the deep trench is protected by adding the step of etching the hard mask layer to expose the polycrystalline silicon layer with a certain size, so that the top side wall oxide layer of the deep trench is not etched too much, the thickness is increased, and the thickness of the oxide layer on the side wall of the deep trench is adjusted.

Description

Technical Field

[0001] The invention relates to the field of semiconductor integrated circuits, and in particular to a method for adjusting the oxide thickness of a deep trench sidewall. Background Art

[0002] In the BCD deep trench isolation (DTI) process, the trench is first etched, then the trench sidewall is oxidized, and then the bottom of the trench oxide is etched to obtain a structure connected to the substrate (sub); this structure requires that the bottom of the DTI is connected to the sub, and the top sidewall oxide must have a certain thickness to meet the voltage resistance requirements; but in actual etching, if Figure 1 As shown, the etching rate of the oxide at the top of the trench is always greater than that at the bottom. When etching through the bottom oxide, the top oxide is often etched very thin, which eventually leads to insufficient voltage resistance and failure of the chip.

[0003] Therefore, there is an urgent need to improve the existing deep trench process to solve the problem of insufficient thickness of the existing sidewall oxide at the top of the deep trench, which leads to insufficient pressure resistance of the chip and easy failure. Summary of the invention

[0004] In order to solve the problems existing in the above-mentioned prior art, the present invention provides a method for adjusting the oxide thickness of the sidewall of a deep trench, so as to optimize the deep trench process, ensure the oxide thickness of the sidewall at the top of the trench, and improve the pressure resistance of the chip.

[0005] The present invention provides a method for adjusting the thickness of a deep trench sidewall oxide, comprising the following steps:

[0006] Step 1, providing a substrate, wherein an epitaxial layer is formed on the surface of the substrate, and a stacked layer is formed on the surface of the epitaxial layer, wherein the stacked layer includes a pad oxide layer, a nitride layer, a polysilicon layer and a hard mask layer in order from bottom to top;

[0007] Step 2: etching the stack, the epitaxial layer and the substrate using a photolithography process to form a deep trench;

[0008] Step 3, etching the hard mask layer so that the deep trench opening at the position of the hard mask layer becomes larger, exposing the polysilicon layer of a certain size;

[0009] Step 4, growing an oxide layer on the surface of the deep trench;

[0010] Step 5: etching and removing the oxide layer formed at the bottom of the deep trench, so that the bottom of the deep trench is connected with the substrate;

[0011] Step six: filling the deep trench with polysilicon.

[0012] Preferably, the substrate in step one is a silicon substrate.

[0013] Preferably, the material of the hard mask layer in step 1 is silicon oxide.

[0014] Preferably, the etching in step 2 and step 3 is dry etching.

[0015] Preferably, the size of the polysilicon layer exposed in step three is 50-100 nm.

[0016] Preferably, the oxide layer in step 4 is formed by a thermal oxidation method.

[0017] Preferably, when performing step 4, the side surface of the polysilicon layer will be oxidized.

[0018] Preferably, the polysilicon layer exposed in step three forms an oxide layer protrusion in step four, and protects the top sidewall oxide of the deep trench in step five.

[0019] Preferably, the etching in step five is dry etching.

[0020] Preferably, after step five and before step six, a step of removing the hard mask layer is further included.

[0021] After the DTI etching is completed to form a deep trench, the present invention performs dry etching to remove a portion of the hard mask layer covering the polysilicon layer to expose it. When the DTI thermal oxidation grows an oxide layer, more polysilicon is exposed to form a more prominent oxide layer. When the DTI bottom oxide layer is etched through, the DTI top oxide side wall can be better protected, thereby achieving the purpose of optimizing the deep trench process, improving the uniformity of the side wall oxide thickness, and improving the pressure resistance of the chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0023] Figure 1 A schematic diagram showing the morphology of deep trenches formed by a conventional DTI process;

[0024] Figures 2 to 4 Shown is a structural schematic diagram of an existing DTI process;

[0025] Figure 5 A flow chart showing a method for adjusting the oxide thickness of a deep trench sidewall according to an embodiment of the present invention;

[0026] Figures 6 to 8 It is a schematic diagram showing the structure of each step of the method for adjusting the oxide thickness of the deep trench sidewall according to an embodiment of the present invention;

[0027] Fig. 9 A schematic diagram showing the deep trench morphology according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0028] The present invention is described below based on embodiments, but the present invention is not limited to these embodiments. In the detailed description of the present invention below, some specific details are described in detail. It is possible for a person skilled in the art to fully understand the present invention without the description of these details. In order to avoid confusing the essence of the present invention, known methods, processes, flows, components and circuits are not described in detail.

[0029] In addition, persons of ordinary skill in the art will appreciate that the drawings provided herein are for illustration purposes and are not necessarily drawn to scale.

[0030] Unless the context clearly requires otherwise, the words "include", "comprising" and similar words throughout the application should be interpreted as including rather than exclusive or exhaustive; that is, the meaning is "including but not limited to".

[0031] In the description of the present invention, it should be understood that the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. In addition, in the description of the present invention, unless otherwise specified, "plurality" means two or more.

[0032] The deep trench (DTI) structure requires that the bottom SiO2 must be etched through to the substrate, while leaving a sufficiently thick SiO2 sidewall on the top. This is very difficult to achieve. In the prior art, the balance is mainly achieved by adjusting the DTI bottom oxide etching process, but the margin is very narrow. Figures 3 to 5 As shown in FIG. , it is a schematic diagram of the structure of the existing DTI process. Figure 3 As shown, a deep trench is formed by photolithography and etching process; Figure 4 As shown, an oxide layer is grown by thermal oxidation in a deep trench, wherein the side of the polysilicon layer is oxidized to form an oxide layer; Figure 5 As shown in the figure, the bottom oxide layer of the deep trench is etched through. It can be seen that when the bottom oxide of the deep trench is etched through, the top oxide is still etched very thinly, as shown in the figure. Figure 5 As shown in the middle circle. Therefore, the present invention proposes a method for adjusting the oxide thickness of the deep trench sidewalls to optimize the deep trench process, thereby ensuring the oxide thickness of the trench top sidewalls and improving the pressure resistance of the chip. The technical solution of the present invention is further explained below in conjunction with the accompanying drawings and through specific implementation methods.

[0033] Figure 5 A flow chart showing a method for adjusting the oxide thickness of a deep trench sidewall according to an embodiment of the present invention; Figures 6 to 8The structure diagram of each step of the method for adjusting the oxide thickness of the deep trench sidewall according to an embodiment of the present invention is shown. Figure 5 As shown, the method for adjusting the oxide thickness of the deep trench sidewall according to the embodiment of the present invention comprises the following steps:

[0034] Step 1: providing a substrate, an epitaxial layer is formed on the surface of the substrate, a stacked layer is formed on the surface of the epitaxial layer, and the stacked layer includes a pad oxide layer, a nitride layer, a polysilicon layer and a hard mask layer from bottom to top.

[0035] The material of the substrate may be silicon, germanium, silicon germanium or silicon carbide, etc., or may be silicon on insulator (SOI) or germanium on insulator (GOI), or may be other materials, such as III and V group compounds such as gallium arsenide. The substrate in this embodiment is a silicon substrate, and further, it may be an undoped or lightly doped silicon substrate. An epitaxial layer is formed on the surface of the substrate by epitaxial growth. A pad oxide layer, a nitride layer, a polysilicon layer and a hard mask layer are formed on the surface of the epitaxial layer from bottom to top. Among them, there are many materials for the hard mask layer (Hard Mask, HM), and in the embodiment of the present invention, the material of the HM layer is silicon oxide. The formation method of each layer may be chemical vapor deposition (CVD) or physical vapor deposition (PVD), of course, it may also be other suitable methods.

[0036] Step 2: Use photolithography and etching technology to etch the stack, epitaxial layer and substrate to form deep trenches.

[0037] The photolithography and etching process includes: defining the deep trench formation area, exposure and development, dry etching the HM layer, using the Bosch process and the Bevel Etch process to form the deep trench, and debonding. The deep trench formed is as follows Figure 3 shown.

[0038] Step 3: Etch the hard mask layer so that the deep trench opening at the position of the hard mask layer becomes larger, exposing a polysilicon layer of a certain size.

[0039] like Figure 6 As shown, part of the HM layer on the surface of the polysilicon layer is removed to expose part of the polysilicon layer, so that the deep trench opening at the hard mask layer becomes larger, which is convenient for subsequent oxidation. In the embodiment of the present invention, dry etching is used for etching, and the size of the exposed polysilicon layer is 50-100nm.

[0040] Step 4: growing an oxide layer on the surface of the deep trench.

[0041] In the embodiment of the present invention, an oxide layer is grown on the surface of the deep trench by thermal oxidation. The oxide layer is distributed on the bottom surface and sidewall surface of the deep trench, and also includes an oxide layer formed at the position of the polysilicon layer. Compared with the existing process, such as Figure 4As shown, an oxide layer is formed on the side of the polysilicon layer. In the embodiment of the present invention, Figure 7 As shown, since more polysilicon layer is exposed, a more protruding oxide layer is formed, which is thicker than the oxide layer grown on the sidewall of the deep trench, so that the top sidewall oxide of the deep trench can be protected.

[0042] Step 5: Etching and removing the oxide layer formed at the bottom of the deep trench, so that the bottom of the deep trench is connected with the substrate.

[0043] In the embodiment of the present invention, dry etching is used to etch through the oxide layer at the bottom of the deep trench to the substrate. During etching, due to the protruding oxide layer, the oxide layer on the top sidewall of the deep trench is not etched too much. Figure 8 As shown in the middle circle, the thickness of the top sidewall oxide layer of the deep trench is thickened, which meets the requirements of the deep trench structure, that is, the bottom SiO2 must be etched through to the substrate, and the top must have a sufficiently thick SiO2 sidewall.

[0044] Step 6: Fill the deep trench with polysilicon.

[0045] In addition, after step five and before step six, a step of removing the hard mask layer is also included.

[0046] Fig. 9 The schematic diagram of the deep trench morphology of an embodiment of the present invention is shown. Fig. 9 As shown in Figure 1, the thickness of the top sidewall oxide layer of the deep trench is 527nm. Figure 1 , the thickness of the top sidewall oxide layer of the deep trench is 346nm. Obviously, compared with the prior art, the embodiment of the present invention has a thicker top sidewall oxide layer of the deep trench, which is helpful for improving the uniformity of the DTI sidewall oxide thickness, thereby achieving the purpose of improving the uniformity of the sidewall oxide thickness of the deep trench sidewall oxide and improving the pressure resistance of the chip.

[0047] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A method for adjusting the thickness of a deep trench sidewall oxide, characterized in that: The following steps are involved: Step 1, providing a substrate, wherein an epitaxial layer is formed on the surface of the substrate, and a stacked layer is formed on the surface of the epitaxial layer, wherein the stacked layer includes a pad oxide layer, a nitride layer, a polysilicon layer and a hard mask layer in order from bottom to top; Step 2: etching the stack, the epitaxial layer and the substrate using a photolithography process to form a deep trench; Step 3, etching the hard mask layer so that the deep trench opening at the position of the hard mask layer becomes larger, exposing the polysilicon layer of a certain size; Step 4, growing an oxide layer on the surface of the deep trench; Step 5: etching and removing the oxide layer formed at the bottom of the deep trench, so that the bottom of the deep trench is connected with the substrate; Step six: filling the deep trench with polysilicon.

2. The method for adjusting the oxide thickness of the deep trench sidewall according to claim 1, characterized in that: The substrate in step 1 is a silicon substrate.

3. The method for adjusting the oxide thickness of the deep trench sidewall according to claim 1, characterized in that: The material of the hard mask layer in step 1 is silicon oxide.

4. The method for adjusting the oxide thickness of the deep trench sidewall according to claim 1, characterized in that: The etching in step 2 and step 3 is dry etching.

5. The method for adjusting the oxide thickness of the deep trench sidewall according to claim 1, characterized in that: The size of the polysilicon layer exposed in step three is 50-100 nm.

6. The method for adjusting the oxide thickness of the deep trench sidewall according to claim 1, characterized in that: The oxide layer in step 4 is formed by thermal oxidation.

7. The method for adjusting the oxide thickness of the deep trench sidewall according to claim 6, characterized in that: During step 4, the side surface of the polysilicon layer will be oxidized.

8. The method for adjusting the oxide thickness of the deep trench sidewall according to claim 7, characterized in that: The polysilicon layer exposed in step three forms an oxide layer protrusion in step four, and protects the top sidewall oxide of the deep trench in step five.

9. The method for adjusting the oxide thickness of the deep trench sidewall according to claim 1, characterized in that: The etching in step five is dry etching.

10. The method for adjusting the oxide thickness of the deep trench sidewall according to claim 1, characterized in that: After step five and before step six, a step of removing the hard mask layer is also included.

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