Electronic device and manufacturing method thereof

By forming trenches on the substrate and making inductive conductive layers in conformally, the problem of lack of deep trench inductance in the prior art is solved, and a compact, highly integrated electronic device is realized, suitable for compatible use with deep trench capacitors.

CN119943833APending Publication Date: 2025-05-06UNITED MICROELECTRONICS CORP
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Patent Information

Application Number
CN202311548935.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-11-03
Filing Date
2023-11-20
Publication Date
2025-05-06

AI Technical Summary

Technical Problem

The lack of inductance of deep trench structures in the prior art limits the compactness and flexibility of electronic devices.

Method used

By forming trenches on the substrate, the first and second inductive conductive layers are conformally manufactured, and an electrical connection structure is formed through the conductive connection members to construct a deep trench inductance.

Benefits of technology

It realizes an inductor manufacturing process compatible with deep trench capacitors, improves the compactness and integration of electronic devices, and can be highly integrated with the CMOS manufacturing process, reducing costs and area occupancy.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides an electronic device and a manufacturing method thereof. The electronic device includes a substrate and an inductor. The substrate is provided with a groove. The inductor is arranged on the substrate. The inductor comprises a first inductor conductive layer and a second inductor conductive layer. The first inductive conductive layer is conformally disposed on the substrate. At least a portion of the first inductive conductive layer is disposed in the trench. The first inductive conductive layer has a first end and a second end. The second inductive conductive layer is conformally disposed on the first inductive conductive layer. The second inductive conductive layer has a first end portion and a second end portion located on the first end portion and the second end portion of the first inductive conductive layer, respectively. The first end portion of the second inductive conductive layer is electrically connected with the second end portion of the first inductive conductive layer.
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Description

Technical Field

[0001] The present invention relates to an inductor, a manufacturing method thereof, and an electronic device having the same. In particular, the present invention relates to a deep trench inductor (DTI), a manufacturing method thereof, and an electronic device having the same. Background Art

[0002] Electronic components, including resistors, capacitors, inductors, etc., can be connected and combined in various ways to form a variety of electronic devices. In order to add capacitance to various integrated circuits, deep trench capacitors (DTCs) have been developed. A typical deep trench capacitor is formed by etching one or more deep trenches into a substrate and then forming multiple layers of capacitors that conform to the deep trenches. In this way, a "vertical" capacitor is formed. This vertical deep trench electronic component can be configured more compactly. In addition, the deep trench electronic component can be freely placed as close to the desired circuit as possible. However, to date, there are no other types of deep trench electronic components besides deep trench capacitors. Summary of the invention

[0003] In the present invention, an inductor and various related embodiments that can be combined with a deep trench structure are provided.

[0004] In one aspect of the present invention, an electronic device is provided. The electronic device includes a substrate and an inductor. The substrate has a groove. The inductor is disposed on the substrate. The inductor includes a first inductor conductive layer and a second inductor conductive layer. The first inductor conductive layer is conformally disposed on the substrate. At least a portion of the first inductor conductive layer is disposed in the groove. The first inductor conductive layer has a first end and a second end. The second inductor conductive layer is conformally disposed on the first inductor conductive layer. The second inductor conductive layer has a first end and a second end, which are respectively located on the first end and the second end of the first inductor conductive layer. The first end of the second inductor conductive layer is electrically connected to the second end of the first inductor conductive layer.

[0005] In another aspect of the present invention, a method for manufacturing an electronic device is provided. The manufacturing method comprises the following steps. First, a substrate is provided. The substrate has a groove. Next, a first inductor conductive layer is conformally formed on the substrate. At least a portion of the first inductor conductive layer is formed in the groove. The first inductor conductive layer has a first end and a second end. A second inductor conductive layer is conformally formed on the first inductor conductive layer. The second inductor conductive layer has a first end and a second end, which are respectively located on the first end and the second end of the first inductor conductive layer. Then, the first end of the second inductor conductive layer is electrically connected to the second end of the first inductor conductive layer.

[0006] The inductor according to the present invention can be used together with any suitable electronic component, in particular, can be used together with a deep trench capacitor. The manufacturing process of the inductor can be compatible with the manufacturing process of the deep trench capacitor.

[0007] In order to better understand the above and other aspects of the present invention, embodiments are given below and described in detail with reference to the accompanying drawings: BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1A to Figure 1C is a schematic diagram of an exemplary electronic device of the present invention;

[0009] Figure 2 is a flow chart of a method for manufacturing an electronic device of the present invention;

[0010] Figure 3A to Figure 3H is a schematic diagram of various stages of an exemplary method for manufacturing an electronic device of the present invention;

[0011] Figure 4A to Figure 4B is a schematic diagram of another exemplary electronic device of the present invention;

[0012] Figure 5A to Figure 5B is a schematic diagram of yet another exemplary electronic device of the present invention.

[0013] Explanation of symbols

[0014] 100: Inductor

[0015] 100': Inductor

[0016] 110: first inductor conductive layer

[0017] 115: first inductor dielectric layer

[0018] 120: second inductor conductive layer

[0019] 125: Second inductor dielectric layer

[0020] 130: third inductor conductive layer

[0021] 150: conductive connecting member / first conductive connecting member

[0022] 151: conductive connecting member / first conductive connecting member

[0023] 152: conductive connector / first conductive connector

[0024] 153: conductive connecting member / first conductive connecting member

[0025] 154: conductive connector / first conductive connector

[0026] 155: Conductive connector

[0027] 156: Conductive connector

[0028] 160: first upper conductive layer

[0029] 161: upper conductive portion / first upper conductive portion

[0030] 162: upper conductive portion / second upper conductive portion

[0031] 163: upper conductive portion / third upper conductive portion

[0032] 164: fourth upper conductive portion

[0033] 170: conductive connector / second conductive connector

[0034] 171: conductive connector / second conductive connector

[0035] 172: conductive connector / second conductive connector

[0036] 180: second upper conductive layer

[0037] 181: Upper conductive part

[0038] 190: Upper conductive layer

[0039] 200: Capacitor

[0040] 210: first capacitor conductive layer

[0041] 215: first inductor dielectric layer

[0042] 220: second capacitor conductive layer

[0043] 300: Capacitor

[0044] 310: first capacitor conductive layer

[0045] 315: first capacitor dielectric layer

[0046] 320: second capacitor conductive layer

[0047] 325: second capacitor dielectric layer

[0048] 330: third capacitor conductive layer

[0049] 1101: first end

[0050] 1102: Second end

[0051] 1201: first end

[0052] 1202: Second end

[0053] 1301: first end

[0054] 1302: Second end

[0055] 400:Substrate

[0056] 405: Lining

[0057] 415: Interlayer dielectric layer

[0058] 425: Interlayer dielectric layer

[0059] N2: Node

[0060] N3: Node

[0061] P11: Port

[0062] P12: Port

[0063] P21: Port

[0064] P22: Port

[0065] P23: Port

[0066] P31: Port

[0067] P32: Port

[0068] P33: Port

[0069] S10: Steps

[0070] S20: Steps

[0071] S3: Steps

[0072] S4: Steps

[0073] T: Groove

[0074] T': Groove DETAILED DESCRIPTION

[0075] The following will be described in more detail with reference to the accompanying drawings for various embodiments. The description and drawings are provided for illustration only and are not intended to be limiting. Similar symbols are used to indicate similar elements. For clarity, the elements in the drawings may not be drawn according to the actual scale. In addition, some elements and / or symbols may be omitted in some drawings. It is expected that the elements and features in one embodiment can be advantageously incorporated into another embodiment without further elaboration.

[0076] The present invention provides an electronic device. The electronic device includes a substrate and an inductor. The substrate has a groove. The inductor is arranged on the substrate. The inductor includes a first inductor conductive layer and a second inductor conductive layer. The first inductor conductive layer is conformally arranged on the substrate. At least a portion of the first inductor conductive layer is arranged in the groove. The first inductor conductive layer has a first end and a second end. The second inductor conductive layer is conformally arranged on the first inductor conductive layer. The second inductor conductive layer has a first end and a second end, which are respectively located on the first end and the second end of the first inductor conductive layer. The first end of the second inductor conductive layer is electrically connected to the second end of the first inductor conductive layer.

[0077] The first inductor conductive layer and the second inductor conductive layer can be isolated by using appropriate means. For example, the inductor can further include a first inductor dielectric layer, which is conformally disposed on the first inductor conductive layer, and the second inductor conductive layer is conformally disposed on the first inductor dielectric layer. Thus, the first inductor conductive layer and the second inductor conductive layer can be isolated by the first inductor dielectric layer.

[0078] In some embodiments, the first end of the first inductor conductive layer and the first end of the second inductor conductive layer can form a step structure, and the second end of the first inductor conductive layer and the second end of the second inductor conductive layer can form a step structure. Such a structure is conducive to forming an electrical connection structure between the first end of the second inductor conductive layer and the second end of the first inductor conductive layer. For example, the inductor may also include an upper conductive portion and a plurality of conductive connectors. The upper conductive portion is disposed above the second inductor conductive layer. The plurality of conductive connectors are connected between the upper conductive portion and the first end of the second inductor conductive layer, and between the upper conductive portion and the second end of the first inductor conductive layer. Thus, a "vertical" electrical connection structure between the first end of the second inductor conductive layer and the second end of the first inductor conductive layer can be formed, thereby forming a "vertical" inductor. However, it can be understood that the vertical electrical connection structure may not be used or not used completely without excessively affecting the direction of the magnetic field lines and causing the inductor to fail.

[0079] In the present invention, the loop of the inductor is defined according to the number of inductor conductive layers conforming to the groove. The inductor according to the present invention can be a two-loop inductor with the simplest structure defined above, or can be formed to have three loops, four loops, or more loops.

[0080] Figure 1A to Figure 1C is a schematic diagram of an exemplary electronic device including a three-loop inductor 100 according to the present invention, wherein: Figure 1A The specific structure of the inductor 100 is shown. Figure 1B A simplified structure is shown in which only the components involved in the current flow are represented by lines, and the relevant components are represented by lines. Figure 1C is a circuit diagram of inductor 100.

[0081] Please see Figure 1A , which also shows a substrate 400 of the electronic device. The substrate 400 has a trench T for forming the inductor 100. The electronic device may include a liner 405, which is first formed on the substrate 400 to isolate the inductor 100 from the substrate 400. The liner 405 may be formed of oxide.

[0082] The inductor 100 is disposed on the substrate 400 and partially disposed in the trench T. The inductor 100 includes a first inductor conductive layer 110 , a first inductor dielectric layer 115 , a second inductor conductive layer 120 , a second inductor dielectric layer 125 , and a third inductor conductive layer 130 disposed in sequence.

[0083] The first inductor conductive layer 110 is conformally disposed on the substrate. At least a portion of the first inductor conductive layer 110 is disposed in the groove. The first inductor conductive layer 110 has a first end 1101 and a second end 1102. The first inductor conductive layer 110 may be formed of copper, aluminum, or titanium nitride.

[0084] The first inductor dielectric layer 115 is conformally disposed on the first inductor conductive layer 110. The first inductor dielectric layer 115 may be formed of a high dielectric constant material.

[0085] The second inductor conductive layer 120 is conformally disposed on the first inductor conductive layer 110. More specifically, the second inductor conductive layer 120 is conformally disposed on the first inductor dielectric layer 115 disposed on the first inductor conductive layer 110. The second inductor conductive layer 120 has a first end 1201 and a second end 1202, which are respectively disposed on the first end 1101 and the second end 1102 of the first inductor conductive layer 110. The first end 1201 of the second inductor conductive layer 120 is electrically connected to the second end 1102 of the first inductor conductive layer 110. The second inductor conductive layer 120 may be formed of copper, aluminum, or titanium nitride.

[0086] The second inductor dielectric layer 125 is conformally disposed on the second inductor conductive layer 120. The second inductor dielectric layer 125 may be formed of a high dielectric constant material.

[0087] The third inductor conductive layer 130 is conformally disposed on the second inductor conductive layer 120. More specifically, the third inductor conductive layer 130 is conformally disposed on the second inductor dielectric layer 125. The third inductor conductive layer 130 has a first end 1301 and a second end 1302, which are respectively located on the first end 1201 and the second end 1202 of the second inductor conductive layer 120. The first end 1301 of the third inductor conductive layer 130 is electrically connected to the second end 1202 of the second inductor conductive layer 120. The third inductor conductive layer 130 may be formed of copper, aluminum, or titanium nitride.

[0088] The first end 1301 of the third inductor conductive layer 130 and the first end 1101 of the first inductor conductive layer 110 and the first end 1201 of the second inductor conductive layer 120 may form a step structure, and the second end 1302 of the third inductor conductive layer 130 and the second end 1102 of the first inductor conductive layer 110 and the second end 1202 of the second inductor conductive layer 120 may form a step structure.

[0089] The inductor 100 may further include a plurality of upper conductive portions 161-163, 181 and a plurality of conductive connectors 150, 170. Specifically, an interlayer dielectric layer 415 may be disposed on the substrate 400, covering the first inductor conductive layer 110, the first inductor dielectric layer 115, the second inductor conductive layer 120, the second inductor dielectric layer 125, and the third inductor conductive layer 130. The conductive connector 150, including the conductive connectors 151-154, may penetrate the interlayer dielectric layer 415. The first upper conductive layer 160, including the upper conductive portions 161-163, may be disposed on the interlayer dielectric layer 415. The interlayer dielectric layer 425 may be disposed on the interlayer dielectric layer 415. The conductive connector 170, including the conductive connectors 171-172, may penetrate the interlayer dielectric layer 425. The second upper conductive layer 180 , including the upper conductive portion 181 , may be disposed on the interlayer dielectric layer 425 .

[0090] The upper conductive parts 161-163, 181 are arranged above the second inductor conductive layer 120. A plurality of conductive connectors 151-154, 171-172 are provided, wherein the conductive connectors 171, 151 are connected between one of the upper conductive parts 181 and the first end 1201 of the second inductor conductive layer 120, the conductive connectors 172, 152 are connected between the upper conductive part 181 and the second end 1102 of the first inductor conductive layer 110, the conductive connector 153 is connected between another upper conductive part 171 and the first end 1301 of the third inductor conductive layer 130, and the conductive connector 154 is connected between the upper conductive part 171 and the second end 1202 of the second inductor conductive layer 120. Thus, the adjacent inductor conductive layers can be electrically connected, so that the directions of the currents therein and the directions of the magnetic lines of force are the same, and a loop of the inductor is formed. Here, adjacent inductor conductive layers refer to two inductor conductive layers without any other inductor conductive layers between all inductor conductive layers conforming to the groove, such as the first inductor conductive layer 110 and the second inductor conductive layer 120, and the second inductor conductive layer 120 and the third inductor conductive layer 130, regardless of whether there are other types of layers between them. It is understood that the present invention is not limited to Figure 1A The loop of the inductor 100 is formed in the manner shown. For example, Figure 1AIn the figure, the conductive connector 171 arranged in the interlayer dielectric layer 425 is connected to the conductive connector 151 arranged in the interlayer dielectric layer 415 through the upper conductive portion 162, and the conductive connector 172 arranged in the interlayer dielectric layer 425 is connected to the conductive connector 152 arranged in the interlayer dielectric layer 415 through the upper conductive portion 163, but two conductive connectors directly penetrating the interlayer dielectric layers 425 and 415 can also be formed instead.

[0091] As a result, the inductor 100 can form a current path from the port P11 to the port P12 as indicated by the arrow. Figure 1B FIG. 1 shows a simplified structure of the inductor 100 according to the current path. Figure 1B It can be understood more intuitively that, although the inductor 100 has a certain thickness in the width direction of the trench T (i.e., the direction perpendicular to the paper), it can be regarded as an inductor formed on a plane defined by the extension direction of the trench T and the normal direction of the substrate 400. This plane is perpendicular to the substrate, so the inductor 100 is a "vertical" inductor.

[0092] Please see Figure 2 , which is a flow chart of a method for manufacturing an electronic device according to the present invention. In step S10, a substrate is provided. The substrate has a groove. In step S20, a first inductor conductive layer is conformally formed on the substrate. At least a portion of the first inductor conductive layer is formed in the groove. The first inductor conductive layer has a first end and a second end. In step S30, a second inductor conductive layer is conformally formed on the first inductor conductive layer. The second inductor conductive layer has a first end and a second end, which are respectively located on the first end and the second end of the first inductor conductive layer. In step S40, the first end of the second inductor conductive layer is electrically connected to the second end of the first inductor conductive layer.

[0093] In an embodiment of manufacturing an electronic device including a two-loop inductor, electrically connecting the first end of the second inductor conductive layer with the second end of the first inductor conductive layer can simply include: forming two conductive connectors, respectively connected to the first end of the second inductor conductive layer and the second end of the first inductor conductive layer; and forming an upper conductive portion, connecting the two conductive connectors.

[0094] For electronic devices including three-loop inductors, see Figure 3A to Figure 3H , which shows various stages of an exemplary manufacturing method of an electronic device including an inductor 100, wherein part (a) of each figure is a top view of the structure at the corresponding stage, and part (b) is a cross-sectional view of the structure at the corresponding stage.

[0095] like Figure 3AAs shown, a substrate 400 is provided, such as but not limited to a silicon substrate. The substrate 400 has a trench T. In the following drawings, the original range of the trench T will be indicated by a dotted line in the top view.

[0096] like Figure 3B As shown, before conformally forming the first inductor conductive layer 110 of the inductor 100, a liner 405 may be conformally formed on the substrate 400. The liner 405 may be formed of oxide.

[0097] like Figure 3C As shown, the first inductor conductive layer 110 is conformally formed on the substrate 400. At least a portion of the first inductor conductive layer 110 is formed in the trench T. The first inductor conductive layer 110 has a first end 1101 and a second end 1102. The first inductor conductive layer 110 may be formed of copper, aluminum, or titanium nitride.

[0098] like Figure 3D As shown, before conformally forming the second inductor conductive layer 120, the first inductor dielectric layer 115 may be conformally formed on the first inductor conductive layer 110. The sidewall of the first inductor dielectric layer 115 may be coplanar with the sidewall of the second inductor conductive layer 120 to be formed. The first inductor dielectric layer 115 may be formed of a high dielectric constant material.

[0099] like Figure 3E As shown, the second inductor conductive layer 120 is conformally formed on the first inductor dielectric layer 115. The second inductor conductive layer 120 has a first end 1201 and a second end 1202, which are respectively located on the first end 1101 and the second end 1102 of the first inductor conductive layer 110. The second inductor conductive layer 120 can be formed of copper, aluminum, or titanium nitride.

[0100] like Figure 3F As shown, a second inductor dielectric layer 125 is conformally formed on the second inductor conductive layer 120. The sidewall of the second inductor dielectric layer 125 may be coplanar with the sidewall of the third inductor conductive layer 130 to be formed. The second inductor dielectric layer 125 may be formed of a high dielectric constant material.

[0101] like Figure 3G As shown, the third inductor conductive layer 130 is conformally formed on the second inductor dielectric layer 125. The third inductor conductive layer 130 has a first end 1301 and a second end 1302, which are respectively located on the first end 1201 and the second end 1202 of the second inductor conductive layer 120. The third inductor conductive layer 130 can be formed of copper, aluminum, or titanium nitride.

[0102] Then, the first end 1201 of the second inductor conductive layer 120 is electrically connected to the second end 1102 of the first inductor conductive layer 110 , and the first end 1301 of the third inductor conductive layer 130 is electrically connected to the second end 1202 of the second inductor conductive layer 120 .

[0103] Specifically, if Figure 3H As shown, four first conductive connectors 150, namely first conductive connectors 151-154, may be formed, which are respectively connected to the first end 1201 of the second inductor conductive layer 120, the second end 1102 of the first inductor conductive layer 110, the first end 1301 of the third inductor conductive layer 130, and the second end 1202 of the second inductor conductive layer 120. A first upper conductive layer 160 is formed. The first upper conductive layer 160 includes a first upper conductive portion 161, a second upper conductive portion 162, and a third upper conductive portion 163. The first upper conductive portion 161 is connected to the first conductive connector 153 of the first end 1301 of the third inductor conductive layer 130 and the first conductive connector 154 of the second end 1202 of the second inductor conductive layer 120. The second upper conductive portion 162 is connected to the first conductive connector 151 of the first end 1201 of the second inductor conductive layer 120. The third upper conductive portion 163 is connected to the first conductive connector 152 of the second end 1102 of the first inductor conductive layer 110. Two second conductive connecting members 170, namely, second conductive connecting members 171 and 172, are formed, respectively connected to the second upper conductive portion 162 and the third upper conductive portion 163. A second upper conductive layer 180 is formed, connecting the two second conductive connecting members 171 and 172. More specifically, the second upper conductive layer 180 has an upper conductive portion 181, connecting the second conductive connecting members 171 and 172.

[0104] In a similar manner, inductors with four, five, or even more loops can be manufactured.

[0105] The present invention also provides an electronic device. The electronic device includes a substrate, an inductor, and a capacitor. The substrate has a groove. The inductor is arranged on the substrate. The inductor includes a first inductor conductive layer and a second inductor conductive layer. The first inductor conductive layer is conformally arranged on the substrate. At least a portion of the first inductor conductive layer is arranged in the groove. The first inductor conductive layer has a first end and a second end. The second inductor conductive layer is conformally arranged on the first inductor conductive layer. The second inductor conductive layer has a first end and a second end, which are respectively located on the first end and the second end of the first inductor conductive layer. The first end of the second inductor conductive layer is electrically connected to the second end of the first inductor conductive layer. The capacitor is arranged in the groove or in another groove of the substrate. The capacitor is electrically connected to the inductor.

[0106] Figure 4A to Figure 4BFIG. 1 is a schematic diagram of another exemplary electronic device according to the present invention. Figure 4A As shown, the electronic device includes an inductor 100 ′ and a capacitor 200 .

[0107] The inductor 100' is a two-loop inductor, including a first inductor conductive layer 110, a first inductor dielectric layer 115, and a second inductor conductive layer 120. The first end 1201 of the second inductor conductive layer 120 is electrically connected to the second end 1102 of the first inductor conductive layer 110. Specifically, the electronic device may further include an upper conductive layer 190 and a plurality of conductive connectors 151-152. More specifically, the electronic device may include an interlayer dielectric layer 415 disposed on the substrate 400, and the conductive connectors 151-152 penetrate the interlayer dielectric layer 415. The upper conductive layer 190 is disposed on the interlayer dielectric layer 415. The upper conductive layer 190 is disposed above the second inductor conductive layer 120. A plurality of conductive connectors 151-152, wherein the conductive connector 151 is connected between the upper conductive layer 190 and the first end 1201 of the second inductor conductive layer 120, and the conductive connector 152 is connected between the upper conductive layer 190 and the second end 1102 of the first inductor conductive layer 110. Other details of the inductor 100' are similar to those of the inductor 100 and are not described again.

[0108] The capacitor 200 includes a first capacitor conductive layer 210 and a first inductor conductive layer 110. The first capacitor conductive layer 210 is conformally disposed under the first inductor conductive layer 110. The first inductor conductive layer 110 is separated from the first capacitor conductive layer 210 and serves as a second capacitor conductive layer 220.

[0109] The capacitor 200 may further include a first inductive dielectric layer 215 disposed between the first capacitor conductive layer 210 and the second capacitor conductive layer 220. However, it is understood that the first capacitor conductive layer 210 and the second capacitor conductive layer 220 may also be isolated by other structures, such as but not limited to an air gap, or a dielectric layer formed with an air gap.

[0110] This electronic device can be a T-type bias tee, and its circuit diagram is as follows: Figure 4B As shown. The T-type bias device has three ports P21, P22, and P23. Port P21 is a radio frequency port. Port P22 is a direct current port. Port P23 is a radio frequency and direct current port. Figure 4A The corresponding positions of the three ports in the structure and the corresponding position of the node N2 are shown.

[0111] In the manufacturing method of this electronic device, before the first inductor conductive layer 110 is conformally formed on the substrate 400, the first capacitor conductive layer 210 may be conformally formed on the substrate 400, and at least a portion of the first capacitor conductive layer 210 may be formed in the trench T. More specifically, the first capacitor conductive layer 210 and the first inductor dielectric layer 215 may be formed first, and then the inductor 100' may be manufactured using the above-mentioned inductor manufacturing method.

[0112] Figure 5A to Figure 5B 1 is a schematic diagram of another exemplary electronic device according to the present invention. The electronic device includes an inductor 100 and a capacitor 300. The inductor 100 includes a first inductor conductive layer 110, a first inductor dielectric layer 115, a second inductor conductive layer 120, a second inductor dielectric layer 125, and a third inductor conductive layer 130 arranged in sequence. A first end 1201 of the second inductor conductive layer 120 is electrically connected to a second end 1102 of the first inductor conductive layer 110. A first end 1301 of the third inductor conductive layer 130 is electrically connected to a second end 1202 of the second inductor conductive layer 120. Specifically, the electronic device may further include a first upper conductive layer 160, a second upper conductive layer 180, and a plurality of conductive connectors 150, 170. The first upper conductive layer 160 is disposed above the second inductor conductive layer 120. More specifically, in the case where the third inductor conductive layer 130 exists, the first upper conductive layer 160 is disposed above the third inductor conductive layer 130. The second upper conductive layer 180 is disposed above the first upper conductive layer 160. A plurality of conductive connectors 150 and 170 are provided, wherein the conductive connectors 171 and 151 are connected between the second upper conductive layer 180 and the first end 1201 of the second inductor conductive layer 120, the conductive connectors 172 and 152 are connected between the second upper conductive layer 180 and the second end 1102 of the first inductor conductive layer 110, the conductive connector 153 is connected between the first upper conductive layer 160 and the first end 1301 of the third inductor conductive layer 130, and the conductive connector 154 is connected between the first upper conductive layer 160 and the second end 1202 of the second inductor conductive layer 120. Other details of the inductor 100 are not described in detail herein.

[0113] The capacitor 300 includes a first capacitor conductive layer 310 and a second capacitor conductive layer 320. The first capacitor conductive layer 310 is conformally disposed on the substrate 400. At least a portion of the first capacitor conductive layer 310 is disposed in another trench T'. The second capacitor conductive layer 320 is conformally disposed on the first capacitor conductive layer 310 and is separated from the first capacitor conductive layer 310. One end of the second capacitor conductive layer is electrically connected to the first end 1101 of the first inductor conductive layer 110.

[0114] In some embodiments, the capacitor 300 may further include a first capacitor dielectric layer 315 disposed between the first capacitor conductive layer 310 and the second capacitor conductive layer 320. However, it is understood that the capacitor conductive layers may also be isolated by other structures, such as but not limited to an air gap, or a dielectric layer formed with an air gap.

[0115] The capacitor 300 may further include a second capacitor dielectric layer 325 and a third capacitor conductive layer 330. The second capacitor dielectric layer 325 is conformally disposed on the second capacitor conductive layer 320. The third capacitor conductive layer 330 is conformally disposed on the second capacitor dielectric layer 325.

[0116] The conductive connector 150 may further include conductive connectors 155 and 156 , and the first upper conductive layer 160 may further include a fourth upper conductive portion 164 for connecting one end of the second capacitor conductive layer 320 and the first end 1101 of the first inductor conductive layer 110 .

[0117] This electronic device can be a T-type bias tee, and its circuit diagram is as follows: Figure 5B As shown. The T-type bias device has three ports P31, P32, and P33. Port P31 is a radio frequency port. Port P32 is a direct current port. Port P33 is a radio frequency and direct current port. Figure 5A The corresponding positions of the three ports in the structure and the corresponding position of the node N3 are shown.

[0118] In the manufacturing method of this electronic device, the first capacitor conductive layer 310 can be conformally formed on the substrate 400 while the first inductor conductive layer 110 is conformally formed on the substrate 400, at least a portion of the first capacitor conductive layer 310 is formed in the other trench T', and the second inductor conductive layer 120 is conformally formed on the first inductor conductive layer 110 while the second capacitor conductive layer 320 is conformally formed on the first capacitor conductive layer 310. More specifically, after forming the liner 405, the first inductor conductive layer 110 and the first capacitor conductive layer 310 may be formed in the same manufacturing process step, the first inductor dielectric layer 115 and the first capacitor dielectric layer 315 may be formed in the same manufacturing process step, the second inductor conductive layer 120 and the second capacitor conductive layer 320 may be formed in the same manufacturing process step, the second inductor dielectric layer 125 and the second capacitor dielectric layer 325 may be formed in the same manufacturing process step, the third inductor conductive layer 130 and the third capacitor conductive layer 330 may be formed in the same manufacturing process step, all the conductive connectors 150 (i.e., the conductive connectors 151-156) may be formed in the same manufacturing process step, the first upper conductive layer 160 (including the first upper conductive portion 161 to the fourth upper conductive portion 164) may be formed, all the conductive connectors 170 (i.e., the conductive connectors 171-172) may be formed in the same manufacturing process step, and the second upper conductive layer 180 may be formed.

[0119] Although the above Figure 4A to Figure 4B and Figure 5A to Figure 5B Deep trench capacitors are used as examples, but it can be understood that in the electronic device of the present invention, the inductor of the present invention can also be used with other types of capacitors. In addition, the electronic device according to the present invention is not limited to a T-type bias device, and can be a filter or other types of electronic devices using inductors and capacitors. Compared with traditional electronic devices that require large capacitors and large inductors, the electronic device of the present invention can be greatly reduced. In addition, the electronic device according to the present invention can be integrated into a chip.

[0120] It is contemplated that multiple capacitors may be connected in series to increase the capacitance value, and multiple inductors may be connected in parallel, including or excluding other types of inductors other than the deep trench inductor described in the present invention, to increase the inductance value.

[0121] In the manufacturing method of the electronic device of the present invention, depending on the type of capacitor, part or all of the manufacturing process steps of the capacitor can be performed before, alternately, combined, or after part or all of the manufacturing process steps of the inductor without special limitation.

[0122] In summary, the present invention provides an inductor that can be combined with a deep trench structure and various related embodiments. The inductor according to the present invention can be used with any suitable electronic component, in particular, it can be used with a deep trench capacitor. The manufacturing process of the inductor can be compatible with the manufacturing process of the deep trench capacitor and has a high degree of integration with the CMOS (complementary metal oxide semiconductor transistor) manufacturing process. The electronic device according to the present invention is smaller in size, so it can save tape-out area and reduce costs.

[0123] Although the present invention is disclosed in conjunction with the above embodiments, it is not intended to limit the present invention. A person skilled in the art of the present invention may make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be based on the definition of the attached claims.

Claims

1. An electronic device, comprising: a substrate having a groove; as well as An inductor is arranged on the substrate, and the inductor comprises: A first inductor conductive layer is conformally disposed on the substrate, at least a portion of the first inductor conductive layer is disposed in the groove, and the first inductor conductive layer has a first end and a second end; and A second inductor conductive layer is conformally disposed on the first inductor conductive layer, wherein the second inductor conductive layer has a first end and a second end, which are respectively located on the first end and the second end of the first inductor conductive layer; The first end of the second inductor conductive layer is electrically connected to the second end of the first inductor conductive layer.

2. The electronic device according to claim 1, wherein: The first end of the first inductor conductive layer and the first end of the second inductor conductive layer form a step structure, and the second end of the first inductor conductive layer and the second end of the second inductor conductive layer form a step structure.

3. The electronic device according to claim 1, wherein: The first inductor conductive layer and the second inductor conductive layer are respectively formed of copper, aluminum, or titanium nitride.

4. The electronic device as claimed in claim 1, further comprising: The first inductor dielectric layer is conformally disposed on the first inductor conductive layer, wherein the second inductor conductive layer is conformally disposed on the first inductor dielectric layer.

5. The electronic device as claimed in claim 1, further comprising: an upper conductive layer, disposed above the second inductor conductive layer; as well as A plurality of conductive connecting members are connected between the upper conductive layer and the first end of the second inductor conductive layer, and between the upper conductive layer and the second end of the first inductor conductive layer.

6. The electronic device as claimed in claim 1, further comprising: a third inductor conductive layer, conformally disposed on the second inductor conductive layer, the third inductor conductive layer having a first end and a second end, respectively located on the first end and the second end of the second inductor conductive layer; The first end of the third inductor conductive layer is electrically connected to the second end of the second inductor conductive layer.

7. The electronic device as claimed in claim 6, wherein: The first end of the third inductor conductive layer forms a step structure with the first end of the first inductor conductive layer and the first end of the second inductor conductive layer, and the second end of the third inductor conductive layer forms a step structure with the second end of the first inductor conductive layer and the second end of the second inductor conductive layer.

8. The electronic device as claimed in claim 6, further comprising: The second inductor dielectric layer is conformally disposed on the second inductor conductive layer, wherein the third inductor conductive layer is conformally disposed on the second inductor dielectric layer.

9. The electronic device as claimed in claim 6, further comprising: a first upper conductive layer, disposed above the second inductive conductive layer; a second upper conductive layer, disposed above the first upper conductive layer; as well as A plurality of conductive connectors are connected between the second upper conductive layer and the first end of the second inductor conductive layer, between the second upper conductive layer and the second end of the first inductor conductive layer, between the first upper conductive layer and the first end of the third inductor conductive layer, and between the first upper conductive layer and the second end of the second inductor conductive layer.

10. The electronic device as claimed in claim 1, further comprising: A capacitor is disposed in the groove or in another groove of the substrate, and the capacitor is electrically connected to the inductor.

11. The electronic device according to claim 10, wherein: The capacitor includes: a first capacitor conductive layer, conformally disposed under the first inductor conductive layer; and The first inductor conductive layer is separated from the first capacitor conductive layer and serves as a second capacitor conductive layer.

12. The electronic device according to claim 10, wherein: The capacitor includes: A first capacitor conductive layer is conformally disposed on the substrate, and at least a portion of the first capacitor conductive layer is disposed in the other groove; and a second capacitor conductive layer, conformally disposed on the first capacitor conductive layer and separated from the first capacitor conductive layer; One end of the second capacitor conductive layer is electrically connected to the first end of the first inductor conductive layer.

13. A method for manufacturing an electronic device, comprising: providing a substrate having a groove; Conformally forming a first inductor conductive layer on the substrate, at least a portion of the first inductor conductive layer is formed in the groove, the first inductor conductive layer having a first end and a second end; Conformally forming a second inductor conductive layer on the first inductor conductive layer, the second inductor conductive layer having a first end and a second end, respectively located on the first end and the second end of the first inductor conductive layer; and The first end of the second inductor conductive layer is electrically connected to the second end of the first inductor conductive layer.

14. The method for manufacturing an electronic device according to claim 13, further comprising: Before conformally forming the first inductor conductive layer, a liner is conformally formed on the substrate, and at least a portion of the liner is formed in the trench.

15. The method for manufacturing an electronic device according to claim 13, further comprising: Before conformally forming the second inductor conductive layer, a first inductor dielectric layer is conformally formed on the first inductor conductive layer.

16. The method for manufacturing an electronic device according to claim 13, wherein: Electrically connecting the first end of the second inductor conductive layer and the second end of the first inductor conductive layer comprises: forming two conductive connecting members, connected to the first end of the second inductor conductive layer and the second end of the first inductor conductive layer respectively; and An upper conductive portion is formed to connect the two conductive connecting members.

17. The method for manufacturing an electronic device according to claim 13, further comprising: conformally forming a second inductor dielectric layer on the second inductor conductive layer; Conformally forming a third inductor conductive layer on the second inductor dielectric layer, the third inductor conductive layer having a first end and a second end, respectively located on the first end and the second end of the second inductor conductive layer; and The first end of the third inductor conductive layer is electrically connected to the second end of the second inductor conductive layer.

18. The method for manufacturing an electronic device according to claim 17, wherein: Electrically connecting the first end of the second inductor conductive layer to the second end of the first inductor conductive layer and electrically connecting the first end of the third inductor conductive layer to the second end of the second inductor conductive layer comprises: forming four first conductive connecting members, connected respectively to the first end of the second inductor conductive layer, the second end of the first inductor conductive layer, the first end of the third inductor conductive layer, and the second end of the second inductor conductive layer; forming a first upper conductive layer, the first upper conductive layer comprising a first upper conductive portion, a second upper conductive portion, and a third upper conductive portion, the first upper conductive portion being connected to the first conductive connection at the first end of the third inductor conductive layer and the first conductive connection at the second end of the second inductor conductive layer, the second upper conductive portion being connected to the first conductive connection at the first end of the second inductor conductive layer, and the third upper conductive portion being connected to the first conductive connection at the second end of the first inductor conductive layer; forming two second conductive connecting members, connected to the second upper conductive portion and the third upper conductive portion respectively; and A second upper conductive layer is formed to connect the two second conductive connecting members.

19. The method for manufacturing an electronic device according to claim 13, further comprising: Before conformally forming the first inductor conductive layer on the substrate, a first capacitor conductive layer is conformally formed on the substrate, and at least a portion of the first capacitor conductive layer is formed in the groove.

20. The method for manufacturing an electronic device as claimed in claim 13, wherein the substrate has another groove, and the method for manufacturing an electronic device further comprises: While conformally forming the first inductor conductive layer on the substrate, conformally forming a first capacitor conductive layer on the substrate, at least a portion of the first capacitor conductive layer is formed in the other groove; as well as While the second inductor conductive layer is conformally formed on the first inductor conductive layer, a second capacitor conductive layer is conformally formed on the first capacitor conductive layer.