Method and apparatus to adjust transistor switches

Abstract

The embodiment of the invention relates to a method and device for adjusting transistor switches. An example apparatus includes: driver circuitry (130, 218, 518) having a terminal; a capacitor (140, 222, 522) having a terminal; a diode circuitry (234, 534) having a first terminal and a second terminal; a transistor (236, 536) having a first terminal, a second terminal, and a control terminal, the first terminal of the transistor coupled to the first terminal of the diode circuitry, the control terminal of the transistor coupled to the terminal of the capacitor and the second terminal of the diode circuitry; and current mirror circuitry (238 / 240, 538 / 540) having a first terminal and a second terminal, the first terminal of the current mirror circuitry being coupled to the terminal of the driver circuitry, the second terminal of the current mirror circuitry being coupled to the second terminal of the transistor.

Description

[0001] CROSS REFERENCE TO RELATED APPLICATIONS

[0002] This patent application claims the benefit of and priority to U.S. Provisional Patent Application No. 63 / 595,046, filed on November 1, 2023, which is hereby incorporated by reference in its entirety. Technical Field

[0003] The present specification relates generally to switches and, more particularly, to methods and apparatus to regulate transistor switches. Background Art

[0004] As electronic devices continue to advance, systems have been able to safely operate under increasingly complex operating conditions, such as higher power and higher speed. Increasingly complex circuitry implements advanced techniques in driver circuitry to regulate the power supply to the load. Such circuitry allows the driver circuitry to accurately control and regulate transistor switching despite complex operating conditions. Summary of the invention

[0005] For methods and apparatus for regulating transistor switches, an example apparatus includes: a driver circuit system having a terminal; a capacitor having a terminal; a diode circuit system having a first terminal and a second terminal; a transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the transistor being coupled to the first terminal of the diode circuit system, the control terminal of the transistor being coupled to the terminal of the capacitor and the second terminal of the diode circuit system; and a current mirror circuit system having a first terminal and a second terminal, the first terminal of the current mirror circuit system being coupled to the terminal of the driver circuit system, the second terminal of the current mirror circuit system being coupled to the second terminal of the transistor. Other examples are described.

[0006] For methods and apparatus for regulating transistor switches, an example apparatus includes: a power supply terminal; a driver circuit system having a terminal; a diode circuit system having a first terminal and a second terminal; a current mirror circuit system having a first terminal, a second terminal, and a third terminal, the first terminal of the current mirror circuit system being coupled to the power supply terminal and the first terminal of the diode circuit system, the second terminal of the current mirror circuit system being coupled to the second terminal of the diode circuit system; and a current scaling circuit system having a first terminal and a second terminal, the first terminal of the current scaling circuit system being coupled to the terminal of the driver circuit system, the second terminal of the current scaling circuit system being coupled to the third terminal of the current mirror circuit system. Other examples are described.

[0007] For methods and apparatus for regulating transistor switching, an example apparatus includes: a first transistor having a first terminal and a control terminal; a capacitor having a first terminal and a second terminal, the first terminal of the capacitor coupled to the first terminal of the first transistor; a second transistor having a first terminal and a control terminal; a current mirror circuit system having a first terminal and a second terminal, the first terminal of the current mirror circuit system coupled to the second terminal of the capacitor, the first terminal of the second transistor, and the control terminal of the second transistor; and a current scaling circuit system having a first terminal and a second terminal, the first terminal of the current scaling circuit system coupled to the second terminal of the current mirror circuit system, the second terminal of the current scaling circuit system coupled to the control terminal of the first transistor. Other examples are described. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 is a block diagram of an example drive system including gate driver circuitry that uses example current multiplication circuitry and an auxiliary current source to adjust drive current to reduce stress on a motor during switching.

[0009] Figure 2 yes Figure 1 Schematic diagram of an example drive system.

[0010] Figure 3 yes Figure 1 and 2 A schematic diagram of a first configuration of an example drive system.

[0011] Figure 4 yes Figure 1 , 2 and 3 are schematic diagrams of a second configuration of an example drive system.

[0012] Figure 5 yes Figure 1 , 2 , 3 and 4 are schematic diagrams of examples of current multiplication circuit systems.

[0013] Figure 6 is a flowchart representing example operations that may be at least one of performed, instantiated, or executed to implement Figure 1 , 2 , 3, 4 and 5 of the current multiplication circuit system to adjust the slew rate of the voltage across the transistor.

[0014] Figure 7 is a flowchart representing example operations that may be at least one of performed, instantiated, or executed to implement Figure 1 , 2 , 3 and 4 of the gate driver circuit system to dynamically adjust the slew rate of the voltage across the transistor.

[0015] Figure 8 yes Figure 1 , 2 , 3 and 4 are timing diagrams of example operations of the gate driver circuit systems to regulate the slew rate of the voltage across the transistor.

[0016] The drawings are not necessarily to scale. In general, the same reference numerals in the drawings and the specification refer to the same or similar features and / or parts (functionally and / or structurally). Although the drawings show areas with clear lines and boundaries, some or all of these lines and boundaries may be idealized. In practice, boundaries or lines may be invisible, blended, or irregular. DETAILED DESCRIPTION

[0017] As electronic devices continue to advance, systems have been able to safely operate under increasingly complex operating conditions, such as higher power and higher speed. Increasingly complex circuitry implements advanced techniques in driver circuitry to regulate the power supply to the load. Such circuitry allows the driver circuitry to accurately control and regulate transistor switching despite complex operating conditions.

[0018] When driving a direct current (DC) motor, a driver circuit system connected to one terminal of the DC motor regulates the power supply to the motor by controlling a transistor, while the remaining terminals of the DC motor are connected to ground. A first transistor (referred to as a high-side transistor) controls the power supply from the power supply terminal to the motor, and a second transistor (referred to as a low-side transistor) controls the power supply from the motor to a common potential. During the operation of driving the motor (e.g., supplying power to it, causing it to move), the driver circuit system turns on and off the transistor to regulate the power supply to the motor. In a first operation, the driver circuit system turns on the first transistor (e.g., enables, causing current to be conducted) and turns off the second transistor (e.g., disables, causing current not to be conducted). In a second operation, the driver circuit system turns off the first transistor and turns on the second transistor.

[0019] Switching between the first operation and the second operation of the transistor allows the driver circuit system to regulate the power supply to the motor. In some systems, modifying the ratio of the time of the first operation to the time of the second operation allows the driver circuit system to control the operation of the motor, such as speed, torque, etc. In such systems, the driver circuit system receives one or more control signals, and the control signal uses pulse width modulation (PWM) to control the switching time between configurations. One or more control signals use a duty cycle to control the switching time, and the duty cycle represents the ratio of the time when the driver circuit system is turned on (e.g., supplying power) to the time when the driver circuit system is turned off (e.g., not supplying power). Increasing the duty cycle of the control signal increases the power delivered to the motor, which increases the speed or torque of the motor. Reducing the duty cycle of the control signal reduces the power delivered to the motor, which reduces the speed or torque of the motor.

[0020] As transistor technology continues to advance, the speed at which transistors can be switched on and off continues to increase. As the switching speed of transistors increases, the amount of time required for the transistor to transition between on and off decreases. Such transitions are characterized by slew rate, which is the rate (e.g., volts / second) that characterizes the change in voltage across the transistor. For example, when switching between a common potential (e.g., 0 volts, ground) and a four-hundred-volt power supply, the slew rate characterizes the rate at which the drain-to-source voltage across the transistor increases or decreases.

[0021] In some systems, the driver circuit system sets the slew rate of the transistor by controlling the current of the gate terminal of the transistor (referred to as the gate drive current). As the gate drive current increases, the slew rate of the transistor increases. However, in some systems (such as motor control), increasing the slew rate of the transistor increases the stress applied to the components of the motor during switching. In order to adjust the gate drive current (which adjusts the slew rate), some driver circuit systems include a capacitor with a relatively large capacitance between the gate terminal and the drain terminal of the transistor (referred to as a high-voltage capacitor). In order to support higher and higher voltage switching, the capacitance of the capacitor continues to increase. The capacitor uses part of the gate drive current to compensate for changes in the transistor voltage, which reduces the gate drive current. However, as the switching voltage and current continue to increase, the capacitance of the capacitor continues to increase, which increases the size of the single-chip system (SoC) of the driver circuit system.

[0022] Examples described herein include methods and apparatus for regulating transistor switches. In some described examples, a gate driver circuit system generates and controls a gate drive current to regulate the slew rate of a voltage change across a transistor during a switching operation. The gate driver circuit system includes a current multiplication circuit system coupled to the transistor via a relatively small capacitor. When the switch starts, the gate driver circuit system supplies a first gate drive current to the gate of the transistor using a first and second current source circuit system. Once the gate drive current enables the transistor (e.g., turns on, causes conduction), the capacitor begins to draw current from the current multiplication circuit system in response to the voltage change across the transistor. The current multiplication circuit system mirrors and scales the current supplied to the capacitor. The current multiplication circuit system absorbs the scaled current from the gate drive current, which simulates a relatively large capacitance coupled between the gate and drain of the transistor. Advantageously, the current multiplication circuit system uses a capacitor with a relatively small capacitance to simulate a relatively large capacitance coupled between the gate and drain of the transistor. Advantageously, the current multiplication circuit system prevents excessive slew rates of the transistor from stressing the load by limiting the slew rate.

[0023] Also described herein is an example in which a gate driver circuit system includes first and second current source circuit systems, a charging circuit system, a capacitor circuit system, and a comparator circuit system. The first and second current source circuit systems generate a gate drive current in response to a control signal from an external circuit system. The charging circuit system charges the capacitor of the capacitor circuit system. In some examples, the capacitor circuit system includes a group of first capacitors and a group of second capacitors, and the charging circuit system is structured to charge it. When charging, the group of capacitors generates a switching voltage. When not charging, the group of capacitors supplies a reference voltage. In example operation, the charging circuit system is structured to charge one capacitor in the group of capacitors and use another capacitor in the group of capacitors to supply a reference voltage. For example, the charging circuit system may charge the group of first capacitors to generate a switching voltage and use the group of second capacitors to supply a reference voltage. The comparator circuit system compares the switching voltage with the reference voltage. The comparator circuit system controls the second current source circuit system in response to the comparison of the switching voltage with the reference voltage. In some examples, once the switching voltage becomes greater than the reference voltage, the comparator circuit system disables the second current source circuit system, which reduces the gate drive current and the slew rate of the transistor.

[0024] Advantageously, the gate driver circuitry described herein includes circuitry to adjust the slew rate of the transistor during switching operations. Advantageously, using a relatively high slew rate improves power efficiency, and using a relatively low slew rate reduces stress on the load. Advantageously, the gate driver circuitry initially sets the transistor to have a relatively high slew rate before reducing the gate drive current to reduce the slew rate. Advantageously, switching between different slew rates improves power efficiency without placing excessive stress on the load.

[0025] Figure 1 is a block diagram of an example drive system 100. Figure 1 In the example of , drive system 100 includes an example driver circuit system 105 and an example motor 110 . Figure 1 The driver circuitry 105 includes example power stage circuitry 115 , example high-side gate driver circuitry 120 , and example low-side gate driver circuitry 125 . Figure 1 The low-side gate driver circuit system 125 includes a first example current source circuit system 130, a second example current source circuit system 135, an example capacitor 140, an example current multiplication circuit system 145, an example charging circuit system 150, an example capacitor circuit system 155, an example multiplexer circuit system 160, an example controller circuit system 165 and an example comparator circuit system 170.

[0026] The driver circuit system 105 is coupled to the motor 110. In some examples, the driver circuit system 105 is coupled to an external signal source, such as a programmable circuit system, which is structured to supply one or more control signals. Figure 2 , 3 , 4 and 5 further illustrate and describe examples of driver circuit system 105. Although Figure 1 In the example of FIG. 1 , the driver circuitry 105 includes gate driver circuitry 120 , 125 and power stage circuitry 115 , but in other examples, the power stage circuitry 115 may be external to the driver circuitry 105 .

[0027] The motor 110 has a first terminal and a second terminal. The first terminal of the motor 110 is coupled to the driver circuit system 105. The second terminal of the motor 110 is coupled to a common terminal, which supplies a common potential (e.g., ground). In some examples, the motor 110 is physically coupled to an external system. For example, in an automotive system, the motor 110 is mechanically coupled to a wheel. In an industrial system, the motor 110 is mechanically coupled to one or more components to drive an operation, such as manufacturing. In Figure 1 In the example of , the motor 110 is a direct current (DC) motor. Alternatively, Figure 1The drive system 100 can be replaced by a stepper motor or an alternative type of motor instead of the motor 110. Figure 1 In the example of FIG. 1 , driver circuitry 105 is structured to supply power to motor 110 , but driver circuitry 105 may be coupled to any type of load.

[0028] The power stage circuit system 115 has a first terminal, a second terminal, a third terminal, a fourth terminal, and a fifth terminal. The first terminal and the second terminal of the power stage circuit system 115 are coupled to the gate driver circuit system 120. The third terminal and the fourth terminal of the power stage circuit system 115 are coupled to the gate driver circuit system 125. The fifth terminal of the power stage circuit system 115 is coupled to the motor 110. Figure 2 , 3 , 4 and 5 illustrate and describe an example of the power stage circuit system 115.

[0029] The gate driver circuit system 120 has a first terminal, a second terminal, and a third terminal. The first terminal and the second terminal of the gate driver circuit system 120 are coupled to the power stage circuit system 115. The third terminal of the gate driver circuit system 120 can be coupled to a structured to supply a high-side control signal (PWM HI ) of the external circuit system. The low-side control signal is a PWM signal, which controls the switch of the power stage circuit system 115.

[0030] The gate driver circuit system 125 has a first terminal, a second terminal, and a third terminal. The first terminal and the second terminal of the gate driver circuit system 125 are coupled to the power stage circuit system 115. The third terminal of the gate driver circuit system 125 can be coupled to a structured to supply a low-side control signal (PWM LOW ) external circuit system. The low-side control signal is a PWM signal, which controls the switch of the power stage circuit system 115. Figure 2 , 3 , 4 and 5 illustrate and describe an example of the gate driver circuit system 125.

[0031] The current source circuit system 130 has a first terminal and a second terminal. The first terminal of the current source circuit system 130 is coupled to the current source circuit system 135, the controller circuit system 165, and can be coupled to an external circuit system structured to supply a low-side control signal. The second terminal of the current source circuit system 130 is coupled to the power stage circuit system 115, the current source circuit system 135, and the current multiplication circuit system 145. Figure 2 , 3 , 4 and 5 illustrate and describe an example of the current source circuit system 130.

[0032] Current source circuit system 135 has a first terminal, a second terminal and a control terminal. The first terminal of current source circuit system 135 is coupled to current source circuit system 130, controller circuit system 165, and can be coupled to an external circuit system structured to supply a low-side control signal. The second terminal of current source circuit system 135 is coupled to power stage circuit system 115, current source circuit system 130 and current multiplication circuit system 145. The control terminal of current source circuit system 135 is coupled to comparator circuit system 170. Figure 2 , 3 4 illustrate and describe an example of the current source circuit system 135.

[0033] Capacitor 140 has a first terminal and a second terminal. The first terminal of capacitor 140 is coupled to power stage circuitry 115. The second terminal of capacitor 140 is coupled to current multiplication circuitry 145 and charging circuitry 150. Figure 2 , 3 , 4 and 5 illustrate and describe an example of capacitor 140.

[0034] The current multiplication circuit system 145 has a first terminal, a second terminal, and a third terminal. The first terminal of the current multiplication circuit system 145 is coupled to the power stage circuit system 115 and the current source circuit system 130, 135. The second terminal of the current multiplication circuit system 145 is coupled to the charging circuit system 150. The third terminal of the current multiplication circuit system 145 is coupled to the capacitor 140 and the charging circuit system 150. Figure 2 , 3 , 4 and 5 illustrate and describe an example of the current multiplication circuit system 145.

[0035] The charging circuit system 150 has a first terminal, a second terminal, a third terminal, a fourth terminal, a fifth terminal, and a sixth terminal. The first terminal of the charging circuit system is coupled to the capacitor 140 and the current multiplication circuit system 145. The second terminal of the charging circuit system 150 is coupled to the current multiplication circuit system 145. The third terminal and the fourth terminal of the charging circuit system 150 are coupled to the capacitor circuit system 155. The fifth terminal and the sixth terminal of the charging circuit system 150 are coupled to the multiplexer circuit system 160 and the controller circuit system 165. Figure 2 , 3 and 4 illustrate and describe an example of a charging circuit system.

[0036] The capacitor circuit system 155 has a first terminal, a second terminal, a third terminal, a fourth terminal, a fifth terminal, and a sixth terminal. The first terminal and the second terminal of the capacitor circuit system 155 are coupled to the charging circuit system 150. The third terminal, the fourth terminal, the fifth terminal, and the sixth terminal of the capacitor circuit system 155 are coupled to the multiplexer circuit system 160. Figure 2 , 3 4 illustrate and describe an example of capacitor circuit system 155.

[0037] Multiplexer circuit system 160 has a first terminal, a second terminal, a third terminal, a fourth terminal, a fifth terminal, a sixth terminal, a seventh terminal, and an eighth terminal. The first terminal, the second terminal, the third terminal, and the fourth terminal of multiplexer circuit system 160 are coupled to capacitor circuit system 155. The fifth terminal and the sixth terminal of multiplexer circuit system 160 are coupled to charging circuit system 150 and controller circuit system 165. The seventh terminal and the eighth terminal of multiplexer circuit system 160 are coupled to comparator circuit system 170. Figure 2 , 3 4 illustrate and describe an example of multiplexer circuitry 160 and a configuration of multiplexer circuitry 160 .

[0038] The controller circuit system 165 has a first terminal, a second terminal, and a third terminal. The first terminal of the controller circuit system 165 is coupled to the current source circuit system 130, 135, and can be coupled to an external circuit system structured to supply a low-side control signal. The second terminal and the third terminal of the controller circuit system 165 are coupled to the charging circuit system 150 and the multiplexer circuit system 160. Figure 2 An example of controller circuitry 165 is illustrated and described.

[0039] The comparator circuit system 170 has a first terminal, a second terminal and an output terminal. The first terminal and the second terminal of the comparator circuit system 170 are coupled to the multiplexer circuit system 160. The output terminal of the comparator circuit system 170 is coupled to the current source circuit system 135. Figure 2 , 3 4 illustrate and describe an example of comparator circuit system 170.

[0040] In an example operation of the drive system 100, the driver circuit system 105 receives high-side and low-side control signals from an external circuit system that is structured to control the driver circuit system 105. In some examples, the external circuit system controls the operation of the motor 110 in response to adjusting the control signal. For example, increasing the duty cycle of the high-side control signal and decreasing the duty cycle of the low-side control signal increases the amount of power supplied to the motor 110. In such examples, the motor 110 supplies additional mechanical energy in response to the increase in power from the driver circuit system 105.

[0041] In an example operation of the driver circuitry 105, the gate driver circuitry 120, 125 independently controls the switching of the power stage circuitry 115. In some examples, the power stage circuitry 115 supplies power to the motor 110 in response to current from the high-side gate driver circuitry 120. In such examples, the power stage circuitry 115 releases energy from the motor 110 in response to the low-side gate driver circuitry 125 sinking current from the motor 110. In response to the gate driver circuitry 125 transitioning from supplying current to the motor 110 to sinking current from the motor 110, the current flowing through the motor 110 changes direction rapidly, which stresses the electrical components of the motor 110. Figure 1 In the example of , the gate driver circuit system 125 uses the current multiplication circuit system 145 and the current source circuit system 135 to control the gate drive current (which controls the switch) to reduce the amount of stress applied to the motor 110 during the switching event. Figure 2 , 3 , 4, 5, 6, and 7 describe example operations of the gate driver circuit system 125 to reduce stress on the motor 110 and improve energy efficiency.

[0042] Figure 2 is a schematic diagram of an example drive system 200, which is Figure 1 An example of a drive system 100 is shown. Figure 2 In the example of FIG. 2 , the driving system 200 includes an example driver circuit system 202 and an example load 204 . Figure 2 The example driver circuitry 202 includes an example power stage circuitry 206 , an example high-side gate driver circuitry 208 , and an example low-side gate driver circuitry 210 . Figure 2 The example power stage circuitry 206 includes a first example transistor 214 and a second example transistor 216 . Figure 2The example low-side gate driver circuit system 210 includes a first example current source circuit system 218, a second example current source circuit system 220, a first example capacitor 222, an example current multiplication circuit system 224, an example charging circuit system 226, an example capacitor circuit system 228, an example multiplexer circuit system 230, an example controller circuit system 232 and an example comparator circuit system 233.

[0043] Figure 2 The example current multiplication circuitry 224 includes a third example transistor 234 , a fourth example transistor 236 , a fifth example transistor 238 , and a sixth example transistor 240 . Figure 2 The example charging circuitry 226 includes a seventh example transistor 242 , a first example switch 244 , an eighth example transistor 246 , and a second example switch 248 . Figure 2 The example capacitor circuit system 228 includes a second example capacitor 250 , a third example capacitor 252 , a fourth example capacitor 254 , and a fifth example capacitor 256 . Figure 2 The example multiplexer circuitry 230 includes a third example switch 258 , a fourth example switch 260 , a fifth example switch 262 , and a sixth example switch 264 . Figure 2 The example controller circuitry 232 includes a first example inverter 266 , an example buffer 268 , an example flip-flop 270 , and a second example inverter 272 .

[0044] Driver circuitry 202 is coupled to load 204. Driver circuitry 202 may be coupled to external circuitry structured to supply high-side and low-side control signals. Driver circuitry 202 is Figure 1 2. Load 204 is coupled to driver circuit system 202. In some examples, load 204 can be mechanically or electrically coupled to one or more components. In some examples, load 204 represents Figure 1 The electric motor 110.

[0045] The power stage circuitry 206 is coupled to the load 204 and the gate driver circuitry 208, 210. The power stage circuitry 206 is Figure 1 The gate driver circuit system 208 is coupled to the power stage circuit system 206 and can be coupled to an external circuit system structured to supply a high-side supply signal. The gate driver circuit system 208 is Figure 1 The gate driver circuit system 210 is coupled to the power stage circuit system 206 and can be coupled to external circuit systems structured to supply low-side supply signals. The gate driver circuit system 210 is Figure 1An example of gate driver circuit system 125.

[0046] The transistor 214 has a first terminal, a second terminal, a third terminal, and a control terminal. The first terminal of the transistor 214 is coupled to a first power supply terminal, which supplies a first power supply voltage (V SUP_1 ). The second terminal and the third terminal of transistor 214 are coupled to load 204, gate driver circuit system 210, and transistor 216. In some examples, the third terminal of transistor 214 is referred to as a bulk terminal. The control terminal of transistor 214 is coupled to gate driver circuit system 208. In some examples, transistor 214 is referred to as a high-side transistor, which supplies a first supply voltage to load 204 based on a high-side drive current from gate driver circuit system 208.

[0047] Transistor 216 has a first terminal, a second terminal, a third terminal and a control terminal. The first terminal of transistor 216 is coupled to load 204, gate driver circuit system 210 and transistor 214. The second terminal and the third terminal of transistor 216 are coupled to a common terminal, and the common terminal supplies a common potential (e.g., ground, AVSS, etc.). In some instances, the third terminal of transistor 214 is referred to as a bulk terminal. The control terminal of transistor 216 is coupled to gate driver circuit system 210. In some instances, transistor 216 is referred to as a low-side transistor, which provides a current path to a common potential based on a low-side drive current from gate driver circuit system 210.

[0048] Current source circuitry 218 is coupled to power stage circuitry 206, current source circuitry 220, current multiplication circuitry 224, controller circuitry 232, and may be coupled to external circuitry structured to supply low-side control signals. Figure 1 2 is an example of current source circuitry 130 of FIG. Current source circuitry 220 is coupled to power stage circuitry 206, current source circuitry 218, current multiplication circuitry 224, controller circuitry 232, comparator circuitry 233, and may be coupled to external circuitry structured to supply low-side control signals. Current source circuitry 220 is Figure 1 An example of a current source circuit system 135.

[0049] Capacitor 222 has a first terminal and a second terminal. The first terminal of capacitor 222 is coupled to load 204 and transistors 214, 216. The second terminal of capacitor 222 is coupled to current multiplication circuitry 224 and charging circuitry 226. Capacitor 222 is Figure 1The current multiplication circuit system 224 is coupled to the power stage circuit system 206, the current source circuit system 218, 220, the capacitor 222 and the charging circuit system 226. The current multiplication circuit system 224 is Figure 1 An example of a current multiplication circuit system 145 is provided below. Figure 5 Another example of current multiplication circuitry 145, 224 is illustrated and described.

[0050] In some examples, capacitor 222 has a capacitance that is proportional to the gate-to-drain capacitance (Cgd) of transistor 216. In such examples, current multiplication circuitry 224 uses capacitor 222 to compensate for transistor 216 having a relatively low gate-to-drain capacitance, such as when transistor 216 is a gallium nitride substrate (GaN) transistor. Advantageously, current multiplication circuitry 224 uses capacitor 222 to compensate for the relatively low gate-to-drain capacitance of transistor 216.

[0051] Charging circuit system 226 is coupled to capacitor 222, current multiplication circuit system 224, capacitor circuit system 228, multiplexer circuit system 230, and controller circuit system 232. Charging circuit system 226 is Figure 1 2 is an example of a charging circuit system 150. Capacitor circuit system 228 is coupled to charging circuit system 226 and multiplexer circuit system 230. Capacitor circuit system 228 is Figure 1 Multiplexer circuitry 230 is coupled to charging circuitry 226, capacitor circuitry 228, controller circuitry 232, and comparator circuitry 233. Multiplexer circuitry 230 is Figure 1 Controller circuitry 232 is coupled to current source circuitry 130, 135, charging circuitry 150, multiplexer circuitry 160, and may be coupled to external circuitry structured to supply low-side control signals. Controller circuitry 232 is Figure 1 The comparator circuit system 233 is coupled to the current source circuit system 220 and the multiplexer circuit system 230. The comparator circuit system 233 is Figure 1 An example of comparator circuit system 170.

[0052] The transistor 234 has a first terminal, a second terminal, a third terminal and a control terminal. The first terminal and the second terminal of the transistor 234 are coupled to a second power supply terminal, which supplies a second power supply voltage (V SUP_2). In some examples, the second power supply voltage is less than the first power supply voltage. In such examples, the second power supply voltage allows the gate driver circuitry 210 to use relatively lower voltage transistors that can switch at a higher speed. In some examples, the second terminal of transistor 234 is referred to as a bulk terminal. The third terminal and control terminal of transistor 234 are coupled to capacitor 222, charging circuitry 226, and transistor 236. Figure 2 In some examples, transistor 234 is structured as a diode circuit system that adjusts the direction of the current supplied to capacitor 222. In some examples, transistor 234 is illustrated and described as a diode circuit system. Alternatively, current multiplication circuit system 224 can be modified to use diode circuit system instead of or illustrate transistor 234.

[0053] Transistor 236 has a first terminal, a second terminal, a third terminal, and a control terminal. The first terminal and the second terminal of transistor 236 are coupled to a second power supply terminal, which supplies a second power supply voltage. In some examples, the second terminal of transistor 236 is referred to as a bulk terminal. The third terminal of transistor 236 is coupled to transistors 238, 240. The control terminal of transistor 236 is coupled to capacitor 222, charging circuit system 226, and transistor 234. Figure 2 In some examples, transistor 236 is structured as current mirror circuitry. In some examples, transistor 236 mirrors the current flowing through transistor 234. Alternatively, current multiplication circuitry 224 may be modified to replace one or both of transistors 234, 236, or described as current mirror circuitry.

[0054] Transistor 238 has a first terminal, a second terminal, a third terminal, and a control terminal. The first terminal and the control terminal of transistor 238 are coupled to transistors 236, 240. The second terminal and the third terminal of transistor 238 are coupled to a common terminal, which supplies a common potential. In some examples, the third terminal of transistor 238 is referred to as a bulk terminal. Figure 2 In some examples, transistor 238 is structured as current mirror circuitry. In some examples, transistor 238 mirrors the current flowing through transistor 236. Alternatively, current multiplication circuitry 224 may be modified to replace transistor 238 or illustrated as current mirror circuitry.

[0055] Transistor 240 has a first terminal, a second terminal, a third terminal, and a control terminal. The first terminal of transistor 240 is coupled to transistor 216 and current source circuitry 218, 220. The second terminal and the third terminal of transistor 240 are coupled to a common terminal, which supplies a common potential. In some examples, the third terminal of transistor 240 is referred to as a bulk terminal. The control terminal of transistor 240 is coupled to transistors 236, 238. Figure 2 In some examples, transistor 240 is structured as current scaling circuitry. In some examples, transistor 240 scales the current flowing through transistor 238. Alternatively, current multiplication circuitry 224 may be modified to replace one or both of transistors 238, 240, or described as current scaling circuitry.

[0056] Transistor 242 has a first terminal, a second terminal, a third terminal, and a control terminal. The first terminal and the second terminal of transistor 242 are coupled to a second power supply terminal, which supplies a second power supply voltage. In some examples, the second terminal of transistor 242 is referred to as a bulk terminal. The third terminal of transistor 242 is coupled to switch 244. The control terminal of transistor 242 is coupled to capacitor 222, current multiplication circuit system 224, and transistor 246. Figure 2 In the example of FIG. 2 , transistor 242 is structured as control circuitry that, when enabled, supplies current to switch 244. Alternatively, current multiplication circuitry 224 may be modified to replace transistor 242 or illustrated as control circuitry.

[0057] The switch 244 has a first terminal, a second terminal, and a control terminal. The first terminal of the switch 244 is coupled to the transistor 242. The second terminal of the switch 244 is coupled to the capacitor circuitry 228. The control terminal of the switch 244 is coupled to the multiplexer circuitry 230 and the controller circuitry 232.

[0058] Transistor 246 has a first terminal, a second terminal, a third terminal, and a control terminal. The first terminal and the second terminal of transistor 246 are coupled to a second power supply terminal, which supplies a second power supply voltage. In some examples, the second terminal of transistor 246 is referred to as a bulk terminal. The third terminal of transistor 246 is coupled to capacitor circuitry 228. The control terminal of transistor 246 is coupled to capacitor 222, current multiplication circuitry 224, and transistor 242. Figure 2 In the example of , transistor 246 is structured as control circuitry that, when enabled, supplies current to switch 248. Alternatively, current multiplication circuitry 224 may be modified to replace transistor 246 or be illustrated as control circuitry.

[0059] The switch 248 has a first terminal, a second terminal, and a control terminal. The first terminal of the switch 248 is coupled to the transistor 246. The second terminal of the switch 248 is coupled to the capacitor circuit system 228. The control terminal of the switch 248 is coupled to the multiplexer circuit system 230 and the controller circuit system 232. In some examples, the switches 244, 248 are implemented using transistors. In other examples, the charging circuit system 226 can be modified to implement the switches 244, 248 as switch circuit systems or in combination with the transistors 242, 246.

[0060] Capacitor 250 has a first terminal and a second terminal. The first terminal of capacitor 250 is coupled to charging circuitry 226 and multiplexer circuitry 230. The second terminal of capacitor 250 is coupled to charging circuitry 226, multiplexer circuitry 230, and capacitor 254. Capacitor 252 has a first terminal and a second terminal. The first terminal of capacitor 252 is coupled to charging circuitry 226 and multiplexer circuitry 230. The second terminal of capacitor 252 is coupled to charging circuitry 226, multiplexer circuitry 230, and capacitor 256.

[0061] Capacitor 254 has a first terminal and a second terminal. The first terminal of capacitor 254 is coupled to multiplexer circuitry 230 and capacitor 250. The second terminal of capacitor 254 is coupled to a common terminal, which supplies a common potential. Capacitor 256 has a first terminal and a second terminal. The first terminal of capacitor 256 is coupled to multiplexer circuitry 230 and capacitor 252. The second terminal of capacitor 256 is coupled to a common terminal, which supplies a common potential.

[0062] exist Figure 2 In the example of , the capacitors 250, 254 are referred to as a set of first capacitors 250, 254, and the capacitors 252, 256 are referred to as a set of second capacitors 252, 256. When the charging circuit system 226 is structured to charge the set of first capacitors 250, 254 (as further described below), the set of first capacitors 250, 254 produces a switching voltage at a first terminal of the capacitor 250. When the charging circuit system 226 is not structured to charge the set of first capacitors 250, 254 (as further described below), the set of first capacitors 250, 254 supplies a reference voltage at a second terminal of the capacitor 250 and a first terminal of the capacitor 254.

[0063] Similarly, when the charging circuit system 226 is structured to charge the set of second capacitors 252, 256, the set of second capacitors 252, 256 generates a switching voltage at the first terminal of the capacitor 252. In addition, when the charging circuit system 226 is structured to discharge the set of second capacitors 252, 256, the set of second capacitors 252, 256 generates a reference voltage at the second terminal of the capacitor 252 and the first terminal of the capacitor 256. Advantageously, the charging circuit system 226 can cause the set of first capacitors 250, 254 or the set of second capacitors 252, 256 to generate either a reference voltage or a switching voltage. Advantageously, the reference voltage represents the discharge of the capacitor circuit system 228, and the switching voltage represents the charging of the capacitor circuit system 228.

[0064] The switch 258 has a first terminal, a second terminal, and a control terminal. The first terminal of the switch 258 is coupled to the charging circuit system 226 and the capacitor circuit system 228. The second terminal of the switch 258 is coupled to the switch 260 and the comparator circuit system 233. The control terminal of the switch 258 is coupled to the charging circuit system 226, the controller circuit system 232, and the switch 262. The switch 258 is structured to receive a switching voltage from the set of second capacitors 252, 256.

[0065] The switch 260 has a first terminal, a second terminal, and a control terminal. The first terminal of the switch 260 is coupled to the charging circuit system 226 and the capacitor circuit system 228. The second terminal of the switch 260 is coupled to the switch 258 and the comparator circuit system 233. The control terminal of the switch 260 is coupled to the charging circuit system 226, the controller circuit system 232, and the switch 264. The switch 260 is structured to receive a switching voltage from the set of first capacitors 250, 254.

[0066] The switch 262 has a first terminal, a second terminal, and a control terminal. The first terminal of the switch 262 is coupled to the capacitor circuit system 228. The second terminal of the switch 262 is coupled to the switch 264 and the comparator circuit system 233. The control terminal of the switch 262 is coupled to the charging circuit system 226, the controller circuit system 232, and the switch 258. The switch 262 is structured to receive a reference voltage from the set of first capacitors 250, 254.

[0067] The switch 264 has a first terminal, a second terminal, and a control terminal. The first terminal of the switch 264 is coupled to the capacitor circuit system 228. The second terminal of the switch 264 is coupled to the switch 262 and the comparator circuit system 233. The control terminal of the switch 264 is coupled to the charging circuit system 226, the controller circuit system 232, and the switch 260. The switch 264 is structured to receive a reference voltage from the set of second capacitors 252, 256.

[0068] Inverter 266 has a first terminal and a second terminal. The first terminal of inverter 266 is coupled to current source circuitry 218, 220 and may be coupled to external circuitry structured to supply a low-side control signal. The second terminal of inverter 266 is coupled to flip-flop 270. Figure 2 In the example of , inverter 266 is structured to invert the low-side control signal. Alternatively, the controller circuit system 232 can be modified to receive an inverted copy of the low-side control signal. In such an example, the controller circuit system 232 can be modified to remove the inverter 266. Buffer 268 has a first terminal and a second terminal. The first terminal of buffer 268 is coupled to a reset terminal, which supplies a reset signal. The second terminal of buffer 268 is coupled to a trigger 270. In Figure 2 In the example of , buffer 268 is structured to have a propagation delay approximately equal to the propagation delay of inverter 266.

[0069] Flip-flop 270 has a clock terminal (CLK), a clear terminal (CLR), a data terminal (D), an output terminal (Q), and an inverting output terminal (QZ). The clock terminal of flip-flop 270 is coupled to inverter 266. The clear terminal of flip-flop 270 is coupled to buffer 268. The data terminal of flip-flop 270 is coupled to the inverting output terminal of flip-flop 270. The output terminal of flip-flop 270 is coupled to charging circuit system 226, multiplexing circuit system 230, and inverter 272. Figure 2 In the example of , the trigger 270 is a data (D) trigger. Alternatively, the controller circuit system 232 can be modified to use an alternative type of trigger. The trigger 270 is structured as a frequency division circuit system, which generates a first switch signal by dividing the low-side control signal. The trigger 270 uses the first switch signal to control switches 248, 258, 262.

[0070] Inverter 272 has a first terminal and a second terminal. The first terminal of inverter 272 is coupled to charging circuitry 226, multiplexer circuitry 230, and flip-flop 270. The second terminal of inverter 272 is coupled to charging circuitry 226 and multiplexer circuitry 230. Inverter 272 is structured to generate a second switch signal by inverting the first switch signal from flip-flop 270. Inverter 272 uses the second switch signal to control switches 244, 260, 264.

[0071] During example operation of the drive system 200, the gate driver circuit system 210 controls the transistor 216 in response to receiving the low-side control signal. During example operation (e.g., enabling, conducting, etc.) of turning on the transistor 216, the controller circuit system 232 uses the first switch signal and the second switch signal to structure the charging circuit system 226 and the multiplexer circuit system 230 to support multiple turns of the transistor 216. In some such example operations, the gate driver circuit system 210 drives the transistor 216 using the first current for a first duration. However, in response to the comparator circuit system 233 determining that the switch voltage from the capacitor circuit system 228 is greater than or equal to the reference voltage from the capacitor circuit system 228, the comparator circuit system 233 disables the current source circuit system 220. After such determination, the gate driver circuit system 210 drives the transistor 216 using a second current that is less than the first current. Advantageously, during the first duration, the current flowing through transistor 216 has a relatively high slew rate, which increases power efficiency, and after the first duration, the current flowing through transistor 216 has a relatively low slew rate, which reduces stress on components of load 204. Advantageously, initially using a relatively high slew rate improves power efficiency during switching operations.

[0072] Figure 3 yes Figure 2 Schematic diagram of a first configuration of an example drive system 200, which is Figure 1 An example of a drive system 100 is shown. Figure 3 In the example of Figure 2 The first capacitors 250 and 254 of the group are used to supply the reference voltage, and the Figure 2 The second capacitors 252 and 256 of the group are charged to generate the switching voltage. In such example operation, Figure 2 The controller circuit system 232 is disconnected Figure 2 Switches 244, 260, 264 and closed Figure 2 Switches 248, 258, 262. When Figure 3 In the first configuration, Figure 2 The comparator circuit system 233 controls the switching voltage from the first set of capacitors 250, 254 in response to the comparison of the reference voltage from the first set of capacitors 250, 254 and the switching voltage from the second set of capacitors 252, 256. Figure 2 The current source circuit system 220.

[0073] Figure 4 yes Figure 2 Schematic diagram of a second configuration of the example drive system 200, which is Figure 1 An example of a drive system 100 is shown. Figure 4In the example of Figure 2 The first capacitors 250, 254 are charged to generate a switching voltage and used Figure 2 The second capacitors 252 and 256 of the group are used to supply the reference voltage. In such example operation, Figure 2 The controller circuit system 232 is closed Figure 2 Switches 244, 260, 264 and disconnect Figure 2 Switches 248, 258, 262. When Figure 4 In the second configuration, Figure 2 The comparator circuit system 233 controls the switching voltage from the first set of capacitors 250, 254 in response to a comparison of the switching voltage from the second set of capacitors 252, 256 with the reference voltage from the second set of capacitors 252, 256. Figure 2 The current source circuit system 220.

[0074] exist Figure 2 , 3 In the examples of and 4, transistors 214, 216, 238, 240 are n-channel metal oxide semiconductor field effect transistors (MOSFETs). Alternatively, transistors 214, 216, 238, 240 may be n-channel field effect transistors (FETs), n-channel insulated gate bipolar transistors (IGBTs), n-channel junction field effect transistors (JFETs), NPN bipolar junction transistors (BJTs), or, with slight modifications, p-type equivalent devices. Figure 2 , 3 In the examples of and 4, transistors 234, 236, 242, 246 are p-channel MOSFETs. Alternatively, transistors 234, 236, 242, 246 may be p-channel FETs, p-channel IGBTs, p-channel JFETs, NPN BJTs, or, with slight modifications, may be N-type equivalent devices. Transistors 214, 216, 234, 236, 238, 240, 242, 246 may be depletion-mode devices, drain-extended devices, enhancement-mode devices, natural transistors, or other types of device structure transistors. Furthermore, transistors 214, 216, 234, 236, 238, 240, 242, 246 may be implemented in / on a silicon substrate (Si), a silicon carbide substrate (SiC), a gallium nitride substrate (GaN), or a gallium arsenide substrate (GaAs).

[0075] Figure 5 is a schematic diagram of an example drive system 500, which is Figure 1 , 2 , 3 and 4, another example of the drive system 100, 200, which includes Figure 1 , 2 , 3 and 4 are another example of current multiplication circuit systems 145, 224. Figure 5 In the example of FIG. 5 , drive system 500 includes an example driver circuit system 502 and an example load 504 . Figure 5 The driver circuitry 502 includes example power stage circuitry 506 , example high-side gate driver circuitry 508 , and example low-side gate driver circuitry 510 . Figure 5 The power stage circuitry 506 includes a first example transistor 514 and a second example transistor 516 .

[0076] Figure 5 The example low-side gate driver circuitry 510 includes an example current source circuitry 518 , an example capacitor 522 , and an example current multiplication circuitry 524 . Figure 5 The current multiplication circuit system 524 includes a first example resistor 532, a third example transistor 534, a fourth example transistor 536, a fifth example transistor 538, a sixth example transistor 540, a seventh example transistor 542, a second example resistor 543, an eighth example transistor 544, a first example diode 546, a third example resistor 548, a ninth example transistor 550, a first example inverter 552, a second example inverter 554, a tenth example transistor 556, a fourth example resistor 557, an eleventh example transistor 558, a fifth example resistor 560, a twelfth example transistor 562, a second example diode 564, a thirteenth example transistor 566, and a fourteenth example transistor 568. Figure 5 In the example of , the gate driver circuit system 510 implements a single slew rate switch using the current source circuit system 518. Alternatively, the gate driver circuit system 510 can be modified to implement a multi-slew rate switch, such as Figure 2 , 3 and as shown in 4.

[0077] Driver circuitry 502 is coupled to load 504. Driver circuitry 502 may be coupled to external circuitry structured to supply high-side and low-side control signals. Driver circuitry 502 is Figure 1 , 2 , 3 and 4 are alternative examples of driver circuit systems 105, 202. Figure 5 In an example of , driver circuitry 502 includes current multiplication circuitry 524, which further includes circuitry to reduce quiescent current during the off time of transistor 516. Load 504 is coupled to driver circuitry 502. In some examples, load 504 can be mechanically or electrically coupled to one or more components. Load 504 is Figure 1 The motor 110 and Figure 2 , 3 and another example of a load 204 of 4.

[0078] The power stage circuitry 506 is coupled to the load 504 and the gate driver circuitry 508, 510. The power stage circuitry 506 is Figure 1 , 2 , 3 and 4. The gate driver circuit system 508 is coupled to the power stage circuit system 506 and can be coupled to an external circuit system structured to supply a high-side supply signal. The gate driver circuit system 508 is Figure 1 , 2 , 3 and 4. The gate driver circuit system 510 is coupled to the power stage circuit system 506 and can be coupled to an external circuit system structured to supply a low-side supply signal. The gate driver circuit system 510 is Figure 1 , 2 , 3 and 4 are examples of gate driver circuit systems 125, 210.

[0079] The transistor 514 has a first terminal, a second terminal, a third terminal and a control terminal. The first terminal of the transistor 514 is coupled to a first power supply terminal, which supplies a first power supply voltage (V SUP_1 ). The second terminal and the third terminal of transistor 514 are coupled to load 504, gate driver circuit system 510, and transistor 516. In some examples, the third terminal of transistor 514 is referred to as a bulk terminal. The control terminal of transistor 514 is coupled to gate driver circuit system 508. In some examples, transistor 514 is referred to as a high-side transistor that supplies a supply voltage to load 504 based on a high-side drive current from gate driver circuit system 508. Transistor 514 is Figure 2 , 3 and 4 are examples of transistors 214.

[0080] Transistor 516 has a first terminal, a second terminal, a third terminal, and a control terminal. The first terminal of transistor 516 is coupled to load 504, gate driver circuit system 510, and transistor 514. The second terminal and the third terminal of transistor 516 are coupled to a common terminal, which supplies a common potential. In some instances, the third terminal of transistor 514 is referred to as a bulk terminal. The control terminal of transistor 516 is coupled to gate driver circuit system 510. In some instances, transistor 516 is referred to as a low-side transistor, which provides a current path to a common potential based on a low-side drive current from gate driver circuit system 510. Transistor 516 is Figure 2 , 3 and 4 are examples of transistor 216.

[0081] Current source circuitry 518 is coupled to power stage circuitry 506, current multiplication circuitry 524, and may be coupled to external circuitry structured to supply low-side control signals. Figure 1 , 2 , 3 and 4. Capacitor 522 has a first terminal and a second terminal. The first terminal of capacitor 522 is coupled to load 504 and transistors 514, 516. The second terminal of capacitor 522 is coupled to current multiplication circuit system 524. Capacitor 522 is Figure 1 , 2 , 3 and 4 are another example of capacitors 140, 222.

[0082] Current multiplication circuitry 524 is coupled to power stage circuitry 506, current source circuitry 518, capacitor 522, and external circuitry structured to supply low-side control signals. Figure 1 , 2 , 3 and 4 are another example of current multiplication circuit systems 145, 224. Figure 5 In the example of , current multiplication circuitry 524 includes additional circuitry that reduces quiescent current by disabling components when transistor 516 is off.

[0083] In some examples, capacitor 522 has a capacitance that is proportional to the non-ideal gate-to-drain capacitance of transistor 516. In such examples, current multiplication circuitry 524 is structured to use capacitor 522 to compensate for transistor 516 having a relatively low gate-to-drain capacitance, such as when transistor 516 is a gallium nitride substrate (GaN) transistor. Advantageously, current multiplication circuitry 524 is structured to use a relatively small capacitance to compensate for the relatively low gate-to-drain capacitance of transistor 516.

[0084] The resistor 532 has a first terminal and a second terminal. The first terminal of the resistor 532 is coupled to a second power supply terminal, which supplies a second power supply voltage (V SUP_2 ). The second terminal of resistor 532 is coupled to capacitor 522 and transistors 534, 536. In some examples, resistor 532 is structured as a discharge circuit system that prevents the control terminals of transistors 534, 536 from floating when there is no signal (also known as dead time). Alternatively, current multiplication circuit system 524 can be modified to exclude resistor 532 or implement another method of discharging the control terminals of transistors 534, 536.

[0085] Transistor 534 has a first terminal, a second terminal, a third terminal, and a control terminal. The first terminal and the second terminal of transistor 534 are coupled to a second power supply terminal, which supplies a second power supply voltage. In some examples, the second terminal of transistor 534 is referred to as a bulk terminal. The third terminal and the control terminal of transistor 534 are coupled to capacitor 522, resistor 532, and transistor 536. Figure 5 In some examples, transistor 534 is structured as a diode circuit system that adjusts the direction of the current supplied to capacitor 522. In some examples, transistor 534 is illustrated and described as a diode circuit system. Alternatively, current multiplication circuit system 524 can be modified to use diode circuit system instead of or illustrate transistor 534.

[0086] Transistor 536 has a first terminal, a second terminal, a third terminal, and a control terminal. The first terminal and the second terminal of transistor 536 are coupled to a second power supply terminal, which supplies a second power supply voltage. In some examples, the second terminal of transistor 536 is referred to as a bulk terminal. The third terminal of transistor 536 is coupled to transistors 538, 540, 542, and resistor 543. The control terminal of transistor 536 is coupled to capacitor 522, resistor 532, and transistor 534. Figure 5 In some examples, transistor 536 is structured as current mirror circuitry. In some examples, transistor 536 mirrors the current flowing through transistor 534. Alternatively, current multiplication circuitry 524 can be modified to use current mirror circuitry to replace or illustrate one or both of transistors 534, 536.

[0087] Transistor 538 has a first terminal, a second terminal, a third terminal, and a control terminal. The first terminal and the control terminal of transistor 538 are coupled to transistors 536, 540, 542, and resistor 543. The second terminal and the third terminal of transistor 538 are coupled to a common terminal, which supplies a common potential. In some examples, the third terminal of transistor 538 is referred to as a bulk terminal. Figure 5 In some examples, transistor 538 is structured as current mirror circuitry. In some examples, transistor 538 mirrors the current flowing through transistor 536. Alternatively, current multiplication circuitry 524 can be modified to use current mirror circuitry instead of or in place of transistor 538.

[0088] Transistor 540 has a first terminal, a second terminal, a third terminal, and a control terminal. The first terminal of transistor 540 is coupled to transistor 516 and current source circuitry 518. The second terminal and the third terminal of transistor 540 are coupled to a common terminal, which supplies a common potential. In some examples, the third terminal of transistor 540 is referred to as a bulk terminal. The control terminal of transistor 540 is coupled to transistors 536, 538, 542, and resistor 543. Figure 5 In some examples, transistor 540 is structured as current scaling circuitry. In some examples, transistor 540 scales the current flowing through transistor 538. Alternatively, current multiplication circuitry 524 can be modified to replace or account for one or both of transistors 538, 540 with an alternative current scaling circuitry.

[0089] Transistor 542 has a first terminal, a second terminal, a third terminal, and a control terminal. The first terminal of transistor 542 is coupled to transistors 536, 538, 540 and resistor 543. The second terminal and the third terminal of transistor 542 are coupled to a common terminal, which supplies a common potential. In some examples, the third terminal of transistor 542 is referred to as a bulk terminal. The control terminal of transistor 542 is coupled to transistors 544, 566 and inverters 552, 554. Figure 5 In the example of FIG. 5 , transistor 542 is structured as control circuitry that, when enabled, prevents transistors 538, 540 from being turned on. Alternatively, current multiplication circuitry 524 may be modified to replace transistor 542 or illustrate it as control circuitry.

[0090] Resistor 543 has a first terminal and a second terminal. The first terminal of resistor 543 is coupled to transistors 536, 538, 540, 542. The second terminal of resistor 543 is coupled to a common terminal, which supplies a common potential. In some examples, resistor 543 is structured as a discharge circuit system that prevents the control terminals of transistors 538, 540 from floating when there is no signal (also known as dead time). Alternatively, current multiplication circuit system 524 can be modified to exclude resistor 543 or implement another method of discharging the control terminals of transistors 538, 540.

[0091] Transistor 544 has a first terminal, a second terminal, a third terminal, and a control terminal. The first terminal of transistor 544 is coupled to a second power supply terminal, which supplies a second power supply voltage. The second terminal and the third terminal of transistor 544 are coupled to a common terminal, which supplies a common potential. In some examples, the third terminal of transistor 544 is referred to as a bulk terminal. The control terminal of transistor 544 is coupled to transistors 542, 566 and inverters 552, 554. In Figure 5 In the example of , transistor 544 is structured as control circuitry that, when enabled, prevents transistors 534, 536 from being turned on. Alternatively, current multiplication circuitry 524 may be modified to replace or illustrate transistor 544 with an alternative control circuitry. In such an example, transistor 544 may be illustrated as switch circuitry.

[0092] The diode 546 has a first terminal and a second terminal. The first terminal of the diode 546 is coupled to the secondary power supply terminal, which supplies the second power supply voltage. The second terminal of the diode 546 is coupled to the resistor 548 and the transistor 550. Figure 5 In the example of , diode 546 is a Zener diode that is structured to break down (e.g., conduct current) in response to a voltage difference greater than a threshold voltage. Resistor 548 has a first terminal and a second terminal. The first terminal of resistor 548 is coupled to diode 546 and transistor 550. The second terminal of resistor 548 is coupled to a common terminal that supplies a common potential. Transistor 550 has a first terminal, a second terminal, a third terminal, and a control terminal. The first terminal of transistor 550 is coupled to a second power supply terminal that supplies a second power supply voltage. The second terminal and the third terminal of transistor 550 are coupled to a common terminal that supplies a common potential. In some examples, the third terminal of transistor 550 is referred to as a bulk terminal. The control terminal of transistor 550 is coupled to diode 546 and resistor 548.

[0093] exist Figure 5 In the example of , diode 546, resistor 548 and transistor 550 are structured as clamping circuitry. In some examples, diode 546, resistor 548 and transistor 550 prevent the second power supply voltage from increasing to exceed the maximum voltage by clamping the second power supply voltage. For example, when the second power supply voltage exceeds the breakdown voltage of diode 546, resistor 548 uses the current from diode 546 to turn on transistor 550, which clamps the second power supply voltage. Alternatively, current multiplication circuitry 524 can be modified to replace or illustrate one or more of diode 546, resistor 548 or transistor 550 as clamping circuitry. In such examples, one or more of diode 546, resistor 548 or transistor 550 can be illustrated as clamping circuitry.

[0094] Inverter 552 has a first terminal and a second terminal. The first terminal of inverter 552 can be coupled to an external circuit system structured to supply a low-side control signal. The second terminal of inverter 552 is coupled to transistors 542, 544, 566 and inverter 554. Inverter 554 has a first terminal and a second terminal. The first terminal of inverter 554 is coupled to transistors 542, 544, 566 and inverter 552. The second terminal of inverter 554 is coupled to transistor 556.

[0095] Transistor 556 has a first terminal, a second terminal, and a control terminal. The first terminal of transistor 556 is coupled to transistors 558, 562 and resistor 560. The second terminal of transistor 556 is coupled to resistor 557. The control terminal of transistor 556 is coupled to inverter 554. Resistor 557 has a first terminal and a second terminal. The first terminal of resistor 557 is coupled to transistor 556. The second terminal of resistor 557 is coupled to a common terminal, which supplies a common potential. In some examples, resistor 557 is a current limiting resistor that prevents excessive current from flowing through transistors 556, 558. Alternatively, current multiplication circuit system 524 can be modified to exclude resistor 557 or implement another current regulation method.

[0096] Transistor 558 has a first terminal, a second terminal, a third terminal and a control terminal. The first terminal and the second terminal of transistor 558 are coupled to current source circuit system 518, resistor 560, transistor 562, 568 and an external circuit system structured to supply a low-side control signal. In some instances, the second terminal of transistor 558 is referred to as a bulk terminal. The third terminal and the control terminal of transistor 558 are coupled to transistors 556, 562 and resistor 560. Resistor 560 has a first terminal and a second terminal. The first terminal of resistor 560 is coupled to current source circuit system 518, transistor 558, 562, 568, and an external circuit system structured to supply a low-side control signal. The second terminal of resistor 560 is coupled to transistors 556, 558, 562. Transistor 562 has a first terminal, a second terminal, a third terminal and a control terminal. The first and second terminals of transistor 562 are coupled to current source circuitry 518, transistors 558, 568, resistor 560, and external circuitry structured to supply a secondary supply voltage.

[0097] exist Figure 5In some examples, transistors 558, 562 are structured as current mirror circuitry. In some examples, transistor 562 mirrors the current flowing through transistor 558. Alternatively, current multiplication circuitry 524 can be modified to replace or illustrate one or both of transistors 558, 562 with current mirror circuitry. In such examples, transistors 558, 562 can be illustrated as current mirror circuitry.

[0098] The diode 564 has a first terminal and a second terminal. The first terminal of the diode 564 is coupled to the transistors 562, 566, 568. The second terminal of the diode 564 is coupled to a common terminal, which supplies a common potential. Figure 5 In the example of , diode 564 is a Zener diode that is structured to break down (eg, conduct current) in response to a voltage difference greater than a threshold voltage.

[0099] Transistor 566 has a first terminal, a second terminal, a third terminal and a control terminal. The first terminal of transistor 566 is coupled to transistors 562, 568 and diode 564. The second terminal and the third terminal of transistor 566 are coupled to a common terminal, which supplies a common potential. The control terminal of transistor 566 is coupled to transistors 542, 544 and inverters 552, 554. Figure 5 In the example of , transistor 566 is structured as control circuitry that prevents transistor 568 from being turned on when it is enabled. Alternatively, current multiplication circuitry 524 may be modified to replace transistor 566 or be illustrated as control circuitry. In such an example, transistor 566 may be illustrated as switch circuitry.

[0100] Transistor 568 has a first terminal, a second terminal, a third terminal and a control terminal. The first terminal of transistor 568 is coupled to an auxiliary power supply terminal, which supplies an auxiliary power supply voltage. The second terminal and the third terminal of transistor 568 are coupled to a second power supply terminal, which supplies a second power supply voltage. The control terminal of transistor 568 is coupled to transistors 562, 566 and diode 564. Figure 5 In some examples, transistor 568 is structured as regulator circuitry. In some examples, transistor 568 regulates the auxiliary power supply voltage to set the second power supply voltage. Alternatively, current multiplication circuitry 524 can be modified to replace transistor 568 or be illustrated as regulator circuitry. In such examples, transistor 568 can be illustrated as power supply circuitry.

[0101] exist Figure 5In the example of , transistors 514, 516, 538, 540, 542, 544, 550, 556, 566, 568 are n-channel MOSFETs. Alternatively, transistors 514, 516, 538, 540, 542, 544, 550, 556, 566, 568 may be n-channel FETs, n-channel IGBTs, n-channel JFETs, NPN BJTs. Figure 5 In the example of , transistors 534, 536, 558, 562 are p-channel MOSFETs. Alternatively, transistors 534, 536, 558, 562 may be p-channel FETs, p-channel IGBTs, p-channel JFETs, NPN BJTs. One or more of transistors 514, 516, 534, 536, 538, 540, 542, 544, 550, 556, 566, 558, 562 may be depletion-mode devices, drain-extended devices, enhancement-mode devices, natural transistors, or other types of device structure transistors. Furthermore, transistors 514, 516, 534, 536, 538, 540, 542, 544, 550, 556, 566, 558, 562 may be implemented in / on a silicon substrate (Si), a silicon carbide substrate (SiC), a gallium nitride substrate (GaN), or a gallium arsenide substrate (GaAs).

[0102] Figure 6 is a flow diagram representing example operations 600 that may be at least one of performed, instantiated, or executed to implement Figure 1 , 2 , 3, 4 and 5 current multiplication circuit systems 145, 224, 524 to regulate the cross transistor ( Figure 2 , 3 , 4 and 5 of transistors 216, 516)'s voltage slew rate. Figure 6 The example operation 600 of the present invention begins at block 610, where Figure 1 , 2 , 3, 4 and 5 of the gate driver circuit system 125, 210, 510 receive a switch signal to turn on the transistor. (Block 610). In some instances, the external circuit system supplies a low-side control signal to the gate driver circuit system 125, 210. In such instances, the low-side control signal is a pulse width modulation (PWM) signal with a duty cycle, which determines the on time and off time of the transistor 216, 516. The on time corresponds to the duration that the gate driver circuit system 125, 210, 510 supplies a drive current to enable the transistor 216, 516 to conduct current. The off time corresponds to the duration that the gate driver circuit system 125, 210, 510 does not generate a drive current that enables the transistor 216, 516 to conduct current. In such example operations, adjusting the duty cycle of the low-side control signal allows the external circuit system to modify the Figure 1 The electric motor 110 is supplied with electric power.

[0103] Figure 1 , 2 , 3, 4 and 5 of the current source circuit system 130, 135, 218, 220, 518 use the switch signal to generate the gate drive current. (Block 620). In some examples, the current source circuit system 130, 135, 218, 220, 518 supplies current in response to receiving a low-side control signal corresponding to the on-time. For example, the current source circuit system 130, 135, 218, 220, 518 supplies current in response to receiving a low-side control signal of a logic high (e.g., logic one). In such examples, the currents from the current source circuit system 130, 135, 218, 220, 518 combine to generate the gate drive current. However, as described below Figure 7 As described in , disabling the current source circuitry 135, 220 sets the gate drive current equal to the current from the current source circuitry 130, 218. Advantageously, the gate driver circuitry 125, 210 can use the current source circuitry 135, 220 to modify the gate driver current.

[0104] The current source circuit system 130, 135, 218, 220, 518 sets the slew rate of the voltage change across the transistor. (Block 630). In some examples, the current source circuit system 130, 135, 218, 220, 518 sets the slew rate of the transistor 216, 516 in response to the magnitude of the gate driver current. For example, the transistor 216, 516 has a higher slew rate when the gate driver current increases and has a lower slew rate when the gate driver current decreases. In such examples, the current source circuit system 130, 135, 218, 220, 518 is structured to supply a current that sets the slew rate of the transistor 216, 516 to a design value. Advantageously, adjusting the gate drive current adjusts the slew rate of the transistor 216, 516. Advantageously, the current source circuit system 130, 135, 218, 220 can be structured to set the slew rate of the transistor 216, 516.

[0105] The current multiplication circuit system 145, 224, 524 supplies a reference current to the capacitor in response to a change in the drain voltage of the transistor. (Block 640). In some examples, Figure 2 , 3 The transistors 234, 534 of 4 and 5 are structured as a diode circuit system, which Figure 2 , 3, 4 and 5. In example operation, once the current source circuitry 130, 135, 218, 220, 518 supplies gate drive current to the transistor 216, 516, the voltage across the capacitor 222, 522 begins to change. The capacitor 222, 522 draws current from the transistor 234, 534 in response to the voltage change across the transistor 216, 516. Advantageously, the operation of the capacitor 222, 522 using the transistor 234, 534 is proportional to the capacitor coupled between the drain terminal and the gate terminal of the transistor 216, 516.

[0106] The current multiplication circuit system 145, 224, 524 mirrors the reference current. (Block 650). In some examples, Figure 2 , 3 The transistors 236, 536 of , 4 and 5 are structured as current mirror circuitry that mirrors the current flowing through the transistors 234, 534. In such an example, the transistors 236, 536 supply a copy of the reference current to Figure 2 , 3 , 4 and 5. Advantageously, transistors 234, 534 mirror the current supplied to capacitors 222, 522.

[0107] The current multiplication circuitry 145, 224, 524 scales the reference current. (Block 660). In some examples, transistor 238, 538 is structured as a current mirror circuitry that sinks a current approximately equal to a copy of the reference current from transistor 236, 536. In addition, transistor 238, 538 controls transistor 240, 540 in response to sinking the copy of the reference current. In some examples, transistor 240, 540 is structured as a scaling circuitry that scales the current flowing through transistor 238, 538. In such examples, transistor 240, 540 is sized relative to transistor 238, 538 (e.g., has a scalable characteristic). In example operation, transistor 240, 540 sinks a current approximately equal to the ratio of the size of transistor 240, 540 to the size of transistor 238, 538. For example, transistor 240, 540 may sink a current approximately sixteen times the current flowing through transistor 238, 538.

[0108] The current multiplication circuitry 145, 224, 524 sinks a scaled reference current from the gate drive current to adjust the slew rate of the voltage change across the transistor. (Block 670). In some examples, the transistor 240, 540 is structured as a current sinking circuitry that sinks the scaled current from the control terminal of the transistor 216. In such examples, the transistor 240, 540 reduces the gate drive current in response to sinking the scaled current.

[0109] Advantageously, the current multiplication circuitry 145, 224, 524 uses a scaled current to emulate a relatively large capacitance coupled between the gate and drain terminals of the transistor 216, 516. Advantageously, the current multiplication circuitry 145, 224, 524 reduces the size of the capacitance required to adjust the slew rate of the transistor 216, 516. For example, when an 8-picofarad capacitance is required between the gate and drain terminals of the transistor 216, 516 and the current multiplication circuitry 145, 224, 524 scales the reference current by a factor of sixteen, the capacitor 140, 222, 522 may have a capacitance of half a picofarad (pF). In such an example, the capacitor 140, 222, 522 and the current multiplication circuitry 145, 224, 524 use a capacitance that is one-sixteenth the size to emulate an eight-picofarad capacitance. Advantageously, reducing the capacitance of the capacitor 140, 222, 522 reduces the system on chip (SoC) size of the gate driver circuitry 125, 210, 510. Advantageously, reducing the capacitance of the capacitor 140, 222, 522 reduces the integration complexity of the gate driver circuitry 210, 510 in a GaN design.

[0110] In some examples, the gate driver circuitry 125, 210, 510 dynamically adjusts the slew rate. Figure 7 710, 720, 730, 740, 750, 760, 770, 780, 790). Figure 7 Example operations of blocks 710, 720, 730, 740, 750, 760, 770, 780, 790 are illustrated and described. Advantageously, dynamically adjusting the slew rate of the transistor 216, 516 allows the gate driver circuitry 125, 210, 510 to improve power efficiency by first using a relatively high slew rate and then using a relatively low slew rate. Advantageously, dynamically adjusting the slew rate of the transistor 216, 516 improves power efficiency and reduces stress on the motor 110.

[0111] Although reference Figure 6 The flowchart illustrated in FIG. 1 describes an example method, but implementations may also be used in this specification. Figure 1 , 2 , 3, 4 and 5. For example, the order of execution of the blocks may be changed, or some of the blocks described may be changed, eliminated, or combined. Similarly, additional operations may be included in the manufacturing process before, between, or after the blocks shown in the illustrated examples.

[0112] Figure 7is a flow diagram representing example operations 700 that may be at least one of performed, instantiated, or executed to implement Figure 1 , 2 , 3 and 4 of the gate driver circuit system 125, 210 to dynamically adjust the cross transistor ( Figure 2 , 3 and 4 transistors 216) of the voltage slew rate. Figure 7 Example operation 700 begins at Figure 6 The gate driver circuitry 125, 210 uses the driver current to set the slew rate of the voltage change across the transistor. (Blocks 610, 620, 630, 640, 650, 660, 670). Figure 6 Example operations of blocks 610 , 620 , 630 , 640 , 650 , 660 , 670 are illustrated and described.

[0113] Figure 1 and 2 The controller circuit system 165, 232 determines whether this is the first switching cycle. (Block 710). In some examples, the first switching cycle is the first pulse of the low-side control signal after at least one of power-up or reset. In such examples, Figure 1 , 2 , 3 and 4 capacitor circuit systems 155, 228 Figure 2 , 3 and 4 of the first capacitor 250, 254 or Figure 2 , 3 The second capacitors 252 and 256 of the group 4 are charged. The controller circuit system 165, 232 may include additional circuit systems to determine whether the switching cycle is the first switching cycle. For example, the controller circuit system 165, 232 may include an additional trigger set in the first cycle after power-up or reset. During the first switching cycle, Figure 1 , 2 The comparator circuit systems 170, 233 of , 3 and 4 compare the switching voltage from one of the group of first capacitors 250, 254 or the group of second capacitors 252, 256. One of the group of first capacitors 250, 254 or the group of second capacitors 252, 256 generates a switching voltage in response to being charged. However, before the first switching cycle, the capacitors 250, 252, 254, 256 have not yet been charged.

[0114] If the controller circuitry 165, 232 determines that this is the first switching cycle (eg, block 710 returns a “yes” result), then Figure 1 , 2, 3 and 4 charging circuit systems 150, 226 charge the first capacitor. (Block 720). In some examples, during the first switching cycle, Figure 1 and 2 The controller circuit system 165, 232 is closed Figure 2 , 3 and 4 switches 244 to charge the first capacitors 250, 254. In addition, during the first switching cycle, the controller circuit system 165, 232 is disconnected. Figure 2 , 3 4 and 248 to keep the set of second capacitors 252, 256 discharged. In such examples, the charging circuit system 226 can be referred to as being structured to charge the set of first capacitors 250, 254, and the charging circuit system 226 can be referred to as being structured to not charge the set of second capacitors 252, 256. Control continues back to block 610.

[0115] If the controller circuit system 165, 232 determines that this is not the first switching cycle (e.g., block 710 returns a "no" result), the controller circuit system 165, 232 determines whether the switching cycle is an even switching cycle. (Block 730). In some examples, the controller circuit system 165, 232 generates the first switching signal and the second switching signal to control Figure 2 , 3 and 4 switches 244, 248, 258, 260, 262, 264. In such an example, Figure 2 The trigger 270 generates a first switch signal by dividing the low-side control signal, and Figure 2 The inverter 272 generates the second switch signal by inverting the first switch signal. The controller circuit system 165, 232 uses the first switch signal to control the switch 244, and the switch is structured to charge the group of first capacitors 250, 254 when closed. In the example operation, the trigger 270 switches the state of the first switch signal and the second switch signal after each pulse of the low-side control signal. For example, during an even pulse (for example, every other pulse), the first switch signal is in a first state, and the second switch signal is in a second state. In such an example, during an odd pulse (for example, every other pulse), the first switch signal is in a second state, and the second switch signal is in a first state.

[0116] If the controller circuit system 165, 232 determines that the switching cycle is an even switching cycle (e.g., block 730 returns a "yes" result), the charging circuit system 150, 220 charges the second capacitor to generate the switching voltage. (Block 740). In some examples, in response to the second switching signal closing the switch 248, the controller circuit system 165, 232 causes the charging circuit system 150, 226 to charge the group of second capacitors 252, 256. In such examples, Figure 2 , 3 and 4 transistors 246 are used with the Figure 2 , 3 The second set of capacitors 252, 256 is charged with a current proportional to the current of transistor 234 of FIG. 4. In example operation, the second switch signal closes switches 260, 264 to set the switch voltage to the voltage between capacitor 250 and switch 244. For example, during operation of block 740, the controller circuit system 165, 232 structures the gate driver circuit system 210 as Figure 3 The first configuration described in .

[0117] The charging circuit system 150, 226 uses the first capacitor to determine the reference voltage. (Block 750). In some examples, the controller circuit system 165, 232 disconnects the charging circuit system 150, 226 from the set of first capacitors 250, 254 in response to the first switch signal to open the switch 244. In such examples, the switch 244 prevents Figure 2 , 3 The transistors 242 of the gate driver circuit 210 and the gate driver circuit 210 are configured to charge the first capacitors 250 and 254. In the example operation, the first switch signal opens the switches 258 and 262 to set the reference voltage to the voltage between the capacitors 252 and 256. For example, during the operation of block 750, the controller circuit system 165 and 232 structures the gate driver circuit system 210 as Figure 3 Control continues to block 780.

[0118] Despite Figure 7 In the example of FIG. 1 , the operation of block 740 occurs before the operation of block 750, but the operations of blocks 740 and 750 may occur approximately simultaneously. For example, the charging circuit system 150, 226 discharges the first capacitor and charges the second capacitor of the capacitor circuit system 155, 228 approximately simultaneously.

[0119] If the switching cycle of the controller circuit system 165, 232 is not an even switching cycle (for example, box 730 returns a "no" result), the charging circuit system 150, 220 charges the first capacitor to generate a switching voltage. (Box 760). In some examples, in response to the first switching signal closing the switch 244, the controller circuit system 165, 232 causes the charging circuit system 150, 226 to charge the group of first capacitors 250, 254. In such examples, the transistor 242 charges the group of first capacitors 250, 254 with a current proportional to the current flowing through the transistor 234. In example operation, the first switching signal also closes the switches 258, 262 to set the switching voltage to the voltage between the capacitor 252 and the switch 248. For example, during the operation of box 760, the controller circuit system 165, 232 structures the gate driver circuit system 210 as Figure 4 The second configuration described in .

[0120] The charging circuit system 150, 226 uses the first capacitor to determine the reference voltage. (Block 770). In some examples, the controller circuit system 165, 232 disconnects the charging circuit system 150, 226 from the set of second capacitors 252, 256 by opening the switch 248 in response to the second switch signal. In such examples, the switch 248 prevents the transistor 246 from charging the set of second capacitors 252, 256. In example operation, the second switch signal opens the switch 260, 264 to set the reference voltage to the voltage between the capacitors 250, 254. For example, during the operation of block 770, the controller circuit system 165, 232 structures the gate driver circuit system 210 as Figure 4 Control continues to block 780.

[0121] Despite Figure 7 In the example of FIG. 1 , the operation of block 760 occurs before the operation of block 770, but the operations of blocks 760 and 770 may occur approximately simultaneously. For example, the charging circuit system 150 and 220 charges the first capacitor and discharges the second capacitor of the capacitor circuit system 155 and 228 approximately (preferably, explicitly) simultaneously.

[0122] The comparator circuit system 170, 233 determines whether the switch voltage is greater than the reference voltage. (Block 780). In some examples, Figure 1 and 2 The multiplexer circuit system 160, 230 supplies the reference voltage and the switch voltage to the comparator circuit system 170, 233. In such examples, the comparator circuit system 170, 233 compares the switch voltage and the reference voltage to control the current source circuit system 135, 220.

[0123] If the comparator circuit system 170, 233 determines that the switch voltage is not greater than the reference voltage (e.g., block 780 returns a "no" result), control continues back to block 780. In some examples, the comparator circuit system 170, 233 keeps the current source circuit system 135, 220 enabled (e.g., supplying current) until the switch voltage is greater than the reference voltage. In such example operations, once the switch voltage is greater than or equal to the reference voltage, the output of the comparator circuit system 170, 233 changes.

[0124] If the comparator circuit system 170, 233 determines that the switch voltage is greater than the reference voltage (e.g., block 780 returns a "yes" result), the comparator circuit system 170, 233 reduces the gate driver current. (Block 790). In some examples, the comparator circuit system 170, 233 disables the current source circuit system 135, 220 in response to determining that the switch voltage is greater than the reference voltage. Advantageously, the comparator circuit system 170, 233 reduces the gate driver current by disabling the current source circuit system 135, 220. Advantageously, the comparator circuit system 170, 233 reduces the slew rate of the transistor 216 by reducing the gate driver current. Advantageously, during the first duration, the transistor 216 has a relatively high slew rate, which has a relatively high power efficiency, and during the second duration, the transistor 216 has a lower slew rate, which prevents excessive stress on the motor 110. Advantageously, the gate driver circuit system 125, 210 improves power efficiency by controlling the transistor 216 using multiple slew rates.

[0125] Although reference Figure 7 The flowchart illustrated in FIG. 1 describes an example method, but implementations may also be used in this specification. Figure 1 , 2 , 3, 4 and 5. For example, the order of execution of the blocks may be changed, or some of the blocks described may be changed, eliminated, or combined. Similarly, additional operations may be included in the manufacturing process before, between, or after the blocks shown in the illustrated examples.

[0126] Figure 8 yes Figure 1 , 2 , 3 and 4 of the gate driver circuit system 125, 210 of the example switching operation timing diagram 800. Figure 8 In the example of FIG. 8 , timing diagram 800 illustrates an example drain voltage 810. Drain voltage 810 represents the voltage across which a switching event occurs. Figure 2 , 3 and 4 the voltage of transistor 216. Figure 8During the switching event of Figure 1 Motor 110 or Figure 2 , 3 The load 204 of 4 is coupled to the common terminal. At the first time 820, the external circuit system supplies a low-side control signal to the gate driver circuit system 125, 210 to turn on the transistor 216. At the first time 820, the voltage at the drain of the transistor 216 is a first voltage 830, which is approximately four hundred volts (V). Figure 8 In the example of , the first voltage 830 represents a first power supply voltage provided at the first power supply terminal.

[0127] Between the first time 820 and the second time 840, Figure 1 , 2 , 3 and 4 current source circuit systems 130, 135, 218, 220 each supply current to generate a gate drive current. Between the first time 820 and the second time 840, the gate drive current has a first magnitude and sets the slew rate of the transistor 216 to a relatively high value. Advantageously, between the first time 820 and the second time 840, the transistor 216 has a relatively high power efficiency in response to the relatively high slew rate.

[0128] Between the second time 840 and the third time 850, the drain voltage 810 is approximately equal to the second voltage 860, which is approximately two hundred volts. The second voltage 860 is a voltage approximately equal to half of the first voltage 830. Between the second time 840 and the third time 850, Figure 1 , 2 , 3 and 4, the comparator circuit systems 170, 233 determine that the switch voltage is greater than the reference voltage and disable the current source circuit systems 135, 220. Between the second time 840 and the third time 850, the comparator circuit systems 170, 233 reduce the gate drive current and the slew rate by disabling the current source circuit systems 135, 220. Advantageously, reducing the slew rate of the transistor 216 reduces the amount of stress applied to the motor 110 or the load 204 during the switching operation. Advantageously, the gate driver circuit systems 125, 210 reduce the gate drive current and the slew rate by disabling the current source circuit systems 135, 220. Figure 8 At least a portion of the switching operation has a relatively high slew rate to improve the power efficiency of the switching operation.

[0129] "Include" and "comprising" (and all forms and tenses thereof) are used herein as open-ended terms. Thus, whenever a claim employs any form of "include" or "comprising" (e.g., includes, comprises, includes, having, etc.) as a preamble or in any type of claim narrative, additional elements, terms, etc. may be present without exceeding the scope of the corresponding claim or narrative. As used herein, when the phrase "at least" is used as a transitional term, such as in the preamble of a claim, it is open in the same manner as the terms "include" and "comprising" are open. The term "and / or" when used in the form of, for example, A, B, and / or C, refers to any combination or subset of A, B, C, such as (1) only A, (2) only B, (3) only C, (4) A and B, (5) A and C, (6) B and C, or (7) A and B and C. As used herein in the context of describing structures, components, items, objects, and / or things, the phrase "at least one of A or B" refers to embodiments that include any of the following: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B. Similarly, as used herein in the context of describing structures, components, items, objects, and / or things, the phrase "at least one of A or B" refers to embodiments that include any of the following: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B. As used herein in the context of describing the execution or performance of a process, instruction, action, activity, etc., the phrase "at least one of A and B" refers to embodiments that include any of the following: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B. Similarly, as used herein in the context of describing the execution or performance of a process, instruction, action, activity, etc., the phrase "at least one of A or B" refers to an embodiment that includes any of the following: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B.

[0130] As used herein, singular references (e.g., "a", "an", "first", "second", etc.) do not exclude the plural. As used herein, the term "a" or "an" object refers to one or more of the objects described. The terms "a" (or "an"), "one or more" and "at least one" are used interchangeably herein. In addition, although listed separately, multiple components, elements or actions may be implemented by, for example, the same entity or object. In addition, although individual features may be included in different examples or claims, these features may also be combined together, and inclusion in different examples or claims does not mean that the combination of features is at least one of unfeasible or disadvantageous.

[0131] As used herein, unless otherwise stated, the term "above" describes the relationship of two parts relative to the earth. A first part is above a second part if the second part has at least one portion between the earth and the first part. Likewise, as used herein, a first part is "below" a second part when the first part is closer to the earth than the second part. As mentioned above, a first part can be above or below a second part, with one or more of the following: with other parts in between, with no other parts in between, with the first and second parts in contact, or with the first and second parts not in direct contact with each other.

[0132] As used in this patent, when it is stated that any part (e.g., a layer, film, region, area, or plate) is in any way located on (e.g., positioned on, located on, disposed on, or formed on, etc.) another part, it indicates that the referenced part is in contact with the other part, or that the referenced part is located on the other part with one or more intermediate parts located therebetween.

[0133] As used herein, unless otherwise indicated, connection references (e.g., attached, coupled, connected, and joined) may include intermediate members between the elements referenced by at least one of the connection reference or relative movement between those elements. Thus, connection references do not necessarily infer that two elements are directly connected or in fixed relation to each other. As used herein, stating that any part is "in contact with" another part is defined to mean that there are no intermediate parts between the two parts.

[0134] Unless otherwise specifically stated, descriptors such as "first", "second", "third", etc. are used herein without imposing or otherwise indicating a priority in a list, a physical order, a meaning of arrangement, or ordering in any way, but are merely used as at least one of a label or arbitrary name to distinguish elements to facilitate understanding of the described examples. In some examples, the descriptor "first" may be used to refer to an element in a specific embodiment, while the same element may be referred to in the technical solution by a different descriptor such as "second" or "third". In such cases, such descriptors are only used to clearly identify those elements within the context of the discussion (e.g., within the claims), where the elements may, for example, otherwise share the same name.

[0135] As used herein, "approximately" and "about" modify the subject matter / values ​​thereof to recognize the potential for variations that occur in real-world applications. For example, "approximately" and "about" may modify dimensions that may not be exact due to at least one of manufacturing tolerances or other real-world imperfections. For example, "approximately" and "about" may indicate that the dimensions may be within a tolerance range of + / - 10%, unless otherwise specified herein.

[0136] As used herein, "substantially real time" means occurring in a near-instantaneous manner, recognizing that there may be real-world delays in computing time, transmission, etc. Thus, unless otherwise specified, "substantially real time" means real time + 1 second.

[0137] As used herein, the phrase "communication," including variations thereof, encompasses one or a combination of direct communication or indirect communication through one or more intermediate components, and does not require direct physical (e.g., wired) communication or constant communication, but also includes selective communication at at least one of periodic intervals, predetermined intervals, non-periodic intervals, or one-time events.

[0138] As used herein, "programmable circuitry" is defined as including at least one of: (i) one or more special-purpose circuits (e.g., an application-specific circuit (ASIC)) that are structured to perform specific operations and include one or more semiconductor-based logic devices (e.g., electrical hardware implemented by one or more transistors), or (ii) one or more general-purpose semiconductor-based circuits that can be programmed with instructions to perform one or more specific functions or operations and include one or more semiconductor-based logic devices (e.g., electrical hardware implemented by one or more transistors). Examples of programmable circuit systems include a programmable microprocessor, such as: a central processing unit (CPU), which can execute a first instruction to perform one or more operations or functions; a field programmable gate array (FPGA), which can be programmed with a second instruction to configure or structure the FPGA to at least one of instantiate one or more operations or functions corresponding to the first instruction; a graphics processor unit (GPU), which can execute a first instruction to perform one or more operations or functions; a digital signal processor (DSP), which can execute a first instruction to perform one or more operations or functions; an XPU; a network processing unit (NPU); one or more microcontrollers, which can execute a first instruction to perform one or more operations or functions; or an integrated circuit, such as an application specific integrated circuit (ASIC). For example, an XPU may be implemented by a heterogeneous computing system that includes multiple types of programmable circuit systems (e.g., one or more FPGAs, one or more CPUs, one or more GPUs, one or more NPUs, one or more DSPs, etc., and any combination thereof) and orchestration technology (e.g., an application programming interface (API)) that can assign computing tasks to any of the multiple types of programmable circuit systems that are suitable and available to perform the computing tasks.

[0139] As used herein, an integrated circuit / circuitry is defined as one or more semiconductor packages that include one or more circuit elements, such as transistors, capacitors, inductors, resistors, current paths, diodes, etc. For example, an integrated circuit may be implemented as one or more of an ASIC, an FPGA, a chip, a microchip, a programmable circuitry, a semiconductor substrate coupling multiple circuit elements, a system on a chip (SoC), etc.

[0140] In this specification, the term "coupled" may encompass connections, communications, or signal paths that achieve a functional relationship consistent with this specification. For example, if device A generates a signal to control device B to perform an action: (a) in a first instance, device A is coupled to device B via a direct connection; or (b) in a second instance, if the intermediate component C does not change the functional relationship between device A and device B, then device A is coupled to device B through the intermediate component C, so that device B is controlled by device A via the control signal generated by device A.

[0141] A device "configured to" perform a task or function may be configured (e.g., at least one of programmed or hardwired) to perform the function when manufactured by a manufacturer or may be configurable (or reconfigurable) by a user after manufacture to perform at least one of the function and / or other additional or alternative functions. The configuration may be performed by at least one of firmware or software programming of the device, by at least one of the construction or layout of the hardware components and interconnections of the device, or a combination thereof.

[0142] As used herein, the terms "terminal", "node", "interconnection", "pin" and "lead" are used interchangeably. Unless specifically stated to the contrary, these terms are generally used to refer to an interconnection or its endpoint between device elements, circuit elements, integrated circuits, devices or other electronic or semiconductor components.

[0143] In this specification and claims, a "circuitry" described may include one or more circuits. A circuit or device described herein as including certain components may actually be adapted to be coupled to those components to form the described circuitry or device. For example, a structure described as including one or more semiconductor elements (e.g., transistors), one or more passive elements (e.g., one or a combination of resistors, capacitors, or inductors), or one or more sources (e.g., voltage sources and / or current sources) may alternatively include only semiconductor elements within a single physical device (e.g., at least one of a semiconductor die or an integrated circuit (IC) package), and may be adapted to be coupled to at least some of the passive elements or sources at or after the manufacturing time, for example by at least one of an end user or a third party, to form the described structure.

[0144] The circuits described herein can be reconfigured to include replaced components to provide functionality that is at least partially similar to the functionality available before the component replacement. Unless otherwise stated, components shown as resistors generally represent any one or more elements coupled in at least one manner in series or in parallel to provide the impedance amount represented by the displayed resistor. For example, a resistor or capacitor shown and described as a single component in this article may alternatively be a plurality of resistors or capacitors coupled in parallel between the same nodes, respectively. For example, a resistor or capacitor shown and described as a single component in this article may actually be a plurality of resistors or capacitors coupled in series between the same two nodes as a single resistor or capacitor, respectively. Although some elements of the described examples are included in the integrated circuit and other elements are outside the integrated circuit, in other example embodiments, additional or fewer features may be incorporated into the integrated circuit. In addition, some or all of the features shown as being outside the integrated circuit may be included in the integrated circuit, and some features described as being inside the integrated circuit may be incorporated outside the integrated circuit. As used herein, the term "integrated circuit" means one or more circuits that are at least one of: (i) incorporated in / on a semiconductor substrate; (ii) incorporated in a single semiconductor package; (iii) incorporated into the same module; or (iv) incorporated in / on the same printed circuit board.

[0145] Use of the phrase "ground" in the foregoing description includes at least one of chassis ground, ground line ground, floating ground, virtual ground, digital ground, common ground, or any other form of ground connection that is applicable or suitable for the teachings of this specification.

[0146] Modifications are possible in the described embodiments and other embodiments are possible within the scope of the claims.

Claims

1. A device comprising: a driver circuit system having terminals; a capacitor having terminals; a diode circuit system having a first terminal and a second terminal; a transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the transistor being coupled to the first terminal of the diode circuitry, the control terminal of the transistor being coupled to the terminal of the capacitor and the second terminal of the diode circuitry; as well as A current mirror circuit system has a first terminal and a second terminal, the first terminal of the current mirror circuit system is coupled to the terminal of the driver circuit system, and the second terminal of the current mirror circuit system is coupled to the second terminal of the transistor.

2. The apparatus of claim 1 , wherein the terminal of the capacitor is a first terminal, the capacitor further having a second terminal, the transistor is a first transistor, and the apparatus further comprises a second transistor having a first terminal and a control terminal, the first terminal of the transistor being coupled to the second terminal of the capacitor, the control terminal of the second transistor being coupled to the terminal of the driver circuitry and the second terminal of the current mirror circuitry.

3. The apparatus of claim 1 , wherein the transistor is a first transistor and the diode circuitry is a second transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the second transistor being coupled to the first terminal of the first transistor, the second terminal and the control terminal of the second transistor being coupled to the terminal of the capacitor and the control terminal of the first transistor.

4. The apparatus of claim 1 , wherein the transistor is a first transistor and the current mirror circuitry comprises: a second transistor having a first terminal and a control terminal; and A current scaling circuit system having a first terminal and a second terminal, wherein the first terminal of the current scaling circuit system is coupled to the terminal of the driver circuit system, and the second terminal of the current scaling circuit system is coupled to the second terminal of the first transistor, the first terminal of the second transistor, and the control terminal of the second transistor.

5. An apparatus according to claim 4, wherein the current scaling circuit system includes a third transistor having a first terminal and a control terminal, the first terminal of the third transistor is coupled to the terminal of the driver circuit system, and the control terminal of the third transistor is coupled to the second terminal of the first transistor, the first terminal of the second transistor, and the control terminal of the second transistor.

6. The apparatus of claim 1 , wherein the transistor is a first transistor, the current mirror circuitry further having a third terminal, and the apparatus further comprising a second transistor having a first terminal and a second terminal, the first terminal of the second transistor being coupled to the first terminal of the diode circuitry and the first terminal of the first transistor, the second terminal of the second transistor being coupled to the third terminal of the current mirror circuitry.

7. The apparatus of claim 6 , wherein the second transistor further has a control terminal, and the apparatus further comprises a third transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the third transistor being coupled to the second terminal of the first transistor and the second terminal of the current mirror circuit system, the second terminal of the third transistor being coupled to the third terminal of the current mirror circuit system and the second terminal of the second transistor, and the control terminal of the third transistor being coupled to the control terminal of the second transistor.

8. A device comprising: Power terminal; a driver circuit system having terminals; a diode circuit system having a first terminal and a second terminal; a current mirror circuit system having a first terminal, a second terminal and a third terminal, the first terminal of the current mirror circuit system being coupled to the power supply terminal and the first terminal of the diode circuit system, the second terminal of the current mirror circuit system being coupled to the second terminal of the diode circuit system; as well as A current scaling circuit system has a first terminal and a second terminal, the first terminal of the current scaling circuit system is coupled to the terminal of the driver circuit system, and the second terminal of the current scaling circuit system is coupled to the third terminal of the current mirror circuit system.

9. The apparatus of claim 8, further comprising: a capacitor having a first terminal and a second terminal, the first terminal of the capacitor being coupled to the second terminal of the diode circuitry and the second terminal of the current mirror circuitry; as well as A transistor having a first terminal and a control terminal, the first terminal of the transistor being coupled to the second terminal of the capacitor, the control terminal of the transistor being coupled to the terminal of the driver circuitry and the first terminal of the current scaling circuitry.

10. The apparatus of claim 8, wherein the diode circuitry is a transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the transistor being coupled to the power supply terminal and the first terminal of the current mirror circuitry, the second terminal of the transistor and the control terminal being coupled to the second terminal of the current mirror circuitry.

11. The apparatus of claim 8, wherein the current mirror circuit system is a transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the transistor being coupled to the power supply terminal and the first terminal of the diode circuit system, the second terminal of the transistor being coupled to the second terminal of the current scaling circuit system, and the control terminal of the transistor being coupled to the second terminal of the diode circuit system.

12. The apparatus of claim 8, wherein the current mirror circuitry is a first current mirror circuitry and the current scaling circuitry comprises: a first transistor having a first terminal and a control terminal; and a second transistor having a first terminal and a control terminal, the first terminal of the second transistor being coupled to the terminal of the driver circuit system, and the control terminal of the second transistor being coupled to the third terminal of the first current mirror circuit system, the first terminal of the first transistor, and the control terminal of the first transistor.

13. The device of claim 8, wherein the current scaling circuit system further has a third terminal, and the device further comprises a transistor having a first terminal and a second terminal, the first terminal of the transistor being coupled to the power supply terminal, the first terminal of the diode circuit system, and the first terminal of the current mirror circuit system, and the second terminal of the transistor being coupled to the third terminal of the current scaling circuit system.

14. The apparatus of claim 13 , wherein the transistor is a first transistor, the first transistor further having a control terminal, and the apparatus further comprises a second transistor having a first terminal, a second terminal and a control terminal, the first terminal of the second transistor being coupled to the second terminal of the current mirror circuit system and the second terminal of the current scaling circuit system, the second terminal of the second transistor being coupled to the third terminal of the current scaling circuit system and the second terminal of the first transistor, the control terminal of the second transistor being coupled to the control terminal of the first transistor.

15. An apparatus comprising: a first transistor having a first terminal and a control terminal; a capacitor having a first terminal and a second terminal, the first terminal of the capacitor being coupled to the first terminal of the first transistor; a second transistor having a first terminal and a control terminal; a current mirror circuit system having a first terminal and a second terminal, the first terminal of the current mirror circuit system being coupled to the second terminal of the capacitor, the first terminal of the second transistor, and the control terminal of the second transistor; as well as A current scaling circuit system has a first terminal and a second terminal, the first terminal of the current scaling circuit system is coupled to the second terminal of the current mirror circuit system, and the second terminal of the current scaling circuit system is coupled to the control terminal of the first transistor.

16. The apparatus of claim 15 , wherein the second transistor further has a second terminal, and the current mirror circuitry is a third transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the third transistor being coupled to the second terminal of the second transistor, the second terminal of the third transistor being coupled to the first terminal of the current scaling circuitry, and the control terminal of the third transistor being coupled to the second terminal of the capacitor, the first terminal of the second transistor, and the control terminal of the second transistor.

17. The apparatus of claim 15, wherein the current mirror circuitry is a first current mirror circuitry and the current scaling circuitry comprises: a second current mirror circuit system having a first terminal and a second terminal; and a third transistor having a first terminal, a second terminal and a control terminal, the first terminal of the third transistor being coupled to the control terminal of the first transistor, the second terminal of the third transistor being coupled to the first terminal of the second current mirror circuit system, and the control terminal of the third transistor being coupled to the second terminal of the first current mirror circuit system and the second terminal of the second current mirror circuit system.

18. The apparatus of claim 17 , wherein the second current mirror circuit system is a fourth transistor having a first terminal, a second terminal, and a control terminal, the first terminal and the control terminal of the fourth transistor being coupled to the second terminal of the first current mirror circuit system, the second terminal of the second current mirror circuit system, and the control terminal of the third transistor, and the second terminal of the fourth transistor being coupled to the second terminal of the third transistor.

19. The apparatus of claim 15, wherein the second transistor further has a second terminal, the current mirror circuit system further has a third terminal, the current scaling circuit system further has a third terminal, and the apparatus further comprises a third transistor having a first terminal and a second terminal, the first terminal of the third transistor being coupled to the second terminal of the second transistor and the third terminal of the current mirror circuit system, the second terminal of the third transistor being coupled to the third terminal of the current scaling circuit system.

20. The apparatus of claim 19, wherein the third transistor further has a control terminal, and the apparatus further comprises a fourth transistor having a first terminal, a second terminal and a control terminal, the first terminal of the fourth transistor being coupled to the second terminal of the current mirror circuit system and the first terminal of the current scaling circuit system, the second terminal of the fourth transistor being coupled to the third terminal of the current scaling circuit system and the second terminal of the third transistor, and the control terminal of the fourth transistor being coupled to the control terminal of the third transistor.

Images