Gain selection circuit system applied to wide-gain-range PGA

Abstract

The invention discloses a gain selection circuit system applied to a wide gain range PGA. The gain selection circuit system comprises an AMP amplifier, an R10 feedback resistor, a first gain variable module circuit and a second gain variable module circuit. The input end of the first gain variable module circuit is used as a VIP signal input end, and the input end of the second gain variable module circuit is used as a VIN signal input end; the positive input end and the negative input end of the AMP amplifier are electrically connected with the output end of the first gain variable module circuit and the output end of the second gain variable module circuit respectively. The output end of the AMP amplifier is electrically connected with the negative input end of the AMP amplifier through an R10 feedback resistor. The first gain variable module circuit and the second gain variable module circuit respectively control the gains of input signals of the VIP signal input end and the VIN signal input end to select different gear gains through switching on and switching off of internal switches, and input the input signals into the positive input end and the negative input end of the AMP amplifier respectively; the total resistance area and introduced noise are reduced; the fixed output impedance ensures the stability of the circuit.

Description

Technical Field

[0001] The present invention relates to the technical field of amplifier circuits, and in particular to a gain selection circuit system applied to a PGA with a wide gain range. Background Art

[0002] Programmable gain amplifiers (PGAs) are widely used at the front end of analog-to-digital converters (ADCs) to amplify input signals by appropriate multiples, stabilize the signal amplitude within the processable range of the ADC, and enable the ADC to obtain a higher signal-to-noise ratio, thereby improving the performance of the entire system. For input signals with large amplitude variations, the PGA needs to have a wider gain adjustment range to achieve appropriate processing of the input signal amplitude. For example, in the application scenario of bioelectric signals, the PGA requires high gain to collect and process weak signals. To ensure the processing of lower amplitude signals, especially in the case of high gain, the PGA equivalent input noise is required to be low enough to prevent the input signal from being submerged in the noise.

[0003] Traditional PGA often uses Figure 4 The resistor network shown in the figure performs gain control, and different gains are achieved by changing the resistance value of the feedback resistor. This structure has simple gain control and relatively accurate gain, but this structure has huge defects in high-gain application scenarios. First, when achieving high gain, the PGA gain is equal to the feedback resistance value divided by the input resistance value. To achieve a 256-fold gain, the feedback resistor requires 256 unit resistors. When the unit resistor is selected to be larger, a large area will be consumed. At the same time, if the resistance value is too large, the thermal noise of the resistor will increase, which will increase the overall noise of the PGA, which is contrary to the design requirements of low noise. However, if the unit resistor is selected to be smaller, it will cause serious resistor mismatch and affect the stability of the gain. Secondly, when achieving different gains, the feedback resistor value varies greatly, which will affect the output impedance of the circuit and is not easy to match with the subsequent circuit. An additional buffer circuit is required to maintain matching. Moreover, when switching between different gains, different switches must be controlled to open and close. The signal amplitude at both ends of the switch varies greatly, which will cause a large change in the switch on-resistance, affecting the linearity of the gain. To reduce the switch effect, the switch area needs to be increased, and reducing the switch on-resistance will consume a lot of area. Summary of the invention

[0004] Purpose of the invention: In order to overcome the deficiencies in the prior art, the present invention provides a gain selection circuit system for a PGA with a wide gain range, with fixed feedback resistance. The gain is changed by changing the series-parallel connection of input resistances, and the input resistances are divided into three groups to achieve high, medium and low gains respectively, thereby reducing the number of unit resistances. Under the condition of the same unit resistance value, the total resistance area and the introduced noise are reduced.

[0005] Technical solution: To achieve the above-mentioned purpose, the present invention provides a gain selection circuit system for a wide gain range PGA, comprising an AMP amplifier, an R10 feedback resistor, a first gain variable module circuit and a second gain variable module circuit; the positive input terminal of the AMP amplifier is electrically connected to the output terminal of the first gain variable module circuit, and the input terminal of the first gain variable module circuit serves as a VIP signal input terminal; the negative input terminal of the AMP amplifier is electrically connected to the output terminal of the second gain variable module circuit, and the input terminal of the second gain variable module circuit serves as a VIN signal input terminal; the output terminal of the AMP amplifier is electrically connected to the negative input terminal of the AMP amplifier through the R10 feedback resistor; the first gain variable module circuit and the second gain variable module circuit are both controlled by the closing and opening of an internal switch to respectively control the gain size of the input signal of the VIP signal input terminal and the VIN signal input terminal to select different gear gains, and are respectively input into the positive input terminal and the negative input terminal of the AMP amplifier.

[0006] Furthermore, the first variable gain module circuit includes a first low-range variable gain circuit, a first mid-range variable gain circuit and a first high-range variable gain circuit; the second variable gain module circuit includes a second low-range variable gain circuit, a second mid-range variable gain circuit and a second high-range variable gain circuit; the first mid-range variable gain circuit is connected in parallel with the R4 resistor in the first low-range variable gain circuit, and the first high-range variable gain circuit is connected in parallel with the SWP8 switch in the first low-range variable gain circuit; the second mid-range variable gain circuit is connected in parallel with the R8 resistor in the first low-range variable gain circuit, and the first high-range variable gain circuit is connected in parallel with the SWN8 switch in the first low-range variable gain circuit.

[0007] Furthermore, the first low-range variable gain circuit includes an R1 resistor, an R2 resistor, an R3 resistor and an R4 resistor, one end of the R1 resistor serves as a VIP signal input end, the other end of the R1 resistor is electrically connected to one end of the R2 resistor, the other end of the R2 resistor is electrically connected to one end of the R3 resistor, and the other end of the R2 resistor is electrically connected to one end of the R1 resistor through a SWP1 switch; the other end of the R3 resistor is electrically connected to one end of the R4 resistor, and the other end of the R3 resistor is electrically connected to one end of the R1 resistor through a SWP2 switch; the other end of the R4 resistor is electrically connected to the positive input end of the AMP amplifier through a SWP8 switch, and the other end of the R4 resistor is electrically connected to one end of the R1 resistor through a SWP3 switch.

[0008] Furthermore, the second low-range variable gain circuit includes R5 resistor, R6 resistor, R7 resistor and R8 resistor, one end of the R5 resistor serves as the VIP signal input end, the other end of the R5 resistor is electrically connected to one end of the R6 resistor, the other end of the R6 resistor is electrically connected to one end of the R7 resistor, and the other end of the R6 resistor is electrically connected to one end of the R5 resistor through the SWN1 switch; the other end of the R7 resistor is electrically connected to one end of the R8 resistor, and the other end of the R7 resistor is electrically connected to one end of the R5 resistor through the SWN2 switch; the other end of the R8 resistor is electrically connected to the negative input end of the AMP amplifier through the SWN8 switch, and the other end of the R8 resistor is electrically connected to one end of the R5 resistor through the SWN3 switch.

[0009] Furthermore, the first mid-range variable gain circuit includes a SWP4 switch, a SWP5 switch, a SWP6 switch, a SWP7 switch and seven RP resistors with the same resistance value; the seven RP resistors in the first mid-range variable gain circuit constitute three RP resistor parallel circuits composed of two RP resistors, and the two RP resistors in any RP resistor parallel circuit are connected in parallel; one end of the three RP resistor parallel circuit of the first mid-range variable gain circuit and one end of another single RP resistor are electrically connected to one end of the R4 resistor; the other end of the three RP resistor parallel circuit of the first mid-range variable gain circuit is electrically connected to the other end of the R4 resistor through the SWP5 switch, the SWP6 switch and the SWP7 switch, respectively, and the other end of another single RP resistor is electrically connected to the other end of the R4 resistor through the SWP4 switch.

[0010] Furthermore, the second mid-range variable gain circuit includes a SWN4 switch, a SWN5 switch, a SWN6 switch, a SWN7 switch and seven RN resistors with the same resistance value; the seven RN resistors in the second mid-range variable gain circuit constitute three RN resistor parallel circuits composed of two RN resistors, and the two RN resistors in any RN resistor parallel circuit are connected in parallel; one end of the three RN resistor parallel circuit of the second mid-range variable gain circuit and one end of another single RN resistor are electrically connected to one end of the R8 resistor; the other end of the three RN resistor parallel circuit of the second mid-range variable gain circuit is electrically connected to the other end of the R8 resistor through the SWN5 switch, the SWN6 switch and the SWN7 switch respectively, and the other end of another single RN resistor is electrically connected to the other end of the R8 resistor through the SWN4 switch.

[0011] Furthermore, the first high-end variable gain circuit and the second high-end variable gain circuit each include sixteen R resistors with the same resistance value; the sixteen R resistors in the first high-end variable gain circuit constitute four R resistor parallel circuits composed of four R resistors, and the R resistors in the four R resistor parallel circuits are all connected in parallel with each other; one end of the four R resistor parallel circuits of the first high-end variable gain circuit are electrically connected to one end of the SWP8 switch, and the other end of the four R resistor parallel circuits of the first high-end variable gain circuit are electrically connected to the other end of the SWP8 switch through the SWP9 switch, the SWP10 switch, the SWP11 switch and the SWP12 switch respectively.

[0012] Furthermore, the sixteen R resistors in the second high-end variable gain circuit constitute four R resistor parallel circuits consisting of four R resistors, and the R resistors in the four R resistor parallel circuits are connected in parallel with each other; one end of the four R resistor parallel circuits of the second high-end variable gain circuit are electrically connected to one end of the SWN8 switch, and the other end of the four R resistor parallel circuits of the second high-end variable gain circuit are electrically connected to the other end of the SWN8 switch through the SWN9 switch, the SWN10 switch, the SWN11 switch and the SWN12 switch respectively.

[0013] Furthermore, all switches in the first variable gain module circuit and the second variable gain module circuit are T-type switch circuits, and the T-type switch circuit includes an M1 transistor, an M2 transistor and an M3 transistor; the source of the M1 transistor and the source of the M2 transistor are electrically connected to the drain of the M3 transistor, and the drain of the M1 transistor and the drain of the M2 transistor serve as the two ends of the T-type switch circuit respectively; the source of the M3 transistor is electrically connected to the VSS power supply, the gate of the M1 transistor and the gate of the M2 transistor input an EN enable signal, and the gate of the M3 transistor inputs an ENB enable signal; when the EN enable signal is at a high level, the ENB enable signal is at a low level, and the two ends of the T-type switch circuit are closed; when the EN enable signal is at a low level, the ENB enable signal is at a high level, and the two ends of the T-type switch circuit are disconnected.

[0014] Furthermore, it also includes an enable control circuit; the enable control circuit respectively outputs an EN enable signal and an ENB enable signal to control the closing and opening of switches in the first variable gain module circuit and the second variable gain module circuit; the closing and opening of the switch in the first variable gain module circuit controls the input signal of the VIP input terminal to select different gears of gain; the closing and opening of the switch in the second variable gain module circuit controls the input signal of the VIN input terminal to select different gears of gain, and the AMP amplifier output terminal outputs the gain-amplified signal.

[0015] Beneficial effects: The present invention is a gain selection circuit system for a wide gain range PGA, with fixed feedback resistance, and the gain is changed by changing the input resistance series-parallel mode. The input resistance is divided into three groups to achieve high, medium and low gains respectively, and the number of unit resistors is reduced. Under the condition of the same unit resistance value, the total resistance area and the introduced noise are reduced; and the feedback resistance is constant, with a fixed output impedance, and the matching with the subsequent circuit is easy to achieve. The change of the circuit pole caused by changing the input resistance can be improved by compensation, and the stability of the circuit can be guaranteed. The switch is located at the input end of the signal, and the amplitude change of the switch signal is small relative to the signal in the feedback loop, and the switch conduction change is relatively small. At the same time, because the structure of the present invention uses a small number of resistors, the unit resistance value can be appropriately increased under the premise of ensuring the area and noise, and the influence of the switch conduction resistance change on the linearity is reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 A gain selection circuit diagram for a PGA with a wide gain range is provided;

[0017] Figure 2 is a circuit diagram of a T-type switch circuit;

[0018] Figure 3 It is the equivalent circuit diagram of T-type switch circuit;

[0019] Figure 4 This is the circuit diagram of the traditional PGA structure. DETAILED DESCRIPTION

[0020] The present invention will be further described below in conjunction with the accompanying drawings.

[0021] like Figure 1 As shown, a gain selection circuit system for a wide gain range PGA includes an AMP amplifier 1, an R10 feedback resistor, a first gain variable module circuit and a second gain variable module circuit; the positive input terminal of the AMP amplifier 1 is electrically connected to the output terminal of the first gain variable module circuit, and the input terminal of the first gain variable module circuit serves as the VIP signal input terminal; the negative input terminal of the AMP amplifier 1 is electrically connected to the output terminal of the second gain variable module circuit, and the input terminal of the second gain variable module circuit serves as the VIN signal input terminal; the output terminal of the AMP amplifier 1 is electrically connected to the negative input terminal of the AMP amplifier 1 through the R10 feedback resistor; the first gain variable module circuit and the second gain variable module circuit are both controlled by the closing and opening of the internal switch to select different gear gains of the input signals of the VIP signal input terminal and the VIN signal input terminal, and are respectively input into the positive input terminal and the negative input terminal of the AMP amplifier 1. The positive input terminal of the AMP amplifier 1 is electrically connected to the circuit or voltage outputting the reference voltage VREF through the R9 resistor.

[0022] like Figure 1 As shown, the first variable gain module circuit includes a first low-range variable gain circuit 2, a first mid-range variable gain circuit 4 and a first high-range variable gain circuit 6; the second variable gain module circuit includes a second low-range variable gain circuit 3, a second mid-range variable gain circuit 5 and a second high-range variable gain circuit 7; the input end of the first low-range variable gain circuit 2 serves as a VIP signal input end, and the output end of the first low-range variable gain circuit 2 is electrically connected to the positive input end of the AMP amplifier 1; the first mid-range variable gain circuit 4 is connected in parallel with the R4 resistor in the first low-range variable gain circuit 2, and the first high-range variable gain circuit 6 is connected in parallel with the SWP8 switch in the first low-range variable gain circuit 2; the input end of the second low-range variable gain circuit 3 serves as a VIN signal input end, and the output end of the second low-range variable gain circuit 3 is electrically connected to the negative input end of the AMP amplifier 1; the second mid-range variable gain circuit 5 is connected in parallel with the R8 resistor in the first low-range variable gain circuit 3, and the first high-range variable gain circuit 7 is connected in parallel with the SWN8 switch in the first low-range variable gain circuit 3.

[0023] In the gain selection circuit system applied to the wide gain range PGA, all resistors in the first low-range variable gain circuit 2, the first mid-range variable gain circuit 4, the first high-range variable gain circuit 6, the second low-range variable gain circuit 3, the second mid-range variable gain circuit 5 and the second high-range variable gain circuit 7 are input resistors. The first low-range variable gain circuit 2 and the second low-range variable gain circuit 3 realize the low-range gain of the AMP amplifier 1, and realize 1 times, 2 times and 4 times gain in the low-range gain; the first mid-range variable gain circuit 4 and the second mid-range variable gain circuit 5 realize the mid-range gain of the AMP amplifier 1, and realize 8 times, 16 times and 32 times gain in the mid-range gain; the first high-range variable gain circuit 6 and the second high-range variable gain circuit 7 realize the high-range gain of the AMP amplifier 1, and realize 64 times, 128 times and 256 times gain in the high-range gain.

[0024] The first low-range variable gain circuit 2 can realize the working state of the low-range gain of the VIP signal input at the VIP signal input end, and realize 1 times, 2 times or 4 times the gain of the VIP signal respectively; the second low-range variable gain circuit 3 can realize the working state of the low-range gain of the VIN signal input at the VIN signal input end, and realize 1 times, 2 times or 4 times the gain of the VIN signal respectively. The first mid-range variable gain circuit 4 can realize the working state of the mid-range gain of the VIP signal input at the VIP signal input end, and realize 8 times, 16 times or 32 times the gain of the VIP signal respectively; the second mid-range variable gain circuit 5 can realize the working state of the mid-range gain of the VIN signal input at the VIN signal input end, and realize 8 times, 16 times or 32 times the gain of the VIN signal respectively. The first high-range variable gain circuit 6 can realize the working state of the high-range gain of the VIP signal input at the VIP signal input terminal, and realize 64 times, 128 times or 256 times gain of the VIP signal respectively; the second high-range variable gain circuit 7 can realize the working state of the high-range gain of the VIN signal input at the VIN signal input terminal, and realize 64 times, 128 times or 256 times gain of the VIN signal respectively.

[0025] like Figure 1 As shown, the first low-range variable gain circuit 2 includes an R1 resistor, an R2 resistor, an R3 resistor and an R4 resistor, one end of the R1 resistor serves as a VIP signal input end, the other end of the R1 resistor is electrically connected to one end of the R2 resistor, the other end of the R2 resistor is electrically connected to one end of the R3 resistor, and the other end of the R2 resistor is electrically connected to one end of the R1 resistor through a SWP1 switch; the other end of the R3 resistor is electrically connected to one end of the R4 resistor, and the other end of the R3 resistor is electrically connected to one end of the R1 resistor through a SWP2 switch; the other end of the R4 resistor is electrically connected to the positive input end of the AMP amplifier 1 through a SWP8 switch, and the other end of the R4 resistor is electrically connected to one end of the R1 resistor through a SWP3 switch.

[0026] like Figure 1 As shown, the second low-range variable gain circuit 3 includes R5 resistor, R6 resistor, R7 resistor and R8 resistor, one end of the R5 resistor is used as the VIP signal input end, the other end of the R5 resistor is electrically connected to one end of the R6 resistor, the other end of the R6 resistor is electrically connected to one end of the R7 resistor, and the other end of the R6 resistor is electrically connected to one end of the R5 resistor through the SWN1 switch; the other end of the R7 resistor is electrically connected to one end of the R8 resistor, and the other end of the R7 resistor is electrically connected to one end of the R5 resistor through the SWN2 switch; the other end of the R8 resistor is electrically connected to the negative input end of the AMP amplifier 1 through the SWN8 switch, and the other end of the R8 resistor is electrically connected to one end of the R5 resistor through the SWN3 switch.

[0027] like Figure 1As shown, the first mid-range variable gain circuit 4 includes a SWP4 switch, a SWP5 switch, a SWP6 switch, a SWP7 switch and seven RP resistors with the same resistance value; the seven RP resistors in the first mid-range variable gain circuit 4 constitute three RP resistor parallel circuits composed of two RP resistors, and the two RP resistors in any RP resistor parallel circuit are connected in parallel; one end of the three RP resistor parallel circuit of the first mid-range variable gain circuit 4 and one end of another single RP resistor are electrically connected to one end of the R4 resistor; the other end of the three RP resistor parallel circuit of the first mid-range variable gain circuit 4 is electrically connected to the other end of the R4 resistor through the SWP5 switch, the SWP6 switch and the SWP7 switch respectively, and the other end of another single RP resistor is electrically connected to the other end of the R4 resistor through the SWP4 switch.

[0028] One end of the first RP resistor parallel circuit in the first mid-range variable gain circuit 4 is electrically connected to one end of the R4 resistor, and the other end of the first RP resistor parallel circuit is electrically connected to the other end of the R4 resistor through the SWN5 switch; one end of the second RP resistor parallel circuit in the first mid-range variable gain circuit 4 is electrically connected to one end of the R4 resistor, and the other end of the second RP resistor parallel circuit is electrically connected to the other end of the R4 resistor through the SWN6 switch; one end of the third RP resistor parallel circuit in the first mid-range variable gain circuit 4 is electrically connected to one end of the R4 resistor, and the other end of the third RP resistor parallel circuit is electrically connected to the other end of the R4 resistor through the SWN7 switch; one end of another single RP resistor in the first mid-range variable gain circuit 4 is electrically connected to one end of the R4 resistor, and the other end of another single RN resistor is electrically connected to the other end of the R4 resistor through the SWN4 switch.

[0029] like Figure 1 As shown, the second mid-range variable gain circuit 5 includes a SWN4 switch, a SWN5 switch, a SWN6 switch, a SWN7 switch and seven RN resistors with the same resistance value; the seven RN resistors in the second mid-range variable gain circuit 5 constitute three RN resistor parallel circuits composed of two RN resistors, and the two RN resistors in any RN resistor parallel circuit are connected in parallel; one end of the three RN resistor parallel circuit of the second mid-range variable gain circuit 5 and one end of another single RN resistor are electrically connected to one end of the R8 resistor; the other end of the three RN resistor parallel circuit of the second mid-range variable gain circuit 5 is electrically connected to the other end of the R8 resistor through the SWN5 switch, the SWN6 switch and the SWN7 switch respectively, and the other end of another single RN resistor is electrically connected to the other end of the R8 resistor through the SWN4 switch.

[0030] One end of the first RN resistor parallel circuit in the second mid-range variable gain circuit 5 is electrically connected to one end of the R8 resistor, and the other end of the first RN resistor parallel circuit is electrically connected to the other end of the R8 resistor through the SWN5 switch; one end of the second RN resistor parallel circuit in the second mid-range variable gain circuit 5 is electrically connected to one end of the R8 resistor, and the other end of the second RN resistor parallel circuit is electrically connected to the other end of the R8 resistor through the SWN6 switch; one end of the third RN resistor parallel circuit in the second mid-range variable gain circuit 5 is electrically connected to one end of the R8 resistor, and the other end of the third RN resistor parallel circuit is electrically connected to the other end of the R8 resistor through the SWN7 switch; one end of another single RN resistor in the second mid-range variable gain circuit 5 is electrically connected to one end of the R8 resistor, and the other end of the other single RN resistor is electrically connected to the other end of the R8 resistor through the SWN4 switch.

[0031] like Figure 1 As shown, the first high-end variable gain circuit 6 and the second high-end variable gain circuit 7 each include sixteen R resistors with the same resistance value; the sixteen R resistors in the first high-end variable gain circuit 6 constitute four R resistor parallel circuits composed of four R resistors, and the R resistors in the four R resistor parallel circuits are all connected in parallel with each other; one end of the four R resistor parallel circuits of the first high-end variable gain circuit 6 is electrically connected to one end of the SWP8 switch, and the other end of the four R resistor parallel circuits of the first high-end variable gain circuit 6 is electrically connected to the other end of the SWP8 switch through the SWP9 switch, the SWP10 switch, the SWP11 switch and the SWP12 switch respectively.

[0032] One end of the first R resistor parallel circuit in the first high-end variable gain circuit 6 is electrically connected to one end of the SWP8 switch, and the other end of the first R resistor parallel circuit is electrically connected to the other end of the SWP8 switch through the SWP9 switch; one end of the second R resistor parallel circuit in the first high-end variable gain circuit 6 is electrically connected to one end of the SWP8 switch, and the other end of the second R resistor parallel circuit is electrically connected to the other end of the SWP8 switch through the SWP10 switch; one end of the third R resistor parallel circuit in the first high-end variable gain circuit 6 is electrically connected to one end of the SWP8 switch, and the other end of the third R resistor parallel circuit is electrically connected to the other end of the SWP8 switch through the SWP11 switch; one end of the fourth R resistor parallel circuit in the first high-end variable gain circuit 6 is electrically connected to one end of the SWP8 switch, and the other end of the fourth R resistor parallel circuit is electrically connected to the other end of the SWP8 switch through the SWP12 switch.

[0033] like Figure 1As shown, the sixteen R resistors in the second high-end variable gain circuit 7 constitute four R resistor parallel circuits composed of four R resistors, and the R resistors in the four R resistor parallel circuits are all connected in parallel with each other; one end of the four R resistor parallel circuits of the second high-end variable gain circuit 7 is electrically connected to one end of the SWN8 switch, and the other end of the four R resistor parallel circuits of the second high-end variable gain circuit 7 is electrically connected to the other end of the SWN8 switch through the SWN9 switch, the SWN10 switch, the SWN11 switch and the SWN12 switch respectively.

[0034] One end of the first R resistor parallel circuit in the second high-end variable gain circuit 7 is electrically connected to one end of the SWN8 switch, and the other end of the first R resistor parallel circuit is electrically connected to the other end of the SWN8 switch through the SWN9 switch; one end of the second R resistor parallel circuit in the second high-end variable gain circuit 7 is electrically connected to one end of the SWP8 switch, and the other end of the second R resistor parallel circuit is electrically connected to the other end of the SWN8 switch through the SWN10 switch; one end of the third R resistor parallel circuit in the second high-end variable gain circuit 7 is electrically connected to one end of the SWN8 switch, and the other end of the third R resistor parallel circuit is electrically connected to the other end of the SWN8 switch through the SWN11 switch; one end of the fourth R resistor parallel circuit in the second high-end variable gain circuit 7 is electrically connected to one end of the SWN8 switch, and the other end of the fourth R resistor parallel circuit is electrically connected to the other end of the SWN8 switch through the SWN12 switch.

[0035] like Figure 2 As shown, all switches in the first variable gain module circuit and the second variable gain module circuit are T-type switch circuits, and the T-type switch circuit includes an M1 transistor 11, an M2 transistor 12, and an M3 transistor 13; the source of the M1 transistor 11 and the source of the M2 transistor 12 are electrically connected to the drain of the M3 transistor 13, and the drain of the M1 transistor 11 and the drain of the M2 transistor 12 serve as two ends of the T-type switch circuit respectively; the source of the M3 transistor 13 is electrically connected to the VSS power supply, the gate of the M1 transistor 11 and the gate of the M2 transistor 12 input the EN enable signal, and the gate of the M3 transistor 13 inputs the ENB enable signal; the source of the M3 transistor 13 is electrically connected to the VSS power supply, and the M1 transistor 11, the M2 transistor 12, and the M3 transistor 13 are all NMOS transistors as switch MOS transistors.

[0036] The gain selection circuit system applied to the wide gain range PGA also includes an enable control circuit; the enable control circuit outputs an EN enable signal and an ENB enable signal to control the closing and opening of switches in the first gain variable module circuit and the second gain variable module circuit, respectively. The closing and opening of the switch in the first gain variable module circuit controls the input signal of the VIP input terminal to select the gain of different gears; the closing and opening of the switch in the second gain variable module circuit controls the input signal of the VIN input terminal to select the gain of different gears, and the output terminal of the AMP amplifier 1 outputs the gain-amplified signal. The gain of the input signal of the VIN input terminal and the VIP input terminal is controlled by the cooperation of the enable control circuit and the first gain variable module circuit and the second gain variable module circuit, so that the signal input by the PGA is expanded, the range of the PGA input signal is expanded, and the PGA outputs the signal that is finally gained and amplified.

[0037] In order to reduce the coupling of signals through switches, improve signal isolation, and prevent large currents from occurring when switches are turned on, SWP1 switch to SWP12 switch and SWN1 switch to SWN12 switch are all T-type switch circuits; the closing and opening of switches in the first variable gain module circuit and the second variable gain module circuit are controlled by setting an enabling circuit that outputs EN enable signals and ENB enable signals.

[0038] like Figure 3 As shown, it is an equivalent circuit of a T-type switch circuit, in which the S1 switch corresponds to the M1 transistor 11, the S2 switch corresponds to the M2 transistor 12, and the S3 switch corresponds to the M3 transistor 13; when the EN enable signal is high, the ENB enable signal is low, the M1 transistor 11 and the M2 transistor 12 are turned on, and the M3 transistor 13 is turned off; S1 and S2 are closed, and S3 is turned off; the two ends of the T-type switch circuit are closed and connected, and the signal can be transmitted from the IN end to the OUT end through the M1 transistor 11 and the M2 transistor 12. When the EN enable signal is low, the ENB enable signal is high, the M1 transistor 11 and the M2 transistor 12 are turned off, and the M3 transistor 13 is turned on; S1 and S2 are turned off, and S3 is closed; the two ends of the T-type switch circuit are disconnected, and the intermediate level is placed at VSS, and the signal cannot be transmitted from the IN end to the OUT end through the M1 transistor 11 and the M2 transistor 12.

[0039] The VIP signal input end controls the gain of the positive input end of the AMP amplifier 1 through a circuit composed of three groups of input resistors, namely, a first low-range variable gain circuit 2, a first mid-range variable gain circuit 4 and a first high-range variable gain circuit 6; the VIN signal input end controls the gain of the positive input end of the AMP amplifier 1 through a circuit composed of three groups of input resistors, namely, a second low-range variable gain circuit 3, a second mid-range variable gain circuit 5 and a second high-range variable gain circuit 7; the AMP amplifier 1 is an amplifier with dual-end input and single-end output.

[0040] A gain selection circuit system applied to a wide gain range PGA can realize at least 9 gains of 1, 2, 4, 8, 16, 32, 64, 128 and 256; a low-range variable gain circuit, a mid-range variable gain circuit and a high-range variable gain circuit respectively realize 3 gains of low, mid and high. The R1 resistor, R2 resistor, R3 resistor and R4 resistor in the first low-range variable gain circuit 2 are all 4R resistors, and their resistance value can be 4Ω; the R5 resistor, R6 resistor, R7 resistor and R8 resistor in the second low-range variable gain circuit 3 are all 4R resistors, and their resistance value can be 4Ω; 1, 2, 4 times gain can be realized by connecting 4 4R resistors in series in the low-range variable gain circuit. The seven resistors in the first mid-range variable gain circuit 4 are all 4R resistors, and their resistance value can be 4Ω; the seven resistors in the second mid-range variable gain circuit 5 are all 4R resistors, and their resistance value can be 4Ω; 8, 16, 32 times gain can be realized by connecting 8 4R resistors in parallel in the mid-range variable gain circuit. The sixteen resistors of the first high-range variable gain circuit 6 are all R resistors, and their resistance value can be 1Ω; the sixteen resistors of the second high-range variable gain circuit 7 are all R resistors, and their resistance value can be 1Ω; the 16 R resistors in the high-range variable gain circuit are connected in parallel to achieve 64, 128, and 256 times gain. The R10 feedback resistor is 16R, and its resistance value can be 16Ω; R9 is 16R, and its resistance value can be 16Ω. The corresponding relationship between the input resistance value and the gain is shown in Table 1.

[0041] Table 1 Input resistance and gain correspondence table

[0042]

[0043]

[0044] By controlling the closing and opening of each switch in the low-range variable gain circuit, the middle-range variable gain circuit and the high-range variable gain circuit, the resistance value of the input resistor is changed;

[0045] The low-range variable gain circuit realizes low-range gain; when the SWP2 switch, SWP8 switch, SWN2 switch and SWN8 switch are all closed, and the other switches are all open; the VIP signal input terminal inputs the signal to the positive input terminal of AMP amplifier 1 through the R4 resistor, realizing a 4-fold gain of the VIP signal; the VIN signal input terminal inputs the signal to the negative input terminal of AMP amplifier 1 through the R8 resistor, realizing a 4-fold gain of the VIN signal. Taking the VIN signal input terminal as an example, the input resistance is 4R at this time, plus the on-resistance of the SWN2 switch and the SWN7 switch, realizing a 4-fold gain of the VIN signal. At this time, the gain error calculation is shown in the following formula. When the switch on-resistance is less than 0.02R, the gain error caused by the switch on-resistance is less than 1%, and the error is within an acceptable range.

[0046]

[0047] If a gain of 2 is achieved, two 4R resistors need to be connected in series through switches, such as R4 and R3, and R8 and R7. To achieve a gain of 1, four 4R resistors need to be connected in series through switches, such as R4, R3, R2 and R1, and R8, R7, R6 and R5.

[0048] The mid-range variable gain circuit realizes the mid-range gain; when the SWP2 switch, SWP4 switch, SWP5 switch, SWP6 switch and SWP8 switch are closed, the SWN2 switch, SWN4 switch, SWN5 switch, SWN6 switch and SWN8 switch are closed, and all other switches are disconnected; the VIP signal input end inputs the signal to the positive input end of the AMP amplifier 1 through the R4 resistor and the 8 parallel resistors formed by the seven resistors in the first mid-range variable gain circuit 4; the 8 parallel resistors are all 4R resistors, and the 8 parallel 4R resistors are equivalent to 0.5R resistors. At this time, the resistance value of the R10 feedback resistor is 16R, realizing a gain of 32 times of the VIP signal. The VIN signal input terminal inputs the signal to the negative input terminal of the AMP amplifier 1 through the 8 resistors connected in parallel formed by the R8 resistor and the seven resistors in the second mid-range variable gain circuit 5; the 8 resistors connected in parallel are all 4R resistors, and the 8 4R resistors connected in parallel are equivalent to 0.5R resistors. At this time, the resistance value of the R10 feedback resistor is 16R, achieving a 32-fold gain of the VIP signal. If a 16-fold gain is achieved, it is necessary to control 4 4R resistors in parallel through switches, for example, the three resistors in the first mid-range variable gain circuit 4 are connected in parallel with the R4 resistor, and the three resistors in the second mid-range variable gain circuit 5 are connected in parallel with the R4 resistor; to achieve an 8-fold gain, it is necessary to control 2 4R resistors in parallel through switches, for example, one resistor in the first mid-range variable gain circuit 4 is connected in parallel with the R4 resistor, and one resistor in the second mid-range variable gain circuit 5 is connected in parallel with the R4 resistor.

[0049] The high-range variable gain circuit realizes high-range gain; when the SWP3 switch, SWP9 switch, SWP10 switch, SWP11 switch and SWP12 switch are closed, the SWN3 switch, SWN9 switch, SWN10 switch, SWN11 switch and SWN12 switch are closed, and all other switches are disconnected. The VIP signal input terminal inputs the signal to the positive input terminal of the AMP amplifier 1 through the sixteen parallel resistors in the first high-range variable gain circuit 6. The sixteen parallel resistors are all R resistors, and the sixteen parallel R resistors are equivalent to 0.0625R resistors. At this time, the R10 feedback resistor is 16R, and the VIP signal gain of 256 times is realized. The VIN signal input terminal inputs the signal to the negative input terminal of the AMP amplifier 1 through the sixteen parallel resistors in the second high-range variable gain circuit 7. The sixteen parallel resistors are all R resistors, and the sixteen parallel R resistors are equivalent to 0.0625R resistors. At this time, the R10 feedback resistor is 16R, and the VIN signal gain of 256 times is realized. If a gain of 128 times is to be achieved, 8 R resistors need to be connected in parallel through switches, for example, 8 resistors in the first high-end variable gain circuit 6 are connected in parallel, and 8 resistors in the second high-end variable gain circuit 7 are connected in parallel; if a gain of 64 times is to be achieved, 4 R resistors need to be connected in parallel through switches, for example, 4 resistors in the first high-end variable gain circuit 6 are connected in parallel, and 4 resistors in the second high-end variable gain circuit 7 are connected in parallel.

[0050] The above is only a description of the preferred embodiments of the present invention. Ordinary technicians in this technical field can make several modifications and optimizations based on the above disclosure without departing from the above basic principles. These improvements and optimizations should be regarded as the understood protection scope of the present invention.

Claims

1. A gain selection circuit system for a wide gain range PGA, characterized in that: The invention comprises an AMP amplifier (1), an R10 feedback resistor, a first variable gain module circuit and a second variable gain module circuit; the positive input end of the AMP amplifier (1) is electrically connected to the output end of the first variable gain module circuit, and the input end of the first variable gain module circuit serves as a VIP signal input end; the negative input end of the AMP amplifier (1) is electrically connected to the output end of the second variable gain module circuit, and the input end of the second variable gain module circuit serves as a VIN signal input end; the output end of the AMP amplifier (1) is electrically connected to the negative input end of the AMP amplifier (1) through the R10 feedback resistor; the first variable gain module circuit and the second variable gain module circuit are both controlled by the closing and opening of an internal switch to respectively control the gain of the input signal at the VIP signal input end and the VIN signal input end to select different gear gains, and respectively input the gain signals into the positive input end and the negative input end of the AMP amplifier (1).

2. A gain selection circuit system for a PGA with a wide gain range according to claim 1, characterized in that: The first variable gain module circuit comprises a first low-range variable gain circuit (2), a first mid-range variable gain circuit (4) and a first high-range variable gain circuit (6); the second variable gain module circuit comprises a second low-range variable gain circuit (3), a second mid-range variable gain circuit (5) and a second high-range variable gain circuit (7); the first mid-range variable gain circuit (4) is connected in parallel with the middle resistor R4 of the first low-range variable gain circuit (2), and the first high-range variable gain circuit (6) is connected in parallel with the SWP8 switch in the first low-range variable gain circuit (2); the second mid-range variable gain circuit (5) is connected in parallel with the R8 resistor in the first low-range variable gain circuit (3), and the first high-range variable gain circuit (7) is connected in parallel with the SWN8 switch in the first low-range variable gain circuit (3).

3. A gain selection circuit system for a PGA with a wide gain range according to claim 2, characterized in that: The first low-range variable gain circuit (2) comprises an R1 resistor, an R2 resistor, an R3 resistor and an R4 resistor, one end of the R1 resistor serving as a VIP signal input end, the other end of the R1 resistor being electrically connected to one end of the R2 resistor, the other end of the R2 resistor being electrically connected to one end of the R3 resistor, and the other end of the R2 resistor being electrically connected to one end of the R1 resistor via a SWP1 switch; the other end of the R3 resistor being electrically connected to one end of the R4 resistor, and the other end of the R3 resistor being electrically connected to one end of the R1 resistor via a SWP2 switch; the other end of the R4 resistor being electrically connected to the positive input end of the AMP amplifier (1) via a SWP8 switch, and the other end of the R4 resistor being electrically connected to one end of the R1 resistor via a SWP3 switch.

4. The gain selection circuit system for a PGA with a wide gain range according to claim 2, characterized in that: The second low-range variable gain circuit (3) comprises a resistor R5, a resistor R6, a resistor R7 and a resistor R8, one end of the resistor R5 serves as a VIP signal input end, the other end of the resistor R5 is electrically connected to one end of the resistor R6, the other end of the resistor R6 is electrically connected to one end of the resistor R7, and the other end of the resistor R6 is electrically connected to one end of the resistor R5 via a SWN1 switch; the other end of the resistor R7 is electrically connected to one end of the resistor R8, and the other end of the resistor R7 is electrically connected to one end of the resistor R5 via a SWN2 switch; the other end of the resistor R8 is electrically connected to the negative input end of the AMP amplifier (1) via a SWN8 switch, and the other end of the resistor R8 is electrically connected to one end of the resistor R5 via a SWN3 switch.

5. The gain selection circuit system for a PGA with a wide gain range according to claim 3, characterized in that: The first mid-range variable gain circuit (4) comprises a SWP4 switch, a SWP5 switch, a SWP6 switch, a SWP7 switch and seven RP resistors with the same resistance value; the seven RP resistors in the first mid-range variable gain circuit (4) constitute three RP resistor parallel circuits consisting of two RP resistors, and the two RP resistors in any RP resistor parallel circuit are connected in parallel; one end of the three RP resistor parallel circuit of the first mid-range variable gain circuit (4) and one end of another single RP resistor are both electrically connected to one end of the R4 resistor; the other end of the three RP resistor parallel circuit of the first mid-range variable gain circuit (4) is electrically connected to the other end of the R4 resistor through the SWP5 switch, the SWP6 switch and the SWP7 switch respectively, and the other end of another single RP resistor is electrically connected to the other end of the R4 resistor through the SWP4 switch.

6. A gain selection circuit system for a PGA with a wide gain range according to claim 5, characterized in that: The second mid-range variable gain circuit (5) comprises a SWN4 switch, a SWN5 switch, a SWN6 switch, a SWN7 switch and seven RN resistors with the same resistance value; the seven RN resistors in the second mid-range variable gain circuit (5) constitute three RN resistor parallel circuits consisting of two RN resistors, and the two RN resistors in any RN resistor parallel circuit are connected in parallel; one end of the three RN resistor parallel circuit of the second mid-range variable gain circuit (5) and one end of another single RN resistor are both electrically connected to one end of the R8 resistor; the other end of the three RN resistor parallel circuit of the second mid-range variable gain circuit (5) is electrically connected to the other end of the R8 resistor through the SWN5 switch, the SWN6 switch and the SWN7 switch respectively, and the other end of another single RN resistor is electrically connected to the other end of the R8 resistor through the SWN4 switch.

7. The gain selection circuit system for a PGA with a wide gain range according to claim 2, characterized in that: The first high-end variable gain circuit (6) and the second high-end variable gain circuit (7) both include sixteen R resistors with the same resistance value; the sixteen R resistors in the first high-end variable gain circuit (6) form four R resistor parallel circuits consisting of four R resistors, and the R resistors in the four R resistor parallel circuits are all connected in parallel with each other; one end of the four R resistor parallel circuits of the first high-end variable gain circuit (6) is electrically connected to one end of the SWP8 switch, and the other end of the four R resistor parallel circuits of the first high-end variable gain circuit (6) is electrically connected to the other end of the SWP8 switch through the SWP9 switch, the SWP10 switch, the SWP11 switch and the SWP12 switch respectively.

8. The gain selection circuit system for a PGA with a wide gain range according to claim 2, characterized in that: The sixteen R resistors in the second high-end variable gain circuit (7) constitute four R resistor parallel circuits consisting of four R resistors, and the R resistors in the four R resistor parallel circuits are all connected in parallel with each other; one end of the four R resistor parallel circuits of the second high-end variable gain circuit (7) is electrically connected to one end of the SWN8 switch, and the other end of the four R resistor parallel circuits of the second high-end variable gain circuit (7) is electrically connected to the other end of the SWN8 switch through the SWN9 switch, the SWN10 switch, the SWN11 switch and the SWN12 switch respectively.

9. The gain selection circuit system for a PGA with a wide gain range according to claim 1, characterized in that: All switches in the first variable gain module circuit and the second variable gain module circuit are T-type switch circuits, and the T-type switch circuit comprises an M1 transistor (11), an M2 transistor (12) and an M3 transistor (13); the source of the M1 transistor (11) and the source of the M2 transistor (12) are electrically connected to the drain of the M3 transistor (13), and the drain of the M1 transistor (11) and the drain of the M2 transistor (12) serve as two ends of the T-type switch circuit respectively; the source of the M3 transistor (13) is electrically connected to a VSS power supply, the gate of the M1 transistor (11) and the gate of the M2 transistor (12) input an EN enable signal, and the gate of the M3 transistor (13) inputs an ENB enable signal; when the EN enable signal is at a high level, the ENB enable signal is at a low level, and the two ends of the T-type switch circuit are closed; when the EN enable signal is at a low level, the ENB enable signal is at a high level, and the two ends of the T-type switch circuit are disconnected.

10. The gain selection circuit system for a PGA with a wide gain range according to claim 9, characterized in that: It also includes an enable control circuit; the enable control circuit outputs an EN enable signal and an ENB enable signal respectively to control the closing and opening of switches in the first variable gain module circuit and the second variable gain module circuit, the closing and opening of switches in the first variable gain module circuit, and controls the input signal of the VIP input terminal to select gains of different gears; The closing and opening of the switch in the second variable gain module circuit controls the input signal of the VIN input terminal to select the gain of different gears, and the output terminal of the AMP amplifier (1) outputs the gain-amplified signal.

Images