Multilayer circuit board and manufacturing method thereof

Abstract

A manufacturing method of a multilayer circuit board comprises the following steps: providing a core board which comprises an inner side insulating layer and an inner side circuit layer arranged on one side of the inner side insulating layer; a first outer side carrier plate is arranged on one side of the core plate and comprises a first outer side insulating layer, a first copper layer and a first peelable layer, the first outer side insulating layer is arranged between the first copper layer and the inner side circuit layer, and the first peelable layer is arranged on the side, away from the first outer side insulating layer, of the first copper layer. A second outer side carrier plate is arranged on the other side of the core plate and comprises a second outer side insulating layer, a second copper layer and a second peelable layer, the second outer side insulating layer is arranged between the second copper layer and the inner side insulating layer, and the second peelable layer is arranged on the side, away from the second outer side insulating layer, of the second copper layer; and removing the first peelable layer and the second peelable layer to obtain the multilayer circuit board. In addition, the invention also provides a multilayer circuit board.

Description

Technical Field

[0001] The present application relates to the field of circuit board manufacturing, and in particular to a multi-layer circuit board and a manufacturing method thereof. Background Art

[0002] As consumer electronic products are becoming thinner and lighter, the circuit boards inside the products also need to be thinner to meet the requirements of the overall structure. On the other hand, the commercial use of 5G frequency bands requires low loss in circuit boards, and the usual effective way to reduce loss is to increase the thickness of the dielectric. Therefore, there is a contradiction between the requirements of thinness and low loss.

[0003] During high-frequency signal transmission, the return signal is mainly concentrated in the ground layer, propagating on the side close to the signal line. And as the frequency increases, the current distribution is more concentrated on the surface layer. For example, at 10GHz, the current distribution is only limited to 0.3um from the surface. Therefore, appropriately thinning the thickness of the return ground will not affect the signal transmission loss, and at the same time reduce the overall thickness of the circuit board. However, if the conventional printed circuit board process is used to produce an overly thin copper foil substrate, quality problems such as folds, indentations, and wrinkles are prone to occur. If the copper foil is thinned, it may cause uneven copper foil thickness. Summary of the invention

[0004] In view of this, it is necessary to provide a method for manufacturing a multi-layer circuit board to solve the problem of processing too thin copper foil.

[0005] In addition, the present application also provides a multi-layer circuit board.

[0006] A method for manufacturing a multi-layer circuit board comprises the following steps:

[0007] A core board is provided, the core board comprising an inner insulating layer and an inner circuit layer arranged on one side of the inner insulating layer;

[0008] A first outer carrier is arranged on one side of the core board, the first outer carrier comprises a first outer insulating layer, a first copper layer and a first strippable layer, the first outer insulating layer is arranged between the first copper layer and the inner circuit layer, and the first strippable layer is arranged on a side of the first copper layer away from the first outer insulating layer;

[0009] A second outer carrier is arranged on the other side of the core board, the second outer carrier comprises a second outer insulating layer, a second copper layer and a second strippable layer, the second outer insulating layer is arranged between the second copper layer and the inner insulating layer, the second strippable layer is arranged on a side of the second copper layer away from the second outer insulating layer, and

[0010] The first peelable layer and the second peelable layer are removed to obtain the multi-layer circuit board.

[0011] In some possible embodiments, the steps are further included:

[0012] etching the first copper layer to form a first outer wiring layer, and

[0013] The second copper layer is etched to form a second outer wiring layer.

[0014] In some possible embodiments, the steps are further included:

[0015] A portion of the first outer circuit layer and a portion of the first outer insulation layer are removed to form a gap, and a portion of the inner circuit layer is exposed in the gap.

[0016] In some possible embodiments, the steps are further included:

[0017] A first protective film is provided on the first outer circuit layer, and

[0018] A second protective film is disposed on the second outer circuit layer.

[0019] In some possible embodiments, the core board also includes a first adhesive layer and a plurality of inner conductors, the first adhesive layer is arranged on the side of the inner insulating layer away from the inner circuit layer, and the inner conductors pass through the first adhesive layer and the inner insulating layer and connect the inner circuit layer.

[0020] In some possible embodiments, the first outer carrier further includes a second adhesive layer and a plurality of first outer conductive bodies, the second adhesive layer is disposed on a side of the first outer insulating layer away from the first copper layer, and the first outer conductive bodies pass through the second adhesive layer and the first outer insulating layer and connect the first copper layer.

[0021] In some possible embodiments, the second outer carrier board further includes a plurality of second outer conductive bodies, and the second outer conductive bodies pass through the second outer insulating layer and connect the second copper layer.

[0022] A multi-layer circuit board, comprising:

[0023] A core board, the core board comprising an inner insulating layer and an inner circuit layer arranged on one side of the inner insulating layer;

[0024] A first outer plate is arranged on one side of the core plate, the first outer plate comprises a first outer insulating layer and a first outer circuit layer, the first outer insulating layer is arranged between the first outer circuit layer and the inner circuit layer, and the thickness of the first outer circuit layer is 2 to 6 microns;

[0025] The second outer plate is arranged on the other side of the core plate, and the second outer plate includes a second outer insulating layer and a second outer wiring layer. The second outer insulating layer is arranged between the second outer wiring layer and the inner insulating layer, and the thickness of the second outer wiring layer is 2 to 6 microns.

[0026] In some possible embodiments, it also includes a plurality of inner conductors, a plurality of first outer conductors and a plurality of second outer conductors, the inner conductors are arranged on the inner insulating layer, the first outer conductors are arranged on the first outer insulating layer, the second outer conductors are arranged on the second outer insulating layer, the inner conductors connect the inner circuit layer and the second outer conductors, and the first outer conductors connect the inner circuit layer and the first outer circuit layer.

[0027] In some possible embodiments, a first protective film and a second protective film are further included, wherein the first protective film is disposed on the first outer circuit layer, and the second protective film is disposed on the second outer circuit layer.

[0028] Compared with the prior art, the manufacturing method of the multi-layer circuit board provided in the present application can realize the arrangement of a copper layer with a thickness of 2 to 6 microns on both sides of the core board by arranging a copper layer on a carrier copper layer, then pressing the copper layer to both sides of the core board by pressing, and finally removing the carrier copper layer. In addition, due to the protection of the carrier copper layer during the pressing process, the copper layer can reduce the problems of pressure points, folds and wrinkles, and since the carrier copper layer applies uniform pressure, it is beneficial to improve the flatness of the copper layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 A schematic cross-sectional view of a first substrate provided in one embodiment of the present application.

[0030] Figure 2 for Figure 1 The cross-sectional schematic diagram shown is a first substrate after an inner adhesive layer is provided.

[0031] Figure 3 for Figure 2 The schematic cross-sectional view of the inner bonding layer and the inner insulating layer after the first groove is provided is shown.

[0032] Figure 4 for Figure 3 The cross-sectional schematic diagram of the core plate obtained after the inner conductive body is arranged in the first slot is shown.

[0033] Figure 5 A cross-sectional schematic diagram of a second substrate provided in one embodiment of the present application.

[0034] Figure 6 for Figure 5The cross-sectional schematic diagram shown is a second substrate after an outer adhesive layer is provided.

[0035] Figure 7 for Figure 6 The cross-sectional schematic diagram of the outer bonding layer and the first outer insulating layer after the second groove is provided.

[0036] Figure 8 for Figure 7 The schematic cross-sectional view of the first outer carrier plate obtained after the first outer conductive body is arranged in the second slot is shown.

[0037] Fig. 9 A schematic cross-sectional view of a third substrate provided in one embodiment of the present application.

[0038] Fig.10 for Fig. 9 The cross-sectional schematic diagram of the third substrate after the third groove is provided is shown.

[0039] Fig.11 for Fig.10 The cross-sectional schematic diagram of the second outer carrier board obtained after the second outer conductive body is arranged in the third groove is shown.

[0040] Fig.12 For pressing Figure 4 The core board shown, Figure 8 The first outer carrier plate and Fig.11 A schematic cross-sectional view of the second outer carrier plate is shown.

[0041] Fig.13 for Fig.12 The first outer carrier board is shown with the first carrier copper layer removed and Fig.12 The cross-sectional view of the second outer carrier board after the second carrier copper layer is removed is shown.

[0042] Fig.14 For etching Fig.13 A schematic cross-sectional view of the first copper layer and the second copper layer is shown.

[0043] Fig.15 It is a cross-sectional schematic diagram of a gap formed after removing part of the first outer circuit layer and part of the first outer insulation layer.

[0044] Fig.16 A schematic cross-sectional view of a multi-layer circuit board provided in accordance with an embodiment of the present application.

[0045] Main component symbols

[0046] Multilayer circuit board 100

[0047] Core board 10

[0048] Inner insulation layer 11

[0049] Inner adhesive layer 12

[0050] Inner circuit layer 13

[0051] Inner via 14

[0052] First substrate 15

[0053] First slot 16

[0054] First outer carrier plate 20

[0055] First carrier copper layer 21

[0056] First peelable layer 22

[0057] First copper layer 23

[0058] The first outer circuit layer 231

[0059] The first outer insulating layer 24

[0060] Outer adhesive layer 25

[0061] The first outer conductive body 26

[0062] Second substrate 27

[0063] Second slot 28

[0064] Second outer carrier plate 30

[0065] The second carrier copper layer 31

[0066] Second peelable layer 32

[0067] The second copper layer 33

[0068] The second outer circuit layer 331

[0069] The second outer insulating layer 34

[0070] The second outer conductive body 35

[0071] The third slot 36

[0072] The third substrate 37

[0073] Gap 40

[0074] First protective film 42

[0075] Second protective film 43

[0076] The following specific implementation methods will further illustrate the present application in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION

[0077] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments.

[0078] It should be noted that when a component is considered to be “disposed on” another component, it may be directly disposed on the other component or there may be a central component at the same time.

[0079] See also Figures 1 to 16 , an embodiment of the present application provides a method for manufacturing a multilayer circuit board 100, comprising the steps of:

[0080] S1: See Figure 4 A core board 10 is provided, wherein the core board 10 includes an inner insulating layer 11, an inner adhesive layer 12, an inner circuit layer 13, and a plurality of inner conductors 14. The inner insulating layer 11 is disposed between the inner adhesive layer 12 and the inner circuit layer 13. The inner conductor 14 passes through the inner insulating layer 11 and the inner adhesive layer 12. One end of the inner conductor 14 is connected to the inner circuit layer 13, and the other end is exposed outside the inner adhesive layer 12.

[0081] In this example, see Figures 1 to 4 In step S1, the specific method for manufacturing the core plate 10 includes the following steps:

[0082] S11: See Figure 1 , providing a first substrate 15, the first substrate 15 includes the inner insulating layer 11 and the inner circuit layer 13 disposed on the inner insulating layer 11. The inner circuit layer 13 includes a signal circuit and an isolation circuit, the signal circuit is used to transmit a high-frequency signal (for example, a 10 GHz radio frequency signal), and the isolation circuit is used for grounding. Specifically, the thickness of the inner circuit layer 13 is greater than 12 microns. The material of the inner insulating layer 11 is polyimide.

[0083] S12: See Figure 2 An inner bonding layer 12 is disposed on the side of the inner insulating layer 11 away from the inner circuit layer 13. The inner bonding layer 12 is epoxy resin and is used to connect other components.

[0084] S13: See Figure 3 A first slot 16 is provided in the inner adhesive layer 12 and the inner insulating layer 11, and the first slot 16 penetrates the inner adhesive layer 12 and the inner insulating layer 11. The cross section of the first slot 16 is substantially trapezoidal.

[0085] S14: See Figure 4, the inner conductive body 14 is arranged in the first slot 16 to obtain the core board 10. The inner conductive body 14 is a printed copper paste. The copper paste includes copper powder and an adhesive. It can be understood that in other embodiments of the present application, the inner conductive body 14 can also be a silver paste, a tin paste, etc.

[0086] S2: See Figures 5 to 8 , a first outer carrier 20 is provided. The first outer carrier 20 includes a first carrier copper layer 21, a first peelable layer 22, a first copper layer 23, a first outer insulating layer 24 and an outer adhesive layer 25 stacked in sequence. In addition, the first outer carrier 20 also includes a plurality of first outer conductive bodies 26, which pass through the outer adhesive layer 25, the first outer insulating layer 24 and connect the first copper layer 23.

[0087] In this embodiment, in step S2, the specific method for manufacturing the first outer carrier plate 20 includes the following steps:

[0088] S21: See Figure 5 , providing a second substrate 27, the second substrate 27 includes a first carrier copper layer 21, a first peelable layer 22, a first copper layer 23 and a first outer insulating layer 24 stacked in sequence. The first peelable layer 22 is a release film, and the first carrier copper layer 21 and the first copper layer 23 can be separated by removing the first peelable layer 22.

[0089] S22: See Figure 6 , an outer adhesive layer 25 is disposed on the side of the first outer insulating layer 24 away from the first copper layer 23. One end of the first outer insulating layer 24 is flush with one end of the outer adhesive layer 25, and the width of the outer adhesive layer 25 is smaller than the width of the first outer insulating layer 24, so that part of the first outer insulating layer 24 is not covered by the outer adhesive layer 25.

[0090] S23: See Figure 7 A second slot 28 is provided on the outer adhesive layer 25 and the first outer insulating layer 24. The second slot 28 penetrates the second outer adhesive layer 25 and the first outer insulating layer 24. The cross-sectional shape of the second slot 28 is substantially trapezoidal.

[0091] S24: See Figure 8 , a first outer conductive body 26 is disposed in the second slot 28 to obtain the first outer carrier 20. The first outer conductive body 26 is a printed copper paste.

[0092] S3: See Figures 9 to 11, a second outer carrier 30 is provided. The second outer carrier 30 includes a second carrier copper layer 31, a second peelable layer 32, a second copper layer 33 and a second outer insulating layer 34 stacked in sequence. In addition, the second outer carrier 30 also includes a plurality of second outer conductive bodies 35. The second outer conductive bodies 35 pass through the second outer insulating layer 34 and connect the second copper layer 33.

[0093] In this embodiment, in step S3, the specific method for manufacturing the second outer carrier plate 30 includes the following steps:

[0094] S31: See Fig. 9 , providing a third substrate 37. The third substrate 37 comprises a second carrier copper layer 31, a second peelable layer 32, a second copper layer 33 and a second outer insulating layer 34 stacked in sequence.

[0095] S32: See Fig.10 A third groove 36 is provided in the second outer insulating layer 34 , and a portion of the second copper layer 33 is exposed at the bottom of the third groove 36 .

[0096] S33: See Fig.11 The second outer conductive body 35 is disposed in the third slot 36 to obtain the second outer carrier 30. The second outer conductive body 35 is a printed copper paste.

[0097] S4: See Fig.12 The first outer carrier 20 and the second outer carrier 30 are respectively attached to opposite sides of the core board 10. The inner adhesive layer 12 is connected between the inner insulating layer 11 and the second outer insulating layer 34. The outer adhesive layer 25 is connected between the first outer insulating layer 24 and the inner circuit layer 13. The first outer conductive body 26 is connected to the inner circuit layer 13, and the inner conductive body 14 is connected to the second outer conductive body 35.

[0098] S5: See Fig.13 , removing the first peelable layer 22 and the second peelable layer 32 , so that the first carrier copper layer 21 is separated from the first copper layer 23 , and the second carrier copper layer 31 is separated from the second copper layer 33 .

[0099] In this embodiment, the method for manufacturing the multilayer circuit board 100 further includes the steps of:

[0100] S6: See Fig.14, etching the first copper layer 23 to form a first outer circuit layer 231, and etching the second copper layer 33 to form a second outer circuit layer 331. The first outer circuit layer 231 includes a plurality of first grounding circuits (not marked) arranged side by side and spaced apart, and some of the first grounding circuits are connected to the isolated circuits of the inner circuit layer 13 through the first outer conductor 26. The second outer circuit layer 331 also includes a plurality of second grounding circuits (not marked) arranged side by side and spaced apart. The second grounding circuit is connected to the isolated circuit and the signal circuit of the inner circuit layer 13 through the inner conductor 14 and the second outer conductor 35. The first grounding circuit and the second grounding circuit are used to connect the reference zero potential point.

[0101] S7: See Fig.15 , a portion of the first outer insulating layer 24 and a portion of the first outer circuit layer 231 are removed to form a gap 40 , and a portion of the inner circuit layer 13 is exposed in the gap 40 .

[0102] S8: See Fig.16 A first protective film 42 is disposed on the first outer circuit layer 231 , and a second protective film 43 is disposed on the second outer circuit layer 331 , to obtain the multilayer circuit board 100 .

[0103] Compared with the prior art, the manufacturing method of the multilayer circuit board 100 provided in the present application has the following advantages:

[0104] (i) By arranging copper layers (first copper layer 23, second copper layer 33) on the carrier copper layer (first carrier copper layer 21, second carrier copper layer 31), and then laminating the copper layers to both sides of the core board by lamination, and finally removing the carrier copper layer, it is possible to arrange a copper layer with a thickness of 2 to 6 microns on both sides of the core board 10, and during the lamination process, due to the protection of the carrier copper layer, the copper layer can reduce the problems of pressure points, folds and wrinkles, and since the carrier copper layer applies uniform pressure, it is beneficial to improve the flatness of the copper layer.

[0105] (ii) By arranging thinner copper layers on both sides of the core board 10, it is beneficial to increase the thickness of the insulating layer (first outer insulating layer, second outer insulating layer) while keeping the total thickness unchanged, thereby helping to reduce the loss in the signal transmission process and improve the stability of signal transmission.

[0106] See also Fig.16, an embodiment of the present application further provides a multilayer circuit board 100, the multilayer circuit board 100 comprising a core board 10, a first outer board (not marked) and a second outer board (not marked). The core board 10 comprises an inner insulating layer 11 and an inner circuit layer 13 disposed on one side of the inner insulating layer 11. The first outer board is disposed on one side of the core board 10, and the first outer board comprises a first outer insulating layer 24 and a first outer circuit layer 231. The first outer insulating layer 24 is disposed between the first outer circuit layer 231 and the inner circuit layer 13. The thickness of the first outer circuit layer 231 is 2 to 6 microns. The second outer board is disposed on the other side of the core board 10, and the second outer board comprises a second outer insulating layer 34 and a second outer circuit layer 331. The second outer insulating layer 34 is disposed between the second outer circuit layer 331 and the inner insulating layer 11. The thickness of the second outer circuit layer 331 is 2 to 6 microns. The total thickness of the multilayer circuit board 100 is 280 to 300 microns. The distance between the inner circuit layer 13 and the first outer circuit layer 231 is 120 micrometers.

[0107] In this embodiment, the second outer plate is provided with a notch 40, and the notch 40 penetrates the second outer insulating layer 34 and the second outer circuit layer 331, so that part of the inner circuit layer 13 is exposed in the notch 40, and the notch 40 can be used to accommodate other electronic components (for example, chips).

[0108] In this embodiment, the multilayer circuit board 100 further includes a plurality of inner conductors 14, a plurality of first outer conductors 26, and a plurality of second outer conductors 35. The inner conductors 14 are disposed on the inner insulating layer 11, the first outer conductors 26 are disposed on the first outer insulating layer 24. The second outer conductors 35 are disposed on the second outer insulating layer 34, the inner conductors 14 connect the inner circuit layer 13 and the second outer conductors 35, and the first outer conductors 26 connect the inner circuit layer 13 and the first outer circuit layer 231.

[0109] In this embodiment, the multilayer circuit board 100 further includes a first protective film 42 and a second protective film 43 . The first protective film 42 is disposed on the first outer circuit layer 231 , and the second protective film 43 is disposed on the second outer circuit layer 331 .

[0110] Those skilled in the art should recognize that the above embodiments are only used to illustrate the present application, and are not used as limitations on the present application. As long as they are within the spirit of the present application, appropriate changes and modifications to the above embodiments are within the scope of the present application.

Claims

1. A method for manufacturing a multi-layer circuit board, characterized in that: Includes steps: A core board is provided, the core board comprising an inner insulating layer and an inner circuit layer arranged on one side of the inner insulating layer; A first outer carrier is arranged on one side of the core board, the first outer carrier comprises a first outer insulating layer, a first copper layer and a first strippable layer, the first outer insulating layer is arranged between the first copper layer and the inner circuit layer, and the first strippable layer is arranged on a side of the first copper layer away from the first outer insulating layer; A second outer carrier is arranged on the other side of the core board, the second outer carrier comprises a second outer insulating layer, a second copper layer and a second strippable layer, the second outer insulating layer is arranged between the second copper layer and the inner insulating layer, the second strippable layer is arranged on a side of the second copper layer away from the second outer insulating layer, and The first peelable layer and the second peelable layer are removed to obtain the multi-layer circuit board.

2. The manufacturing method according to claim 1, characterized in that Also includes the steps: etching the first copper layer to form a first outer wiring layer, and The second copper layer is etched to form a second outer wiring layer.

3. The manufacturing method according to claim 1, characterized in that: Also includes the steps: A portion of the first outer circuit layer and a portion of the first outer insulation layer are removed to form a gap, and a portion of the inner circuit layer is exposed in the gap.

4. The manufacturing method according to claim 2, characterized in that: Also includes the steps: A first protective film is provided on the first outer circuit layer, and A second protective film is disposed on the second outer circuit layer.

5. The manufacturing method according to claim 1, characterized in that: The core board also includes a first adhesive layer and a plurality of inner conductors. The first adhesive layer is arranged on a side of the inner insulating layer away from the inner circuit layer. The inner conductors pass through the first adhesive layer and the inner insulating layer and connect the inner circuit layer.

6. The manufacturing method according to claim 1, characterized in that: The first outer carrier also includes a second adhesive layer and a plurality of first outer conductive bodies. The second adhesive layer is arranged on a side of the first outer insulating layer away from the first copper layer. The first outer conductive bodies pass through the second adhesive layer and the first outer insulating layer and connect the first copper layer.

7. The manufacturing method according to claim 1, characterized in that: The second outer carrier board further includes a plurality of second outer conductive vias, and the second outer conductive vias pass through the second outer insulating layer and connect the second copper layer.

8. A multi-layer circuit board, characterized in that: include: A core board, the core board comprising an inner insulating layer and an inner circuit layer arranged on one side of the inner insulating layer; A first outer plate is arranged on one side of the core plate, the first outer plate comprises a first outer insulating layer and a first outer circuit layer, the first outer insulating layer is arranged between the first outer circuit layer and the inner circuit layer, and the thickness of the first outer circuit layer is 2 to 6 microns; The second outer plate is arranged on the other side of the core plate, and the second outer plate includes a second outer insulating layer and a second outer wiring layer. The second outer insulating layer is arranged between the second outer wiring layer and the inner insulating layer, and the thickness of the second outer wiring layer is 2 to 6 microns.

9. The multilayer circuit board according to claim 8, wherein: It also includes multiple inner conductors, multiple first outer conductors and multiple second outer conductors, the inner conductors are arranged on the inner insulating layer, the first outer conductors are arranged on the first outer insulating layer, the second outer conductors are arranged on the second outer insulating layer, the inner conductors connect the inner circuit layer and the second outer conductors, and the first outer conductors connect the inner circuit layer and the first outer circuit layer.

10. The multilayer circuit board according to claim 8, wherein: It also includes a first protective film and a second protective film, wherein the first protective film is disposed on the first outer circuit layer, and the second protective film is disposed on the second outer circuit layer.

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