Display panel, preparation method of display panel and electronic equipment

Abstract

The embodiment of the invention provides a display panel, a preparation method of the display panel and electronic equipment, and relates to the technical field of display, the display panel comprises a display area and a non-display area at least partially surrounding the display area, and the non-display area comprises a bonding area; the display panel comprises a substrate, a bonding structure, a protection layer and a planarization layer, the bonding structure is located on one side of the substrate, and the bonding structure is located in a bonding area; the protection layer is located on one side of the substrate and located in the bonding area, the protection layer comprises a protection part, the protection part covers at least part of the side wall of the bonding structure, the protection part exposes at least part of the side, away from the substrate, of the bonding structure, at least part of the planarization layer is located in the display area, and the material of the protection layer is the same as that of the planarization layer. The side wall of the bonding structure can be prevented from being etched in the subsequent preparation process of the display panel, so that the bonding effect of the display panel can be improved, and the quality of the display panel can be improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular, to a display panel, a method for preparing a display panel, and an electronic device. Background Art

[0002] Organic Light Emitting Diode (OLED) and flat panel display devices based on technologies such as Light Emitting Diode (LED) have been widely used in various consumer electronic products such as mobile phones, televisions, laptops, desktop computers, etc. due to their advantages such as high image quality, power saving, thin body and wide application range, becoming the mainstream in display panels.

[0003] However, there are still some problems with display panels that need to be solved urgently. Summary of the invention

[0004] In order to overcome the technical problems mentioned in the above technical background, an embodiment of the present application provides a display panel, wherein the display panel includes a display area and a non-display area at least partially surrounding the display area, wherein the non-display area includes a bonding area; the display panel includes:

[0005] substrate;

[0006] A bonding structure is located on one side of the substrate, and the bonding structure is located in the bonding area;

[0007] A protective layer, located on one side of the substrate, the protective layer is located in the bonding area, the protective layer includes a protective portion, the protective portion covers at least a portion of the side wall of the bonding structure, and the protective portion exposes at least a portion of the bonding structure away from the substrate;

[0008] A planarization layer, located on one side of the substrate, at least a portion of the planarization layer is located in the display area;

[0009] Wherein, the material of the protection layer is the same as that of the planarization layer.

[0010] In some possible implementations, the orthographic projection of the protection portion on the substrate surrounds the orthographic projection of the bonding structure on the substrate;

[0011] Preferably, the protection portion covers the side wall of the bonding structure;

[0012] Preferably, along the thickness direction of the substrate, the thickness of the protective layer is greater than or equal to 0.8 μm and less than or equal to 2.5 μm;

[0013] Preferably, a distance between an orthographic projection of a side of the protection portion close to the bonding structure on the substrate and an edge of the orthographic projection of the bonding structure on the substrate is greater than or equal to 0 and less than or equal to 0.5 μm;

[0014] Preferably, the bonding area includes a first bonding region, the bonding structure includes a first bonding structure located in the first bonding area, the display panel further includes a chip, and the chip is electrically connected to the first bonding structure;

[0015] Preferably, the bonding area further includes a second bonding area, the bonding structure further includes a second bonding structure located in the second bonding area, the display panel further includes a flexible circuit board, and the flexible circuit board is electrically connected to the second bonding structure;

[0016] Preferably, there are multiple protection parts, and the multiple protection parts are arranged at intervals, or the multiple protection parts are connected in sequence.

[0017] In some possible implementations, the bonding structure includes a first bonding trace, a second bonding trace, and a third bonding trace that are sequentially stacked on one side of the substrate, the protection portion exposes at least a portion of the third bonding trace away from the side of the substrate, and the protection portion covers at least a portion of a side wall of the third bonding trace;

[0018] Preferably, the bonding structure further comprises a first insulating layer and a second insulating layer which are sequentially stacked between the first bonding trace and the second bonding trace, wherein along the thickness direction of the substrate, the first insulating layer is provided with a first opening, and the second insulating layer is provided with a second opening which is connected with the first opening, the first opening exposes a part of the first bonding trace, and the second bonding trace extends from a side of the second insulating layer away from the substrate through the second opening and the side wall of the first opening to be electrically connected with the first bonding trace;

[0019] Preferably, the third bonding trace extends from a side of the second bonding trace away from the substrate to a side of the second insulating layer away from the substrate, and at least a portion of the protection portion is located on a side of the second insulating layer away from the substrate;

[0020] Preferably, the orthographic projection of the first opening on the substrate is located within the orthographic projection of the second opening on the substrate;

[0021] Preferably, the center of the orthographic projection of the first opening on the substrate coincides with the center of the orthographic projection of the second opening on the substrate;

[0022] Preferably, the side wall of the first opening and the side wall of the second opening are located on the same inclined plane.

[0023] In some possible implementations, in the display area, the display panel includes a first conductive layer, a second conductive layer, a third conductive layer, and a fourth conductive layer which are sequentially stacked in a direction away from the substrate and located on one side of the substrate, and the fourth conductive layer includes the third bonding trace;

[0024] Preferably, the third conductive layer includes the second bonding trace;

[0025] Preferably, the first conductive layer includes the first bonding trace.

[0026] In some possible implementations, the planarization layer is located on a side of the fourth conductive layer away from the substrate.

[0027] In some possible implementations, a capacitor dielectric layer is provided between the first conductive layer and the second conductive layer, and the first insulating layer includes the capacitor dielectric layer;

[0028] Preferably, an interlayer insulating layer is provided between the second conductive layer and the third conductive layer, and the second insulating layer includes the interlayer insulating layer.

[0029] In some possible implementations, in the display area, the display panel further includes:

[0030] A pixel defining layer, located on one side of the substrate, wherein the pixel defining layer defines a plurality of pixel openings;

[0031] a light emitting unit, at least a portion of which is located within the pixel opening;

[0032] An encapsulation layer, located on a side of the light-emitting unit away from the substrate;

[0033] A touch layer, located on a side of the packaging layer away from the substrate;

[0034] The filter layer is located on a side of the touch layer away from the substrate.

[0035] In some possible implementations, the present application further provides a method for preparing a display panel, wherein the display panel includes a display area and a non-display area at least partially surrounding the display area, wherein the non-display area includes a bonding area; the method includes:

[0036] providing a substrate;

[0037] forming a bonding structure on one side of the substrate, the bonding structure being located in the bonding region;

[0038] A planarization layer and a protective layer are formed on one side of the substrate, the protective layer is located in the bonding area, at least a portion of the planarization layer is located in the display area, the protective layer includes a protective portion, the protective portion covers at least a portion of the side wall of the bonding structure, the protective portion exposes at least a portion of the bonding structure away from the substrate, and the material of the protective layer is the same as that of the planarization layer.

[0039] In some possible implementations, the step of forming a planarization layer and a protective layer on one side of the substrate includes:

[0040] forming a planarization layer in the display area, wherein the planarization layer extends to the bonding area and covers the bonding structure;

[0041] The planarization layer located in the bonding area is formed into a first planarization portion and a second planarization portion surrounding the first planarization portion by using a semi-transparent mask, wherein the first planarization portion covers at least a portion of a side of the bonding structure away from the substrate, and the second planarization portion covers a side wall of the bonding structure, and along a thickness direction of the substrate, a thickness of the second planarization portion is greater than a thickness of the first planarization portion;

[0042] forming a light-emitting unit, a first touch-control layer, and a second touch-control material layer in sequence on a side of the planarization layer located in the display area away from the substrate;

[0043] Etching the second touch material layer to form a second touch layer, removing the first planarization portion, and reducing the thickness of the second planarization portion so that the second planarization portion forms a protection portion;

[0044] Preferably, after the step of forming a planarization layer and a protective layer on one side of the substrate, the method further comprises:

[0045] forming a filter layer on a side of the second touch layer away from the substrate;

[0046] Preferably, along the thickness direction of the substrate, the thickness of the first planarized portion is greater than or equal to 0.5 μm and less than or equal to 1.2 μm;

[0047] Preferably, along the thickness direction of the substrate, the thickness of the second planarized portion is greater than or equal to 2 μm and less than or equal to 3 μm.

[0048] In some possible implementations, the present application further provides an electronic device, which includes the display panel described in the present application, or includes a display panel prepared by the method for preparing the display panel described in the present application.

[0049] Compared with the prior art, this application has the following beneficial effects:

[0050] The present application provides a display panel, a method for preparing a display panel, and an electronic device. By setting a protective portion on the side wall of the bonding structure, the side wall of the bonding structure can be prevented from being etched during the subsequent preparation process of the display panel, thereby improving the bonding effect of the display panel and further improving the quality of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0052] Figure 1 A schematic top view of a display panel provided in an embodiment of the present application;

[0053] Figure 2 Provided in the embodiments of this application Figure 1 One of the cross-sectional views at AA in the middle;

[0054] Figure 3 Provided in the embodiments of this application Figure 1 The second cross-sectional view at AA in the middle;

[0055] Figure 4 Provided in the embodiments of this application Figure 1 The third cross-sectional view at AA in the middle;

[0056] Figure 5 Provided in the embodiments of this application Figure 1 The fourth cross-sectional view at AA in the middle;

[0057] Figure 6 One of the top view schematic diagrams of the protection portion and the bonding structure provided in the embodiment of the present application;

[0058] Figure 7 A second schematic top view of the protection portion and the bonding structure provided in an embodiment of the present application;

[0059] Figure 8 A schematic diagram of a process for preparing a display panel provided in an embodiment of the present application;

[0060] Fig. 9 A schematic cross-sectional view of a planarization layer provided in an embodiment of the present application extending to a bonding area and covering a bonding structure;

[0061] Fig.10One of the cross-sectional schematic diagrams of forming a first planarization portion and a second planarization portion surrounding the first planarization portion in a planarization layer located in a bonding area provided in an embodiment of the present application;

[0062] Fig.11 A second cross-sectional schematic diagram of forming a first planarized portion and a second planarized portion surrounding the first planarized portion in a planarized layer located in a bonding area provided in an embodiment of the present application;

[0063] Fig.12 A schematic cross-sectional view of a planarization layer located in a display area and away from a substrate, after sequentially forming a light-emitting unit, a first touch layer, and a second touch material layer, according to an embodiment of the present application;

[0064] Fig.13 This is a schematic cross-sectional view of an embodiment of the present application after the second touch material layer is etched so that the second planarization portion forms a protection portion.

[0065] Figure numerals: 1, first bonding structure; 2, second bonding structure; 3, substrate; 4, bonding structure; 5, protection portion; 6, first insulating layer; 61, first opening; 7, second insulating layer; 71, second opening; 8, first bonding trace; 9, second bonding trace; 10, third bonding trace; 11, semiconductor layer; 12, first conductive layer; 13, capacitor dielectric layer; 14, second conductive layer; 15, interlayer insulating layer; 16, third conductive layer; 17, planarization layer; 171, via; 18. Fourth conductive layer; 19. First electrode; 20. Light-emitting layer; 21. Second electrode; 22. First packaging layer; 23. Second packaging layer; 24. Third packaging layer; 25. First touch layer; 26. Second touch layer; 27. Shading portion; 28. Filter portion; 29. ​​Light-emitting unit; 30. Packaging layer; 31. Touch layer; 32. Filter layer; 33. First planarization portion; 34. Second planarization portion; 35. Second touch material layer; 36. Pixel defining layer; 361. Pixel opening. DETAILED DESCRIPTION

[0066] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.

[0067] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0068] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0069] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "vertical", "horizontal", "inner", "outer", etc. indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, or the positions or positional relationships in which the inventive product is usually placed when in use. They are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific position, be constructed and operated in a specific position, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first", "second", "third", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.

[0070] It should be noted that, in the absence of conflict, different features in the embodiments of the present application may be combined with each other.

[0071] The display panel in the related art includes a display area and a non-display area at least partially surrounding the display area. The non-display area includes a bonding area. In the bonding area, the display panel includes a substrate and a bonding structure located on one side of the substrate. The bonding structure is used to bond the chip or flexible circuit board of the display panel.

[0072] In the related art, when forming other film layers of the display panel, such as forming a filter layer of the display panel, multiple developments are required, which can easily etch the side walls of the bonding structure, thereby affecting the bonding effect of the display panel and ultimately affecting the quality of the display panel.

[0073] In order to solve the above-mentioned technical problems, the inventor innovatively designed the following technical solutions, and the specific implementation solutions of the present application will be described in detail below in conjunction with the accompanying drawings. It should be noted that the defects existing in the solutions in the above-mentioned prior art are the results obtained by the inventor after practice and careful research. Therefore, the discovery process of the above-mentioned technical problems and the solutions proposed in this embodiment below for the above-mentioned problems should all be the contributions made by the inventor to the present application in the process of invention and creation, and should not be understood as the technical content known to those skilled in the art.

[0074] See also Figure 1-Figure 2This embodiment provides a display panel, which includes a display area AA and a non-display area AB at least partially surrounding the display area AA, and the non-display area AB includes a bonding area AC; the display panel includes a substrate 3, a bonding structure 4, a protective layer and a planarization layer 17.

[0075] The bonding structure 4 is located on one side of the substrate 3 , and the bonding structure 4 is located in the bonding area AC.

[0076] The protective layer is located on one side of the substrate 3 , the protective layer is located in the bonding area AC, and the protective layer includes a protective portion 5 , which covers at least a portion of the sidewall of the bonding structure 4 and exposes at least a portion of the bonding structure 4 away from the substrate 3 .

[0077] The planarization layer 17 is located on one side of the substrate 3 , and at least a portion of the planarization layer 17 is located in the display area AA.

[0078] The material of the protection layer is the same as that of the planarization layer 17 .

[0079] When forming subsequent film layers of the display panel, the protection portion 5 can protect the side walls of the bonding structure 4 so that the side walls of the bonding structure 4 are not easily etched, thereby ensuring the integrity of the bonding structure 4 and making the bonding effect of the bonding structure 4 and the flexible circuit board or chip of the display panel better, thereby improving the quality of the display panel.

[0080] In addition, since the material of the protective layer is the same as that of the planarization layer 17 , the protective layer can be formed while the planarization layer 17 is formed, so there is no need to set up a special process for forming the protective layer, thereby reducing the cost of forming the protective layer.

[0081] Based on the above design, this embodiment sets a protective portion 5 on the side wall of the bonding structure 4 to prevent the side wall of the bonding structure 4 from being etched during the subsequent preparation process of the display panel, thereby improving the bonding effect of the display panel and further improving the quality of the display panel.

[0082] For some possible implementations, see again Figure 1 and Figure 2 The bonding area AC includes a first bonding area AC1 , the bonding structure 4 includes a first bonding structure 1 located in the first bonding area AC1 , and the display panel also includes a chip, which is electrically connected to the first bonding structure 1 .

[0083] Optionally, the bonding area AC further includes a second bonding area AC2 , the bonding structure 4 further includes a second bonding structure 2 located in the second bonding area AC2 , and the display panel further includes a flexible circuit board, which is electrically connected to the second bonding structure 2 .

[0084] The first bonding structure 1 is a first bonding contact, there are multiple first bonding structures 1, and multiple first bonding structures 1 are electrically connected to the chip of the display panel; the second bonding structure 2 is a second bonding contact, there are multiple second bonding structures 2, and multiple second bonding structures 2 are electrically connected to the chip of the display panel.

[0085] Since the protective portion 5 is provided on the side walls of the first bonding structure 1 and the second bonding structure 2, the side walls of the first bonding structure 1 and the second bonding structure 2 are not easily etched in the subsequent film layers for forming the display panel, thereby improving the bonding effect between the first bonding structure 1 and the chip, and improving the bonding effect between the second bonding structure 2 and the flexible circuit board.

[0086] For some possible implementations, see Figure 1 and Figure 3 The bonding structure 4 includes a first bonding trace 8, a second bonding trace 9 and a third bonding trace 10 which are stacked in sequence on one side of the substrate 3. The protection portion 5 exposes at least a portion of the third bonding trace 10 away from the substrate 3, and the protection portion 5 covers at least a portion of the side wall of the third bonding trace 10.

[0087] Optionally, in the display area AA, the display panel includes a first conductive layer 12 , a second conductive layer 14 , a third conductive layer 16 and a fourth conductive layer 18 stacked in sequence along a direction Z away from the substrate 3 on one side of the substrate 3 , and the fourth conductive layer 18 includes a third bonding trace 10 .

[0088] Optionally, the third conductive layer 16 includes a second bonding trace 9 , and the first conductive layer 12 includes a first bonding trace 8 .

[0089] The display panel also includes a buffer layer and a semiconductor layer 11 which are stacked in sequence between the substrate 3 and the first conductive layer 12, wherein the semiconductor layer 11 includes a source region, a drain region and a channel region, the first conductive layer 11 includes a gate and a first capacitor plate, the second conductive layer 14 includes a second capacitor plate, the first capacitor plate and the second capacitor plate form a capacitor, the third conductive layer 16 includes a drain and a source, the drain is electrically connected to the drain region, the source is electrically connected to the source region, and the gate, source and drain form a driving transistor.

[0090] While the first conductive layer 12 is formed in the display area AA, the first bonding trace 8 of the bonding structure 4 is formed in the bonding area AC, while the third conductive layer 16 is formed in the display area AA, the second bonding trace 9 of the bonding structure 4 is formed in the bonding area AC, and while the fourth conductive layer 18 is formed in the display area AA, the third bonding trace 10 of the bonding structure 4 is formed in the bonding area AC. In this way, there is no need to set up a process for specially forming the first bonding trace 8, the second bonding trace 9 and the third bonding trace 10 of the bonding structure 4, thereby reducing the cost of forming the first bonding trace 8, the second bonding trace 9 and the third bonding trace 10 of the bonding structure 4.

[0091] Preferably, the bonding structure 4 also includes a first insulating layer 6 and a second insulating layer 7 which are stacked in sequence between the first bonding trace 8 and the second bonding trace 9. Along the thickness direction Z of the substrate 3, the first insulating layer 6 is provided with a first opening 61, and the second insulating layer 7 is provided with a second opening 71 which is connected to the first opening 61. The first opening 61 exposes a portion of the first bonding trace 8. The second bonding trace 9 extends from a side of the second insulating layer 7 away from the substrate 3 through the second opening 71 and the side walls of the first opening 61 to be electrically connected to the first bonding trace 8.

[0092] Optionally, the third bonding trace 10 extends from a side of the second bonding trace 9 away from the substrate 3 to a side of the second insulating layer 7 away from the substrate 3 , and at least a portion of the protection portion 5 is located on a side of the second insulating layer 7 away from the substrate 3 .

[0093] The first opening 61 and the second opening 71 expose the first bonding trace 8. When the second bonding trace 9 is formed, the second bonding trace 9 extends from the side walls of the first opening 61 and the second opening 71 to contact the exposed portion of the first bonding trace 8 to achieve electrical connection between the first bonding trace 8 and the second bonding trace 9.

[0094] The third bonding trace 10 covers the second bonding trace 9, that is, the third bonding trace 10 covers the side wall of the second bonding trace 9, and the third bonding trace 10 can protect the side wall of the second bonding trace 9. In this way, the first bonding trace 8, the second bonding trace 9 and the third bonding trace 10 in the bonding structure 4 are electrically connected in sequence, and the protection part 5 covers the side wall of the third bonding trace 10, which can protect the side wall of the third bonding trace 10. In the subsequent preparation process of the display panel, the side wall of the third bonding trace 10 is not easily etched.

[0095] In addition, the material of the third bonding trace 10 is generally a three-layer structure of titanium, aluminum and titanium, and titanium is not easily etched. Therefore, in the subsequent preparation process of the display panel, the side of the third bonding trace 10 away from the substrate 3 is not easily etched, thereby further improving the bonding effect between the bonding structure 4 and the flexible circuit board or chip of the display panel.

[0096] Preferably, the orthographic projection of the first opening 61 on the substrate 3 is located within the orthographic projection of the second opening 71 on the substrate 3 .

[0097] Optionally, the center of the orthographic projection of the first opening 61 on the substrate 3 coincides with the center of the orthographic projection of the second opening 71 on the substrate 3 .

[0098] Optionally, the side wall of the first opening 61 and the side wall of the second opening 71 are located on the same inclined surface.

[0099] In this way, the second bonding trace 9 can be extended more smoothly to contact the side of the first bonding trace 8 away from the substrate 3 .

[0100] For some possible implementations, see again Figure 1 and Figure 3 , the planarization layer 17 is located on a side of the fourth conductive layer 18 away from the substrate 3 .

[0101] The planarization layer 17 is provided with a via hole 171 penetrating the planarization layer 17 , and the via hole 171 exposes a portion of the conductive traces in the fourth conductive layer 18 .

[0102] Preferably, see again Figure 3 , along the thickness direction Z of the substrate 3, the thickness D of the protective layer is greater than or equal to 0.8 μm and less than or equal to 2.5 μm. For example, the thickness D can be 0.8 μm, 1 μm, 1.2 μm, 1.5 μm, 1.8 μm, 2 μm, 2.3 μm or 2.5 μm, etc., and the thickness D can be reasonably set to improve the protective effect of the protective portion 5 on the side wall of the bonding structure 4.

[0103] Preferably, the distance W between the orthographic projection of the side of the protection portion 5 close to the bonding structure 4 on the substrate 3 and the edge of the orthographic projection of the bonding structure 4 on the substrate 3 is greater than or equal to 0 and less than or equal to 0.5 μm. That is, the protection portion 5 extends from the side of the second insulating layer 7 away from the substrate 3 to the side of the third bonding trace 10 away from the substrate 3, and the dimension of the protection portion 5 extending to the third bonding trace 10 is the distance W. For example, the distance W can be 0, 0.1 μm, 0.2 μm, 0.3 μm, 0.4 μm or 0.5 μm, etc., and the distance W is reasonably set, while ensuring the protective effect of the protection portion 5 on the side wall of the bonding structure 4, the side of the bonding structure 4 away from the substrate 3 can expose more surface, thereby improving the bonding effect between the bonding structure 4 and the chip or the flexible circuit board.

[0104] For some possible implementations, see again Figure 1 and Figure 3 A capacitor dielectric layer 13 is disposed between the first conductive layer 12 and the second conductive layer 14 , and the first insulating layer 6 includes the capacitor dielectric layer 13 .

[0105] The capacitor dielectric layer 13 of the display area AA extends to the bonding area AC to form the first insulating layer 6 . Thus, there is no need to set up a special process for forming the first insulating layer 6 , thereby reducing the cost of forming the first insulating layer 6 .

[0106] Optionally, an interlayer insulating layer 15 is provided between the second conductive layer 14 and the third conductive layer 16 , and the second insulating layer 7 includes the interlayer insulating layer 15 .

[0107] The interlayer insulating layer 15 of the display area AA extends to the bonding area AC to form the second insulating layer 7 . Thus, there is no need to set up a special process for forming the second insulating layer 7 , thereby reducing the cost of forming the second insulating layer 7 .

[0108] For some possible implementations, see again Figure 1 and Figure 4 In the display area AA, the display panel further includes a pixel defining layer 36 , a light emitting unit 29 , an encapsulation layer 30 , a touch layer 31 and a filter layer 32 .

[0109] The pixel defining layer 36 is located on one side of the substrate 3 . The pixel defining layer 36 defines a plurality of pixel openings 361 . At least a portion of the light emitting unit 29 is located in the pixel openings 361 .

[0110] The light-emitting unit 29 includes a first electrode 19, a light-emitting functional layer, and a second electrode 21 which are stacked in sequence in a direction away from the substrate 3, the pixel opening exposes a portion of the first electrode 19, and the second electrode 21 extends from the pixel opening to a side of the pixel defining layer away from the substrate 3, wherein the first electrode 19 includes an anode, the second electrode 21 includes a cathode, the first electrode 19 is electrically connected to a conductive trace in the fourth conductive layer 18 through a via 171, and the conductive trace in the fourth conductive layer 18 is electrically connected to the drain, thereby electrically connecting the first electrode 19 to the drain.

[0111] The light-emitting functional layer includes a light-emitting layer 20, which is located in the pixel opening. The light-emitting layer 20 includes a first light-emitting layer, a second light-emitting layer and a third light-emitting layer. For example, the light-emitting color of the first light-emitting layer is red, the light-emitting color of the second light-emitting layer is green, and the light-emitting color of the third light-emitting layer is blue.

[0112] The encapsulation layer 30 is located on the side of the light-emitting unit 29 away from the substrate 3. The encapsulation layer 30 includes a first encapsulation layer 22, a second encapsulation layer 23 and a third encapsulation layer 24 which are stacked in sequence along a direction away from the substrate 3. The materials of the first encapsulation layer 22 and the third encapsulation layer 24 both include inorganic materials, and the material of the second encapsulation layer 23 includes organic materials.

[0113] The touch layer 31 is located on the side of the packaging layer 30 away from the substrate 3. The touch layer 31 includes a first touch layer 25 and a second touch layer 26 which are stacked in sequence in a direction away from the substrate 3. An insulating layer is provided between the first touch layer 25 and the second touch layer 26. The first touch layer 25 includes a first touch electrode, and the second touch layer 26 includes a second touch electrode. The first touch electrode can be a touch receiving electrode, and the second touch electrode can be a touch sending electrode.

[0114] The filter layer 32 is located on the side of the touch layer 31 away from the substrate 3. The filter layer 32 includes a filter portion 28 and a shading portion 27 that are spaced apart. The orthographic projection of the filter portion 28 on the substrate 3 covers the orthographic projection of the light-emitting layer 20 on the substrate 3. The filter portion 28 can make the light emitted by the light-emitting layer 20 have a better effect. The shading portion 27 is used to block light of different colors emitted by different light-emitting layers 20 to prevent crosstalk between light emitted by light-emitting layers 20 of different colors.

[0115] For some possible implementations, see Figure 4 and Figure 6 The orthographic projection of the protection portion 5 on the substrate 3 surrounds the orthographic projection of the bonding structure 4 on the substrate 3 , and the protection portion 5 covers the side wall of the bonding structure 4 .

[0116] The protection portion 5 completely covers the side walls of the bonding structure 4 in different directions, which can further improve the bonding effect of the protection portion 5 on the bonding structure 4 .

[0117] Preferably, there are plural protecting parts 5 .

[0118] In some embodiments, please refer again to Figure 4 and Figure 6 , multiple protection parts 5 are arranged at intervals, so that one protection part 5 covers the side wall of one bonding structure 4.

[0119] In other embodiments, see Figure 5 and Figure 7 , multiple protection parts 5 are connected in sequence. In this way, multiple protection parts 5 are connected as a whole to jointly protect the side walls of multiple bonding structures 4.

[0120] For some possible implementations, see Figure 2 and Figure 8 The present application also provides a method for preparing a display panel, the display panel comprising a display area AA and a non-display area AB at least partially surrounding the display area AA, the non-display area AB comprising a bonding area AC; the method comprising:

[0121] S10: providing a substrate 3.

[0122] S11: forming a bonding structure 4 on one side of the substrate 3, wherein the bonding structure 4 is located in the bonding area AC.

[0123] S12: A planarization layer 17 and a protective layer are formed on one side of the substrate 3, wherein the protective layer is located in the bonding area AC, and at least a portion of the planarization layer 17 is located in the display area AA. The protective layer includes a protective portion 5, and the protective portion 5 covers at least a portion of the side wall of the bonding structure 4. The protective portion 5 exposes at least a portion of the bonding structure 4 away from the substrate 3, and the material of the protective layer is the same as that of the planarization layer 17.

[0124] The above method can form a protective portion 5 on the side wall of the bonding structure 4. When forming the subsequent film layer of the display panel, the protective portion 5 can protect the side wall of the bonding structure 4, so that the side wall of the bonding structure 4 is not easily etched, thereby ensuring the integrity of the bonding structure 4 and making the bonding effect of the bonding structure 4 and the flexible circuit board or chip of the display panel better, thereby improving the quality of the display panel.

[0125] In addition, since the material of the protective layer is the same as that of the planarization layer 17 , the protective layer can be formed while the planarization layer 17 is formed, so there is no need to set up a special process for forming the protective layer, thereby reducing the cost of forming the protective layer.

[0126] In some possible implementations, the step of forming a planarization layer 17 and a protective layer on one side of the substrate 3 includes:

[0127] See also Fig. 9 , a planarization layer 17 is formed in the display area AA, and the planarization layer 17 extends to the bonding area AC and covers the bonding structure 4.

[0128] See also Figure 10-11 Through the semi-transparent mask, the planarization layer 17 located in the bonding area AC forms a first planarization portion 33 and a second planarization portion 34 surrounding the first planarization portion 33. The first planarization portion 33 covers at least a portion of the bonding structure 4 away from the substrate 3, and the second planarization portion 34 covers the side wall of the bonding structure 4. Along the thickness direction Z of the substrate 3, the thickness H2 of the second planarization portion 34 is greater than the thickness H1 of the first planarization portion 33.

[0129] Optionally, along the thickness direction Z of the substrate 3 , the thickness H1 of the first planarized portion 33 is greater than or equal to 0.5 μm and less than or equal to 1.2 μm. For example, the thickness H1 may be 0.5 μm, 0.6 μm, 0.7 μm, 0.8 μm, 0.9 μm, 1 μm, 1.1 μm or 1.2 μm.

[0130] Optionally, along the thickness direction Z of the substrate 3 , the thickness H2 of the second planarized portion 34 is greater than or equal to 2 μm and less than or equal to 3 μm. For example, the thickness H2 may be 2 μm, 2.1 μm, 2.3 μm, 2.5 μm, 2.7 μm, 2.9 μm or 3 μm.

[0131] Reasonable setting of the thickness H1 and the thickness H2 can make the thickness of the finally formed protection portion 5 more appropriate, and provide a better protection effect on the side wall of the bonding structure 4 .

[0132] In some embodiments, please refer again to Fig.10 The planarization layer 17 located in the bonding area AC may be a whole layer. The planarization layer 17 located in the bonding area AC covers a plurality of bonding structures 4 . A first planarization portion 33 and a second planarization portion 34 cover a bonding structure 4 .

[0133] In other embodiments, please refer again to Fig.11 The planarization layer 17 located in the bonding area AC may include a plurality of portions, each portion covers one bonding structure 4 , and each portion includes a first planarization portion 33 and a second planarization portion 34 surrounding the first planarization portion 33 .

[0134] See also Fig.12 A light emitting unit 29 , a first touch control layer 25 and a second touch control material layer 35 are sequentially formed on a side of the planarization layer 17 located in the display area AA away from the substrate 3 .

[0135] See also Fig.13 , the second touch material layer 35 is etched to form the second touch layer 26 , the first planarization portion 33 is removed, and the thickness of the second planarization portion 34 is reduced so that the second planarization portion 34 forms the protection portion 5 .

[0136] When etching the second touch material layer 35 to form the second touch layer 26, the first planarization portion 33 can be removed. Since the thickness of the second planarization portion 34 is greater than the thickness of the first planarization portion 33, after removing the first planarization portion 33, the thickness of the second planarization portion 34 will be reduced, and the reduced thickness of the second planarization portion 34 is substantially the same as the thickness of the first planarization portion 33, and the remaining second planarization portion 34 can be the protection portion 5.

[0137] Thus, while etching the second touch material layer 35 , the planarization layer 17 located in the bonding area AC forms the protection portion 5 . Thus, the protection portion 5 can be formed without an additional process to etch the planarization layer 17 located in the bonding area AC, thereby further reducing the cost of forming the protection portion 5 .

[0138] Preferably, after the step of forming the planarization layer 17 and the protective layer on one side of the substrate 3, the method further includes:

[0139] Please see again Figure 4 or Figure 5 , a filter layer 32 is formed on the side of the second touch layer 26 away from the substrate 3. When forming the filter layer 32, multiple developments are required. Since the protection portion 5 covering the side wall of the bonding structure 4 can be formed by the above method, when forming the filter layer 32, it is not easy to etch the side wall of the bonding structure 4, so it is not easy to affect the bonding effect between the bonding structure 4 and the chip or the flexible circuit board, and finally the quality of the display panel formed by the above method can be improved.

[0140] In some possible implementations, the present application further provides an electronic device, the electronic device comprising the display panel of the present application, or comprising a display panel prepared by the method for preparing a display panel of the present application. The electronic device may include a device with image processing capabilities, such as a server, a personal computer, a laptop computer, a mobile phone, a tablet computer, a wearable device, a vehicle-mounted display device, etc. Since the electronic device comprises the display panel of the present application, the quality of the electronic device is better.

[0141] The technical features of the above embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0142] The above-mentioned embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims

1. A display panel, characterized in that: The display panel comprises a display area and a non-display area at least partially surrounding the display area, wherein the non-display area comprises a bonding area; the display panel comprises: substrate; A bonding structure is located on one side of the substrate, and the bonding structure is located in the bonding area; A protective layer, located on one side of the substrate, the protective layer is located in the bonding area, the protective layer includes a protective portion, the protective portion covers at least a portion of the side wall of the bonding structure, and the protective portion exposes at least a portion of the bonding structure away from the substrate; A planarization layer, located on one side of the substrate, at least a portion of the planarization layer is located in the display area; Wherein, the material of the protection layer is the same as that of the planarization layer.

2. The display panel according to claim 1, characterized in that: The orthographic projection of the protection portion on the substrate surrounds the orthographic projection of the bonding structure on the substrate; Preferably, the protection portion covers the side wall of the bonding structure; Preferably, along the thickness direction of the substrate, the thickness of the protective layer is greater than or equal to 0.8 μm and less than or equal to 2.5 μm; Preferably, a distance between an orthographic projection of a side of the protection portion close to the bonding structure on the substrate and an edge of the orthographic projection of the bonding structure on the substrate is greater than or equal to 0 and less than or equal to 0.5 μm; Preferably, the bonding area includes a first bonding area, the bonding structure includes a first bonding structure located in the first bonding area, the display panel further includes a chip, and the chip is electrically connected to the first bonding structure; Preferably, the bonding area further includes a second bonding area, the bonding structure further includes a second bonding structure located in the second bonding area, the display panel further includes a flexible circuit board, and the flexible circuit board is electrically connected to the second bonding structure; Preferably, there are multiple protection parts, and the multiple protection parts are arranged at intervals, or the multiple protection parts are connected in sequence.

3. The display panel according to claim 1, characterized in that: The bonding structure includes a first bonding trace, a second bonding trace and a third bonding trace which are stacked in sequence on one side of the substrate, the protection portion exposes at least a portion of the third bonding trace away from the substrate, and the protection portion covers at least a portion of the side wall of the third bonding trace; Preferably, the bonding structure further comprises a first insulating layer and a second insulating layer which are sequentially stacked between the first bonding trace and the second bonding trace, wherein along the thickness direction of the substrate, the first insulating layer is provided with a first opening, and the second insulating layer is provided with a second opening which is connected with the first opening, the first opening exposes a part of the first bonding trace, and the second bonding trace extends from a side of the second insulating layer away from the substrate through the second opening and the side wall of the first opening to be electrically connected with the first bonding trace; Preferably, the third bonding trace extends from a side of the second bonding trace away from the substrate to a side of the second insulating layer away from the substrate, and at least a portion of the protection portion is located on a side of the second insulating layer away from the substrate; Preferably, the orthographic projection of the first opening on the substrate is located within the orthographic projection of the second opening on the substrate; Preferably, the center of the orthographic projection of the first opening on the substrate coincides with the center of the orthographic projection of the second opening on the substrate; Preferably, the side wall of the first opening and the side wall of the second opening are located on the same inclined plane.

4. The display panel according to claim 3, characterized in that: In the display area, the display panel includes a first conductive layer, a second conductive layer, a third conductive layer and a fourth conductive layer which are sequentially stacked in a direction away from the substrate and located on one side of the substrate, and the fourth conductive layer includes the third bonding trace; Preferably, the third conductive layer includes the second bonding trace; Preferably, the first conductive layer includes the first bonding trace.

5. The display panel according to claim 4, characterized in that: The planarization layer is located on a side of the fourth conductive layer away from the substrate.

6. The display panel according to claim 4, characterized in that: A capacitor dielectric layer is provided between the first conductive layer and the second conductive layer, and the first insulating layer includes the capacitor dielectric layer; Preferably, an interlayer insulating layer is provided between the second conductive layer and the third conductive layer, and the second insulating layer includes the interlayer insulating layer.

7. The display panel according to any one of claims 1 to 6, characterized in that: In the display area, the display panel further includes: A pixel defining layer, located on one side of the substrate, wherein the pixel defining layer defines a plurality of pixel openings; a light emitting unit, at least a portion of which is located within the pixel opening; An encapsulation layer, located on a side of the light-emitting unit away from the substrate; A touch layer, located on a side of the packaging layer away from the substrate; The filter layer is located on a side of the touch layer away from the substrate.

8. A method for preparing a display panel, characterized in that: The display panel includes a display area and a non-display area at least partially surrounding the display area, wherein the non-display area includes a bonding area; the method includes: providing a substrate; forming a bonding structure on one side of the substrate, the bonding structure being located in the bonding region; A planarization layer and a protective layer are formed on one side of the substrate, the protective layer is located in the bonding area, at least a portion of the planarization layer is located in the display area, the protective layer includes a protective portion, the protective portion covers at least a portion of the side wall of the bonding structure, the protective portion exposes at least a portion of the bonding structure away from the substrate, and the material of the protective layer is the same as that of the planarization layer.

9. The method for preparing a display panel according to claim 8, characterized in that: The step of forming a planarization layer and a protective layer on one side of the substrate comprises: forming a planarization layer in the display area, wherein the planarization layer extends to the bonding area and covers the bonding structure; The planarization layer located in the bonding area is formed into a first planarization portion and a second planarization portion surrounding the first planarization portion by using a semi-transparent mask, wherein the first planarization portion covers at least a portion of a side of the bonding structure away from the substrate, and the second planarization portion covers a side wall of the bonding structure, and along a thickness direction of the substrate, a thickness of the second planarization portion is greater than a thickness of the first planarization portion; forming a light-emitting unit, a first touch-control layer, and a second touch-control material layer in sequence on a side of the planarization layer located in the display area away from the substrate; Etching the second touch material layer to form a second touch layer, removing the first planarization portion, and reducing the thickness of the second planarization portion so that the second planarization portion forms a protection portion; Preferably, after the step of forming a planarization layer and a protective layer on one side of the substrate, the method further comprises: forming a filter layer on a side of the second touch layer away from the substrate; Preferably, along the thickness direction of the substrate, the thickness of the first planarized portion is greater than or equal to 0.5 μm and less than or equal to 1.2 μm; Preferably, along the thickness direction of the substrate, the thickness of the second planarization portion is greater than or equal to 2 μm and less than or equal to 3 μm.

10. An electronic device, characterized in that: The electronic device comprises the display panel according to any one of claims 1 to 8, or comprises a display panel prepared by the method for preparing a display panel according to claim 9 or 10.

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