A glass through-hole conductive interconnect substrate, its fabrication method and application

By preparing a template layer on a glass substrate and using a metal-catalyzed chemical etching method, combined with an oxidant and an etchant etching solution, a low-cost fabrication of a high aspect ratio glass through-hole conductive interconnect substrate was achieved. This solves the problems of complex and high-cost existing TGV substrate fabrication processes and is suitable for fields such as integrated passive components and microelectromechanical system packaging.

CN119954089BActive Publication Date: 2026-01-06SHENZHEN UNIV
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Patent Information

Application Number
CN202411239419.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-09-05
Publication Date
2026-01-06
Estimated Expiration
2044-09-05

AI Technical Summary

Technical Problem

Existing TGV substrate fabrication methods are complex, costly, and inefficient. Traditional sandblasting and photosensitive glass methods are too expensive, while combining laser drilling and chemical etching results in low yield and high time costs.

Method used

A template layer is prepared on a glass substrate using a metal-catalyzed chemical etching method. The metal catalyst reacts within the designed channels, and a etching solution containing oxidants and etchants is used to achieve rapid directional etching. Subsequently, a metal seed layer is deposited and copper is electrodeposited to fill the gap, thus preparing a glass through-hole conductive interconnect substrate with a high aspect ratio.

Benefits of technology

It simplifies the fabrication process, reduces costs, improves efficiency, and enhances the bonding strength of the metal seed layer, making it suitable for semiconductor device processing and microelectromechanical system packaging.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application relates to the technical field of conductive substrates, and discloses a glass through-hole conductive interconnection substrate and a preparation method and application thereof. The preparation method comprises the following steps: firstly, forming a metal catalyst aggregation on the outer surface of a glass substrate at a position where a through hole is to be formed; then, placing the glass substrate in a reaction solution, and corroding the glass substrate by using an oxidizing agent and a corrosive agent; after a specific reaction time, a TGV substrate with a high aspect ratio is obtained; finally, depositing a metal seed layer on the hole wall of the TGV substrate, and filling the TGV deep hole with metal by using electrodeposited copper to obtain the glass through-hole conductive interconnection substrate. The method is simple in operation, low in cost, stable in product quality, uniform in structure, and beneficial to large-scale promotion. In addition, the residual of the noble metal catalyst in the glass hole channel helps to improve the bonding strength of the prepared seed layer on the substrate and the effect of electrodeposited copper of the final TGV.
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Description

Technical Field

[0001] This invention belongs to the field of conductive substrate technology, and specifically relates to a glass through-hole conductive interconnect substrate, its preparation method and application. Background Technology

[0002] Advances in industries such as 5G, smart cars, and medical devices have led to the design of more portable and convenient electronic products. Significant research has been invested in the manufacturing, integration, and packaging of sensors to improve performance and reliability while reducing costs. The packaging of MEMS sensors can account for up to 30% of device production costs, and its sealing capabilities and interconnectivity have a significant impact on device performance, thus affecting sensor production and applications. Furthermore, compared to device-level packaging, wafer-level packaging offers higher manufacturing efficiency and superior device performance, with advantages in size reduction and cost savings.

[0003] Through-Glass Via (TGV) substrates provide vertical electrical interconnects through glass substrates. Compared to common silicon and SOI substrates, glass substrates offer superior electrical properties and lower parasitic capacitance, which is beneficial for extending high-frequency signal transmission. Furthermore, the excellent optical properties of glass make it more suitable for optical applications such as micro-opto-electro-mechanical systems (MOEMS). In addition, by adjusting the glass composition and optimizing surface treatment, the coefficient of thermal expansion (CTE) and mechanical strength of the substrate can be altered, thereby improving metal adhesion, stress control, and reliability. Therefore, TGV technology can support applications of various thicknesses (from 50 μm to 900 μm) and large wafer sizes (from 15.24 cm to 30.48 cm) and panels (from 510 × 515 mm to 1500 × 800 mm). Another advantage of glass substrates is their simpler manufacturing process; there is no need to deposit an insulating layer on the inner walls of the TGV, making the manufacturing cost of glass encapsulation substrates significantly lower than that of silicon substrates. Glass, including silicon and other glasses, can also be bonded to substrates using techniques such as anodic bonding and direct bonding, creating a stable vacuum environment for inertial sensors such as accelerometers and gyroscopes. In summary, the TGV process offers high-density, high-aspect-ratio glass via fabrication and metallization, thereby reducing device size while maintaining high-performance electrical interconnects, and has a very broad application prospect.

[0004] However, the fabrication of through-holes in TGV substrates still faces many challenges. Traditional sandblasting methods are unsuitable for small-sized structures, while photosensitive glass methods are too expensive. Therefore, the mainstream TGV fabrication methods currently include using laser drilling to form deep TGV holes and combining laser drilling with chemical etching. While the former can achieve high-precision channels, for deep structures, the cost of laser drilling increases dramatically. The overly smooth channels created by laser drilling are also detrimental to subsequent seed layer deposition. Furthermore, the excessively high temperature generated by the laser may cause excessive stress in the glass, leading to breakage and a decrease in yield. Combining laser drilling with chemical etching can reduce some costs, and the rough hole walls created by chemical etching are beneficial for seed layer deposition. However, the cost remains high, and the excessive time required for chemical etching results in high time costs. Additionally, the prolonged etching time and the etching of the hole walls can lead to an increase in the final hole diameter and the appearance of tilt angles within the hole walls. Therefore, it is still very necessary to develop a low-cost, short-time, simple method for preparing high aspect ratio TGV and to improve the bonding strength of metals within TGV. Existing technologies still need to be improved and developed. Summary of the Invention

[0005] In view of the shortcomings of the prior art, the purpose of this invention is to provide a glass through-hole conductive interconnect substrate and its preparation method and application, aiming to solve the problems of complex process, high cost and low efficiency of existing TGV substrate preparation methods.

[0006] The technical solution of the present invention is as follows:

[0007] A method for fabricating a glass through-hole conductive interconnect substrate, comprising the steps of:

[0008] A template layer is prepared on the surface of a glass substrate;

[0009] The template layer is processed by an external signal to form a void on the template layer and generate a glass substrate with designed channels;

[0010] Metal catalysts are deposited on glass substrates with designed channels. Due to the shielding effect of the template layer, only the metal catalysts that are concentrated in the designed channels and in contact with the glass substrate participate in the reaction. The remaining metal catalysts are on the surface of the template layer and do not participate in the reaction of the glass substrate.

[0011] A glass substrate with a metal catalyst deposited on it is immersed in a reaction solution composed of an oxidant and a corrosive agent. The corrosive agent in the reaction solution corrodes the glass substrate and the oxidant corrodes the glass substrate at the contact position with the metal catalyst, thereby achieving a rapid reaction in a specific direction of the glass substrate. After a predetermined reaction time, the glass substrate is removed, the remaining template layer on the surface of the glass substrate is removed and it is cleaned to obtain a TGV substrate with a high aspect ratio.

[0012] A metal seed layer is deposited on the hole wall of the TGV substrate, and finally copper electrodeposition is used to fill the TGV deep holes to obtain the glass through-hole conductive interconnect substrate.

[0013] The method for fabricating the glass through-hole conductive interconnect substrate, wherein the template layer is one of photoresist template, alumina template, PDMS template, PMMA template and PS template.

[0014] The method for preparing the glass through-hole conductive interconnect substrate, wherein the metal catalyst is one of silver, gold, palladium, ruthenium, and platinum, or an alloy composed of at least two of silver, gold, palladium, ruthenium, and platinum, or a metal compound of silver, gold, palladium, ruthenium, and platinum.

[0015] The method for preparing the glass through-hole conductive interconnect substrate, wherein the mass ratio of oxidant to etchant in the reaction solution is 1:1-20:1, wherein the oxidant is pure water or hydrogen peroxide, and the etchant is one of sodium hydroxide, potassium hydroxide, hydrofluoric acid, and ammonium fluoride.

[0016] The method for preparing the glass through-hole conductive interconnect substrate includes a reaction time of 10-250 min and a reaction temperature of 25-150℃ during the reaction of the glass substrate fascia in a reaction solution to prepare the TGV substrate.

[0017] The method for preparing the glass through-hole conductive interconnect substrate includes a process of depositing a metal seed layer on the hole wall of the TGV substrate. The material of the metal seed layer is one of copper, nickel, titanium and gold, and the thickness of the metal seed layer is 1-3 μm.

[0018] The method for preparing the glass through-hole conductive interconnect substrate, wherein in the step of metal filling the TGV deep holes with electrodeposited copper, the electroplating solution composition includes 150-250 g / L copper sulfate, 35-55 g / L sulfuric acid, 40-60 g / L chloride ions, 2-10 ppm accelerator A, 200-1000 ppm inhibitor B, 5-80 ppm leveling agent C, the electroplating current is 20-100 mA, and the electroplating time is 1-10 h.

[0019] The method for preparing the glass through-hole conductive interconnect substrate includes the following: the accelerator A is one of sodium polydithiopropane sulfonate, sodium thiazolinyl dithiopropane sulfonate, sodium 3,3-dithiodiethane sulfonate, and sodium 3,3-dithiodihexane sulfonate; the inhibitor B is polyethylene glycol with a molecular weight of 2000-10000; and the leveling agent C is one or more of diethylcaryosin azodimethylaniline, diethylcaryosin azodimethylphenol, caryosin azophenol, methylene blue, and methylene green.

[0020] A glass through-hole conductive interconnect substrate, wherein the substrate is prepared by the method described in this invention.

[0021] An application of a glass through-hole conductive interconnect substrate, wherein the glass through-hole conductive interconnect substrate of the present invention is used for the fabrication of semiconductor devices.

[0022] Beneficial effects: This invention uses a metal-catalyzed chemical etching process to prepare glass through-hole conductive interconnect substrates, avoiding the cumbersome and costly traditional TGV preparation processes. The method is simple to operate, low in cost, produces stable and uniform products, facilitating large-scale promotion. Furthermore, the residual noble metal catalyst in the glass channels helps improve the bonding strength of the seed layer on the substrate, enhancing the final TGV copper electrodeposition effect. The glass through-hole conductive interconnect substrates prepared by this invention have a wide range of applications, including integrated passive devices (IPD), microelectromechanical systems (MEMS) packaging, glass-based integrated waveguides, inter-chip optical interconnects, filters, RF modules, and other advanced semiconductor packaging fields. Attached Figure Description

[0023] Figure 1 A flowchart of a method for fabricating a glass through-hole conductive interconnect substrate according to the present invention is shown.

[0024] Figure 2 This is a schematic diagram of a method for fabricating a glass through-hole conductive interconnect substrate according to the present invention. Detailed Implementation

[0025] This invention provides a glass through-hole conductive interconnect substrate, its fabrication method, and its application. To make the objectives, technical solutions, and effects of this invention clearer and more explicit, the invention is further described in detail below. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0026] Please see Figure 1 , Figure 1 A flowchart of a method for fabricating a glass through-hole conductive interconnect substrate provided by the present invention is shown in the figure, which includes the following steps:

[0027] S100. Prepare a template layer on the surface of a glass substrate;

[0028] S200: The template layer is processed by an external signal to form a gap on the template layer and generate a glass substrate with designed channels;

[0029] S300. A metal catalyst is deposited on a glass substrate with designed channels. Due to the shielding of the template layer, only the metal catalyst that is gathered in the designed channels and in contact with the glass substrate participates in the reaction. The remaining metal catalyst is on the surface of the template layer and does not participate in the reaction of the glass substrate.

[0030] S400: Immerse the glass substrate with deposited metal catalyst in a reaction solution composed of oxidant and corrosive agent. The corrosive agent in the reaction solution corrodes the glass substrate and the oxidant corrodes the glass substrate at the contact position with the metal catalyst, thereby achieving a rapid reaction in a specific direction of the glass substrate. After a predetermined reaction time, remove the glass substrate, remove the remaining template layer on the surface of the glass substrate and clean it to obtain a TGV substrate with a high aspect ratio.

[0031] S500, deposit a metal seed layer on the hole wall of the TGV substrate, and finally fill the TGV deep hole with copper electrodeposition to obtain the glass through-hole conductive interconnect substrate.

[0032] Specifically, such as Figure 2As shown, the present invention first prepares a template layer 20 on the surface of a glass substrate 10. The template layer is one of photoresist template, alumina template, PDMS template, PMMA template, and PS template, but is not limited thereto. Then, processing is performed on the template layer by applying an external signal to form vacancies on the template layer 20 and generate a glass substrate 10 with designed channels 30. The processing method of the external signal is one of photolithography, high voltage pulse method, laser drilling method, or hot pressing method, but is not limited thereto. Next, a metal catalyst 40 is deposited on the glass substrate 10 with designed channels 30. Due to the obstruction of the template layer, only the metal catalyst concentrated within the designed channels and in contact with the glass substrate participates in the reaction. The remaining metal catalyst 40 remains on the surface of the template layer and does not participate in the reaction of the glass substrate. The metal catalyst is one of silver, gold, palladium, ruthenium, and platinum, or an alloy composed of at least two of silver, gold, palladium, ruthenium, and platinum, or a metal compound of silver, gold, palladium, ruthenium, and platinum, but is not limited to these. In this embodiment, the method for loading the metal catalyst onto the surface of the glass substrate is physical vapor deposition (PVD), chemical vapor deposition (CVD), chemical deposition (ELD), or magnetron sputtering. The glass substrate is then immersed in the reaction solution and placed flat in the solution, ensuring that the surface containing the template layer is vertically upward. Through the oxidation reaction catalyzed by the metal catalyst and the corrosion reaction of the etchant on the glass substrate, the reaction solution remains vertically downward, ultimately obtaining a high aspect ratio glass via. After the reaction is complete, the glass substrate is removed, the template is removed, and the substrate is cleaned to obtain a TGV substrate with a high aspect ratio. In this embodiment, the mass ratio of oxidant to etchant in the reaction solution is 1:1-20:1. The oxidant is pure water or hydrogen peroxide, and the etchant is one of sodium hydroxide, potassium hydroxide, hydrofluoric acid, and ammonium fluoride, but not limited to these. In this embodiment, the reaction time of the glass substrate in the reaction solution is 10-50 min, and the reaction temperature is 25-150℃. After the reaction, the template is removed from the glass substrate by immersion in an acid solution, an alkaline solution, high-temperature calcination, or an organic solution. The TGV substrate is cleaned using one or more of ultrapure water, ethanol, acetone, and commercially available acidic degreasing solutions at a temperature of 25-60℃ for 10-60 min, with ultrasonic assistance. Finally, a metal seed layer 50 is deposited on the hole walls of the TGV substrate, and copper electrodeposition is used to fill the deep holes of the TGV substrate, thus obtaining the glass through-hole conductive interconnect substrate.In this embodiment, a metal seed layer is deposited in the deep holes of the TGV substrate using chemical plating or PVD. The material of the metal seed layer is one of copper, nickel, titanium, and gold, and the thickness of the metal seed layer is 1-3 μm. After the seed layer is completed, copper is electrodeposited to fill the TGV deep holes. The electroplating solution composition includes 150-250 g / L copper sulfate, 35-55 g / L sulfuric acid, 40-60 g / L chloride ions, accelerator A 2-10 ppm, inhibitor B 200-1000 ppm, and leveling agent C. The electroplating current is 20-100 mA, the electroplating time is 1-10 h, the accelerator A is one of sodium polydithiopropane sulfonate, sodium thiazolinyl dithiopropane sulfonate, sodium 3,3-dithiodiethane sulfonate, and sodium 3,3-dithiodihexane sulfonate; the inhibitor B is polyethylene glycol with a molecular weight of 2000-10000; the leveling agent C is one or more of diethylcaryosin azodimethylaniline, diethylcaryosin azodimethylphenol, caryosin azophenol, methylene blue, and methylene green.

[0033] This invention employs a wet chemical method for TGV fabrication. After assembling a template layer and pre-depositing a metal catalyst on the surface of a glass substrate, a metal-catalyzed chemical etching method is used. The metal catalyst accelerates the oxidation reaction of the oxidant on the contact portion of the glass substrate, while the etchant in the reaction solution acts on the glass substrate, achieving a directional reaction of the glass electrode and obtaining high aspect ratio glass vias. This invention overcomes the problems of complex processes, high costs, and low efficiency, and significantly shortens the time compared to chemical etching. It provides a low-cost method for fabricating TGV substrates with high uniformity and high aspect ratio. After depositing a seed layer within the vias via chemical plating or physical vapor deposition (PVD), copper is electrodeposited to obtain a TGV substrate with uniform copper filling. The resulting TGV substrate can be applied in semiconductor processing and other fields, such as integrated passive devices (IPD), microelectromechanical systems (MEMS) packaging, glass-based integrated waveguides, inter-chip optical interconnects, filters, and RF modules.

[0034] The present invention will be further explained and illustrated below through specific embodiments:

[0035] Example 1

[0036] A method for fabricating a glass through-hole conductive interconnect substrate includes the following steps:

[0037] First, a template substrate is constructed on the surface of a glass substrate. Commercial photodegradable photoresist is used as the template substrate, and the photoresist is uniformly coated on the glass substrate by spin coating. Then, a commercial photolithography machine is used to expose and decompose the photoresist at the through-hole positions. After the photolithography is completed, it is cleaned with pure water. The surface of the obtained glass substrate is covered with photoresist except for the positions where the holes to be processed are exposed.

[0038] Secondly, a metal catalyst was loaded, using silver as the catalyst, and a silver metal layer was deposited on the surface of a glass substrate with a template by PVD.

[0039] After deposition, the glass substrate was immersed in the reaction solution. The oxidant in the reaction solution was pure water, and the etchant was 5M hydrofluoric acid. The mass ratio of oxidant to etchant was 5:1. The temperature was set to 80℃ and the reaction was carried out for 150 min.

[0040] After the reaction was completed, the glass substrate was removed, first immersed in 60℃ DMSO solution for 30 min and sonicated, and then placed in a mixture of pure water and ethanol solution at 50℃ for 30 min of ultrasonic cleaning to obtain TGV channels with a pore size of 86 μm.

[0041] A metal seed layer was prepared on TGV using a chemical copper plating solution. The reaction temperature was 55℃ and the reaction time was 1h. At the same time, vacuuming was used to ensure that the chemical copper plating solution entered the deep hole, and finally a copper seed layer with a thickness of 1μm was obtained.

[0042] After preparing the seed layer, the TGV substrate was rinsed with deionized water and ethanol to remove the chemical plating solution. Then, the TGV substrate was immersed in sulfuric acid solution and vacuumed for 10 minutes to remove air bubbles from the pores. The TGV substrate was then clamped onto the cathode, and an iridium-tantalum-titanium mesh was used as the anode for electrodeposition at a current of 70 mA for 3 hours. The plating solution composition was: 220 g / L copper sulfate, 50 g / L sulfuric acid, 50 g / L Cl-, 3 ppm SPS accelerator, 200 ppm PE G inhibitor (10000), and 50 ppm methylene violet leveling agent, ultimately yielding a uniformly metal-filled TGV substrate.

[0043] Example 2

[0044] A method for fabricating a glass through-hole conductive interconnect substrate includes the following steps:

[0045] First, a template substrate is constructed on the surface of a glass substrate. A commercially available photodegradable photoresist is used as the template substrate, and the photoresist is uniformly coated onto the glass substrate using a spin coating method. Then, a commercial photolithography machine is used to expose and decompose the photoresist at the via locations. After photolithography is completed, the substrate is cleaned with pure water. The resulting glass substrate has a surface covered with photoresist except for the areas where the vias need to be processed.

[0046] Secondly, a metal catalyst was loaded, using platinum as the catalyst, and a platinum metal layer was deposited on the surface of a glass substrate with a template by magnetron sputtering.

[0047] After deposition, the glass substrate was immersed in a reaction solution containing 50% hydrogen peroxide as the oxidant and 5M hydrofluoric acid as the etchant, with a ratio of oxidant:etchant = 10:1. The temperature was set to 100℃, and the reaction was carried out for 90 minutes.

[0048] After the reaction was completed, the glass substrate was removed, first immersed in 70℃ NMP solution for 30 min and sonicated, and then placed in a mixture of pure water and ethanol solution at 50℃ for 30 min of ultrasonic cleaning, finally obtaining TGV channels with a pore size of 56 μm.

[0049] A metal seed layer was prepared on TGV using electroless nickel plating solution. The reaction temperature was 60℃ and the reaction time was 40h. Simultaneously, vacuuming was used to ensure that the electroless nickel plating solution entered the deep hole, and finally a nickel seed layer with a thickness of 1μm was obtained.

[0050] After preparing the seed layer, the TGV substrate was rinsed with deionized water and ethanol to remove the chemical plating solution. Then, the TGV substrate was immersed in sulfuric acid solution under vacuum for 10 minutes to remove air bubbles from the pores. The TGV substrate was then clamped onto the cathode, and an iridium-tantalum-titanium mesh was used as the anode for electrodeposition at a current of 50 mA for 4.5 hours. The plating solution composition was: 250 g / L copper sulfate, 40 g / L sulfuric acid, 50 g / L Cl-, 2 ppm SPS accelerator, 200 ppm PEG8000 inhibitor, and 20 ppm methylene green leveling agent, ultimately yielding a uniformly metal-filled TGV substrate.

[0051] Example 3

[0052] A method for fabricating a glass through-hole conductive interconnect substrate includes the following steps:

[0053] First, a template substrate is constructed on the surface of a glass substrate. A commercially available photodegradable photoresist is used as the template substrate, and the photoresist is uniformly coated onto the glass substrate using a spin coating method. Then, a commercial photolithography machine is used to expose and decompose the photoresist at the via locations. After photolithography is completed, the substrate is cleaned with pure water. The resulting glass substrate has a surface covered with photoresist except for the areas where the vias need to be processed.

[0054] Secondly, a metal catalyst is loaded, using ruthenium alloy as the catalyst, and a ruthenium alloy layer is deposited on the surface of a glass substrate with a template by magnetron sputtering.

[0055] After deposition, the glass substrate was immersed in a reaction solution containing 50% hydrogen peroxide as the oxidant and 5M hydrofluoric acid solution as the etchant, with a ratio of oxidant:etchant = 5:1. The temperature was set to 100℃, and the reaction was carried out for 90 minutes.

[0056] After the reaction was completed, the glass substrate was removed, first immersed in 5% potassium hydroxide solution at 50℃ for 30 minutes and sonicated, and then placed in a mixture of acetone and ethanol solution at 60℃ for 30 minutes of ultrasonic cleaning, finally obtaining TGV deep holes with a pore size of 42um.

[0057] A copper seed layer with a thickness of 3 μm was prepared by PVD on TGV.

[0058] After preparing the seed layer, the TGV substrate was rinsed with deionized water and ethanol to remove the chemical plating solution. Then, the TGV substrate was immersed in sulfuric acid solution under vacuum for 10 minutes to remove air bubbles from the pores. The TGV substrate was then clamped onto the cathode, and electrodeposition was performed using an iridium-tantalum-titanium mesh as the anode at a current of 40 mA for 5 hours. The plating solution composition was: 220 g / L copper sulfate, 50 g / L sulfuric acid, 50 g / L Cl-, 2 ppm SH-110 accelerator, 200 ppm PEG10000 inhibitor, and 5 ppm Janus Green leveling agent. A uniformly metal-filled TGV substrate was finally obtained.

[0059] Example 4

[0060] A method for fabricating a glass through-hole conductive interconnect substrate includes the following steps:

[0061] First, a glass substrate template is constructed using alumina as the template substrate. A commercial laser machine is used to laser-drill holes in the alumina substrate, with the drilling positions being the through holes on the glass substrate. After drilling is completed, the alumina template is assembled with the glass substrate.

[0062] Secondly, a metal catalyst was loaded, using platinum as the catalyst, and a platinum metal layer was deposited on the surface of a glass substrate with a template by PVD.

[0063] After deposition, the glass substrate was immersed in a reaction solution containing 30% hydrogen peroxide as the oxidant and 5M potassium hydroxide solution as the etchant, with a ratio of oxidant:etchant = 15:1. The temperature was set to 85℃, and the reaction was carried out for 90 minutes.

[0064] After the reaction was completed, the glass substrate was removed, first immersed in a 50°C sulfuric acid solution for 30 minutes and sonicated, and then placed in a commercial degreasing solution for room temperature ultrasonic cleaning for 10 minutes to finally obtain TGV with a pore size of 70 μm.

[0065] A metal seed layer was prepared on TGV using a chemical copper plating solution. The reaction temperature was 55℃ and the reaction time was 1h. At the same time, vacuuming was used to ensure that the chemical copper plating solution entered the deep hole, and finally a copper seed layer with a thickness of 1μm was obtained.

[0066] After preparing the seed layer, the TGV substrate was rinsed with deionized water and ethanol to remove the chemical plating solution. Then, the TGV substrate was immersed in sulfuric acid solution under vacuum for 10 minutes to remove air bubbles from the pores. The TGV substrate was then clamped onto the cathode, and electrodeposition was performed using an iridium-tantalum-titanium mesh as the anode at a current of 60 mA for 4 hours. The plating solution composition was: 200 g / L copper sulfate, 50 g / L sulfuric acid, 50 g / L Cl-, 3 ppm SPS accelerator, 400 ppm PE G inhibitor (10000), and 6 ppm Janus Green leveling agent. A uniformly metal-filled TGV substrate was finally obtained.

[0067] Example 5

[0068] A method for fabricating a glass through-hole conductive interconnect substrate includes the following steps:

[0069] First, a template substrate is constructed on the surface of a glass substrate. A commercially available photodegradable photoresist is used as the template substrate, and the photoresist is uniformly coated onto the glass substrate using a spin coating method. Then, a commercial photolithography machine is used to expose and decompose the photoresist at the via locations. After photolithography is completed, the substrate is cleaned with pure water. The resulting glass substrate has a surface covered with photoresist except for the areas where the vias need to be processed.

[0070] Secondly, a metal catalyst was loaded, using platinum-titanium alloy as the catalyst, and a platinum-titanium alloy layer was deposited on the surface of a glass substrate with a template by magnetron sputtering.

[0071] After deposition, the glass substrate was immersed in the reaction solution, which contained a 50% H₂O₂ solution as the oxidant and an 8M ammonium fluoride solution as the etchant, with a ratio of oxidant:etchant = 8:1. The temperature was set to 90℃, and the reaction was carried out for 130 min.

[0072] After the reaction was completed, the glass substrate was removed, placed in a 5% potassium hydroxide solution at 50°C for 30 minutes and sonicated, and then placed in a commercial degreasing agent for ultrasonic cleaning for 20 minutes to finally obtain TG V with a pore size of 36 μm.

[0073] A titanium seed layer with a thickness of 2 μm was prepared by PVD on TGV.

[0074] After preparing the seed layer, the TGV substrate was rinsed with deionized water and ethanol to remove the chemical plating solution. Then, the TGV substrate was immersed in sulfuric acid solution under vacuum for 10 minutes to remove air bubbles from the pores. The TGV substrate was then clamped onto the cathode, and an iridium-tantalum-titanium mesh was used as the anode for electrodeposition at a current of 30 mA for 6 hours. The plating solution composition was: 220 g / L copper sulfate, 50 g / L sulfuric acid, 50 g / L Cl-, 2 ppm SPS accelerator, 300 ppm PE G8000 inhibitor, and 50 ppm methylene violet leveling agent. A uniformly metal-filled TGV substrate was finally obtained.

[0075] In summary, this invention employs a wet chemical method for TGV preparation. After assembling a template and pre-depositing a metal catalyst on the surface of a glass substrate, a metal-catalyzed chemical etching method is used to accelerate the oxidation reaction of the oxidant on the contact portion of the glass substrate using the metal catalyst. Simultaneously, combined with the effect of the etchant in the solution on the glass substrate, a directional reaction of the glass substrate is achieved, resulting in glass vias with high aspect ratios. This invention effectively overcomes the problems of complex processes, high costs, and low efficiency in existing TGV preparation methods.

[0076] It should be understood that the application of the present invention is not limited to the examples above. Those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.

Claims

1. A method for fabricating a glass through-hole conductive interconnect substrate, characterized in that, The method comprises the steps of: preparing a template layer on the surface of a glass substrate; processing the template layer by an external signal to form vacancies on the template layer and generate a glass substrate with designed channels; depositing a metal catalyst on the glass substrate with designed channels, only the metal catalyst gathered in the designed channels and contacted with the glass substrate participates in the reaction due to the shielding of the template layer, and the remaining metal catalyst on the surface of the template layer does not participate in the reaction of the glass substrate; immersing the glass substrate with the deposited metal catalyst in a reaction solution composed of an oxidizing agent and a corrosive agent, and realizing the rapid reaction of the glass substrate in a specific direction by the corrosion of the glass substrate by the corrosive agent in the reaction solution and the corrosion of the glass substrate at the contact position of the metal catalyst by the oxidizing agent, taking out the glass substrate after a predetermined reaction time, removing the remaining template layer on the surface of the glass substrate and cleaning to obtain a TGV substrate with a high depth-width ratio; depositing a metal seed layer on the hole wall of the TGV substrate, and finally filling the TGV deep hole with metal by electrodeposition of copper to obtain the glass through-hole conductive interconnection substrate.

2. The method for fabricating a glass through-hole conductive interconnect substrate according to claim 1, characterized in that, The template layer is one of a photoresist template, an aluminum oxide template, a PDMS template, a PMMA template and a PS template.

3. The method for fabricating a glass through-hole conductive interconnect substrate according to claim 1, characterized in that, The metal catalyst is one of silver, gold, palladium, ruthenium and platinum, or an alloy composed of at least two of silver, gold, palladium, ruthenium and platinum, or a metal compound of silver, gold, palladium, ruthenium and platinum.

4. The method for fabricating a glass through-hole conductive interconnect substrate according to claim 1, characterized in that, The mass ratio of the oxidizing agent to the corrosive agent in the reaction solution is 1:1-20:1, wherein the oxidizing agent is pure water or hydrogen peroxide, and the corrosive agent is one of sodium hydroxide, potassium hydroxide, hydrofluoric acid and ammonium fluoride.

5. The method for fabricating a glass through-hole conductive interconnect substrate according to claim 1, characterized in that, In the process of immersing the glass substrate in the reaction solution to prepare the TGV substrate by reaction, the reaction time is 10-250 min, and the reaction temperature is 25-150℃.

6. The method for fabricating a glass through-hole conductive interconnect substrate according to claim 1, characterized in that, In the process of depositing a metal seed layer on the hole wall of the TGV substrate, the material of the metal seed layer is one of copper, nickel, titanium and gold, and the thickness of the metal seed layer is 1-3 μm.

7. The method for fabricating a glass through-hole conductive interconnect substrate according to claim 1, characterized in that, In the step of filling the TGV deep hole with metal by electrodeposition of copper, the components of the electroplating solution include copper sulfate 150-250 g / L, sulfuric acid 35-55 g / L, chloride ion 40-60 g / L, accelerator A 2-10 ppm, inhibitor B 200-1000 ppm, leveling agent C 5-80 ppm, electroplating current 20-100 mA, and electroplating time 1-10 h.

8. The method for fabricating a glass through-hole conductive interconnect substrate according to claim 7, characterized in that, The accelerator A is one of polydisulfide dipropane sulfonate sodium, thiazoline disulfide propane sulfonate sodium, 3,3-dithiodiethane sulfonate sodium and 3,3-dithiodihexane sulfonate sodium; the inhibitor B is polyethylene glycol with a molecular weight of 2000-10000; and the leveling agent C is one or more of diethyl saffron azo dimethyl aniline, diethyl saffron azo dimethyl phenol, saffron azo phenol, methylene blue and methylene green.

9. A glass via conductive interconnect substrate, characterized by, The glass through-hole conductive interconnection substrate is prepared by the method of any one of claims 1-8.

10. Use of a glass via conductive interconnect substrate, characterized in that, The glass through-hole conductive interconnection substrate is used for processing of a semiconductor device.

Citation Information

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