Current detection method and current detection system

Abstract

The invention discloses a current detection method and a current detection system. The method comprises the following steps: sending a double-pulse driving signal to a second switching device, and measuring the output voltage of a to-be-detected point of a current test circuit when the second switching device is in an on transient state; when it is detected that the output voltage is larger than a preset voltage value and the change value of the output voltage is within a preset voltage range, target platform time corresponding to the current sampling time is obtained; according to a target association relationship corresponding to the first bus voltage, determining an output current corresponding to the target platform time, the target association relationship being used for representing a relationship between the half-bridge output current of the inverter and the voltage platform time corresponding to the point to be detected; and determining the output current corresponding to the target platform time as the half-bridge output current of the inverter. By adopting the scheme provided by the invention, the simple measurement of the half-bridge output current can be realized, and the problems that the system space is occupied and the system integration degree is reduced due to the additional introduction of the sensor are avoided.

Description

Technical Field

[0001] The present application belongs to the field of power electronics technology, and in particular, relates to a current detection method and a current detection system. Background Art

[0002] An inverter is a power electronic converter that converts DC power into AC power by turning on and off semiconductor power switching devices. It can be used in motor drive and AC / DC conversion. In the inverter, power conversion is achieved by full-bridge and three-phase bridge circuits built with power semiconductor components. In the scenario where an inverter is used to drive a motor, the phase current of the inverter needs to be obtained to achieve closed-loop control. To ensure control accuracy, the output current of each half-bridge of the inverter is usually sampled.

[0003] However, in the related art, it is usually necessary to introduce additional sensor elements to achieve the measurement of the inverter current. In this manner, the sensor arrangement occupies space and reduces the system integration. Summary of the invention

[0004] The embodiments of the present application provide a current detection method and a current detection system, which can realize simple measurement of half-bridge output current and avoid the problem of occupying system space and reducing system integration caused by the additional introduction of sensors.

[0005] In a first aspect, an embodiment of the present application provides a current detection method, which is applied to a current test circuit for testing the half-bridge output current of an inverter, wherein the current test circuit includes: a bus capacitor connected in series in sequence through a DC bus, a first switch device and a second switch device constituting a half-bridge circuit of an inverter, and a load inductor connected in parallel with the first switch device; a DC voltage source is connected in parallel to the bus capacitor, and the DC voltage source outputs a first bus voltage; the method includes: sending a double-pulse drive signal to the second switch device, measuring the output voltage corresponding to the point to be detected in the current test circuit when the second switch device is in an on transient state; and upon detecting that the output voltage is greater than a preset value Assuming a voltage value, and when the change value of the output voltage is within a preset voltage range, obtain the target platform time of the current sampling time within the voltage platform duration, wherein the voltage platform duration is the duration during which the output voltage corresponding to the point to be detected is greater than the preset voltage value and the change value of the output voltage is within the preset voltage range; determine the output current corresponding to the target platform time according to the target association relationship corresponding to the first bus voltage, wherein the target association relationship is used to characterize the relationship between the half-bridge output current of the inverter and the voltage platform time corresponding to the point to be detected; determine the output current corresponding to the target platform time as the half-bridge output current of the inverter.

[0006] In a second aspect, an embodiment of the present application provides a current detection system, which includes: a controller and a current testing circuit, wherein the controller executes the current detection method as described in the first aspect to control the current testing circuit to detect the half-bridge output current of the inverter.

[0007] In a third aspect, an embodiment of the present application provides an electronic device, comprising: a processor and a memory storing computer program instructions; when the processor executes the computer program instructions, the current detection method described in the first aspect is implemented.

[0008] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium having computer program instructions stored thereon. When the computer program instructions are executed by a processor, the current detection method as described in the first aspect is implemented.

[0009] In a fifth aspect, an embodiment of the present application provides a computer program product. When instructions in the computer program product are executed by a processor of an electronic device, the electronic device executes the current detection method as described in the first aspect.

[0010] It can be seen from the above content that in the embodiment of the present application, the target association relationship is used to characterize the association relationship between the half-bridge output current of the inverter and the target platform time. Therefore, after determining the target platform time, the half-bridge output current can be determined by the above association relationship. The target platform time is determined according to the output voltage of the point to be detected in the current test circuit, that is, in the embodiment of the present application, it is only necessary to measure the output voltage of the point to be detected to determine the target platform time, and then determine the half-bridge output current corresponding to the target platform time according to the target association relationship. This process does not require the introduction of additional sensor elements, which not only simplifies the test steps of the half-bridge output current, realizes the simple measurement of the half-bridge output current, but also avoids the problem of occupying system space and reducing system integration caused by the additional introduction of sensors. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] In order to more clearly illustrate the technical solution of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0012] Figure 1 is a schematic diagram of a current testing circuit provided by an embodiment of the present application;

[0013] Figure 2 is a flow chart of a current detection method provided by an embodiment of the present application;

[0014] Figure 3is a circuit schematic diagram of a double pulse test provided by an embodiment of the present application;

[0015] Figure 4 is a waveform diagram of the switching characteristics of the switching device S2 provided in one embodiment of the present application;

[0016] Figure 5 This is a waveform diagram of the switching characteristics of the switching device S2 when the bus voltage is 28V provided by an embodiment of the present application;

[0017] Figure 6 This is a schematic diagram of an inductor current freewheeling path provided by an embodiment of the present application;

[0018] Figure 7 This is a schematic diagram of the current path before and after the switching device S1 is switched, provided in one embodiment of the present application;

[0019] Figure 8 This is a circuit schematic diagram of a double pulse test when the test points are deployed on both sides of the bus capacitor provided by an embodiment of the present application;

[0020] Fig. 9 It is a voltage waveform provided by an embodiment of the present application when the test points are deployed on both sides of the bus capacitor;

[0021] Fig.10 It is a schematic diagram of the structure of an electronic device provided by an embodiment of the present application. DETAILED DESCRIPTION

[0022] The features and exemplary embodiments of various aspects of the present application will be described in detail below. In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, rather than to limit the present application. For those skilled in the art, the present application can be implemented without the need for some of these specific details. The following description of the embodiments is only to provide a better understanding of the present application by illustrating the examples of the present application.

[0023] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "include..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0024] For ease of understanding, before explaining the solution provided in this application, the relevant background involved in the solution provided in this application is first explained.

[0025] An inverter is a power electronic converter that converts DC power into AC power by turning on and off semiconductor power switching devices. It can be used in various motor drives, DC and AC conversion. In an inverter, full-bridge and three-phase bridge circuits built with power semiconductor components such as MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) and IGBT (Insulate-Gate Bipolar Transistor) are used to achieve power conversion. The inverter usually contains 2 to 3 half-bridge circuits. In each half-bridge circuit, the high-frequency switching of switching components such as MOSFET and IGBT is controlled to achieve commutation, output the desired voltage and current waveform, and other functions. In the scenario of using an inverter to drive a motor, it is often necessary to obtain the phase current of the inverter to achieve closed-loop control of the motor. Therefore, it is of great significance to sample the half-bridge output current of the inverter.

[0026] In order to ensure the control accuracy, the output current of each half-bridge circuit of the inverter needs to be measured. At present, current sensors are usually used to measure current, such as Rogowski coils, shunt resistors, Person current loops, Hall sensors, etc. However, each measurement method requires the introduction of additional sensors, which increases the system cost. At the same time, the sensor layout occupies system space and reduces the system integration. In addition, the current detection circuit in the related art is deployed with a shunt resistor. The shunt resistor is small in size, but generates a lot of heat, and is not suitable for high-power systems.

[0027] In order to solve the problems existing in the related art, the embodiments of the present application provide a current detection method and a current detection system. The current detection method can be applied to a current test system for testing the half-bridge output current of an inverter, and the current test system includes: a controller and a current test circuit, and the controller executes the current detection method to control the current test circuit to detect the half-bridge output current of the inverter.

[0028] In an embodiment of the present application, the current testing circuit includes: a bus capacitor connected in series through a DC bus, a first switching device and a second switching device constituting a half-bridge circuit of an inverter, and a load inductor connected in parallel with the first switching device; a DC voltage source is connected in parallel to the bus capacitor, and the DC voltage source outputs a first bus voltage.

[0029] The switch device constituting the half-bridge circuit of the inverter may be a MOSFET, an IGBT, or other switch elements. In the embodiment of the present application, the switch device is taken as an example for explanation.

[0030] As an example, Figure 1 Figure 1 shows a schematic diagram of a current test circuit using MOSFET as a switching device. Figure 1 In the inverter, MOSFET tube S1 and MOSFET tube S2 form a half-bridge circuit, and the gate of each MOSFET tube is connected to an external resistor R G(ext) ; A diode is connected in parallel between the source and drain of each MOSFET tube; after the two MOSFET tubes are connected in series, they are connected to the bus capacitor C bus A DC voltage source connected in parallel with the bus capacitor is provided to provide a first bus voltage U for the bus capacitor. bus .

[0031] It should be noted that in practical applications, usually in the current test circuit, a load inductor ( Figure 1 not shown).

[0032] The current detection method provided in the embodiment of the present application is first introduced below.

[0033] It should be noted that the current detection method provided in the embodiment of the present application can measure the half-bridge output current in the low-voltage inverter system based on the voltage waveform during the opening process of the switching component. Among them, the method provided in the embodiment of the present application can be applied to low-voltage inverter systems, such as 5V, 12V, 24V, 28V, etc., and cannot be applied to high-voltage inverter systems above 100V.

[0034] In addition, in the embodiment of the present application, the voltage used to test the switching devices of the inverter is low voltage, that is, the first bus voltage output by the DC voltage source is low voltage. In practical applications, if the bus voltage is lower than 10V, the current detection result is easily affected by the on-state voltage drop of the switching device, and if the bus voltage is higher than 50V, the current change rate will be short-lived and the measurement accuracy will be poor. Therefore, in the embodiment of the present application, the voltage range of the first bus voltage output by the DC voltage source is 10V to 50V.

[0035] In addition, the solution provided in the embodiment of the present application can be applied to power electronic systems with low on-resistance and high rated current (above 80A). Under the same test conditions, the larger the current, the longer the corresponding current rise time, and the better the measurement accuracy. When the rated current of the switching device is small, use a lower bus voltage or increase the load inductance value to reduce the current change rate during the opening process and increase the current rise time to improve the accuracy of the current measurement results. The solution provided in the embodiment of the present application can also be used for other low-voltage and high-current power electronic systems with large current commutation processes, for example, low-voltage and high-current DC (Direct Current, direct current) / DC converters, AC (Alternating Current, alternating current) / AC converters, low-voltage power converters, etc.

[0036] Figure 2 FIG. 1 is a flow chart of a current detection method provided by an embodiment of the present application. Figure 2 As shown, the method comprises the following steps:

[0037] Step S201 , by sending a double pulse driving signal to the second switch device, the output voltage corresponding to the to-be-detected point of the current test circuit when the second switch device is in an on transient state is measured.

[0038] In step S201, the second switch device may be Figure 1 The MOSFET tube S2 in the embodiment, accordingly, the first switch device can be Figure 1 In the embodiment of the present application, the points to be detected of the current test circuit may include but are not limited to the source and drain of the first switch device or the second switch device, and both ends of the bus capacitor.

[0039] In one embodiment, a double pulse test method may be used to implement measurement of the inverter's half-bridge output current. In this scenario, the inverter's half-bridge output current may be measured by outputting a double pulse drive signal to the second switching device. Figure 3 shows the schematic diagram of the double pulse test, in Figure 3 In the embodiment, the detection points are arranged at the source and drain of the second switching device to detect the voltage between the source and drain of the second switching device. Figure 3 In the figure, L is the load inductance connected in parallel with the switch device S1, L1 is the parasitic inductance of the bus capacitor, and L2, L3, L4, and L5 are the parasitic inductances of each current loop. bus Voltage U is applied across both ends bus ,exist Figure 3 In the process, the switch device S1 is always in the off state, and the current direction is as follows: Figure 3 By sending a double pulse drive signal to the switch device S2, the switching characteristics of the switch device S2 under a specific voltage and current can be obtained. The waveform of the entire test process is shown in Figure 4 As shown. Figure 4 In, V GS is the gate-source voltage between the source and gate of the switching device S2, I DS I is the output current of the source of the switching device S2, that is, the half-bridge output current to be measured in the embodiment of the present application; L is the current flowing through the load inductor L; V DS is the drain-source voltage between the source and drain of the switching device S2.

[0040] exist Figure 4 In the example, at time t0, the gate-source voltage of the switch device S2 rises to the turn-on voltage, and the switch device S2 is turned on; in the stage t0-t1, the switch device S2 forms a loop with the load inductor L and the bus capacitor, and the inductor current I L starts to climb; at time t1, a shutdown signal is sent to the switch device S2, and the switch device S2 is turned off. L Therefore, the load inductance L is freewheeling through the anti-parallel diode in the switch device S1; in the stage t1-t2, the switch device S2 is turned off, and the current I DS is zero, the voltage V across the switching device S2 DS =Equal to the bus voltage; at time t2, an opening signal is sent to the switch device S2, and the switch device S2 is turned on again, and the voltage across it V DS The reduction is the conduction voltage drop.

[0041] After the inverter system is turned on, the voltage V DS The bus voltage U bus Basically all of it is added to the system parasitic inductance (i.e. parasitic inductance L1-L5) in the current detection circuit. The actual waveform measured in the current detection circuit with a typical bus voltage of 28V is as follows Figure 5 As shown, in Figure 5 In the case of DS There is a linear rising stage, which is the turn-on transient state of the switch device. In this process, the voltage V across the switch device S2 isDS The test waveform is as follows Figure 5 As shown in the figure, due to the existence of parasitic inductance L4, V DS The voltage drops and an obvious voltage step appears.

[0042] It should be noted that in the embodiments of the present application, parasitic inductance is unintentional and unnecessary inductance existing in the circuit, for example, the inductance that is unexpectedly and accidentally generated between circuit conductors such as printed circuit boards, component pins, and connectors.

[0043] Step S202, when it is detected that the output voltage is greater than the preset voltage value and the change value of the output voltage is within the preset voltage range, a target platform time of the current sampling time within the voltage platform time length is obtained.

[0044] In step S202, when the output voltage corresponding to the point to be detected is greater than a preset voltage value (for example, 0), and the change value of the output voltage is within the preset voltage range, it can be determined that the output voltage of the point to be detected is Figure 5 The voltage corresponding to the voltage platform in indicates that the second switch device is in the voltage platform stage. The duration corresponding to the voltage platform stage is the voltage platform duration, that is, the voltage platform duration is the duration during which the output voltage corresponding to the point to be detected is greater than the preset voltage value and the change value of the output voltage is within the preset voltage range.

[0045] It should be noted that the duration of the voltage platform is usually in the order of ns, which is relatively short. Figure 5 As shown, during the voltage platform duration, the inverter half-bridge output current I DS The current detection method provided in the embodiment of the present application is to detect the I corresponding to the current sampling time within the voltage platform duration. DS For the convenience of calculation, in the embodiment of the present application, the current sampling time needs to be converted into a target platform time, wherein the target platform time is a moment within the voltage platform duration, and the starting moment of the voltage platform duration is used as the zero moment.

[0046] Step S203, determining the output current corresponding to the target platform time according to the target association relationship corresponding to the first bus voltage.

[0047] In step S203, the target association relationship is used to characterize the relationship between the inverter half-bridge output current and the voltage platform time corresponding to the point to be detected. The target association relationship can be obtained by calibration, for example, by experimentally measuring the relationship between the half-bridge output current and the platform time when the second switch device is in the on-transient state; the above target association relationship can also be determined by non-calibration, for example, by performing circuit analysis on the current detection circuit to determine the relationship between the half-bridge output voltage and the platform time.

[0048] It should be noted that in actual applications, the bus voltage provided by the DC voltage source to the bus capacitor may be different, and under different bus voltages, the correlation between the platform time and the half-bridge output current may also be different. Therefore, in an embodiment of the present application, when it is determined that the bus voltage corresponding to the bus capacitor is the first bus voltage, the target correlation corresponding to the first bus voltage is first determined, and then the half-bridge output current corresponding to the target platform time is determined based on the target correlation.

[0049] Step S204: determine the output current corresponding to the target platform time as the half-bridge output current of the inverter.

[0050] After the target platform time is determined in step S203, the half-bridge output current corresponding to the target platform time can be determined according to the correlation between the platform time and the half-bridge output current. This process only requires setting a voltage detection device at the point to be detected, without introducing additional sensors, thereby reducing the detection cost of the half-bridge output current.

[0051] Based on the scheme defined by the above steps S201 to S204, it can be known that in the embodiment of the present application, the target association relationship is used to characterize the association relationship between the half-bridge output current of the inverter and the target platform time. Therefore, after determining the target platform time, the half-bridge output current can be determined according to the above association relationship. The target platform time is determined according to the output voltage of the point to be detected in the current test circuit, that is, in the embodiment of the present application, it is only necessary to measure the output voltage of the point to be detected to determine the target platform time, and then determine the half-bridge output current corresponding to the target platform time according to the target association relationship. This process does not require the introduction of additional sensor elements, which not only simplifies the test steps of the half-bridge output current, realizes the simple measurement of the half-bridge output current, but also avoids the problem of occupying system space and reducing system integration caused by the additional introduction of sensors.

[0052] The following is an explanation of the various steps of the current detection method provided in the embodiment of the present application.

[0053] In an embodiment of the present application, the detection position of the point to be detected in the current testing system is different, and the detection method of the half-bridge output current is also different. Therefore, before detecting the half-bridge output current of the inverter, it is necessary to determine the position of the point to be detected, and then determine the target association relationship corresponding to the first bus voltage.

[0054] Specifically, the current testing system first detects the detection position of the point to be detected in the current testing circuit; then, based on the association relationship between the detection position and the relationship type, determines the relationship type corresponding to the detection position; then, determines at least one second preset association relationship that matches the relationship type from multiple first preset association relationships; finally, determines a target association relationship that matches the first bus voltage from at least one second preset association relationship.

[0055] In the above embodiment, the detection position corresponding to the point to be detected may include but is not limited to the source and drain of the switch device and both ends of the bus capacitor. Wherein, the switch device includes a first switch device and a second switch device.

[0056] In the above embodiment, the relationship type is used to characterize the type of relationship between the half-bridge output current and the voltage platform time, wherein the relationship between the half-bridge output current and the voltage platform time is different at different detection positions. For example, when the points to be detected are deployed at the source and drain of the switching device, the first relationship is used to express the relationship between the half-bridge output current and the voltage platform time; when the points to be detected are deployed at both ends of the bus capacitor, a second relationship different from the first relationship is used to express the relationship between the half-bridge output current and the voltage platform time.

[0057] In addition, in the above embodiment, the first preset association relationship is used to characterize the relationship between the half-bridge output current and the voltage platform time, and the second preset association relationship is an association relationship that matches the relationship type obtained by screening from multiple first preset association relationships. For example, the second preset association relationship is the relationship between the half-bridge output current and the voltage platform time when the point to be detected is deployed at the source and drain of the switching device. When the point to be detected is determined, the relationship between the half-bridge output current and the voltage platform time corresponding to different bus voltages is also different. Therefore, after determining the second preset association relationship, the second preset association relationship is further screened based on the current bus voltage of the bus capacitor (i.e., the first bus voltage) to obtain a target association relationship that matches the current bus voltage.

[0058] It should be noted that when the parasitic inductance in the current test circuit is unknown, a calibration method can be used to detect the half-bridge output current of the inverter; when the parasitic inductance in the current test circuit is known, a non-calibration method can be used to detect the half-bridge output current of the inverter. The following uses two scenarios, one with unknown parasitic inductance and the other with known parasitic inductance, as examples to introduce the current detection method proposed in the embodiment of the present application.

[0059] In the scenario where the parasitic inductance is unknown, it is divided into two scenarios according to the different deployment locations of the points to be tested in the current test circuit.

[0060] When the points to be detected are deployed at the source and drain of the second switching device, the bus voltage output by the DC voltage source is adjusted to measure the source-drain voltage corresponding to the second switching device when the second switching device is in an on transient state under the bus voltage; when the source-drain voltage is determined to be greater than a preset voltage value and the change value of the source-drain voltage is within a preset voltage range, the half-bridge output current corresponding to each voltage platform time under the bus voltage is measured; and a correlation between the voltage platform time and the half-bridge output current under the bus voltage is constructed to obtain a second preset correlation corresponding to the bus voltage.

[0061] In the above embodiment, the source-drain voltage is the voltage between the source and drain of the second switch device. In addition, when the source-drain voltage is determined to be greater than a preset voltage value and the change value of the source-drain voltage is within a preset voltage range, it can be determined that the second switch device is in a voltage platform stage.

[0062] In one example, in a scenario where the parasitic inductance of the current test circuit is unknown, the bus voltage of the bus capacitor is adjusted, and the existing half-bridge output current measurement method is used to measure and record the relationship between the voltage platform time and the half-bridge output current at each bus voltage. In subsequent applications, it is only necessary to determine the current voltage platform time, and the half-bridge output current corresponding to the current voltage platform time can be determined based on the recorded relationship between the voltage platform time and the half-bridge output current.

[0063] Specifically, the typical value U1 of the actual working bus voltage is selected to measure, calibrate and record the voltage platform under each half-bridge output current (only in the linear rising stage), and the recorded voltage platform time is matched with the half-bridge output current one by one, such as the voltage platform time T1 corresponds to the half-bridge output current I1; the voltage platform time T2 corresponds to the half-bridge output current I2; and so on, the voltage platform time Tn corresponds to the half-bridge output current I n (n is a positive integer).

[0064] After the calibration is completed, the half-bridge output current of the inverter can be detected based on the above calibration results. When the first bus voltage of the bus capacitor is U1, detection points are set at both ends of the switch device S2, and the switch device S1 is set to remain closed, then in the switching transient process (such as when the switch device S2 is turned from closed to open) Figure 4 At time t2 in the figure, the current path before and after the switching device S2 is switched is Figure 3 Transformed into Figure 6 As shown, the typical waveform of the switching device S2 during the switching process is as follows Figure 5 As shown, where V DS It is the changing waveform of the voltage across the switching device S2.

[0065] Record V DS The time it takes to decrease to a certain stable value is t. By querying the above calibration results, if t=T2, the corresponding voltage platform time is T2, and the corresponding half-bridge output current is I2; if the bus voltage of the bus capacitor changes during the switching process, for example, from U1 to U2, the half-bridge output current when the bus voltage is U2 can be determined according to the following formula:

[0066]

[0067] In formula (1), I2 ′ I2 is the half-bridge output current when the bus voltage is U1.

[0068] It should be noted that the calibration results in the above example are only applicable to the current inverter system, and the above method needs to be used for calibration of different inverter systems.

[0069] In addition, it should be noted that the above example uses the switch device S2 (i.e., the second switch device) as the driver. In actual applications, the switch device S1 (i.e., the first switch device) can also be used as the driver. The calibration method is the same as the calibration method in the scenario where the switch device S1 is used as the driver. The corresponding circuit schematic diagram is as follows: Figure 7 As shown. Figure 7 In the circuit, the load inductor L is connected in parallel to the two ends of the switch device S2, and the switch device S2 is always in the off state; by turning on the device S1, the voltage V DS Perform waveform testing to determine the voltage platform, and then achieve the voltage platform time and the output current I corresponding to the switching device S1 DS Then, the half-bridge output current of the inverter can be measured by simply setting voltage measurement points at both ends of the switching device S1.

[0070] In one embodiment, in a scenario where the parasitic inductance of the current test circuit is unknown, when the points to be tested are deployed at both ends of the bus capacitor, the bus voltage output by the DC voltage source is adjusted to measure the output voltage corresponding to both ends of the target bus when the second switching device is in an on transient state under the bus voltage; when the output voltage corresponding to both ends of the target bus is determined to be greater than a preset voltage value, and the change value of the output voltage corresponding to both ends of the target bus is within a preset voltage range, the half-bridge output current corresponding to each voltage platform time under the bus voltage is measured; and a correlation between the voltage platform time and the half-bridge output current under the bus voltage is constructed to obtain a second preset correlation corresponding to the bus voltage.

[0071] In the above embodiment, the target bus includes the bus capacitor and the two ends of the parasitic inductance of the bus capacitor. In addition, when the output voltage corresponding to the two ends of the target bus is determined to be greater than the preset voltage value, and the change value of the output voltage corresponding to the two ends of the target bus is within the preset voltage range, it can be determined that the current test circuit is in the voltage platform stage.

[0072] In an example, in a scenario where the test points are deployed on both sides of the bus capacitor, the double pulse test method can also be used to calibrate the relationship between the voltage platform time and the half-bridge output current. The corresponding circuit principle is as follows: Figure 8 The corresponding voltage waveform is shown as Fig. 9 As shown. Fig. 9 In the example, the voltage platform is U C , U bus is the voltage value of the DC voltage source applied to both sides of the bus capacitor, and the voltage is recorded at U C The platform time within the range of ±10% can be used to determine the half-bridge output current corresponding to each platform time based on the calibration results.

[0073] Similar to the scenario where the parasitic inductance is unknown, in the scenario where the parasitic inductance is known, there are two scenarios according to the different deployment locations of the points to be tested in the current test circuit.

[0074] When the point to be detected is deployed at the source and drain of the second switching device, the system parasitic inductance corresponding to the current test circuit, the first on-voltage corresponding to the first switching device, the second on-voltage corresponding to the second switching device, and the turn-on current overshoot value corresponding to the second switching device are obtained; then, according to the target association relationship, as well as the first bus voltage, the first on-voltage, the second on-voltage and the system parasitic inductance, the maximum output current of the second switching device is calculated under the target platform time; the difference between the maximum output current and the turn-on current overshoot value is calculated to obtain the half-bridge output current of the inverter.

[0075] It should be noted that, in the above embodiment, the system parasitic inductance in the current test circuit is composed of the parasitic inductance corresponding to the bus capacitor and the parasitic inductance in each current loop in the current test circuit. Figure 3 In the example, the system parasitic inductance is composed of parasitic inductances L1-L5.

[0076] In addition, the parasitic inductance corresponding to the above-mentioned bus capacitor and the parasitic inductance in each current loop can be determined by using existing parasitic inductance measurement methods, and this application will not list them one by one.

[0077] In one example, the system parasitic inductance and the parasitic inductance of the bus capacitor in the known current test circuit, and the turn-on current overshoot value I corresponding to the second switch device over In the case of bus voltage U bus , the current change slope of the inverter system and system parasitic inductance L loop The relationship between can be expressed by formula (2):

[0078]

[0079] In formula (2), V S1 、V S2 They are respectively the anti-parallel diode conduction voltage drop of the switch device S1 (ie, the first conduction voltage) and the forward conduction voltage drop of the switch device S2 (ie, the second conduction voltage).

[0080] From formula (2), we can get:

[0081]

[0082] When the switch device S2 is turned on, the target platform time t is recorded, and the maximum output current of the switch device S2 can be obtained:

[0083]

[0084] Considering that the current overshoot (overshoot value is I over ), therefore, the inverter half-bridge output current is finally expressed by formula (5):

[0085] I=I max -I over (5)

[0086] In formula (5), I is the half-bridge output current of the inverter.

[0087] In the scenario where the points to be detected are deployed at both ends of the bus capacitor, first, the bus capacitor parasitic inductance corresponding to the bus capacitor and the turn-on current overshoot value corresponding to the second switching device are obtained; when the output voltage is greater than the preset voltage value and the output voltage change value is within the preset voltage range, the maximum output current of the second switching device is calculated at the target platform time according to the target association relationship, the first bus voltage, the bus capacitor parasitic inductance, the output voltage and the bus capacitor parasitic inductance; then, the difference between the maximum output current and the turn-on current overshoot value is calculated to obtain the half-bridge output current of the inverter.

[0088] by Figure 8 As an example, in this scenario, the parasitic inductance of the bus capacitor and the turn-on current overshoot value I of the second switch device are known. over In the case of , the inverter half-bridge output current can be obtained by I = I max -I over Calculated, the maximum output current can be expressed by formula (6):

[0089]

[0090] In formula (6), I max is the maximum output current of the second switching device; U bus is the first bus voltage; U C is the output voltage; L1 is the parasitic inductance of the bus capacitor; t is the target platform time; U bus -U C is the voltage value applied on both sides of the parasitic inductance.

[0091] At this point, the explanation of the current detection method provided in the embodiment of the present application is completed.

[0092] From the above description, it can be seen that the current detection method provided by the present application reasonably selects the bus voltage of the actual working condition, records the relationship between the voltage platform time and the corresponding current value of the switch device opening process, and inquires the half-bridge output current of the inverter by measuring the voltage platform time when the inverter is running, thereby realizing the simple measurement of the half-bridge output. The specific advantages are reflected in the following aspects:

[0093] (1) When the parasitic inductance and current overshoot value are known, the system calibration process can be omitted and the system current can be directly calculated;

[0094] (2) The bus voltage is used to directly calculate the inverter half-bridge output current. Only one voltage probe is needed, and no current probe is required to complete the current measurement, which reduces the measurement requirements.

[0095] (3) The current of the low-voltage system can be measured without introducing additional sensor elements;

[0096] (4) The system current value can be conveniently measured through the bus capacitance and stray inductance.

[0097] Fig.10 The hardware structure diagram of the electronic device provided in the embodiment of the present application is shown. The electronic device may be the controller in the above-mentioned current detection system.

[0098] The electronic device may include a processor 1001 and a memory 1002 storing computer program instructions.

[0099] Specifically, the processor 1001 may include a central processing unit (CPU), or an application specific integrated circuit (ASIC), or may be configured to implement one or more integrated circuits of the embodiments of the present application.

[0100] The memory 1002 may include a large capacity memory for data or instructions. By way of example and not limitation, the memory 1002 may include a hard disk drive (HDD), a floppy disk drive, a flash memory, an optical disk, a magneto-optical disk, a magnetic tape, or a universal serial bus (USB) drive or a combination of two or more of these. In appropriate cases, the memory 1002 may include a removable or non-removable (or fixed) medium. In appropriate cases, the memory 1002 may be inside or outside the integrated gateway disaster recovery device. In a specific embodiment, the memory 1002 is a non-volatile solid-state memory.

[0101] The memory may include read-only memory (ROM), random access memory (RAM), magnetic disk storage media devices, optical storage media devices, flash memory devices, electrical, optical or other physical / tangible memory storage devices. Thus, typically, the memory includes one or more tangible (non-transitory) computer-readable storage media (e.g., memory devices) encoded with software including computer-executable instructions, and when the software is executed (e.g., by one or more processors), it is operable to perform the operations described with reference to the method according to an aspect of the present disclosure.

[0102] The processor 1001 implements any one of the current detection methods in the above embodiments by reading and executing computer program instructions stored in the memory 1002 .

[0103] In one example, the electronic device may further include a communication interface 1003 and a bus 1010. Fig.10 As shown, the processor 1001, the memory 1002, and the communication interface 1003 are connected via a bus 1010 and communicate with each other.

[0104] The communication interface 1003 is mainly used to implement communication between various modules, devices, units and / or equipment in the embodiments of the present application.

[0105] Bus 1010 includes hardware, software or both, and the parts of electronic equipment are coupled to each other.For example, but not limitation, bus may include accelerated graphics port (AGP) or other graphics bus, enhanced industrial standard architecture (EISA) bus, front side bus (FSB), hypertransport (HT) interconnection, industrial standard architecture (ISA) bus, infinite bandwidth interconnection, low pin count (LPC) bus, memory bus, micro channel architecture (MCA) bus, peripheral component interconnection (PCI) bus, PCI-Express (PCI-X) bus, serial advanced technology attachment (SATA) bus, video electronics standard association local (VLB) bus or other suitable bus or two or more of these combinations. In appropriate cases, bus 1010 may include one or more buses. Although the present application embodiment describes and shows a specific bus, the application considers any suitable bus or interconnection.

[0106] In addition, in combination with the current detection method in the above embodiment, the embodiment of the present application can provide a computer-readable storage medium for implementation. The computer-readable storage medium stores computer program instructions; when the computer program instructions are executed by a processor, any current detection method in the above embodiment is implemented.

[0107] In addition, in combination with the current detection method in the above embodiment, the embodiment of the present application can provide a computer program product to implement. When the instructions in the computer program product are executed by the processor of the electronic device, the electronic device executes and implements any current detection method in the above embodiment.

[0108] It should be clear that the present application is not limited to the specific configuration and processing described above and shown in the figures. For the sake of simplicity, a detailed description of the known method is omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of the present application is not limited to the specific steps described and shown, and those skilled in the art can make various changes, modifications and additions, or change the order between the steps after understanding the spirit of the present application.

[0109] The functional modules shown in the above-described block diagram can be implemented as hardware, software, firmware or a combination thereof. When implemented in hardware, it can be, for example, an electronic circuit, an application specific integrated circuit (ASIC), appropriate firmware, a plug-in, a function card, etc. When implemented in software, the elements of the present application are programs or code segments that are used to perform the required tasks. Programs or code segments can be stored in machine-readable media, or transmitted on a transmission medium or a communication link by a data signal carried in a carrier wave. "Machine-readable media" can include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, optical fiber media, radio frequency (RF) links, etc. Code segments can be downloaded via computer networks such as the Internet, intranets, etc.

[0110] It should also be noted that the exemplary embodiments mentioned in this application describe some methods or systems based on a series of steps or devices. However, this application is not limited to the order of the above steps, that is, the steps can be performed in the order mentioned in the embodiment, or in a different order from the embodiment, or several steps can be performed simultaneously.

[0111] Aspects of the present disclosure are described above with reference to the flow chart and / or block diagram of the current detection method and the current detection system according to the embodiment of the present disclosure. It should be understood that each box in the flow chart and / or block diagram and the combination of each box in the flow chart and / or block diagram can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device to produce a machine so that these instructions executed by the processor of the computer or other programmable data processing device enable the implementation of the functions / actions specified in one or more boxes of the flow chart and / or block diagram. Such a processor can be, but is not limited to, a general-purpose processor, a special-purpose processor, a special application processor, or a field programmable logic circuit. It can also be understood that each box in the block diagram and / or flow chart and the combination of boxes in the block diagram and / or flow chart can also be implemented by dedicated hardware that performs the specified function or action, or can be implemented by a combination of dedicated hardware and computer instructions.

[0112] The above is only a specific implementation of the present application. Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working processes of the systems, modules and units described above can refer to the corresponding processes in the aforementioned method embodiments, and will not be repeated here. It should be understood that the protection scope of the present application is not limited to this. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in this application, and these modifications or replacements should be included in the protection scope of this application.

Claims

1. A current detection method, characterized in that: A current testing system for testing a half-bridge output current of an inverter, the current testing system comprising a current testing circuit, the current testing circuit comprising: a bus capacitor connected in series via a DC busbar, a first switching device and a second switching device constituting a half-bridge circuit of the inverter, and a load inductor connected in parallel with the first switching device; a DC voltage source connected in parallel to the bus capacitor, the DC voltage source outputting a first bus voltage; The current detection method comprises: By sending a double pulse drive signal to the second switch device, measuring the output voltage corresponding to the to-be-detected point of the current test circuit when the second switch device is in an on transient state; When it is detected that the output voltage is greater than the preset voltage value and the change value of the output voltage is within the preset voltage range, a target platform time of the current sampling time within the voltage platform time length is obtained, wherein the voltage platform time length is the time length during which the output voltage corresponding to the point to be detected is greater than the preset voltage value and the change value of the output voltage is within the preset voltage range; Determine the output current corresponding to the target platform time according to the target association relationship corresponding to the first bus voltage, wherein the target association relationship is used to characterize the relationship between the half-bridge output current of the inverter and the voltage platform time corresponding to the point to be detected; The output current corresponding to the target platform time is determined as the half-bridge output current of the inverter.

2. The method according to claim 1, characterized in that Before determining the output current corresponding to the target platform time according to the target association relationship corresponding to the first bus voltage, the method further includes: Detecting a detection position of the point to be detected in the current test circuit; Determine the relationship type corresponding to the detection position according to the association relationship between the detection position and the relationship type, wherein the relationship type is used to characterize the type of relationship between the half-bridge output current and the voltage platform time; Determine at least one second preset association relationship matching the relationship type from a plurality of first preset association relationships, wherein the first preset association relationship is used to characterize the relationship between the half-bridge output current and the voltage platform time; A target association relationship matching the first bus voltage is determined from the at least one second preset association relationship.

3. The method according to claim 2, characterized in that Before determining a target association relationship matching the first bus voltage from the at least one second preset association relationship, the method further includes: In the case where the points to be detected are arranged at the source and drain of the second switching device, by adjusting the bus voltage output by the DC voltage source, the source-drain voltage corresponding to the second switching device when the second switching device is in an on transient state under the bus voltage is measured, wherein the source-drain voltage is the voltage between the source and the drain of the second switching device; When the source-drain voltage is determined to be greater than the preset voltage value, and the change value of the source-drain voltage is within the preset voltage range, the half-bridge output current corresponding to each voltage platform time under the bus voltage is measured; A correlation relationship between the voltage platform time and the half-bridge output current under the bus voltage is constructed to obtain a second preset correlation relationship corresponding to the bus voltage.

4. The method according to claim 2, characterized in that: Before determining a target association relationship matching the first bus voltage from the at least one second preset association relationship, the method further includes: In the case where the points to be detected are deployed at both ends of the bus capacitor, by adjusting the bus voltage output by the DC voltage source, the output voltage corresponding to both ends of the target bus when the second switch device is in an on transient state under the bus voltage is measured, wherein the target bus includes the bus capacitor and both ends of the parasitic inductance of the bus capacitor; When the output voltage corresponding to the two ends of the target bus is determined to be greater than the preset voltage value, and the change value of the output voltage corresponding to the two ends of the target bus is within the preset voltage range, the half-bridge output current corresponding to each voltage platform time under the bus voltage is measured; A correlation relationship between the voltage platform time and the half-bridge output current under the bus voltage is constructed to obtain a second preset correlation relationship corresponding to the bus voltage.

5. The method according to claim 2, characterized in that: Determining the output current corresponding to the target platform time according to the target association relationship corresponding to the first bus voltage includes: In the case where the point to be detected is disposed at the source and the drain of the second switching device, obtaining the system parasitic inductance corresponding to the current test circuit, the first on-voltage corresponding to the first switching device, the second on-voltage corresponding to the second switching device, and the turn-on current overshoot value corresponding to the second switching device; Calculate the maximum output current of the second switching device at the target platform time according to the target association relationship, the first bus voltage, the first on-voltage, the second on-voltage, and the system parasitic inductance; The difference between the maximum output current and the turn-on current overshoot value is calculated to obtain the half-bridge output current of the inverter.

6. The method according to claim 5, characterized in that The maximum output current of the second switching device at the target platform time is calculated by the following formula: Among them, I max is the maximum output current of the second switching device; U bus is the first bus voltage; V S2 is the second on-state voltage; V S1 is the first conduction voltage; L loop is the parasitic inductance of the system; t is the target platform time.

7. The method according to claim 2, characterized in that Determining the output current corresponding to the target platform time according to the target association relationship corresponding to the first bus voltage includes: In the case where the points to be detected are arranged at both ends of the bus capacitor, a bus capacitor parasitic inductance corresponding to the bus capacitor and a turn-on current overshoot value corresponding to the second switch device are obtained; When the output voltage is greater than the preset voltage value and the change value of the output voltage is within the preset voltage range, the maximum output current of the second switching device under the target platform time is calculated according to the target association relationship, the first bus voltage, the bus capacitor parasitic inductance, the output voltage and the bus capacitor parasitic inductance; The difference between the maximum output current and the turn-on current overshoot value is calculated to obtain the half-bridge output current of the inverter.

8. The method according to claim 7, characterized in that The maximum output current of the second switching device at the target platform time is calculated by the following formula: Among them, I max is the maximum output current of the second switching device; U bus is the first bus voltage; U C is the output voltage; L1 is the parasitic inductance of the bus capacitor; t is the target platform time.

9. The method according to any one of claims 1 to 8, characterized in that The voltage range of the first bus voltage is 10V to 50V.

10. A current detection system, characterized in that: include: A controller and a current testing circuit, wherein the controller executes the current detection method according to any one of claims 1 to 9 to control the current testing circuit to detect the half-bridge output current of the inverter.

Images