Intelligent Evaluation Method and System for the Performance of Memory Chips under Grid Array Packaging

Abstract

The present invention relates to the technical field of storage chips, and discloses an intelligent evaluation method and system for the performance of storage chips under grid array packaging, including: determining performance monitoring points on the storage chip through performance analysis samples; identifying the data probability distribution of unstable data, and using the data probability distribution to perform data smoothing processing on the unstable data; querying the current scenario corresponding to the performance analysis index; analyzing the scenario similarity between the current scenario and the control scenario, calculating the control demand degree of the control scenario for the control analysis index, and calculating the current demand degree of the current scenario for the performance analysis index; using the control demand degree to identify the control index of the control chip from the control analysis index, identifying the current index of the storage chip from the performance analysis index, and analyzing the control performance corresponding to the control index; calculating the performance improvement ratio of the current performance relative to the control performance. The present invention can evaluate the performance of a new chip relative to an old chip based on unstable test data.

Description

Technical Field

[0001] The present invention relates to a method and system for intelligent evaluation of the performance of a memory chip under a land grid array package, belonging to the technical field of memory chips. Background Art

[0002] At present, the pins of the memory chip under the land grid array (LGA) package have changed from the spherical shape of the BGA package to contacts. Therefore, the installation method of the processor using the LGA775 interface is also different from that of other products. It cannot use the pins for fixed contact, but requires an installation buckle to fix, so that the CPU can be correctly pressed on the elastic whiskers exposed by the Socket. Its principle is the same as that of the BGA package, except that the BGA is soldered and the LGA can be unbuckled at any time to replace the chip.

[0003] Currently, in the process of chip performance evaluation, it needs to be realized based on a series of data obtained from chip testing. If the performance of the chip cannot be judged through the test data at a certain moment, it is necessary to collect data within a continuous time period for analysis. When analyzing the data within the continuous time period, it cannot be guaranteed that the data within the continuous time period is data with a small change range and stability. If the change range between the data at different moments is large and unstable, it will affect the performance analysis. Secondly, different chips are suitable for different scenarios. If a current chip A is suitable for scenario A and performs well in scenario A, and chip B is suitable for scenario B and performs poorly in scenario A, it cannot be determined that the performance of chip A is better than that of chip B. Therefore, when directly comparing chips suitable for different scenarios, the performance of the chips cannot be correctly judged.

[0004] Therefore, there is an urgent need for a solution to evaluate the performance of a new chip relative to an old chip based on unstable test data. Summary of the Invention

[0005] The present invention provides a method and system for intelligent evaluation of the performance of a memory chip under a land grid array package, and its main purpose is to evaluate the performance of a new chip relative to an old chip based on unstable test data.

[0006] To achieve the above object, a method for intelligent evaluation of the performance of a memory chip under a land grid array package provided by the present invention includes:

[0007] Determine the performance analysis dimension of the memory chip under the land grid array package, and based on the performance analysis dimension, select the performance analysis sample of the memory chip, and apply the performance analysis sample to the memory chip to determine the performance monitoring points on the memory chip through the performance analysis sample;

[0008] Collect the performance monitoring data of the storage chip at the performance monitoring points, divide the stable data and unstable data in the performance monitoring data, identify the data probability distribution of the unstable data, and perform data smoothing processing on the unstable data using the data probability distribution to obtain smoothed data;

[0009] Use the stable data and the smoothed data as the performance analysis indicators of the storage chip, query the current scenario corresponding to the performance analysis indicators, obtain the reference chip of the storage chip, and identify the reference scenario corresponding to the reference analysis indicators of the reference chip;

[0010] Analyze the scenario similarity between the current scenario and the reference scenario, calculate the reference demand degree of the reference scenario for the reference analysis indicators, and calculate the current demand degree of the current scenario for the performance analysis indicators according to the scenario similarity and the reference demand degree;

[0011] Use the reference demand degree to identify the reference indicators of the reference chip from the reference analysis indicators, use the current demand degree to identify the current indicators of the storage chip from the performance analysis indicators, analyze the reference performance corresponding to the reference indicators, and analyze the current performance corresponding to the current indicators;

[0012] Calculate the performance improvement ratio of the current performance relative to the reference performance, and use the performance improvement ratio as the performance intelligent evaluation result of the storage chip.

[0013] Optionally, determining the performance monitoring points on the storage chip through the performance analysis samples includes:

[0014] Use a preset data monitoring device to monitor the first test data at different chip positions of the storage chip;

[0015] Calculate the data correlation between the first test data at every two positions in the first test data;

[0016] When the data correlation is not greater than the preset correlation, set the first monitoring points at different chip positions of the storage chip;

[0017] When the data correlation is greater than the preset correlation, construct a data relationship model between the first test data at every two positions;

[0018] Use the data monitoring device to monitor the second test data at different chip positions of the storage chip;

[0019] Map the second test data into the same data space through the data relationship model to obtain a mapped data set;

[0020] Calculate the mapping data distance corresponding to the mapping data set;

[0021] Use the mapping data distance to set second monitoring points at different chip positions of the storage chip;

[0022] Take the first monitoring point and the second monitoring point as performance monitoring points on the storage chip.

[0023] Optionally, the identifying the data probability distribution of the unstable data includes:

[0024] Obtain the data minimum value and the data maximum value of the unstable data;

[0025] Identify the data probability distribution of the unstable data according to the data minimum value and the data maximum value.

[0026] Optionally, the using the data probability distribution to perform data smoothing processing on the unstable data to obtain smoothed data includes:

[0027] Calculate the probability density distribution of the unstable data according to the data probability distribution;

[0028] Perform data smoothing processing on the unstable data based on the probability density distribution to obtain smoothed data.

[0029] Optionally, the querying the current scenario corresponding to the performance analysis index includes:

[0030] Identify the historical data stream of the storage chip;

[0031] Select the data processing indexes of the historical data stream;

[0032] Obtain the historical analysis indexes of the performance analysis index;

[0033] Analyze the index correlation between the historical analysis index and the data processing index;

[0034] Determine the current scenario corresponding to the performance analysis index from the historical data stream through the index correlation;

[0035] Wherein, the data processing indexes include data processing speed and data processing volume.

[0036] Optionally, the analyzing the scenario similarity between the current scenario and the control scenario includes:

[0037] Query the current data source, the current data target and the current execution action of the current scenario;

[0038] Query the control data source, the control data target and the control execution action of the control scenario;

[0039] Analyze the source similarity, target similarity, and action similarity between the current data source and the control data source, the current data target and the control data target, and the current execution action and the control execution action, respectively;

[0040] Analyze the scenario similarity between the current scenario and the control scenario by using the source similarity, the target similarity, and the action similarity.

[0041] Optionally, calculating the control requirement degree of the control scenario for the control analysis index includes:

[0042] Obtain the total scenario of the control chip;

[0043] Calculate the control requirement degree of the control scenario for the control analysis index according to the total scenario.

[0044] Optionally, analyzing the control performance corresponding to the control index includes:

[0045] Calculate the hidden features of the control index;

[0046] Analyze the control performance corresponding to the control index according to the hidden features.

[0047] Optionally, calculating the performance improvement ratio of the current performance relative to the control performance includes:

[0048] Calculate the performance ratio between the current performance and the control performance;

[0049] Use the performance ratio as the performance improvement ratio of the current performance relative to the control performance.

[0050] To solve the above problems, the present invention also provides an intelligent evaluation system for the performance of a memory chip under a grid array package, and the system includes:

[0051] A monitoring point determination module, configured to determine the performance analysis dimension of the memory chip under the grid array package, select the performance analysis sample of the memory chip based on the performance analysis dimension, and apply the performance analysis sample to the memory chip to determine the performance monitoring points on the memory chip;

[0052] A data smoothing module, configured to collect the performance monitoring data of the memory chip at the performance monitoring points, divide the stable data and the unstable data in the performance monitoring data, identify the data probability distribution of the unstable data, and perform data smoothing processing on the unstable data by using the data probability distribution to obtain smoothed data;

[0053] A scene recognition module, which is used to use the stable data and the smoothed data as performance analysis indicators of the storage chip, query the current scene corresponding to the performance analysis indicators, obtain the control chip of the storage chip, and identify the control scene corresponding to the control analysis indicators of the control chip;

[0054] A requirement calculation module, which is used to analyze the scene similarity between the current scene and the control scene, calculate the control requirement degree of the control scene for the control analysis indicators, and calculate the current requirement degree of the current scene for the performance analysis indicators according to the scene similarity and the control requirement degree;

[0055] A performance analysis module, which is used to identify the control indicators of the control chip from the control analysis indicators by using the control requirement degree, identify the current indicators of the storage chip from the performance analysis indicators by using the current requirement degree, analyze the control performance corresponding to the control indicators, and analyze the current performance corresponding to the current indicators;

[0056] A performance evaluation module, which is used to calculate the performance improvement ratio of the current performance relative to the control performance, and use the performance improvement ratio as the performance intelligent evaluation result of the storage chip.

[0057] Compared with the problems in the background technology, in the embodiment of the present invention, by selecting unstable data and converting these unstable data into data with small change amplitude and relatively stable based on the probability distribution of the unstable data, it is convenient for subsequent data analysis within continuous time periods by, for example, LSTM to easily identify the hidden features of the data within continuous time periods. Further, in the embodiment of the present invention, by calculating the requirement degree of the scene for the indicator, it is used to characterize whether this application scene requires this performance analysis indicator. If it is required, it is retained, otherwise it is removed. In this way, when directly comparing chips applicable to different scenes, the performance of the chips can be correctly judged. Description of the Drawings

[0058] Figure 1 It is a schematic flowchart of a method for intelligent performance evaluation of a storage chip under grid array packaging provided by an embodiment of the present invention;

[0059] Figure 2 It is a schematic diagram of a module for implementing the method for intelligent performance evaluation of a storage chip under grid array packaging provided by an embodiment of the present invention.

[0060] The implementation, functional features and advantages of the object of the present invention will be further described with reference to the embodiments and the accompanying drawings. Detailed Embodiments

[0061] It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0062] An embodiment of the present application provides an intelligent evaluation method for the performance of a storage chip under a grid array package. The execution subject of the intelligent evaluation method for the performance of a storage chip under a grid array package includes, but is not limited to, at least one of electronic devices such as a server, a terminal, etc. that can be configured to execute the method provided by the embodiment of the present application. In other words, the intelligent evaluation method for the performance of a storage chip under a grid array package can be executed by software or hardware installed on a terminal device or a server device. The server includes, but is not limited to: a single server, a server cluster, a cloud server, or a cloud server cluster, etc.

[0063] Embodiment 1:

[0064] Refer to Figure 1 As shown, it is a schematic flowchart of an intelligent evaluation method for the performance of a storage chip under a grid array package provided by an embodiment of the present invention. In this embodiment, the intelligent evaluation method for the performance of a storage chip under a grid array package includes:

[0065] S1. Determine the performance analysis dimension of the storage chip under the grid array package. Based on the performance analysis dimension, select the performance analysis sample of the storage chip, and apply the performance analysis sample to the storage chip to determine the performance monitoring points on the storage chip through the performance analysis sample.

[0066] In the embodiment of the present invention, the grid array package refers to an LGA (Land Grid Array) package. The LGA package is a packaging technology for integrated circuits. Its principle is to directly connect the solder balls or gold-plated pads of the chip pins to the pads on the printed circuit board (PCB). The storage chip refers to the specific application of the concept of an embedded system chip in the storage industry. Whether it is a system chip or a storage chip, software is embedded in a single chip to achieve multi-function and high performance, as well as support for multiple protocols, multiple hardware, and different applications. Further, the performance analysis dimension refers to the performance basis of the storage chip to be analyzed, which is determined according to the performance analysis requirements. For example, if the performance analysis requirement is for electrical performance analysis, then performance analysis dimensions such as the voltage and current of the storage chip need to be tested. If the performance analysis requirement is for heat dissipation performance analysis, then performance analysis dimensions such as the temperature and heat transfer parameters of the storage chip need to be tested. The performance analysis sample refers to test data and test software applicable to the storage chip, such as power data input to the storage chip, chip test code for testing the data operation status of the storage chip when receiving data to be processed, analyzed, and parsed from the outside, etc.

[0067] In one embodiment of the present invention, determining the performance monitoring points on the storage chip through the performance analysis samples includes: monitoring the first test data at different chip positions of the storage chip by using a preset data monitoring device; calculating the data correlation between the first test data at every two positions in the first test data by using the following formula:

[0068]

[0069] wherein, represents the first test data at the first position of the two positions, represents the first test data at the second position of the two positions, in represents the first test data at the first position with a continuous duration of ones, represents the first test data at the second position with a continuous duration of ones, represents the sequence arranged according to , represents less than the number of other moments , represents the serial number of the performance test data in

[0070] When the data correlation is not greater than the preset correlation, set the first monitoring points at different chip positions of the storage chip; when the data correlation is greater than the preset correlation, construct a data relationship model between the first test data at every two positions; monitor the second test data at different chip positions of the storage chip by using the data monitoring device; map the second test data into the same data space through the data relationship model to obtain a mapped data set; calculate the mapped data distance corresponding to the mapped data set by using the following formula:

[0071]

[0072] wherein, represents the mapped data distance, represents the th value arranged in ascending order in the mapped data set, represents the th value arranged in ascending order in the mapped data set, represents the number of values in the mapped data set;

[0073] Set second monitoring points at different chip positions of the storage chip by using the mapped data distance; use the first monitoring point and the second monitoring point as performance monitoring points on the storage chip.

[0074] Among them, the data monitoring device corresponds to the performance analysis sample. For example, if the performance analysis sample is used to test the current of the storage chip, the data monitoring device is a current sensor. The first test data refers to a continuous data sequence within a continuous time period at multiple chip positions. For example, a continuous data sequence at a certain chip position. It should be noted that when the data correlation is not greater than the preset correlation, it means that there are differences between the same type of first test data at different positions. For example, there are differences in temperature between position 1 and position 3, then data monitoring devices need to be set at position 1 and position 3 respectively. When the data correlation is greater than the preset correlation, for example, it means that the temperature at position 1 and position 3 is similar, but this is only the case for the current continuous time period and does not mean that the temperature will still be similar in the next time period. Therefore, it is still necessary to collect the data for the next time period, that is, the second test data. And the data relationship model represents the functional relationship between the data at every two positions. For example, the formula relationship determined by the chip structure or the relationship determined by the regression model. The former, for example, in a circuit structure, in a series circuit, the magnitudes of the currents flowing through two branches are related to the resistances on these two branches. Based on the magnitudes of the currents on these two resistances, the required current ratio of these two branches can be determined, and then the formula relationship between the current on the branch and the current on the main circuit can be obtained. The mapped data set refers to the data at the same chip position calculated through the data relationship model. For example, in the aforementioned main circuit and branch circuit, the current on the main circuit remains unchanged and there is no need for data mapping. Based on the current data collected on the branch, the data relationship model is used to calculate the corresponding current on the main circuit. The second monitoring point means that when the mapped data distance is greater than the preset distance threshold, it means that the difference between the data is large, and then several more data monitoring devices need to be set. The mean, variance, etc. of the values in this mapped data set can be calculated to select abnormal values, and data monitoring devices are set at the chip positions corresponding to these abnormal values. When the data difference is small, only one chip position corresponding to any one of the first test data is selected to place the data monitoring device, because there is a data relationship model between the data at this position and the data at other positions, and the data at other positions can be calculated from the data relationship model, so there is no need to set data monitoring devices at other positions.

[0075] S2. Collect performance monitoring data of the storage chip at the performance monitoring points, divide the stable data and unstable data in the performance monitoring data, identify the data probability distribution of the unstable data, and perform data smoothing processing on the unstable data by using the data probability distribution to obtain smoothed data.

[0076] In an embodiment of the present invention, the stable data refers to data with a small change range, and the unstable data refers to data with a large change range. The variance of the data can be calculated, and the variance is used to evaluate the degree of dispersion of the data.

[0077] In an embodiment of the present invention, identifying the data probability distribution of the unstable data includes: obtaining the data minimum value and the data maximum value of the unstable data; according to the data minimum value and the data maximum value, using the following formula to identify the data probability distribution of the unstable data:

[0078]

[0079] where, represents the data probability distribution, x represents the unstable data, a represents the data minimum value, and b represents the data maximum value.

[0080] In an embodiment of the present invention, using the data probability distribution to perform data smoothing processing on the unstable data to obtain smoothed data includes: according to the data probability distribution, using the following formula to calculate the probability density distribution of the unstable data:

[0081]

[0082] where, represents the probability density distribution, represents the power of the data probability distribution of the kth unstable data, represents subject to the Dirichlet distribution , represents the distribution parameter, represents the number of unstable data, represents the gamma function, represents the corresponding to the kth unstable data;

[0083] Based on the probability density distribution, using the following formula to perform data smoothing processing on the unstable data to obtain smoothed data:

[0084]

[0085] where, represents the smoothed data, represents the probability density distribution, and x represents the unstable data.

[0086] S3. Use the stable data and the smoothed data as performance analysis indicators of the storage chip, query the current scene corresponding to the performance analysis indicator, obtain a reference chip of the storage chip, and identify a reference scene corresponding to the reference analysis indicator of the reference chip.

[0087] In one embodiment of the present invention, the querying of the current scenario corresponding to the performance analysis indicator includes: identifying the historical data stream of the storage chip; selecting the data processing indicator of the historical data stream; obtaining the historical analysis indicator of the performance analysis indicator; analyzing the indicator correlation between the historical analysis indicator and the data processing indicator; determining the current scenario corresponding to the performance analysis indicator from the historical data stream through the indicator correlation; wherein the data processing indicator includes data processing speed and data processing volume.

[0088] Among them, the historical data stream refers to the product requirements predetermined before creating the storage chip, that is, which business data is specifically processed by creating this new storage chip, and the business data is the historical data stream. The data processing index refers to the data processing speed and the amount of parallel processing of data when using the old chip to process the historical data stream. The historical analysis index refers to the size of the performance analysis index exerted by the old chip in the historical period. The indicator correlation refers to the correlation between two indicator values. The calculation method is similar to the principle of calculating the data correlation between the first test data at every two positions in the first test data mentioned above. The current scene refers to the data stream type when the indicator correlation is greater than the preset correlation, such as digital signals, binary data, image data, etc. Furthermore, the reference chip refers to the old chip, and it is necessary to determine whether it is a chip that lags behind the new chip. The reference scene corresponding to the reference analysis index is similar to the meaning and identification method of the current scene mentioned above, and will not be repeated here.

[0089] S4. Analyze the scene similarity between the current scene and the control scene, calculate the control requirement of the control scene for the control analysis index, and calculate the current requirement of the current scene for the performance analysis index based on the scene similarity and the control requirement.

[0090] In one embodiment of the present invention, analyzing the scene similarity between the current scene and the control scene includes: querying the current data source, current data target, and current execution action of the current scene; querying the control data source, control data target, and control execution action of the control scene; respectively analyzing the source similarity, target similarity, and action similarity between the current data source and the control data source, the current data target and the control data target, and the current execution action and the control execution action; and analyzing the scene similarity between the current scene and the control scene by using the source similarity, the target similarity, and the action similarity.

[0091] Optionally, the process of respectively analyzing the source similarity, target similarity, and action similarity between the current data source and the control data source, the current data target and the control data target, and the current execution action and the control execution action refers to the process of analyzing whether the types are similar. For example, when analyzing the source similarity, it is only necessary that the types of the sources are the same, rather than the sources being exactly the same. For example, if both the current data source and the control data source are of the image data type, it is determined that the current data source is similar to the control data source. Similarly, for the similarity judgment between the current data target and the control data target, and between the current execution action and the control execution action. It should be noted that the data source refers to the type of data, the data target refers to the data type obtained after a series of processes on the data finally, and the execution action refers to the operations performed on the data, including operations such as data storage, addition, subtraction, multiplication, and division. Further, when the source similarity, the target similarity, and the action similarity are all determined to be similar, the scene similarity is also similar; otherwise, it is not similar.

[0092] In one embodiment of the present invention, calculating the control requirement degree of the control scene for the control analysis index includes: obtaining the total scene of the control chip; and calculating the control requirement degree of the control scene for the control analysis index according to the total scene by using the following formula:

[0093]

[0094] where, represents the control requirement degree, M represents the number of control scenes, and N represents the number of total scenes.

[0095] wherein, the total scene refers to all data scene types, and the control scene refers to only the data types related to the control analysis index.

[0096] S5. Identify the control indicators of the control chip from the control analysis indicators using the control demand degree, identify the current indicators of the storage chip from the performance analysis indicators using the current demand degree, analyze the control performance corresponding to the control indicators, and analyze the current performance corresponding to the current indicators.

[0097] In the embodiments of the present invention, the control indicators refer to the control analysis indicators when the control demand degree is greater than the threshold of the preset demand degree. The current indicators are the same as the control indicators.

[0098] In one embodiment of the present invention, the analysis of the control performance corresponding to the control indicators includes: calculating the hidden features of the control indicators using the following formula:

[0099]

[0100]

[0101] where represents the forward hidden feature, represents the backward hidden feature, represents the forward network, represents the backward network, represents the previous round value of represents the previous round value of represents the round of control indicators, represents the cell state in represents the cell state in;

[0102] According to the hidden features, analyze the control performance corresponding to the control indicators using the following formula:

[0103]

[0104] where represents the forward hidden feature, represents the backward hidden feature, represents the activation function, represents the weight matrix, represents the bias.

[0105] It should be noted that the control performance is divided into multiple levels, such as low performance, medium performance, high performance, etc.

[0106] Optionally, the principle of analyzing the current performance corresponding to the current metric is similar to the principle of analyzing the control performance corresponding to the control metric, which will not be elaborated here.

[0107] S6. Calculate the performance improvement ratio of the current performance relative to the control performance, and use the performance improvement ratio as the intelligent performance evaluation result of the storage chip.

[0108] In an embodiment of the present invention, calculating the performance improvement ratio of the current performance relative to the control performance includes: calculating the performance ratio between the current performance and the control performance; and using the performance ratio as the performance improvement ratio of the current performance relative to the control performance.

[0109] Compared with the problems in the background art, in the embodiments of the present invention, by selecting unstable data and converting these unstable data into data with small variation amplitude and relatively stable based on the probability distribution of the unstable data, it is convenient for subsequent data analysis within consecutive time periods by, for example, LSTM to easily identify the hidden features of the data within consecutive time periods. Further, in the embodiments of the present invention, by calculating the demand degree of the scenario for the metric, it is used to characterize whether this application scenario requires this performance analysis metric. If it is required, it is retained; otherwise, it is removed. In this way, when directly comparing chips applicable to different scenarios, the performance of the chips can be correctly determined.

[0110] Embodiment 2:

[0111] As Figure 2 shown, it is a functional module diagram of an intelligent performance evaluation system for a storage chip under grid array packaging according to the present invention.

[0112] The intelligent performance evaluation system 200 for a storage chip under grid array packaging according to the present invention can be installed in an electronic device. According to the functions implemented, the intelligent performance evaluation system for a storage chip under grid array packaging can include a monitoring point determination module 201, a data smoothing module 202, a scenario recognition module 203, a demand calculation module 204, a performance analysis module 205, and a performance evaluation module 206. The modules in the present invention can also be referred to as units, which refer to a series of computer program segments that can be executed by a processor of an electronic device and can complete fixed functions, and are stored in the memory of the electronic device.

[0113] In the embodiments of the present invention, the functions of each module / unit are as follows:

[0114] The monitoring point determination module 201 is configured to determine the performance analysis dimensions of the storage chip under grid array packaging. Based on the performance analysis dimensions, select the performance analysis samples of the storage chip, and apply the performance analysis samples to the storage chip to determine the performance monitoring points on the storage chip through the performance analysis samples.

[0115] The data smoothing module 202 is configured to collect the performance monitoring data of the storage chip at the performance monitoring points, divide the stable data and unstable data in the performance monitoring data, identify the data probability distribution of the unstable data, and perform data smoothing processing on the unstable data using the data probability distribution to obtain smoothed data.

[0116] The scenario recognition module 203 is configured to use the stable data and the smoothed data as the performance analysis indicators of the storage chip, query the current scenario corresponding to the performance analysis indicators, obtain the reference chip of the storage chip, and identify the reference scenario corresponding to the reference analysis indicators of the reference chip.

[0117] The requirement calculation module 204 is configured to analyze the scenario similarity between the current scenario and the reference scenario, calculate the reference requirement degree of the reference scenario for the reference analysis indicators, and calculate the current requirement degree of the current scenario for the performance analysis indicators according to the scenario similarity and the reference requirement degree.

[0118] The performance analysis module 205 is configured to identify the reference indicators of the reference chip from the reference analysis indicators using the reference requirement degree, identify the current indicators of the storage chip from the performance analysis indicators using the current requirement degree, analyze the reference performance corresponding to the reference indicators, and analyze the current performance corresponding to the current indicators.

[0119] The performance evaluation module 206 is configured to calculate the performance improvement ratio of the current performance relative to the reference performance, and use the performance improvement ratio as the intelligent performance evaluation result of the storage chip.

[0120] Specifically, each module in the intelligent performance evaluation system 200 of the storage chip under grid array packaging in the embodiments of the present invention adopts the same technical means as the Figure 1 intelligent performance evaluation method of the storage chip under grid array packaging described above, and can produce the same technical effects, which will not be elaborated here.

[0121] For those skilled in the art, it is obvious that the present invention is not limited to the details of the above exemplary embodiments, and can be implemented in other specific forms without departing from the spirit or basic characteristics of the present invention.

[0122] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them. Although the present invention has been described in detail with reference to the preferred embodiments, those of ordinary skill in the art should understand that the technical solutions of the present invention can be modified or equivalently replaced without departing from the spirit and scope of the technical solutions of the present invention.

Claims

1. An intelligent evaluation method for the performance of a storage chip under a grid array package, characterized in that The method includes: Determine the performance analysis dimensions of the memory chip under grid array packaging. Based on the performance analysis dimensions, select performance analysis samples of the memory chip, and apply the performance analysis samples to the memory chip to determine performance monitoring points on the memory chip through the performance analysis samples. Among them, determining the performance monitoring points on the memory chip through the performance analysis samples includes: Monitor first test data at different chip positions of the memory chip using a preset data monitoring device; Calculate the data correlation between the first test data at every two positions in the first test data; When the data correlation is not greater than the preset correlation, set first monitoring points at different chip positions of the memory chip; When the data correlation is greater than the preset correlation, construct a data relationship model between the first test data at every two positions; Monitor second test data at different chip positions of the memory chip using the data monitoring device; Map the second test data into the same data space through the data relationship model to obtain a mapped data set; Calculate the mapped data distance corresponding to the mapped data set; Set second monitoring points at different chip positions of the memory chip using the mapped data distance; Use the first monitoring points and the second monitoring points as the performance monitoring points on the memory chip; Collect performance monitoring data at the performance monitoring points, divide the stable data and unstable data in the performance monitoring data, identify the data probability distribution of the unstable data, and perform data smoothing processing on the unstable data using the data probability distribution to obtain smoothed data; Use the stable data and the smoothed data as the performance analysis indicators of the memory chip, query the current scenario corresponding to the performance analysis indicators, obtain the reference chip of the memory chip, and identify the reference scenario corresponding to the reference analysis indicators of the reference chip. Among them, querying the current scenario corresponding to the performance analysis indicators includes: Identify the historical data stream of the memory chip; Select the data processing indicators of the historical data stream; Obtain the historical analysis indicators of the performance analysis indicators; Analyze the indicator correlation between the historical analysis indicators and the data processing indicators; Determine the current scenario corresponding to the performance analysis indicators from the historical data stream through the indicator correlation; Among them, the data processing indicators include data processing speed and data processing volume; Analyze the scenario similarity between the current scenario and the reference scenario, calculate the reference demand degree of the reference scenario for the reference analysis indicators, and calculate the current demand degree of the current scenario for the performance analysis indicators according to the scenario similarity and the reference demand degree. Among them, analyzing the scenario similarity between the current scenario and the reference scenario includes: Query the current data source, current data target, and current execution actions of the current scenario; Query the reference data source, reference data target, and reference execution actions of the reference scenario; Analyze the source similarity, target similarity, and action similarity between the current data source and the control data source, the current data target and the control data target, and the current execution action and the control execution action respectively; Analyze the scenario similarity between the current scenario and the control scenario by using the source similarity, the target similarity, and the action similarity; Identify the control metrics of the control chip from the control analysis metrics by using the control demand degree, identify the current metrics of the storage chip from the performance analysis metrics by using the current demand degree, analyze the control performance corresponding to the control metrics, and analyze the current performance corresponding to the current metrics; Calculate the performance improvement ratio of the current performance relative to the control performance, and use the performance improvement ratio as the intelligent performance evaluation result of the storage chip.

2. The intelligent evaluation method for the performance of a memory chip under a grid array package according to claim 1, wherein The identifying the data probability distribution of the unstable data includes: Obtain the data minimum value and the data maximum value of the unstable data; Identify the data probability distribution of the unstable data according to the data minimum value and the data maximum value.

3. The intelligent evaluation method for the performance of a memory chip under a grid array package according to claim 1, characterized in that, The using the data probability distribution to perform data smoothing processing on the unstable data to obtain smoothed data includes: Calculate the probability density distribution of the unstable data according to the data probability distribution; Perform data smoothing processing on the unstable data based on the probability density distribution to obtain smoothed data.

4. The intelligent evaluation method for the performance of a memory chip under a grid array package according to claim 1, wherein The calculating the control demand degree of the control scenario for the control analysis metrics includes: Obtain the total scenario of the control chip; Calculate the control demand degree of the control scenario for the control analysis metrics according to the total scenario.

5. The intelligent evaluation method for the performance of a memory chip under a grid array package according to claim 1, wherein The analyzing the control performance corresponding to the control metrics includes: Calculate the hidden features of the control metrics; Analyze the control performance corresponding to the control metrics according to the hidden features.

6. The intelligent evaluation method for the performance of a memory chip under a grid array package according to claim 1, wherein, The calculating the performance improvement ratio of the current performance relative to the control performance includes: Calculate the performance ratio between the current performance and the control performance; Use the performance ratio as the performance improvement ratio of the current performance relative to the control performance.

7. An intelligent evaluation system for the performance of a memory chip under a grid array package, characterized in that, The system includes: A monitoring point determination module, configured to determine the performance analysis dimension of the storage chip under grid array packaging, select the performance analysis samples of the storage chip based on the performance analysis dimension, and apply the performance analysis samples to the storage chip to determine the performance monitoring points on the storage chip through the performance analysis samples. Among them, the determining the performance monitoring points on the storage chip through the performance analysis samples includes: Monitor the first test data at different chip positions of the storage chip by using a preset data monitoring device; Calculate the data correlation between the first test data at every two positions in the first test data; Set the first monitoring points at different chip positions of the storage chip when the data correlation is not greater than the preset correlation; Construct a data relationship model between the first test data at every two positions when the data correlation is greater than the preset correlation; Monitor the second test data at different chip positions of the storage chip by using the data monitoring device; Map the second test data into the same data space through the data relationship model to obtain a set of mapped data; Calculate the mapped data distance corresponding to the set of mapped data; Set second monitoring points at different chip positions of the storage chip by using the mapped data distance; Use the first monitoring point and the second monitoring point as performance monitoring points on the storage chip; A data smoothing module, configured to collect performance monitoring data of the storage chip at the performance monitoring points, divide the stable data and the unstable data in the performance monitoring data, identify the data probability distribution of the unstable data, and perform data smoothing processing on the unstable data by using the data probability distribution to obtain smoothed data; A scenario recognition module, configured to use the stable data and the smoothed data as performance analysis indicators of the storage chip, query the current scenario corresponding to the performance analysis indicators, obtain a reference chip of the storage chip, identify the reference scenario corresponding to the reference analysis indicators of the reference chip, wherein, the querying the current scenario corresponding to the performance analysis indicators includes: Identify the historical data stream of the storage chip; Select the data processing indicators of the historical data stream; Obtain the historical analysis indicators of the performance analysis indicators; Analyze the index correlation between the historical analysis indicators and the data processing indicators; Determine the current scenario corresponding to the performance analysis indicators from the historical data stream through the index correlation; Wherein, the data processing indicators include data processing speed and data processing volume; A requirement calculation module, configured to analyze the scenario similarity between the current scenario and the reference scenario, calculate the reference requirement degree of the reference scenario for the reference analysis indicators, and calculate the current requirement degree of the current scenario for the performance analysis indicators according to the scenario similarity and the reference requirement degree, wherein, the analyzing the scenario similarity between the current scenario and the reference scenario includes: Query the current data source, the current data target and the current execution action of the current scenario; Query the reference data source, the reference data target and the reference execution action of the reference scenario; Analyze the source similarity, the target similarity and the action similarity between the current data source and the reference data source, the current data target and the reference data target, and the current execution action and the reference execution action respectively; Analyze the scenario similarity between the current scenario and the reference scenario by using the source similarity, the target similarity and the action similarity; A performance analysis module, configured to identify the reference indicators of the reference chip from the reference analysis indicators by using the reference requirement degree, identify the current indicators of the storage chip from the performance analysis indicators by using the current requirement degree, analyze the reference performance corresponding to the reference indicators, and analyze the current performance corresponding to the current indicators; A performance evaluation module is used to calculate the performance improvement ratio of the current performance relative to the control performance, and use the performance improvement ratio as the intelligent performance evaluation result of the storage chip.

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