Embedded PCB packaging structure

Abstract

The present invention provides an embedded PCB packaging structure. By embedding a heat conduction base in the substrate layer and forming grooves on its surface to embed a heat source chip, and at the same time arranging a plurality of conductive and heat-conductive vias in the second insulating layer, heat can not only be conducted to the radiator through the heat conduction base, but also be conducted to the upper metal layer through the conductive and heat-conductive vias, and then be conducted downward from the upper metal layer through the second insulating layer to the heat conduction base, and then dissipated through the radiator. This multi-path parallel heat dissipation design effectively reduces the thermal resistance and improves the heat dissipation efficiency, solving the problems of single heat dissipation path, high thermal resistance and low heat dissipation efficiency in the traditional packaging form.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor packaging, and particularly to an embedded PCB packaging structure. Background Art

[0002] With the rapid development of the third-generation semiconductor technology, due to its unique performance advantages, silicon carbide (SiC) materials have been increasingly widely used in fields such as vehicle-mounted and photovoltaic energy storage. SiC devices, with their characteristics of fast switching speed and low loss, have significantly improved the energy efficiency and performance of the system, showing great market potential and development prospects.

[0003] However, the current packaging forms limit the full play of the potential of SiC materials to a certain extent. The traditional packaging technology is mainly based on the IGBT (Insulated Gate Bipolar Transistor) packaging design, which cannot fully adapt to the characteristics of SiC devices in terms of heat dissipation and electrical performance optimization, resulting in the performance of SiC devices in actual applications not reaching the theoretical expectations.

[0004] Among the development directions of various packaging technologies, the embedded PCB (Printed Circuit Board) packaging technology has attracted much attention. By directly embedding the chip into the PCB substrate, it achieves a more compact structure and shorter interconnection paths, which helps to reduce parasitic inductance and improve power density. However, at the same time, the embedded PCB packaging also faces severe heat dissipation challenges. Due to the relatively low thermal conductivity of the PCB material itself and the single heat dissipation path, it limits the rapid conduction and dissipation of heat, making the chip prone to overheating during high-power operation, thereby affecting its reliability and lifespan. Summary of the Invention

[0005] In view of the above-mentioned disadvantages of the prior art, the purpose of the present invention is to provide an embedded PCB packaging structure to solve the problem that the chip in the embedded PCB packaging in the prior art is prone to overheating during high-power operation, thereby affecting its reliability and lifespan.

[0006] To achieve the above object and other related objects, the present invention provides an embedded PCB packaging structure, which sequentially includes, from bottom to top: a heat sink, a lower metal layer, a first insulating layer, a substrate layer, a second insulating layer, and an upper metal layer. Among them, the material of the second insulating layer is high thermal conductivity PP (polypropylene), and the thermal conductivity of the second insulating layer is greater than 2 W / (m·K);

[0007] It further includes: a heat conduction seat embedded in and penetrating through the substrate layer, a heat source chip embedded in the heat conduction seat, and a plurality of conductive and heat-conductive vias penetrating through the second insulating layer; wherein, a groove is formed on the surface of the heat conduction seat away from the lower metal layer, the heat source chip is embedded in the groove, all the conductive and heat-conductive vias are located above the heat source chip, one end of the conductive and heat-conductive via is in contact connection with the heat source chip, and the other end is in contact connection with the upper metal layer.

[0008] Optionally, the thermal conductivity coefficient of the first insulating layer is greater than 4 W / (m·K).

[0009] Optionally, the materials of both the lower metal layer and the upper metal layer are copper.

[0010] Optionally, the material of the heat conduction seat is copper.

[0011] Optionally, the conductive and heat-conductive via is completely filled with a conductive and heat-conductive material, or the conductive and heat-conductive material is partially filled in the conductive and heat-conductive via.

[0012] Further, the conductive and heat-conductive material is copper.

[0013] Optionally, the upper surface of the heat source chip has a plurality of heat source pads, and the conductive and heat-conductive vias are in one-to-one contact connection with the heat source pads.

[0014] Further, the planar dimension of the end of the conductive and heat-conductive via close to the substrate layer is not less than the dimension of the heat source pad.

[0015] Optionally, the heat source chip is a silicon carbide-based chip.

[0016] Optionally, the planar dimension of the heat sink is greater than the planar dimension of the lower metal layer.

[0017] As described above, the embedded PCB packaging structure of the present invention has the following beneficial effects: by embedding a heat conduction seat in the substrate layer and forming a groove on its surface to embed the heat source chip, and at the same time arranging a plurality of conductive and heat-conductive vias in the second insulating layer, the heat can not only be conducted to the heat sink through the heat conduction seat, but also be conducted to the upper metal layer through the conductive and heat-conductive vias, and then be conducted downward from the upper metal layer through the second insulating layer to the heat conduction seat, and then be dissipated through the heat sink. This multi-path parallel heat dissipation design effectively reduces the thermal resistance and improves the heat dissipation efficiency, solving the problems of single heat dissipation path, high thermal resistance and low heat dissipation efficiency in the traditional packaging form. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It shows a schematic cross-sectional structure diagram of the embedded PCB packaging structure of the present invention.

[0019] Figure 2 It shows an equivalent schematic diagram of the parallel connection of the first thermal resistance and the second thermal resistance in the embedded PCB packaging structure of the present invention.

[0020] Figure 3 It shows a schematic diagram of the temperature distribution of the heat source chip and the entire embedded PCB packaging structure after a preset time in the embedded PCB packaging structure with a single-path heat dissipation design in the prior art.

[0021] Such as Figure 4 It shows a schematic diagram of the temperature distribution of the heat source chip and the entire embedded PCB packaging structure after a preset time in the embedded PCB packaging structure with a dual-path heat dissipation design of the present invention.

[0022] Component label description

[0023] 1, 2 Embedded PCB packaging structure, 10 Heat sink, 11 Lower metal layer, 12 First insulating layer, 13 Substrate layer, 14 Second insulating layer, 15 Upper metal layer, 16 Heat conducting seat, 17, 21 Heat source chip, 18 Conductive and heat conducting via, 19 Groove, R1 First thermal resistance, R2 Second thermal resistance. Specific implementation manners

[0024] The following uses specific specific examples to illustrate the implementation manners of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0025] Please refer to Figure 1 And Figure 2 . It should be noted that the diagrams provided in this embodiment only illustrate the basic concept of the present invention in a schematic manner. Therefore, only the components related to the present invention are shown in the diagrams, rather than being drawn according to the number, shape, and size of the components in actual implementation. The type, quantity, and ratio of each component in actual implementation can be arbitrarily changed, and the component layout type may also be more complex.

[0026] This embodiment provides an embedded PCB packaging structure 1, as Figure 1 shown. The packaging structure sequentially includes, from bottom to top: a heat sink 10, a lower metal layer 11, a first insulating layer 12, a substrate layer 13, a second insulating layer 14, and an upper metal layer 15. Among them, the material of the second insulating layer 14 is high thermal conductivity PP (polypropylene), and the thermal conductivity of the second insulating layer 14 is greater than 2 W / (m·K);

[0027] It further includes: a heat conducting base 16 embedded in and penetrating through the substrate layer 13, a heat source chip 17 embedded in the heat conducting base 16, and a plurality of conductive and heat conducting vias 18 penetrating through the second insulating layer 14; wherein, a groove 19 is formed on the surface of the heat conducting base 16 away from the lower metal layer 11, the heat source chip 17 is embedded in the groove 19, all the conductive and heat conducting vias 18 are located above the heat source chip 17, one end of the conductive and heat conducting via 18 is in contact connection with the heat source chip 17, and the other end is in contact connection with the upper metal layer 15.

[0028] In the embedded PCB packaging structure of this embodiment, by embedding a heat conducting base in the substrate layer and forming a groove on its surface to embed the heat source chip, and at the same time arranging a plurality of conductive and heat conducting vias in the second insulating layer, the heat can not only be conducted to the radiator through the heat conducting base, but also be conducted to the upper metal layer through the conductive and heat conducting vias, and then be conducted downward from the upper metal layer through the second insulating layer to the heat conducting base, and then be dissipated through the radiator. This multi-path parallel heat dissipation design effectively reduces the thermal resistance and improves the heat dissipation efficiency, solving the problems of single heat dissipation path, high thermal resistance and low heat dissipation efficiency in the traditional packaging form.

[0029] In this embodiment, the heat generated by the heat source chip 17 is conducted to the radiator 10 through the thermal resistance, and the thermal resistance is formed by the parallel first thermal resistance R1 and second thermal resistance R2; as Figure 2 shown is the equivalent schematic diagram of the parallel first thermal resistance R1 and second thermal resistance R2 in the embedded PCB packaging structure. Among them, the first thermal resistance R1 corresponds to the first path, and the first path is the heat generated by the heat source chip 17 conducted to the heat conducting base 16, and then conducted from the heat conducting base 16 to the radiator 10; the second thermal resistance R2 corresponds to the second path, and the second path is the heat generated by the heat source chip 17 conducted to the upper metal layer 15 through the conductive and heat conducting via 18, then conducted through the second insulating layer 14 to the heat conducting base 16, and finally conducted from the heat conducting base 16 to the radiator 10. Through the dual-path thermal resistance parallel design, the heat dissipation efficiency is improved, the reliability is enhanced, and the thermal distribution is optimized, providing a more effective heat dissipation solution for the heat source chip 17 with high power and high heat generation.

[0030] In a specific example, the thermal resistance of the dual-path parallel design is reduced by about 10% compared with the single-path design in the prior art. As an example, for the dual-path heat dissipation design of the embedded PCB packaging structure 1 in this embodiment and the single-path heat dissipation design of the embedded PCB packaging structure 2 in the prior art, within the same preset time, the average temperature, the highest temperature and the temperature increase value of the heat source chip are shown in Table 1. Specifically, as Figure 3Shown is the embedded PCB package structure 2 with a single-path heat dissipation design in the prior art. After a preset time, the temperature distribution of the heat source chip 21 and the entire embedded PCB package structure 2 is as Figure 4 Shown is the embedded PCB package structure 1 with a dual-path heat dissipation design in this embodiment. After the preset time, the temperature distribution of the heat source chip 17 and the entire embedded PCB package structure 1.

[0031] Table 1:

[0032]

[0033] As an example, the material of the first insulating layer 12 generally does not select traditional RF4 and PI (polyimide) materials with a relatively low thermal conductivity. The thermal conductivity of the first insulating layer 12 is preferably greater than 4 W / (m·K) to quickly conduct the heat generated by the heat source chip 17 through the first insulating layer 12 to the radiator 10, thereby improving the heat dissipation efficiency of the package structure.

[0034] The material of the second insulating layer 14 is a high-thermal-conductivity PP (polypropylene) material with a thermal conductivity greater than 2 W / (m·K), which can quickly conduct the heat conducted to the upper metal layer 15 through the second insulating layer 14 to the heat conduction base 16, and finally conducted to the radiator 10 by the heat conduction base 16.

[0035] In this embodiment, the materials of the lower metal layer 11 and the upper metal layer 15 are both preferably copper. Utilizing the high electrical conductivity and excellent thermal conductivity of copper can not only improve the electrical and heat dissipation performance of the embedded PCB package structure, but also ensure its reliability and economy in various application environments.

[0036] As an example, the material of the heat conduction base 16 is a material with a high thermal conductivity coefficient. Preferably, the material of the heat conduction base 16 in this embodiment is copper. Utilizing the excellent thermal conductivity of copper can quickly conduct the heat generated by the heat source chip 17 to the radiator 10, thereby further improving the heat dissipation efficiency of the entire package structure.

[0037] It should be noted that the conductive and heat-conductive via 18 is a through hole with conductive and heat-conductive functions. As an example, the conductive and heat-conductive material completely fills the conductive and heat-conductive via 18, or the conductive and heat-conductive material is partially filled in the conductive and heat-conductive via 18, as long as the functions of conduction and heat conduction can be achieved. Among them, complete filling can minimize the thermal resistance and resistance and ensure the efficient conduction of heat and current. Partial filling can flexibly adjust the filling ratio according to actual heat dissipation and electrical connection requirements, which can not only ensure performance but also reduce the material usage and cost.

[0038] Furthermore, the conductive and thermally conductive material is preferably copper. Copper is the preferred material because of its excellent conductive and thermally conductive properties, which can significantly improve the electrical and heat dissipation efficiency of the packaging structure. It also has good mechanical properties and corrosion resistance, can adapt to a variety of harsh working environments, and effectively extend the service life of the packaging structure.

[0039] As an example, the upper surface of the heat source chip 17 has a plurality of heat source pads (not shown), and the conductive thermal vias 18 are contact-connected with the heat source pads one-to-one, so that the heat generated by the heat source chip 17 can be conducted to the conductive thermal vias 18 to the greatest extent through the heat source pads, and then conducted to the upper metal layer 15.

[0040] As a further example, the planar size of the conductive thermal via 18 close to one end of the substrate layer 13 is not less than the size of the heat source pad to ensure a good contact area between the conductive thermal via 18 and the heat source pad, thereby further improving heat dissipation efficiency.

[0041] As an example, the heat source chip 17 is a silicon carbide-based chip, which can not only give full play to the potential of silicon carbide materials, but also complement the design of the embedded PCB packaging structure to further improve the performance and reliability of the entire packaging structure.

[0042] As an example, the planar size of the heat sink 10 is larger than the planar size of the underlying metal layer 11 to expand the coverage of the heat sink 10, so that it can more effectively collect and dissipate heat from the underlying metal layer 11 and the entire packaging structure, and the larger planar size helps to increase the contact area between the heat sink 10 and the surrounding environment, thereby improving the heat dissipation efficiency, reducing the operating temperature of the heat source chip 17, and improving the reliability and life of the heat source chip 17.

[0043] In summary, the embedded PCB packaging structure of the present invention embeds a heat-conducting seat in the substrate layer and forms a groove on its surface to embed the heat source chip, and at the same time, a plurality of conductive heat-conducting vias are set in the second insulating layer, so that the heat can not only be conducted to the heat sink through the heat-conducting seat, but also be conducted to the upper metal layer through the conductive heat-conducting vias, and then from the upper metal layer through the second insulating layer to the heat-conducting seat, and then dissipated through the heat sink. This multi-path parallel heat dissipation design effectively reduces thermal resistance, improves heat dissipation efficiency, and solves the problems of single heat dissipation path, high thermal resistance, and low heat dissipation efficiency in traditional packaging forms. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has a high industrial utilization value.

[0044] The above embodiments are only illustrative of the principles and effects of the present invention and are not intended to limit the present invention. Any person familiar with this technology can modify or change the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by those with ordinary knowledge in the technical field without departing from the spirit and technical ideas disclosed by the present invention should still be covered by the claims of the present invention.

Claims

1. An embedded PCB package structure, characterized in that, The encapsulation structure sequentially includes, from bottom to top: a heat sink, a lower metal layer, a first insulating layer, a substrate layer, a second insulating layer, and an upper metal layer. Among them, the material of the second insulating layer is high thermal conductivity PP, and the thermal conductivity of the second insulating layer is greater than 2 W / (m·K); It further includes: a heat conduction seat embedded in and penetrating the substrate layer, a heat source chip embedded in the heat conduction seat, and a plurality of conductive and heat-conductive vias penetrating the second insulating layer; among them, a groove is formed on the surface of the heat conduction seat away from the lower metal layer, the heat source chip is embedded in the groove, all the conductive and heat-conductive vias are located above the heat source chip, one end of the conductive and heat-conductive via is in contact connection with the heat source chip, and the other end is in contact connection with the upper metal layer.

2. The embedded PCB package structure according to claim 1, wherein: The thermal conductivity of the first insulating layer is greater than 4 W / (m·K).

3. The embedded PCB package structure according to claim 1, wherein: The materials of the lower metal layer and the upper metal layer are both copper.

4. The embedded PCB package structure according to claim 1, wherein: The material of the heat conduction seat is copper.

5. The embedded PCB package structure according to claim 1, characterized in that: The conductive and heat-conductive via is completely filled with a conductive and heat-conductive material, or the conductive and heat-conductive material is partially filled in the conductive and heat-conductive via.

6. The embedded PCB package structure according to claim 5, wherein: The conductive and heat-conductive material is copper.

7. The embedded PCB packaging structure according to claim 1, characterized in that: The upper surface of the heat source chip has a plurality of heat source pads, and the conductive and heat-conductive vias are in one-to-one correspondence and contact connection with the heat source pads.

8. The embedded PCB package structure according to claim 7, wherein: The planar dimension of the end of the conductive and heat-conductive via close to the substrate layer is not less than the dimension of the heat source pad.

9. The embedded PCB package structure according to claim 1, wherein: The heat source chip is a silicon carbide-based chip.

10. The embedded PCB package structure according to claim 1, wherein: The planar dimension of the heat sink is greater than the planar dimension of the lower metal layer.

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