Driving circuit and switching power supply circuit

Abstract

The invention discloses a driving circuit and a switching power supply circuit, and the driving circuit comprises a first driving circuit which is connected with a signal receiving end, a first power supply end and a power driving circuit, and outputs a first driving signal according to a control signal output by the signal receiving end and a first power supply signal output by the first power supply end; the second driving circuit is connected with the signal detection end of the power switch circuit, is connected with the first power supply end, the second power supply end and the power driving circuit, and outputs a second driving signal according to the control signal, a detection signal output by the signal detection end, the first power supply signal and a second power supply signal output by the second power supply end; and the power driving circuit is connected with the control end of the power switch circuit, is connected with the signal receiving end, and maintains the conduction impedance of the power switch circuit unchanged according to the control signal, the first driving signal and the second driving signal. According to the technical scheme, the overcurrent capability of the switch tube in the power switch circuit is kept unchanged, and the application stability of the power switch circuit is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of switching power supplies, and in particular to a driving circuit and a switching power supply circuit. Background Art

[0002] With the continuous development of semiconductor technology, the third generation of semiconductor materials has gradually emerged and been widely used. Among them, gallium nitride (GAN), as a new type of semiconductor material, has many excellent properties, such as lower on-resistance Rds(on), smaller gate-source parasitic capacitance and lower gate turn-on threshold Vth. In switching power supply systems, GAN devices can achieve higher switching frequencies and smaller conduction losses, so they are widely used in the field of switching power supplies.

[0003] However, GAN devices also have certain limitations. First, their gate voltage withstand voltage is low, only about 7V. In order to give full play to the low Rds(on) characteristics of GAN and achieve large current output, it is usually necessary to design the gate drive voltage of GAN to be above 6V. However, in practical applications, especially in flyback switching power supplies, under special circumstances, in order to achieve overcurrent point compensation, the source voltage of GAN will increase, resulting in a decrease in the gate-source voltage VGS, and at high temperatures, its overcurrent capability is further reduced. This problem makes the application of GAN in flyback switching power supply systems have certain risks. Summary of the invention

[0004] The embodiments of the present invention provide a driving circuit and a switching power supply circuit to solve the problem of certain risks in the application of GAN in a flyback switching power supply system.

[0005] A driving circuit comprises a signal receiving end, a first power supply end, a second power supply end, a first driving circuit, a second driving circuit and a power driving circuit; The first driving circuit is connected to the signal receiving end, the first power supply end and the power driving circuit, and is used to output a first driving signal to the power driving circuit according to a control signal output by the signal receiving end and a first power supply signal output by the first power supply end; The second driving circuit is connected to the signal detection end of the power switch circuit, and is connected to the first power supply end, the second power supply end and the power driving circuit, and is used to output a second driving signal to the power driving circuit according to the control signal, the detection signal output by the signal detection end, the first power supply signal and the second power supply signal output by the second power supply end; The power driving circuit is used to connect the control end of the power switching circuit and is connected to the signal receiving end, and is used to maintain the on-impedance of the power switching circuit unchanged when driving the power switching circuit to turn on according to the control signal, the first driving signal and the second driving signal.

[0006] Further, the first driving circuit includes a first transistor, a current source and a first current mirror; The first transistor and the current source are arranged in series between the input terminal of the first current mirror and the ground; The control end of the first transistor is connected to the signal receiving end; The common end of the first current mirror is connected to the first power supply end, and the output end of the first current mirror is connected to the power driving circuit.

[0007] Further, the second driving circuit includes an operational amplifier, a voltage divider circuit, a second transistor, a second current mirror, a third current mirror, a third transistor and a fourth current mirror; The non-inverting input terminal of the operational amplifier is connected to the signal detection terminal of the power switch circuit, the inverting input terminal of the operational amplifier is connected to the voltage divider circuit, and the output terminal of the operational amplifier is connected to the control terminal of the second transistor; The voltage divider circuit and the second transistor are connected in series between the input end of the second current mirror and the ground; the output end of the second current mirror is connected to the input end of the third current mirror, and the common end of the second current mirror is connected to the first power supply end; The common end of the third current mirror is grounded, the output end of the third current mirror is connected to the first end of the third transistor, the second end of the third transistor is connected to the input end of the fourth current mirror, and the control end of the third transistor is connected to the signal receiving end; The common end of the fourth current mirror is connected to the second power supply end, and the output end of the fourth current mirror is connected to the power driving circuit.

[0008] Furthermore, the voltage divider circuit includes a first resistor and a second resistor; the first resistor and the second resistor are arranged in series between the second transistor and the ground, and the connection node between the first resistor and the second resistor is connected to the inverting input terminal of the operational amplifier.

[0009] Further, the power driving circuit includes a first driving transistor, a second driving transistor, a first resistance circuit and an inverter; The first driving transistor and the second driving transistor are arranged in series between the second power supply terminal and the ground; The control end of the first driving transistor is grounded through the first resistance circuit and is connected to the first driving circuit and the second driving circuit; The control end of the second driving transistor is connected to the signal receiving end through the inverter.

[0010] Furthermore, the power driving circuit also includes a voltage stabilizing circuit; A first terminal of the voltage stabilizing circuit is connected to a control terminal of the first driving transistor, and a second terminal of the voltage stabilizing circuit is grounded.

[0011] Furthermore, the voltage stabilizing circuit includes a voltage stabilizing diode; a cathode of the voltage stabilizing diode is connected to a control end of the first driving transistor, and a second end of the voltage stabilizing diode is grounded.

[0012] Furthermore, the power driving circuit further includes a second resistance circuit; The second resistance circuit and the voltage stabilizing circuit are arranged in series between the control terminal of the first driving transistor and the ground.

[0013] A switching power supply circuit comprises a transformer, a power switching circuit and the above-mentioned driving circuit; The first input end of the transformer is used to connect to the power input end, the second input end of the transformer is grounded through the power switch circuit, and the output end of the transformer is used to connect to the output load; The power driving circuit is connected to the control end of the power switching circuit.

[0014] Furthermore, the power switch circuit includes a switch tube and a third resistance circuit; The first end of the switch tube is connected to the second input end of the transformer, the second end of the switch tube is grounded through the third resistance circuit, the third end of the switch tube is the control end of the power switch circuit, and the connection node between the second end of the switch tube and the third resistance circuit is the signal detection end of the power switch circuit.

[0015] The above-mentioned drive circuit and switching power supply circuit, the drive circuit includes a signal receiving end, a first power supply end, a second power supply end, a first drive circuit, a second drive circuit and a power drive circuit; by connecting the first drive circuit with the signal receiving end, the first power supply end and the power drive circuit, according to the control signal output by the signal receiving end and the first power supply signal output by the first power supply end, the first drive signal is output to the power drive circuit; the second drive circuit is used to connect the signal detection end of the power switch circuit, and is connected to the first power supply end, the second power supply end and the power drive circuit, according to the control signal, the detection signal output by the signal detection end, the first power supply signal and the second power supply signal output by the second power supply end, the second drive signal is output to the power drive circuit; the power drive circuit is used to connect the control end of the power switch circuit, and is connected to the signal receiving end, and is used to maintain the on-resistance of the power switch circuit unchanged when the power switch circuit is driven to turn on according to the control signal, the first drive signal and the second drive signal, so as to ensure that the overcurrent capacity of the switch tube in the power switch circuit remains unchanged, thereby preventing the switch tube in the power switch circuit from being damaged and improving the stability of the application of the power switch circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative labor.

[0017] Figure 1 is a circuit diagram of a switching power supply circuit in one embodiment of the present invention; Figure 2 FIG. 4 is a signal waveform diagram of a driving circuit in an embodiment of the present invention.

[0018] In the figure: 1. driving circuit; 11. first driving circuit; 111. current source; 112. first current mirror; 12. second driving circuit; 121. voltage divider circuit; 122. second current mirror; 123. third current mirror; 124. fourth current mirror; 13. power driving circuit; 131. first resistance circuit; 132. inverter; 133. voltage stabilizing circuit; 134. second resistance circuit; 2. power switching circuit; 21. third resistance circuit; 3. transformer. DETAILED DESCRIPTION

[0019] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0020] It should be understood that the present invention can be implemented in different forms and should not be construed as being limited to the embodiments set forth herein. On the contrary, providing these embodiments will make the disclosure thorough and complete and fully convey the scope of the present invention to those skilled in the art. In the accompanying drawings, the sizes and relative sizes of layers and regions may be exaggerated for clarity. The same reference numerals throughout represent the same elements.

[0021] It should be understood that when an element or layer is referred to as being "on, adjacent to, connected to or coupled to other elements or layers, it may be directly on, adjacent to, connected to or coupled to other elements or layers, or there may be intervening elements or layers. In contrast, when an element is referred to as being "directly on, directly adjacent to, directly connected to or directly coupled to other elements or layers, there may be no intervening elements or layers. It should be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present invention, the first element, component, region, layer or part discussed below may be represented as a second element, component, region, layer or part.

[0022] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," and the like may be used herein for ease of description to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that the spatially relative terms are intended to include different orientations of the device in use and operation in addition to the orientations shown in the figures. For example, if the device in the accompanying drawings is flipped, then the elements or features described as "under other elements" or "under" or "under" will be oriented as "above" the other elements or features. Thus, the exemplary terms "under" and "under" may include both upper and lower orientations. The device may be otherwise oriented (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0023] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be limiting of the present invention. When used herein, the singular forms "a", "an" and " / the" are also intended to include plural forms, unless the context clearly indicates another way. It should also be understood that the terms "consisting of" and / or "comprising" when used in this specification determine the presence of features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0024] In order to fully understand the present invention, detailed structures and steps will be presented in the following description to illustrate the technical solutions proposed by the present invention. The preferred embodiments of the present invention are described in detail below, but in addition to these detailed descriptions, the present invention may also have other implementations.

[0025] This embodiment provides a driving circuit 1 for driving a power switch circuit 2 to work. Exemplarily, the power switch circuit 2 includes a switch tube M1. Exemplarily, the switch tube M1 is a GAN transistor. As an example, the power switch circuit 2 is applied in a switching power supply circuit.

[0026] As an example, Figure 1 As shown, the switching power supply circuit includes a transformer 3, a power switch circuit 2 and the above-mentioned drive circuit 1. The first input end of the transformer 3 is used to connect to the power input end VIN, the second input end of the transformer 3 is grounded through the power switch circuit 2, and the output end of the transformer 3 is used to connect to the output load; the power drive circuit 13 is connected to the control end of the power switch circuit 2.

[0027] Exemplarily, the power input terminal VIN is used to connect to the power supply grid. Exemplarily, the power input terminal VIN is connected to the power supply grid through a rectifier circuit. The rectifier circuit is used to convert the AC power signal provided by the power supply grid into a DC power signal. The output load includes an electronic device or a charger. Exemplarily, the first output terminal of the transformer 3 is connected to the anode of the output diode D1, the cathode of the output diode D1 is used to connect to the output load, and the cathode of the diode is grounded through the output capacitor C1 and the output resistor R2.

[0028] Exemplarily, the power switch circuit 2 includes the above-mentioned switch tube M1 and the third resistor circuit 21; the first end of the switch tube M1 is connected to the second input end of the transformer 3, the second end of the switch tube M1 is grounded through the third resistor circuit 21, the third end of the switch tube M1 is the control end of the power switch circuit 2, and the connection node between the second end of the switch tube M1 and the third resistor circuit 21 is the signal detection end VCS of the power switch circuit 2. Exemplarily, the control end of the power switch circuit 2 is used to receive the driving signal of the driving circuit 1 to control the power switch circuit 2 to work according to the driving signal. The signal detection end VCS of the power switch circuit 2 is used to detect the detection signal of the power switch circuit 2. The detection signal can be a detection voltage or a detection current.

[0029] This embodiment provides a driving circuit 1, such as Figure 1 As shown, it includes a signal receiving end PWM, a first power supply end 5V, a second power supply end VDD, a first drive circuit 1, a second drive circuit 12 and a power drive circuit 13; the first drive circuit 1 is connected to the signal receiving end PWM, the first power supply end 5V and the power drive circuit 13, and is used to output a first drive signal to the power drive circuit 13 according to a control signal output by the signal receiving end PWM and a first power supply signal output by the first power supply end 5V; the second drive circuit 12 is used to connect the signal detection end VCS of the power switch circuit 2, and is connected to the first power supply end 5V, the second power supply end VDD and the power drive circuit 13, and is used to output a second drive signal to the power drive circuit 13 according to a control signal, a detection signal output by the signal detection end VCS, the first power supply signal and the second power supply signal output by the second power supply end VDD; the power drive circuit 13 is used to connect the control end of the power switch circuit 2, and is connected to the signal receiving end PWM, and is used to maintain the on-resistance of the power switch circuit 2 unchanged when driving the power switch circuit 2 to conduct according to the control signal, the first drive signal and the second drive signal.

[0030] Wherein, the signal receiving end PWM is used to receive a control signal. Exemplarily, the control signal may be a PWM signal. Exemplarily, the drive circuit 1 may be integrated in a power control chip, which also includes a main control module for outputting a PWM signal. The first power supply end 5V is used to provide a first power supply signal. The second power supply end VDD is used to provide a second power supply signal. The first power supply signal and the second power supply signal are different power supply signals. It can be understood that the first power supply signal and / or the second power supply signal are used to ensure that the first drive circuit 1 generates a first drive signal, and the second drive circuit 12 generates a second drive signal.

[0031] As an example, after the first drive circuit 1 receives the control signal, it outputs the first drive signal to the power drive circuit 13 according to the control signal, the first power supply signal and the second power supply signal, and the power drive circuit 13 drives the power switch circuit 2 to turn on or off with the control signal and the first drive signal. Exemplarily, the switch tube M1 of the power switch circuit 2 is an N-type GAN transistor. When the control signal changes from a low level to a high level, the power drive circuit 13 drives the switch tube M1 in the power switch circuit 2 to turn on according to the first drive signal, and the detection voltage VCS (that is, the source voltage of the switch tube M1) on the third resistor circuit 21 rises linearly, and the gate-source voltage of the corresponding switch tube M1 decreases linearly, resulting in a reduction in the overcurrent capability of the switch tube M1 and an increase in the on-resistance, which will be worse in a high temperature environment.

[0032] In view of the above problems, when the control signal changes from a low level to a high level, the second driving circuit 12 outputs a second driving signal to the power driving circuit 13 according to the control signal, the detection signal output by the signal detection terminal VCS, the first power supply signal and the second power supply signal output by the second power supply terminal VDD, so that the power driving circuit 13 drives the power switch circuit 2 to turn on or off according to the control signal, the first driving signal and the second driving signal, and when driving the power switch circuit 2 to turn on, the on-resistance of the power switch circuit 2 is maintained unchanged. In this example, under the joint action of the first driving signal and the second driving signal, the gate voltage of the switch tube M1 increases linearly with the increase of the detection voltage VCS on the third resistor circuit 21, thereby maintaining the gate-source voltage of the switch tube M1 unchanged, and further maintaining the on-resistance of the switch tube M1 unchanged.

[0033] In this embodiment, the driving circuit 1 includes a signal receiving terminal PWM, a first power supply terminal 5V, a second power supply terminal VDD, a first driving circuit 1, a second driving circuit 12 and a power driving circuit 13; by connecting the first driving circuit 1 with the signal receiving terminal PWM, the first power supply terminal 5V and the power driving circuit 13, according to the control signal output by the signal receiving terminal PWM and the first power supply signal output by the first power supply terminal 5V, the first driving signal is output to the power driving circuit 13; the second driving circuit 12 is used to connect the signal detection terminal VCS of the power switching circuit 2, and is connected to the first power supply terminal 5V, the second power supply terminal VDD and the power driving circuit 13, based on the control signal output by the signal receiving terminal PWM and the first power supply signal output by the first power supply terminal 5V. According to the control signal, the detection signal output by the signal detection terminal VCS, the first power supply signal and the second power supply signal output by the second power supply terminal VDD, the second drive signal is output to the power drive circuit 13; the power drive circuit 13 is used to connect the control end of the power switch circuit 2 and is connected to the signal receiving end PWM, and is used to maintain the on-resistance of the power switch circuit 2 unchanged when the power switch circuit 2 is driven to be turned on according to the control signal, the first drive signal and the second drive signal, so as to ensure that the overcurrent capacity of the switch tube M1 in the power switch circuit 2 remains unchanged, thereby preventing the switch tube M1 in the power switch circuit 2 from being damaged and improving the stability of the application of the power switch circuit 2.

[0034] In one embodiment, the first driving circuit 1 includes a first transistor M12, a current source 111 and a first current mirror 112; the first transistor M12 and the current source 111 are arranged in series between the input terminal of the first current mirror 112 and the ground; the control terminal of the first transistor M12 is connected to the signal receiving terminal PWM; the common terminal of the first current mirror 112 is connected to the first power supply terminal 5V, and the output terminal of the first current mirror 112 is connected to the power driving circuit 13.

[0035] The first transistor M12 is a MOS field effect transistor and a BJT transistor.

[0036] As an example, the drain (collector) of the first transistor M12 is connected to the input end of the first current mirror 112, the source (emitter) of the first transistor M12 is grounded through the current source 111, and the gate (base) of the first transistor M12 is connected to the signal receiving end PWM. The current source 111 is used to provide current for the first current mirror 112 to work.

[0037] As an example, the first current mirror 112 includes a transistor M10 and a transistor M11, and the transistor M10 and the transistor M11 are MOS field effect transistors and BJT transistors. Exemplarily, the transistor M10 and the transistor M11 can be P-type transistors to ensure that the transistor M10 and the transistor M11 are turned on when the first transistor M12 is turned on. The drain (collector) of the transistor M10 and the drain (collector) of the transistor M11 are connected together as the common end of the first current mirror 112, and are connected to the first power supply end 5V. The source (emitter) of the transistor M10 is connected to the drain (collector) of the first transistor M12, and the source (emitter) of the transistor M11 is connected to the power driving circuit 13. The gate (base) of the transistor M10 is connected to the gate (base) of the transistor M11, and is connected to the source (emitter) of the transistor M10. It is understandable that the size ratio of the transistor M10 and the transistor M11 may be set according to actual requirements to set the current copy ratio of the first current mirror 112 .

[0038] In this embodiment, when the PWM signal (control signal) changes from a low level to a high level, the first transistor M12 is turned on, the current source 111 provides current for the transistor M10 to work, and the transistor M11 mirrors and copies the current of the transistor M10. The current copy ratio is the ratio of the sizes of the transistor M10 and the transistor M11. The transistor M11 transmits the current I1 to the first resistor circuit 131 (resistor R3). The larger the current I1, the larger the voltage on the first resistor circuit 131 (that is, the larger the gate voltage of the first drive transistor M2 in the power drive circuit 13). Since the PWM signal becomes a low level after passing through the inverter 132230, the gate voltage of the second drive transistor M3 in the power drive circuit 13 is a low level, so the second drive transistor M3 is turned off. The first driving transistor M2 and the second driving transistor M3 form a source follower. The larger the gate voltage of the first driving transistor M2, the larger its source voltage is. The larger the gate voltage of the corresponding switch tube M1 in the power switching circuit 2 is, the switch tube M1 in the power switching circuit 2 is turned on, and the primary winding of the transformer 3 starts to store energy. As the on-time of the switch tube M1 increases, the larger the inductance current generated by the primary winding of the transformer 3 is, the larger the detection voltage VCS on the third resistance circuit 21 in the power switching circuit 2 is. When the detection voltage VCS reaches the preset voltage, the PWM signal changes from a high level to a low level, the first driving transistor M2 is turned off, the switch tube M1 in the power switching circuit 2 is turned off, and the secondary winding of the transformer 3 is discharged, thereby realizing the discharge function of the switching power supply circuit.

[0039] In one embodiment, the second driving circuit 12 includes an operational amplifier OPA, a voltage divider circuit 121, a second transistor M13, a second current mirror 122, a third current mirror 123, a third transistor M14 and a fourth current mirror 124; the in-phase input terminal of the operational amplifier OPA is connected to the signal detection terminal VCS of the power switch circuit 2, the inverting input terminal of the operational amplifier OPA is connected to the voltage divider circuit 121, and the output terminal of the operational amplifier OPA is connected to the control terminal of the second transistor M13; the voltage divider circuit 121 and the second transistor M13 are arranged in series at the input terminal of the second current mirror 122 and ground; the output end of the second current mirror 122 is connected to the input end of the third current mirror 123, and the common end of the second current mirror 122 is connected to the first power supply end 5V; the common end of the third current mirror 123 is grounded, the output end of the third current mirror 123 is connected to the first end of the third transistor M14, the second end of the third transistor M14 is connected to the input end of the fourth current mirror 124, and the control end of the third transistor M14 is connected to the signal receiving end PWM; the common end of the fourth current mirror 124 is connected to the second power supply end VDD, and the output end of the fourth current mirror 124 is connected to the power driving circuit 13.

[0040] As an example, the second current mirror 122 includes a transistor M8 and a transistor M9, and the transistor M8 and the transistor M9 are MOS field effect transistors and BJT transistors. Exemplarily, the transistor M8 and the transistor M9 can be P-type transistors to ensure that the transistor M8 and the transistor M9 are turned on when the second transistor M13 is turned on. The drain (collector) of the transistor M8 and the drain (collector) of the transistor M9 are connected together as the common end of the second current mirror 122, and are connected to the first power supply end 5V. The source (emitter) of the transistor M8 is connected to the drain (collector) of the second transistor M13, and the source (emitter) of the transistor M9 is connected to the input end of the third current mirror 123. The gate (base) of the transistor M8 is connected to the gate (base) of the transistor M9, and is connected to the source (emitter) of the transistor M8. It can be understood that the size ratio of the transistor M8 and the transistor M9 can be set according to actual needs to set the current replication ratio of the second current mirror 122.

[0041] As an example, the third current mirror 123 includes a transistor M4 and a transistor M5, and the transistor M4 and the transistor M5 are MOS field effect transistors and BJT transistors. Exemplarily, the transistor M4 and the transistor M5 can be N-type transistors to ensure that the transistor M4 and the transistor M5 are turned on when the second current mirror 122 is turned on. The drain (collector) of the transistor M4 is connected to the output end of the second current mirror 122, and the drain (collector) of the transistor 5 is connected to the input end of the fourth current mirror 124. The source (emitter) of the transistor M4 and the source (emitter) of the transistor 5 are connected together as the common end of the third current mirror 123, and are connected to the second power supply end VDD. The gate (base) of the transistor M4 is connected to the gate (base) of the transistor M5, and is connected to the drain (collector) of the transistor M4. It can be understood that the size ratio of the transistor M4 and the transistor M5 can be set according to actual needs to set the current replication ratio of the third current mirror 123.

[0042] As an example, the fourth current mirror 124 includes a transistor M6 and a transistor M7, and the transistor M6 and the transistor M7 are MOS field effect transistors and BJT transistors. Exemplarily, the transistor M6 and the transistor M7 can be P-type transistors to ensure that the transistor M6 and the transistor M7 are turned on when the third transistor M14 is turned on. The drain (collector) of the transistor M6 and the drain (collector) of the transistor M7 are connected together as the common end of the fourth current mirror 124, and are connected to the second power supply terminal VDD. The source (emitter) of the transistor M6 is connected to the drain (collector) of the third transistor M14, and the source (emitter) of the transistor M7 is connected to the power driving circuit 13. The gate (base) of the transistor M6 is connected to the gate (base) of the transistor M7, and is connected to the source (emitter) of the transistor M6. It can be understood that the size ratio of the transistor M6 and the transistor M7 can be set according to actual needs to set the current replication ratio of the fourth current mirror 124.

[0043] As an example, the second transistor M13 and the third transistor M14 are MOS field effect transistors and BJT transistors. Exemplarily, the second transistor M13 and the third transistor M14 can be N-type transistors. The gate (base) of the second transistor M13 is connected to the output end of the operational amplifier OPA, the drain (collector) of the second transistor M13 is connected to the input end of the second current mirror 122, and the source (emitter) of the second transistor M13 is grounded through the voltage divider circuit 121. The gate (base) of the third transistor M14 is connected to the signal receiving end PWM, the drain (collector) of the second transistor M13 is connected to the input end of the fourth current mirror 124, and the source (emitter) of the second transistor M13 is connected to the output end of the third current mirror 123.

[0044] As an example, the voltage divider circuit 121 includes a first resistor R5 and a second resistor R6, the first resistor R5 and the second resistor R6 are arranged in series between the second transistor M13 and the ground, and the connection node between the first resistor R5 and the second resistor R6 is connected to the reverse input terminal of the operational amplifier OPA. In this example, the resistance values ​​of the first resistor R5 and the second resistor R6 can be set according to actual needs and experience, and are not limited here.

[0045] In this embodiment, when the PWM signal output by the signal receiving end PWM changes from a low level to a high level, the first transistor M12 and the third transistor M14 are both turned on. At this time, the gate voltage of the second driving transistor M3 in the power driving circuit 13 is at a low level after the inverter 132 processes the high level of the PWM signal, so the second driving transistor M3 is turned off, the first driving transistor M2 in the power driving circuit 13 is turned on, and the gate voltage of the switch tube M1 in the power switching circuit 2 also rises rapidly. The switch tube M1 is turned on, and the detection voltage VCS of the third resistor circuit 21 also starts to rise. At the same time, the detection voltage VCS is output to the non-inverting input terminal of the operational amplifier OPA through the signal detection terminal VCS. According to the virtual short principle of the operational amplifier OPA, the voltage outputted from the output terminal of the voltage divider circuit 121 is the detection voltage VCS, and the current flowing through the second resistor R6 is the detection voltage VCS / the second resistor The resistance value of R6, when the detection voltage VCS increases linearly, the gate voltage of the second transistor M13 also increases linearly, the drain current of the second transistor M13 also increases linearly, and the voltage on the second resistor R6 also increases linearly to maintain the virtual short principle of the operational amplifier OPA. The current flowing through the second resistor R6 and the current flowing through the drain of the transistor M8 in the second current mirror 122 are in the same branch, so the current flowing through the second resistor R6 is the same as the drain current of the transistor M8. Since the transistors M8 and M9 are current mirror structures, the ratio of the drain current of the transistor M9 to the drain current of M8 is the ratio of the transistor sizes of the two. The transistor M4 and the transistor M9 are in the same branch, that is, the drain current of the transistor M9 is the same as the drain current of the transistor M4. The transistor M4 and the drain current M5 are current mirror structures, so the ratio of the drain current of the transistor M5 to the drain current of the transistor M4 is the ratio of the transistor sizes of the two.When the PWM signal is at a high level, the gate of the third transistor M14 is at a high level, the third transistor M14 is turned on, and the current flowing through the third transistor M14 is the compensation current. The transistor M6 and the transistor M5 are in the same branch, that is, the drain currents of the transistors M5 and M6 are the same. The transistors M6 and M7 form a current mirror structure, so the ratio of the drain current of the transistor M7 to the drain current of the transistor M6 is the ratio of the transistor sizes of the two. The drain current of the transistor M7 is applied to the gate of the first driving transistor M2 connected to the resistor R3, and the drain current of the transistor M7 increases with the third transistor M5. The detection voltage VCS on the three-resistance circuit 21 increases linearly, and the gate voltage of the first driving transistor M2 increases. Since the gate of the switch tube M1 in the power switching circuit 2 is connected to the source of the first driving transistor M2 (i.e., the source follower), the gate voltage of the switch tube M1 in the power switching circuit 2 also increases linearly. The gate voltage of the switch tube M1 in the power switching circuit 2 increases linearly, maintaining the gate-source voltage of the switch tube M1 unchanged, thereby making the overcurrent capacity of the switch tube M1 unchanged, and further making the on-resistance of the switch tube M1 unchanged, the heat does not increase, and the stability is improved.

[0046] In one embodiment, the power driving circuit 13 includes a first driving transistor M2, a second driving transistor M3, a first resistor circuit 131 and an inverter 132; the first driving transistor M2 and the second driving transistor M3 are arranged in series between the second power supply terminal VDD and the ground; the control end of the first driving transistor M2 is grounded through the first resistor circuit 131, and is connected to the first driving circuit 1 and the second driving circuit 12; the control end of the second driving transistor M3 is connected to the signal receiving end PWM through the inverter 132.

[0047] As an example, the first drive transistor M2 and the second drive transistor M3 are both MOS field effect transistors and BJT transistors. The first drive transistor M2 and the second drive transistor M3 are both N-type transistors. The drain (collector) of the first drive transistor M2 is connected to the second power supply terminal VDD, the source (emitter) of the first drive transistor M2 is connected to the drain (collector) of the second drive transistor M3, and the source (emitter) of the second drive transistor M3 is grounded. The gate (base) of the first drive transistor M2 is connected to the first drive circuit 1, the second drive circuit 12 and the first resistor circuit 131. The input end of the inverter 132 is connected to the signal receiving end PWM, and the output end of the inverter 132 is connected to the gate (base) of the second drive transistor M3.

[0048] In this embodiment, the first driving transistor M2 and the second driving transistor M3 are arranged in series between the second power supply terminal VDD and the ground; the control terminal of the first driving transistor M2 is grounded through the first resistor circuit 131, and is connected to the first driving circuit 1 and the second driving circuit 12; the control terminal of the second driving transistor M3 is connected to the signal receiving terminal PWM through the inverter 132, so that when the control signal is at a high level, the first driving transistor M2 and the second driving transistor M3 form a source follower, and when the first driving transistor M2 is turned on, the gate voltage of the switch tube M1 in the power switching circuit 2 increases linearly, and the gate-source voltage of the switch tube M1 is maintained unchanged, so that the overcurrent capacity of the switch tube M1 remains unchanged, and then the on-resistance of the switch tube M1 does not change, the heat does not increase, and the stability is improved.

[0049] In one embodiment, the power driving circuit 13 further includes a voltage stabilizing circuit 133 ; a first terminal of the voltage stabilizing circuit 133 is connected to the control terminal of the first driving transistor M2 , and a second terminal of the voltage stabilizing circuit 133 is grounded.

[0050] In this embodiment, a first terminal of the voltage stabilizing circuit 133 is connected to the control terminal of the first driving transistor M2 , and a second terminal of the voltage stabilizing circuit 133 is grounded to ensure voltage stability of the control terminal of the first driving transistor M2 , thereby improving the stability of the driving circuit 1 .

[0051] In one embodiment, the voltage stabilizing circuit 133 includes a voltage stabilizing diode D2 ; a cathode of the voltage stabilizing diode D2 is connected to the control end of the first driving transistor M2 , and a second end of the voltage stabilizing diode D2 is grounded.

[0052] In this embodiment, the cathode of the voltage stabilizing diode D2 is connected to the control end of the first driving transistor M2, and the second end of the voltage stabilizing diode D2 is grounded. The voltage stabilizing diode D2 is used to stabilize the voltage of the control end of the first driving transistor M2, which has a simple structure and reduces costs.

[0053] In one embodiment, the power driving circuit 13 further includes a second resistance circuit 134 ; the second resistance circuit 134 and the voltage stabilizing circuit 133 are connected in series between the control terminal of the first driving transistor M2 and the ground.

[0054] As an example, the second resistance circuit 134 includes a resistor R4. It is understandable that the resistance value of the resistor R4 can be set according to actual experience, and is not limited here.

[0055] In this embodiment, the second resistor circuit 134 and the voltage stabilizing circuit 133 are connected in series between the control terminal of the first driving transistor M2 and the ground to limit the current after the reverse breakdown of the voltage stabilizing diode D2 to ensure the voltage stabilizing effect.

[0056] This embodiment provides a switching power supply circuit, including a transformer 3, a power switching circuit 2 and the above-mentioned drive circuit 1; the first input end of the transformer 3 is used to connect to the power input end VIN, the second input end of the transformer 3 is grounded through the power switching circuit 2, and the output end of the transformer 3 is used to connect to the output load; the power driving circuit 13 is connected to the control end of the power switching circuit 2.

[0057] In one embodiment, the power switch circuit 2 includes a switch tube M1 and a third resistance circuit 21; the first end of the switch tube M1 is connected to the second input end of the transformer 3, the second end of the switch tube M1 is grounded through the third resistance circuit 21, the third end of the switch tube M1 is the control end of the power switch circuit 2, and the connection node between the second end of the switch tube M1 and the third resistance circuit 21 is the signal detection end VCS of the power switch circuit 2.

[0058] As an example, Figure 1For example, the current provided by the current source 111220 is 1uA. After the PWM signal becomes high level, the first transistor M12 is turned on, the drain current of the transistor M10 is 1uA, and the transistor size ratio of the transistor M10 to the transistor M11 is 1:70, that is, the drain current of the transistor M11 is 70uA, that is, the I1 current is 70uA, and the resistance value of the first resistor circuit 131 (resistor R3) is 100KΩ. The I1 current is applied to the resistor R3, that is, the voltage on the resistor R3 is 7V, and the first driver circuit 131 is 100KΩ. The gate voltage of the driving transistor M2 is 7V, and the voltage lost by the source follower formed by the first driving transistor M2 and the second driving transistor M3 is 1V, that is, the gate driving voltage of the switch tube M1 is 6V. When the switch tube M1 is just turned on, the detection voltage VCS on the third resistor circuit 21 (resistor R1) is 0V. As the on-time of the switch tube M1 increases, the detection voltage VCS on the resistor R1 increases linearly. The resistance value of the second resistor R6 in the voltage divider circuit 121 is 1MΩ, that is, the current on the second resistor R6 is the detection voltage VCS / 1MΩ, the drain current of the transistor M8 is the detection voltage VCS / 1MΩ, the transistor size ratio of the transistor M8 to the transistor M9 is 1:1, then the drain current of the transistor M9 is the detection voltage VCS / 1MΩ, the ratio of the transistor M4 to the transistor M5 is 1:1, then the drain current of the transistor M5 is the detection voltage VCS / 1M, the drain current of the transistor M5 is the same as that of the transistor M6, the transistor size ratio of the transistor M6 to the transistor M7 is 1:10, then the transistor The drain current of M7 is the detection voltage VCS / 100K, and the voltage applied to the resistor R3 by the drain current of the body tube M7 is the detection voltage VCS / 100K*100K, that is, the voltage added to the gate of the second driving transistor M3M2 is the detection voltage VCS, and the voltage added to the gate of the switch tube M1 is also the detection voltage VCS. The gate-source voltage of the switch tube M1 is the gate voltage VG-detection voltage VCS=6V+VCS-VCS=6V, thereby keeping the gate drive voltage of the switch tube M1 unchanged at 6V. Figure 2 The figure shows the signal waveform diagram in this embodiment, including the waveform diagram of the PWM signal, the waveform diagram of the detection voltage VCS, the waveform diagram of the drain current of the transistor M9, the waveform diagram of the gate voltage of the first driving transistor M2, the waveform diagram of the gate voltage (GATE) of the switch tube M1 and the waveform diagram of the gate-source voltage (VGS) of the switch tube M1.

[0059] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention, and should be included in the protection scope of the present invention.

Claims

1. A driving circuit, characterized in that: It includes a signal receiving end, a first power supply end, a second power supply end, a first driving circuit, a second driving circuit and a power driving circuit; The first driving circuit is connected to the signal receiving end, the first power supply end and the power driving circuit, and is used to output a first driving signal to the power driving circuit according to a control signal output by the signal receiving end and a first power supply signal output by the first power supply end; The second driving circuit is connected to the signal detection end of the power switch circuit, and is connected to the first power supply end, the second power supply end and the power driving circuit, and is used to output a second driving signal to the power driving circuit according to the control signal, the detection signal output by the signal detection end, the first power supply signal and the second power supply signal output by the second power supply end; The power driving circuit is used to connect the control end of the power switching circuit and is connected to the signal receiving end, and is used to maintain the on-impedance of the power switching circuit unchanged when driving the power switching circuit to turn on according to the control signal, the first driving signal and the second driving signal.

2. The driving circuit according to claim 1, characterized in that: The first driving circuit includes a first transistor, a current source and a first current mirror; The first transistor and the current source are arranged in series between the input terminal of the first current mirror and the ground; The control end of the first transistor is connected to the signal receiving end; The common end of the first current mirror is connected to the first power supply end, and the output end of the first current mirror is connected to the power driving circuit.

3. The driving circuit according to claim 1, wherein: The second driving circuit includes an operational amplifier, a voltage divider circuit, a second transistor, a second current mirror, a third current mirror, a third transistor and a fourth current mirror; The non-inverting input terminal of the operational amplifier is connected to the signal detection terminal of the power switch circuit, the inverting input terminal of the operational amplifier is connected to the voltage divider circuit, and the output terminal of the operational amplifier is connected to the control terminal of the second transistor; The voltage divider circuit and the second transistor are connected in series between the input end of the second current mirror and the ground; the output end of the second current mirror is connected to the input end of the third current mirror, and the common end of the second current mirror is connected to the first power supply end; The common end of the third current mirror is grounded, the output end of the third current mirror is connected to the first end of the third transistor, the second end of the third transistor is connected to the input end of the fourth current mirror, and the control end of the third transistor is connected to the signal receiving end; The common end of the fourth current mirror is connected to the second power supply end, and the output end of the fourth current mirror is connected to the power driving circuit.

4. The driving circuit according to claim 3, characterized in that: The voltage divider circuit includes a first resistor and a second resistor; the first resistor and the second resistor are arranged in series between the second transistor and the ground, and the connection node between the first resistor and the second resistor is connected to the inverting input terminal of the operational amplifier.

5. The driving circuit according to claim 1, characterized in that: The power driving circuit includes a first driving transistor, a second driving transistor, a first resistance circuit and an inverter; The first driving transistor and the second driving transistor are arranged in series between the second power supply terminal and the ground; The control end of the first driving transistor is grounded through the first resistance circuit and is connected to the first driving circuit and the second driving circuit; The control end of the second driving transistor is connected to the signal receiving end through the inverter.

6. The driving circuit according to claim 5, characterized in that: The power driving circuit also includes a voltage stabilizing circuit; A first terminal of the voltage stabilizing circuit is connected to a control terminal of the first driving transistor, and a second terminal of the voltage stabilizing circuit is grounded.

7. The driving circuit according to claim 6, characterized in that: The voltage stabilizing circuit includes a voltage stabilizing diode; a cathode of the voltage stabilizing diode is connected to the control end of the first driving transistor, and a second end of the voltage stabilizing diode is grounded.

8. The driving circuit according to claim 6, characterized in that: The power driving circuit also includes a second resistance circuit; The second resistance circuit and the voltage stabilizing circuit are arranged in series between the control terminal of the first driving transistor and the ground.

9. A switching power supply circuit, characterized in that: comprising a transformer, a power switching circuit and a driving circuit as claimed in any one of claims 1 to 8; The first input end of the transformer is used to connect to the power input end, the second input end of the transformer is grounded through the power switch circuit, and the output end of the transformer is used to connect to the output load; The power driving circuit is connected to the control end of the power switching circuit.

10. The switching power supply circuit according to claim 9, characterized in that: The power switch circuit includes a switch tube and a third resistance circuit; The first end of the switch tube is connected to the second input end of the transformer, the second end of the switch tube is grounded through the third resistance circuit, the third end of the switch tube is the control end of the power switch circuit, and the connection node between the second end of the switch tube and the third resistance circuit is the signal detection end of the power switch circuit.

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