A phase controllable buck-boost dc converter

Abstract

The phase-controllable step-up and step-down DC converter provided by the embodiment of the application comprises an input port, an output port, a voltage control module and a power switch circuit; wherein the power switch module at least comprises the power switch circuit, a flying capacitor and an inductor, at least two power switch tubes in the power switch circuit are periodically turned on and turned off under the control of non-overlapping gate drive signals output by the voltage control module, so that the input voltage is converted into the output voltage output through the charging and discharging of the flying capacitor and the inductor; and the on time of the two power switch tubes under the control of the non-overlapping gate drive signals is controllable, and the ratio of the current value of the inductor to the current value of the output port is a constant. The application realizes high energy efficiency and high density conversion in the full input voltage range, optimizes the irrelevant loss of the voltage conversion ratio, reduces the on loss in the step-up and step-down modes and the inrush current of the flying capacitor in the step-down mode, and improves the conversion efficiency and reliability during charging.

Description

Technical Field

[0001] The present application relates to the technical field of voltage converters, and in particular to a phase-controllable buck-boost DC converter. Background Art

[0002] With the continuous advancement of power electronics technology, buck-boost DC-DC converters are widely used in various electronic devices, such as electronics, communications equipment, industrial control, automotive electronics, and renewable energy. They provide a stable power supply voltage to ensure the normal operation of equipment, and offer advantages such as high efficiency, reliability, and flexibility. For example, some buck-boost DC-DC converters can convert the input voltage of lithium batteries in the range of 2.7V-4.2V to a fixed regulated voltage (such as 3.4V or 5V), or charge lithium batteries from a 5V USB port.

[0003] Currently, there are two common types of buck-boost converters. One is a pure inductive buck-boost converter, which offers advantages such as high efficiency, a wide input range, good load capacity, flexible compatibility, high integration and low cost, multiple protection features, and dimming functions. However, in high-power applications, the inductor will have certain losses during the energy conversion process, which will affect the overall efficiency of the converter. In addition, when the input voltage or load changes suddenly, the converter needs a certain amount of time to adjust the output voltage to a stable state, which will also affect the stability and reliability of the electronic device. The other is a hybrid buck-boost converter, which has significant advantages in efficiency, output voltage range, power density, dynamic response, switching loss, cost-effectiveness, and flexibility. However, because hybrid converters combine multiple circuit structures and control strategies, they increase the difficulty and cost of development and production, and also place high demands on the performance and quality of components. At the same time, in high-power density applications, hybrid converters may face thermal management challenges, requiring effective heat dissipation measures to ensure the reliability and stability of the equipment. Summary of the Invention

[0004] The present application provides a phase-controllable buck-boost DC converter, which can solve the technical problems of existing buck-boost converters, such as high conduction loss, slow transient response, low power density and complex thermal management, making them difficult to apply to high-integration, high-power scenarios.

[0005] In a first aspect, an embodiment of the present application provides a phase-controllable buck-boost DC converter, comprising:

[0006] An input port, used for receiving an input voltage provided by an external power source;

[0007] Output port, used to provide output voltage to the connected load;

[0008] a voltage control module connected to the output port, configured to generate at least two non-overlapping gate drive signals according to the output voltage and a reference voltage;

[0009] A power switch module includes at least a power switch circuit, a flying capacitor, and an inductor; a first input terminal of the power switch circuit is connected to the input port, a second input terminal of the power switch circuit is connected to the output terminal of the voltage control circuit, and an output terminal of the power switch circuit is connected to the output port; the flying capacitor is connected between the power switch circuit and the preset voltage terminal; and the inductor is connected between the power switch circuit and the output port.

[0010] The power switching circuit includes at least two power switching tubes, which are periodically turned on and off under the control of the non-overlapping gate drive signals, so that the input voltage is converted into the output voltage through the charging and discharging of the flying capacitor and the inductor; and the on-time of the two power switching tubes under the control of the non-overlapping gate drive signals is controllable to ensure that the ratio of the current value of the inductor to the current value of the output port is a constant.

[0011] In some embodiments, the power switch circuit includes a first power switch tube, a second power switch tube, a third power switch tube, and a fourth power switch tube; the non-overlapping gate drive signals include a first drive signal, a second drive signal, a third drive signal, and a fourth drive signal;

[0012] The control end of the first power switch tube is used to receive the first drive signal, the first end of the first power switch tube is connected to the input port, and the second end of the first power switch tube is connected to both the first end of the flying capacitor and the first end of the inductor; the control end of the second power switch tube is used to receive the second drive signal, the first end of the second power switch tube is connected to the second end of the flying capacitor, and the second end of the second power switch tube is connected to the second end of the inductor; the control end of the third power switch tube is used to receive the third drive signal, the first end of the third power switch tube is connected to the second end of the flying capacitor, and the second end of the third power switch tube is connected to the preset voltage terminal; the control end of the fourth power switch tube is used to receive the fourth drive signal, the first end of the fourth power switch tube is connected to the input port, and the second end of the fourth power switch tube is connected to the second end of the flying capacitor.

[0013] In some embodiments, the buck-boost DC converter in buck mode includes a startup phase, a first discharge phase, and a first charge phase of cyclic operation;

[0014] During the startup phase, the first drive signal and the second drive signal respectively control the first power switch tube and the second power switch tube to be turned on, and the third drive signal and the fourth drive signal respectively control the third power switch tube and the fourth power switch tube to be turned off;

[0015] In the first discharging stage, the first drive signal, the second drive signal and the third drive signal respectively control the first power switch tube, the second power switch tube and the third power switch tube to be turned off, and the fourth drive signal controls the fourth power switch tube to be turned on;

[0016] In the first charging stage, the first drive signal, the second drive signal and the fourth drive signal respectively control the first power switch tube, the second power switch tube and the fourth power switch tube to be disconnected, and the third drive signal controls the third power switch tube to be turned on.

[0017] In some embodiments, the buck-boost DC converter comprises a second discharging phase and a second charging phase of cyclic operation in the boost mode;

[0018] In the second discharging stage, the first drive signal, the second drive signal and the third drive signal respectively control the first power switch tube, the second power switch tube and the third power switch tube to be turned off, and the fourth drive signal controls the fourth power switch tube to be turned on;

[0019] In the second charging stage, the first drive signal and the third drive signal respectively control the first power switch tube and the third power switch tube to be turned on, and the second drive signal and the fourth drive signal respectively control the second power switch tube and the fourth power switch tube to be turned off.

[0020] In some embodiments, the voltage control module includes a three-type compensation circuit, a sawtooth wave generator, a first comparator, a second comparator, a three-phase generator, and a non-overlapping clock signal generating circuit;

[0021] The input end of the three-type compensation circuit is connected to the output end of the power switch circuit, and is used to perform error amplification and frequency compensation on the output voltage to generate a first voltage signal; the sawtooth wave generator is used to generate a sawtooth wave signal and a clock signal;

[0022] The first comparator is used to obtain the sawtooth wave signal and a preset second voltage signal, and generate a first comparison signal representing a comparison result between the sawtooth wave signal and the second voltage signal;

[0023] The second comparator is used to obtain the first voltage signal and the sawtooth wave signal, and generate a second comparison signal representing a comparison result between the first voltage signal and the sawtooth wave signal;

[0024] The three-phase generator is used to obtain the clock signal, the first comparison signal and the second comparison signal, and generate phase selection signals corresponding to the startup phase, the first discharge phase and the first charging phase;

[0025] The non-overlapping clock signal generating circuit generates corresponding non-overlapping first driving signal, second driving signal, third driving signal and fourth driving signal in response to phase selection signals corresponding to the startup phase, the first discharging phase and the first charging phase.

[0026] In some embodiments, the voltage control module further includes a two-phase generator;

[0027] The two-phase generator is used to obtain the clock signal and the second comparison signal, and generate a phase selection signal corresponding to the second discharging phase and the second charging phase;

[0028] The non-overlapping clock signal generating circuit generates corresponding non-overlapping first, second, third and fourth driving signals in response to phase selection signals corresponding to the second discharging phase and the second charging phase.

[0029] In some embodiments, the voltage control module includes a three-type compensation circuit, a sawtooth wave generator, a first comparator, a second comparator, a two- / three-phase generator, and a non-overlapping clock signal generating circuit;

[0030] The input end of the three-type compensation circuit is connected to the output end of the power switch circuit, and is used to perform error amplification and frequency compensation on the output voltage to generate a first voltage signal; the sawtooth wave generator is used to generate a sawtooth wave signal and a clock signal;

[0031] The first comparator is used to obtain the sawtooth wave signal and a preset second voltage signal, and generate a first comparison signal representing a comparison result between the sawtooth wave signal and the second voltage signal;

[0032] The second comparator is used to obtain the first voltage signal and the sawtooth wave signal, and generate a second comparison signal representing a comparison result between the first voltage signal and the sawtooth wave signal;

[0033] The two-phase / three-phase generator is used to obtain the clock signal, the first comparison signal, and the second comparison signal. When it is determined that the current state is the buck mode, the three-phase generator generates a phase selection signal corresponding to the startup phase, the first discharge phase, and the first charging phase based on the clock signal, the first comparison signal, and the second comparison signal; when it is determined that the current state is the boost mode, the two-phase generator generates a phase selection signal corresponding to the second discharge phase and the second charging phase based on the clock signal and the second comparison signal;

[0034] The non-overlapping clock signal generating circuit is used to generate non-overlapping first driving signal, second driving signal, third driving signal and fourth driving signal according to phase selection signals corresponding to different phases.

[0035] In some embodiments, the phase-controllable buck-boost DC converter further includes a load jump detection module;

[0036] The input end of the load jump detection module is connected to the output end of the three-type compensation circuit, and the output end of the load jump detection module is connected to the reset input end of the three-phase generator; the load jump detection module is used to determine whether the current load current has changed based on the obtained compensated output voltage in the buck mode; when it is determined that the current load current has changed from light load to heavy load, output a transient signal;

[0037] The three-phase generator generates, in response to the transient signal, phase selection signals corresponding to the startup phase, the first discharge phase, and the first charge phase according to the clock signal and a first comparison signal starting from the next cycle of the clock signal;

[0038] The non-overlapping clock signal generating circuit generates corresponding first, second, third and fourth driving signals in response to the phase selection signals corresponding to the startup phase, the first discharging phase and the first charging phase.

[0039] In some embodiments, the load jump detection module includes a follower circuit and a third comparator; the input end of the follower circuit is connected to the input end of the load jump detection module; the non-inverting input end of the third comparator is connected to the input end of the follower circuit, the inverting input end of the third comparator is connected to the output end of the load jump detection module, and the output end of the third comparator is connected to the output end of the load jump detection module;

[0040] The three-phase generator includes an RS latch, a first D flip-flop, a second D flip-flop, a first selector, and a second selector; the set end of the RS latch is used to obtain the clock signal, the reset end of the RS latch is connected to the output end of the first comparator, and the output end of the RS latch is connected to the first output end of the three-phase generator; the data input end of the first D flip-flop is set to a first level, the clock input end of the first D flip-flop is connected to the output end of the RS latch, and the output end of the first D flip-flop is connected to the second output end of the three-phase generator; the data input end of the second D flip-flop is set to a first level, the clock input end of the second D flip-flop is connected to the output end of the first D flip-flop, and the reset end of the second D flip-flop is used to obtain the clock signal;

[0041] The first input terminal of the first selector is connected to the output terminal of the second comparator, the second input terminal of the first selector is used to obtain the clock signal, the reset terminal of the first selector is connected to the output terminal of the load jump detection module, and the output terminal of the first selector is connected to the reset terminal of the first D-type flip-flop; the first input terminal of the second selector is connected to the output terminal of the second D-type flip-flop, the second input terminal of the second selector is set to a second level, the reset terminal of the second selector is connected to the output terminal of the load jump detection module, and the output terminal of the second selector is connected to the third output terminal of the three-phase generator.

[0042] In some embodiments, the power switch circuit further comprises a first dynamic body terminal selector and a second dynamic body terminal selector;

[0043] The first power switch tube is an N-type power switch tube; the first dynamic body terminal selector is connected between the first terminal and the second terminal of the first power switch tube, and is used to connect the end with a lower potential between the first terminal and the second terminal of the first power switch tube to its substrate terminal when the first power switch tube is disconnected;

[0044] The second power switch tube is a P-type power switch tube; the second dynamic body terminal selector is connected between the first end and the second end of the second power switch tube, and is used to connect the end with lower potential between the first end and the second end of the second power switch tube to its substrate end when the second power switch tube is disconnected.

[0045] A phase-controllable buck-boost DC converter provided in an embodiment of the present application includes an input port, an output port, a voltage control module, and a power switching circuit; wherein the power switching module includes at least a power switching circuit, a flying capacitor, and an inductor. At least two power switching tubes in the power switching circuit are periodically turned on and off under the control of non-overlapping gate drive signals output by the voltage control module, so that the input voltage is converted into an output voltage output through the charging and discharging of the flying capacitor and the inductor; and the on-time of the two power switching tubes under the control of the non-overlapping gate drive signals is controllable to meet the requirement that the ratio of the current value of the inductor to the current value of the output port is a constant. This application achieves high-efficiency and high-density conversion within the full input voltage range, optimizes the irrelevant losses of the voltage conversion ratio, reduces the conduction losses in the boost and buck modes and the inrush current of the flying capacitor in the buck mode; it can eliminate the right half-plane zero in both the buck and boost modes, and utilizes the special structure of the topology itself to make the inductor current continue to rise at the maximum slope when the load current changes from light to heavy, so as to slow down the drop of the output voltage, enhance the transient recovery characteristics, and improve the conversion efficiency and reliability of mobile devices during charging. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0047] Figure 1 A schematic structural diagram of a phase-controllable buck-boost DC converter provided in one embodiment of the present application.

[0048] Figure 2 This is a circuit diagram of a power switch circuit provided in one embodiment of this embodiment.

[0049] Figure 3 A diagram of the switch states at different stages in buck mode provided by an embodiment of the present application.

[0050] Figure 4 A diagram of switch states at different stages in boost mode provided by an embodiment of the present application.

[0051] Figure 5 A schematic structural diagram of a power switching circuit provided in another embodiment of the present application.

[0052] Figure 6 A schematic diagram of the dynamic body-end selector structure provided in one embodiment of the present application.

[0053] Figure 7 A schematic diagram of the structure of a voltage control module provided in one embodiment of the present application.

[0054] Figure 8 A schematic structural diagram of a voltage control module provided in another embodiment of the present application.

[0055] Figure 9 A circuit diagram of a three-phase generator provided in one embodiment of the present application.

[0056] Figure 10 A schematic structural diagram of a phase-controllable buck-boost DC converter provided in another embodiment of the present application.

[0057] Figure 11 A circuit diagram of a load jump detection module provided in one embodiment of the present application.

[0058] Figure 12 A circuit diagram of a phase-controllable buck-boost DC converter provided in accordance with an embodiment of the present application.

[0059] Figure 13 This is a steady-state operating waveform diagram in buck mode provided by an embodiment of the present application.

[0060] Figure 14 This is a working waveform diagram of the load current switching from light to heavy in the buck mode provided by an embodiment of the present application.

[0061] Figure 15 This is a steady-state operating waveform diagram in boost mode provided by an embodiment of the present application.

[0062] The above drawings illustrate specific embodiments of the present application, which will be described in more detail below. These drawings and the textual description are not intended to limit the scope of the present application in any way, but rather to illustrate the concepts of the present application to those skilled in the art by reference to specific embodiments. DETAILED DESCRIPTION

[0063] The present application is further described in detail below by means of specific embodiments in conjunction with the accompanying drawings. Similar elements in different embodiments are numbered with associated similar elements. In the following embodiments, many detailed descriptions are provided to enable the present application to be better understood. However, those skilled in the art will readily appreciate that some of the features may be omitted in different circumstances, or may be replaced by other elements, materials, or methods. In some cases, some operations related to the present application are not shown or described in the specification. This is to avoid the core portion of the present application being overwhelmed by excessive descriptions. For those skilled in the art, it is not necessary to describe these related operations in detail. They can fully understand the related operations based on the description in the specification and the general technical knowledge in the art.

[0064] In addition, the features, operations, or characteristics described in the specification may be combined in any appropriate manner to form various embodiments. Furthermore, the steps or actions in the method description may be reordered or adjusted in a manner readily apparent to those skilled in the art. Therefore, the various sequences in the specification and drawings are provided solely for the purpose of clearly describing a particular embodiment and are not intended to be mandatory, unless otherwise specified.

[0065] The terms "first", "second", etc. in the specification and claims of this application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are generally a class, and the number of objects is not limited. For example, the first object can be one or more. In addition, "and / or" in the specification and claims represents at least one of the connected objects, and the character " / " generally indicates that the objects associated before and after are in an "or" relationship. The "connection" and "connection" mentioned in this application, unless otherwise specified, include direct and indirect connections (connections).

[0066] The following specific embodiments describe in detail the technical solution of the present application and how the technical solution of the present application solves the above-mentioned technical problems. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. The embodiments of the present application will be described below in conjunction with the accompanying drawings.

[0067] Figure 1 This is a schematic diagram of the structure of a phase-controllable buck-boost DC converter provided by an embodiment of the present application. Figure 1 As shown, the phase-controllable buck-boost DC converter provided in this embodiment at least includes an input port 110 , an output port 120 , a voltage control module 130 and a power switch module 140 .

[0068] In this embodiment, the input port 110 circuit is used to receive the input voltage provided by the external power supply as the energy source for the entire circuit, and to perform preliminary processing on it to ensure that the input voltage is stable and provide the required electrical energy for the subsequent circuit. The output port 120 is used to provide the converted output voltage to the connected load voltage, ensuring that it operates within the rated voltage range, and maintains the stability and low ripple of the output voltage through a feedback mechanism, so as to operate normally. The voltage control module 130 is connected to the output port 120 and is used to generate at least two non-overlapping gate drive signals based on the output voltage and the reference voltage, which are used to control the switching state of the power switch module 140, thereby regulating the output voltage. Non-overlapping means that the two signals will not be in a high or low state at the same time, which helps prevent the switches in the power switch module 140 from being turned on at the same time, causing a short circuit.

[0069] The power switch module 140 is used to perform switching operations according to the gate drive signal generated by the voltage control module 130, thereby controlling the transfer of energy. The power switch module 140 at least includes a power switch circuit, a flying capacitor C F and inductor L, the first input terminal of the power switch circuit is connected to the input port 110, the second input terminal of the power switch circuit is connected to the output terminal of the voltage control circuit, and the output terminal of the power switch circuit is connected to the output port 120; the flying capacitor C F It is connected between the power switching circuit and the preset voltage terminal, and balances the voltage stress during the switching process through charge transfer, smoothes voltage fluctuations, reduces electromagnetic interference, and helps achieve soft switching and reduces switching losses. The inductor L is connected between the power switching circuit and the output port 120, and plays the role of energy storage and filtering, which helps to stabilize the output voltage and reduce ripple.

[0070] In this embodiment, the power switch circuit includes at least two power switch tubes, which are periodically turned on and off under the control of non-overlapping gate drive signals to achieve the purpose of FThe charge and discharge of the inductor L converts the input voltage into the output voltage. Moreover, the conduction time of the two power switches under the control of non-overlapping gate drive signals is controllable, satisfying that the ratio of the current value of the inductor to the current value of the output port is a constant and does not change with the change of the voltage conversion ratio. Specifically, when the gate drive signal controls the power switch to turn on or off, the input electrical energy is converted into the required output electrical energy. F Working in conjunction with the inductor L, it optimizes the voltage and current waveforms during switching, minimizing losses and interference. At the same time, by precisely controlling the timing and amplitude of the gate drive signal, efficient and stable power conversion can be achieved.

[0071] Figure 2 This is a circuit diagram of a power switch circuit provided in one embodiment of this embodiment. Figure 2 As shown, the power switching circuit provided in this embodiment includes a first power switch tube S1, a second power switch tube S2, a third power switch tube S3 and a fourth power switch tube S4; the non-overlapping gate drive signals include a first drive signal, a second drive signal, a third drive signal and a fourth drive signal, which correspond to the first power switch tube S1, the second power switch tube S2, the third power switch tube S3 and the fourth power switch tube S4 respectively.

[0072] Specifically, the control terminal of the first power switch tube S1 is used to receive the first driving signal, the first terminal of the first power switch tube S1 is connected to the input port 110, and the second terminal of the first power switch tube S1 is connected to the flying capacitor C F The first end of the second power switch tube S2 is connected to the first end of the inductor L; the control end of the second power switch tube S2 is used to receive the second drive signal, and the first end of the second power switch tube S2 is connected to the flying capacitor C F The second end of the second power switch tube S2 is connected to the second end of the inductor L; the control end of the third power switch tube S3 is used to receive the third drive signal, and the first end of the third power switch tube S3 is connected to the flying capacitor C F The second end of the third power switch tube S3 is connected to the preset voltage end; the control end of the fourth power switch tube S4 is used to receive the fourth driving signal, the first end of the fourth power switch tube S4 is connected to the input port 110, and the second end of the fourth power switch tube S4 is connected to the flying capacitor C F The second end of the

[0073] As is known to all, a buck-boost DC converter is a power electronic converter that can increase or decrease the input DC voltage. It achieves the increase or decrease of the input voltage by controlling the on-time and off-time ratio (i.e., duty cycle) of the switching device through the periodic switching action of the switching device.

[0074] The buck-boost DC converter has two operating modes: boost and buck:

[0075] Boost Mode: When the input voltage is lower than the target output voltage, the converter enters boost mode. During this mode, the power switch circuit draws energy from the input power source and stores it in inductor L. When the power switch circuit is turned off, the high self-inductance of inductor L transfers energy to the output capacitor, increasing the output voltage. Typically, the relationship between the output voltage and the input voltage is: Vout = Vin*(1+D) / (1-D) (where D is the duty cycle, and D > 0.5).

[0076] Buck Mode: When the input voltage is higher than the target output voltage, the converter enters buck mode. At this point, the switching action of the power switch circuit causes the input voltage to be linked to the output inductor L. Through the periodic switching operation of the power switch circuit, energy passes through the output inductor L and the filter capacitor to reduce the voltage and transfer it to the output load. Typically, the relationship between the output voltage and the input voltage is: Vout = D*Vin (where D is the duty cycle, and D < 1). It should be noted that in buck mode, although the duty cycle can theoretically be any value between 0 and 1, in practice, the maximum duty cycle is usually limited to prevent overheating and damage to the switching components.

[0077] Based on Figure 1 and Figure 2 The structures of the phase-controllable buck-boost DC converter and the power switch circuit are shown. The phase-controllable buck-boost DC converter provided in the above embodiment has a buck mode and a boost mode.

[0078] Figure 3 A diagram of the switch states at different stages in the buck mode provided by an embodiment of the present application. In the buck mode, the cycle operation includes a start-up stage, a first discharge stage, and a first charge stage.

[0079] like Figure 3 As shown, during the startup phase, the first drive signal and the second drive signal respectively control the first power switch S1 and the second power switch S2 to turn on, while the third drive signal and the fourth drive signal respectively control the third power switch S3 and the fourth power switch S4 to turn off. During the first discharge phase, the first drive signal, the second drive signal, and the third drive signal respectively control the first power switch S1, the second power switch S2, and the third power switch S3 to turn off, while the fourth drive signal controls the fourth power switch S4 to turn on. During the first charging phase, the first drive signal, the second drive signal, and the fourth drive signal respectively control the first power switch S1, the second power switch S2, and the fourth power switch S4 to turn off, while the third drive signal controls the third power switch S3 to turn on.

[0080] Figure 4A diagram of the switch states in different stages of the boost mode provided by an embodiment of the present application. In the boost mode, the buck-boost DC converter includes a second discharge stage and a second charge stage of cyclic operation.

[0081] like Figure 4 As shown, in the second discharge stage, the first drive signal, the second drive signal and the third drive signal respectively control the first power switch tube S1, the second power switch tube S2 and the third power switch tube S3 to be disconnected, and the fourth drive signal controls the fourth power switch tube S4 to be turned on.

[0082] In the second charging stage, the first drive signal and the third drive signal respectively control the first power switch tube S1 and the third power switch tube S3 to be turned on, and the second drive signal and the fourth drive signal respectively control the second power switch tube S2 and the fourth power switch tube S4 to be turned off.

[0083] Figure 5 This is a schematic diagram of the structure of a power switch circuit provided by another embodiment of the present application. Figure 5 As shown, the power switch circuit provided in this embodiment further includes a first dynamic body terminal selector ADBS1 and a second dynamic body terminal selector ADBS2 on the basis of the above embodiment.

[0084] In some embodiments, the first power switch S1 is an N-type power switch, and the second power switch S2 is a P-type power switch. A first dynamic body-terminal selector ADBS1 is connected between the first and second ends of the first power switch S1 and is configured to connect the lower potential end of the first and second ends of the first power switch S1 to its substrate terminal when the first power switch S1 is disconnected. A second dynamic body-terminal selector ADBS2 is connected between the first and second ends of the second power switch S2 and is configured to connect the higher potential end of the first and second ends of the second power switch S2 to its substrate terminal when the second power switch S2 is disconnected.

[0085] That is, when the first power switch S1 is disconnected (i.e., in a non-conducting state), the selector detects the potentials of the first and second terminals and connects the terminal with the lower potential to the substrate terminal of the power switch. Similarly, when the second power switch S2 is disconnected, the selector also detects the potentials of the first and second terminals and connects the terminal with the higher potential to the substrate terminal. Specifically, the first dynamic bulk selector ADBS1 and the second dynamic bulk selector ADBS2 ensure that when the first and second power switches S1 and S2 are turned off, the substrate terminals of the power switches remain connected to the terminals with the lower potential / lower potential. This ensures that the PN junction diodes in the power switches are non-conductive. This prevents leakage in the PN junction diodes, reduces charge accumulation and potential fluctuations during the switching process, and thus improves the stability of the switches. For NMOS power switches, when turned off, the terminal with the lower voltage acts as the source, and the terminal with the higher voltage acts as the drain. In this case, the dynamic bulk selector connects the source and substrate of the power switches.

[0086] Figure 6 This is a schematic diagram of the dynamic body terminal selector structure provided by an embodiment of the present application. Figure 6 As shown, the dynamic body end selector provided in this embodiment includes a switch tube S a1 and switch tube S a2 , switch tube S a1 The first end of the power switch tube is connected to the first end of the power switch tube. a1 The second end of the power switch is connected to the substrate end of the power switch tube. a2 The first end is connected to the substrate end of the connected power switch tube, and the switch tube S a2 The second end of the power switch tube is connected to the second end of the power switch tube. a1 and switch tube S a2 The control terminal is used to receive the external drive control signal V sa . Drive control signal V sa When it is determined that the voltage at the first terminal of the connected power switch tube is lower than the voltage at the second terminal, the switch tube S a1 The first terminal of the connected power switch tube is connected to its substrate terminal. Conversely, when it is determined that the voltage of the first terminal of the connected power switch tube is higher than the voltage of the second terminal, the switch tube S is controlled. a2 is turned on, so that the second end of the connected power switch tube is connected to its substrate end.

[0087] In this embodiment, taking the first power switch S1 and the second power switch S2 as an example, the first dynamic body terminal selector ADBS1 is connected between the first terminal and the second terminal of the first power switch S1, and the second dynamic body terminal selector ADBS2 is connected between the first terminal and the second terminal of the second power switch S2. When the buck-boost DC-DC converter operates in buck mode, the source and drain of the first power switch S1 and the second power switch S2 are switched during the first discharging phase and the first charging phase.

[0088] In the first discharge phase, the voltage V at the first node connecting the first power switch tube S1 and the inductor L is SW1 Higher than the input voltage V1 at the other end of the first power switch tube S1, at this time, the connection end of the first power switch tube S1 and the inductor L is the drain of the first power switch tube S1, and similarly, the connection end of the second power switch tube S2 and the flying capacitor C F The voltage V at the second node of the connection terminal SW2 Higher than the output voltage V2 of the other end of the second power switch tube S2, at this time the second power switch tube S2 and the flying capacitor C F The connection end is the drain of the second power switch tube S2.

[0089] In the first charging stage, the voltage V SW1 and the voltage at the second node V SW2 As the input voltage V1 and the output voltage V2 change, in contrast to the first discharge stage, the connection end of the first power switch tube S1 and the inductor L is the source of the first power switch tube S1, and the second power switch tube S2 and the flying capacitor C F The connection end of is the source of the second power switch tube S2.

[0090] Under the control of an external driving signal, the dynamic body terminal selector can ensure that the substrate terminal of the power switch tube is always connected to one of the first terminal and the second terminal, so as to ensure that the PN junction diode in the power switch tube is not turned on.

[0091] The phase-controllable buck-boost DC converter provided in this embodiment controls the conduction time of the first power switch tube S1 and the second power switch tube S2 in the buck mode, i.e., the flying capacitor C F The charging time can make the ratio of the inductor current DC value to the output current DC value a constant, which does not change with the change of VCR, and satisfies the flying capacitor C F Under the condition of volt-ampere balance, the flying capacitance C is avoided. FThis generates a large inrush current. Simultaneously, as the magnetization time of inductor L increases, the amount of charge transferred from the power stage to the output increases, eliminating the right-half-plane zero and enhancing the circuit's transient response. In boost mode, inductor L is directly connected to output port 120, and the inductor current's DC value equals the output current's DC value. This eliminates the right-half-plane zero and enhances the circuit's transient response. Furthermore, the inductor-capacitor filtering network reduces output voltage ripple.

[0092] In order to achieve the effects of different stages in the above-mentioned different modes, it is necessary to control the timing of the first driving signal, the second driving signal, the third driving signal and the fourth driving signal.

[0093] Figure 7 This is a schematic diagram of the structure of a voltage control module provided by an embodiment of the present application. Figure 7 As shown, the voltage control module 130 provided in this embodiment includes a three-type compensation circuit, a sawtooth wave generator, a first comparator CMP1, a second comparator CMP2, a three-phase generator, a two-phase generator and a non-overlapping clock signal generating circuit.

[0094] Specifically, the input end of the three-type compensation circuit is connected to the output end of the power switch circuit, and is used to perform error amplification and frequency compensation on the output voltage to generate a first voltage signal V EA ; The sawtooth wave generator is used to generate a sawtooth wave signal V RAMP and clock signal CLK; the first comparator CMP1 is used to obtain the sawtooth wave signal V RAMP and the preset second voltage signal V M , generating a sawtooth wave signal V RAMP and the second voltage signal V M The first comparison signal V of the comparison result CMP -V M The second comparator CMP2 is used to obtain the sawtooth wave signal V RAMP and the first voltage signal V EA , generating a sawtooth wave signal V RAMP and the first voltage signal V EA The second comparison signal V of the comparison result CMP-EA The three-phase generator is used to obtain the clock signal CLK, the first comparison signal V CMP -V M and the second comparison signal V CMP-EA , generates phase selection signals corresponding to the startup phase, the first discharge phase and the first charge phase; the two-phase generator is used to obtain the clock signal CLK and the second comparison signal V CMP -V M, generating a phase selection signal corresponding to the second discharging phase and the second charging phase; the non-overlapping clock signal generating circuit generates corresponding and non-overlapping first driving signal, second driving signal, third driving signal and fourth driving signal in response to the phase selection signals corresponding to different phases.

[0095] In some embodiments, the second voltage signal V M The value is the sawtooth wave signal V RAMP The average value, V M The setting is to make the state duration T S / 2, that is, D1=0.5. And the second voltage signal V M The value is less than the first voltage signal V after compensation by the three-type compensation circuit EA The value of the sawtooth wave signal V RAMP First, with the second voltage signal V M intersect.

[0096] Figure 8 This is a schematic diagram of the structure of a voltage control module provided in another embodiment of the present application. Figure 8 As shown, the voltage control module 130 provided in this embodiment includes a three-type compensation circuit, a sawtooth wave generator, a first comparator CMP1 , a second comparator CMP2 , a two-phase / three-phase generator and a non-overlapping clock signal generating circuit.

[0097] The input end of the three-type compensation circuit is connected to the output end of the power switch circuit, and is used to perform error amplification and frequency compensation on the output voltage to generate a first voltage signal V EA ; The sawtooth wave generator is used to generate a sawtooth wave signal V RAMP and clock signal CLK; the first comparator CMP1 is used to obtain the sawtooth wave signal V RAMP and the preset second voltage signal V M , generating a sawtooth wave signal V RAMP and the second voltage signal V M The first comparison signal V of the comparison result CMP -V M The second comparator CMP2 is used to obtain the sawtooth wave signal V RAMP and the first voltage signal V EA , generating a sawtooth wave signal V RAMP and the first voltage signal V EA The second comparison signal V of the comparison result CMP-EA ;

[0098] Different from the above embodiment, the three-phase generator and the two-phase generator of this embodiment are integrated into one chip or circuit, which has the functions of the above three-phase generator and the two-phase generator. Specifically, the two-phase / three-phase generator is used to obtain the clock signal CLK, the first comparison signal V CMP -V M and the second comparison signal V CMP-EA When the current state is determined to be the buck mode, the three-phase generator is based on the clock signal CLK, the first comparison signal V CMP -V M and the second comparison signal V CMP-EA Generates phase selection signals corresponding to the startup phase, the first discharge phase, and the first charge phase; when it is determined that the current state is the boost mode, the two-phase generator generates a phase selection signal corresponding to the startup phase, the first discharge phase, and the first charge phase according to the clock signal CLK and the second comparison signal V CMP-EA , generating a phase selection signal corresponding to the second discharging phase and the second charging phase.

[0099] Finally, the non-overlapping clock signal CLK generating circuit generates non-overlapping first driving signal, second driving signal, third driving signal and fourth driving signal according to the phase selection signals corresponding to different phases.

[0100] Figure 9 This is a circuit diagram of a three-phase generator provided by an embodiment of the present application. Figure 9 As shown, the three-phase generator provided by this embodiment includes an RS latch, a first D flip-flop D1, a second D flip-flop D2, a first selector SEL1 and a second selector SEL2.

[0101] Specifically, the set terminal (S terminal) of the RS latch is used to obtain the clock signal CLK, the reset terminal (R terminal) of the RS latch is connected to the output terminal of the first comparator CMP1, and the output terminal of the RS latch serves as the first output terminal of the three-phase generator; the data input terminal of the first D flip-flop D1 is set to the first level, the clock input terminal of the first D flip-flop D1 is connected to the output terminal of the RS latch, and the output terminal of the first D flip-flop D1 serves as the second output terminal of the three-phase generator; the data input terminal of the second D flip-flop D2 is set to the first level, the clock input terminal of the second D flip-flop D2 is connected to the output terminal of the first D flip-flop D1, and the reset terminal of the second D flip-flop D2 is used to obtain the clock signal CLK;

[0102] A first input terminal of the first selector SEL1 is connected to the output terminal of the second comparator CMP2, a second input terminal of the first selector SEL1 is used to obtain the clock signal CLK, a reset terminal of the first selector SEL1 is connected to the output terminal of the load jump detection module 150, and the output terminal of the first selector SEL1 is connected to the reset terminal of the first D-type flip-flop D1; a first input terminal of the second selector SEL2 is connected to the output terminal of the second D-type flip-flop D2, a second input terminal of the second selector SEL2 is set to a second level, a reset terminal of the second selector SEL2 is connected to the output terminal of the load jump detection module 150, and the output terminal of the second selector SEL2 serves as the third output terminal of the three-phase generator.

[0103] In any of the above embodiments, an RS latch can be used to realize the purpose of signal selection of the two-phase signal generator. Specifically, the clock signal CLK is connected to the set terminal of the RS latch, and the output of the second comparator CMP2 represents the sawtooth wave signal V RAMP and the first voltage signal V EA The second comparison signal V of the comparison result CMP-EA Connect to the reset terminal of the RS latch to obtain the final selection result.

[0104] Figure 10 This is a structural diagram of a phase-controllable buck-boost DC converter provided by another embodiment of the present application. Figure 10 As shown, the phase-controllable buck-boost DC converter provided in this embodiment includes at least an input port 110 , an output port 120 , a voltage control module 130 , a power switch module 140 and a load jump detection module 150 .

[0105] In this embodiment, the input end of the load jump detection module 150 is connected to the output end of the three-type compensation circuit, and the output end of the load jump detection module 150 is connected to the reset input end of the three-phase generator; the load jump detection module 150 is used to determine whether the current load current has changed based on the obtained compensated output voltage in the buck mode; when it is determined that the current load current has changed from light load to heavy load, it outputs a transient signal.

[0106] The three-phase generator responds to the transient signal and starts from the next cycle of the clock signal CLK according to the clock signal CLK and the first comparison signal V CMP -V M , generating phase selection signals corresponding to the startup phase, the first discharge phase, and the first charge phase. The non-overlapping clock signal generating circuit generates corresponding first drive signals, second drive signals, third drive signals, and fourth drive signals in response to the phase selection signals corresponding to the startup phase, the first discharge phase, and the first charge phase.

[0107] Figure 11This is a circuit diagram of a load jump detection module provided by an embodiment of the present application. Figure 11 As shown, the load jump detection module 150 provided in this embodiment includes a follower circuit, a filter circuit and a third comparator CMP3.

[0108] In this embodiment, the input of the follower circuit is connected to the input of the load jump detection module 150; the non-inverting input of the third comparator CMP3 is connected to the input of the follower circuit, the inverting input of the third comparator CMP3 is connected to the output of the load jump detection module 150, and the output of the third comparator CMP3 is connected to the output of the load jump detection module 150. The input of the filter circuit is provided between the follower circuit and the preset voltage terminal.

[0109] In some embodiments, the follower circuit includes a first error amplifier U1 and a second error amplifier U2 , and the filter circuit includes a first capacitor C1 and a first resistor R1 .

[0110] Specifically, the non-inverting input of the first error amplifier U1 is used to obtain the output voltage after compensation by the three-type compensation circuit, and the inverting input of the first error amplifier U1 is short-circuited with its output. The non-inverting input of the second error amplifier U2 is connected to the output of the first error amplifier U1, and the inverting input of the second error amplifier U2 is short-circuited via a voltage source. A first capacitor C1 and a first resistor R1 are connected in parallel, with a first end of the first capacitor C1 connected to the output of the first error amplifier U1, and a second end of the first capacitor C1 connected to a preset voltage terminal, i.e., ground. The non-inverting input of the third comparator CMP3 is used to obtain the output voltage after compensation by the three-type compensation circuit, the inverting input of the third comparator CMP3 is connected to the output of the second error amplifier U2, and the output of the third comparator CMP3 is connected to the set terminal of the three-phase generator.

[0111] Figure 12 This is a circuit diagram of a phase-controllable buck-boost DC converter provided by an embodiment of the present application. Figure 12 As shown, the phase-controllable buck-boost DC converter provided in this embodiment includes the structure of any of the above embodiments. To avoid repetition, the connection relationship between each module and each component will not be described here.

[0112] Combine Figure 12 The circuit shown in FIG. 1 illustrates in detail the working process of the phase-controllable buck-boost DC converter.

[0113] Figure 13 This is a steady-state operating waveform diagram in buck mode provided by an embodiment of the present application. In buck mode, the steady-state operation of the buck-boost DC converter includes a startup phase, a first discharge phase, and a first charge phase of cyclic operation.

[0114] At the beginning of each cycle, the sawtooth wave generator generates a sawtooth wave signal V RAMP Starting from the lowest point, the first comparison signal V output by the first comparator CMP1 and the second comparator CMP2 is CMP-VM and the second comparison signal V CMP-EA The clock signal CLK output by the sawtooth wave generator is input to the three-phase generator (such as Figure 9 The RS latch outputs signal Q1 at a high level (set terminal) and signal Q2 and signal Q3' at a low level (as shown). During steady-state operation, the third comparator CMP3 in the load transition detection module 150 outputs a low transient signal Trans, and the second selector SEL2 outputs Q3 = Q3'. The Q1, Q2, and Q3 signals are input to the non-overlapping clock signal generation circuit and converted into first drive signals V corresponding to the first power switch S1, the second power switch S2, the third power switch S3, and the fourth power switch S4. S1 , the second driving signal V S2 , the third driving signal V S3 and the fourth driving signal V S4 .

[0115] In the startup phase, the gate drive signal passes through the driver to turn on the first power switch tube S1 and the second power switch tube S2, and turn off the third power switch tube S3 and the fourth power switch tube S4, so that the input voltage V IN The flying capacitor C is supplied by the first power switch tube S1 and the second power switch tube S2. F Charging, flying capacitor C F In parallel with the inductor L, the flying capacitor C F The voltage on the CF =V IN -V OUT , and at the same time, V is formed on the inductor L IN -V OUT The voltage difference causes the current I on the inductor L to L (V IN -V OUT ) / L increases (e.g. Figure 13 Input voltage V IN Through the inductor L and the flying capacitor C F The branches are connected to the load terminal I LOAD Provides current. When the sawtooth wave signal V RAMP rises to the second voltage V M When the two intersect, the first comparator CMP1 outputs a signal V CMP -V MWhen the RS latch R in the three-phase generator is high, Q1 outputs a low level. When the first D flip-flop D1 receives an edge trigger signal, Q2 outputs a high level and Q3 remains low. After the Q1, Q2 and Q3 signals enter the non-overlapping clock signal generation circuit, the corresponding first drive signal V S1 , the second driving signal V S2 , the third driving signal V S3 and the fourth driving signal V S4 , the buck-boost DC converter enters the first discharge stage.

[0116] In the first discharge phase, the fourth power switch tube S4 is turned on, and the other power switch tubes are in the off state. A voltage of 2 (V IN -V OUT ) voltage difference, so that the inductor current I L With 2(V IN -V OUT) / L increases with a slope. Flying capacitor C F It is connected in series with the inductor L and discharges to the output port 120. Output voltage V OUT The voltage is collected and enters the voltage control module 130, and compared with the reference voltage V REF After error amplification and frequency compensation by the three-type compensation circuit, the error amplifier outputs the first voltage signal V EA When the circuit operates in steady state, the transient signal Trans is at a low level, and the first comparator CMP1 outputs the first comparison signal V CMP-EA , V CMP-EA It is the reset signal of the first D flip-flop D1. RAMP rises to the first voltage signal V EA When the two intersect, the second comparator CMP2 outputs a second comparison signal V CMP-EA When the first D flip-flop D1 in the three-phase generator is high, Q2 outputs a low level. The second D flip-flop D2 receives the edge trigger signal, causing Q3 to output a high level. Q1 maintains a low level before the next clock signal CLK arrives. After the Q1, Q2 and Q3 signals enter the non-overlapping clock signal generation circuit, the corresponding first drive signal V is output. S1 , the second driving signal V S2 , the third driving signal V S3 and the fourth driving signal V S4 , the buck-boost DC converter enters the first charging stage.

[0117] In the first charging stage, the third power switch tube S3 is turned on, and the other power switches are in the off state, and a -V is formed on the inductor L. OUT The voltage difference makes the inductor current I L With -VOUT The slope of / L decreases. Flying capacitor C F When a cycle is over, the clock signal CLK is input into the three-phase generator, and the sawtooth wave signal V RAMP It immediately drops to the minimum voltage and starts to rise again, and the buck-boost DC converter re-enters the startup phase.

[0118] It should be noted that, in the working state in which the load jump detection module 150 participates, the load jump detection module 150 is mainly used to determine whether the current load current has changed according to the obtained compensated output voltage in the buck mode; when it is determined that the current load current has changed from light load to heavy load, it outputs a transient signal. In response to the transient signal, the three-phase generator starts from the next cycle of the clock signal CLK and generates a transient signal according to the clock signal CLK and the first comparison signal V CMP -V M , generating phase selection signals corresponding to the first discharge phase and the first charge phase. The non-overlapping clock signal generation circuit generates corresponding first, second, third, and fourth drive signals in response to the phase selection signals corresponding to the first discharge phase and the first charge phase. In other words, the participation of the load jump detection module 150 can eliminate the need to re-enter the startup phase, extend the second charge phase, and simply cycle between the first discharge phase and the second charge phase.

[0119] Figure 14 This is a working waveform diagram of the load current switching from light to heavy in the buck mode provided by an embodiment of the present application.

[0120] When the converter works in buck mode, the load current suddenly increases. At this time, the current provided by the converter is not enough to support the load current. The output capacitor C OUT A large amount of charge will be discharged, causing V OUT To reduce V OUT When the load jump detection module 150 detects that a load light-heavy transient occurs, the transient signal Trans jumps from zero level to high level and is input to the three-phase generator, so that the selection signals of the first selector SEL1 and the second SEL2 are set to high level, and the clock signal CLK replaces V CMP-EA As the set signal of the first D flip-flop D1, Q3 outputs zero level. That is, when the startup phase lasts for 1 / 2T S After the normal end, the converter enters the first discharge stage, but because the signal Q3' is shielded, the converter will continue the first discharge stage working mode, the inductor current I LWhen the next cycle starts, the clock signal CLK is simultaneously input into the SR latch and the first D flip-flop D1, Q1 is set to 1, Q2 is set to 0, the first charging phase ends, and the first discharging phase begins. During the transient process of the load switching from light to heavy, the converter repeats the working state of the first discharging phase and the first discharging phase (as shown in the figure). Figure 14 As shown), until the Trans signal is set to 0 and the steady-state operation is resumed. When a transient event occurs, the inductor L continues to magnetize, and the inductor current I L Continuous increase is conducive to providing a larger current to the load end to quickly replenish the output capacitor C OUT The released charge achieves the supply and demand balance of the output current and gradually restores V OUT , reduce V OUT fluctuations, thus enhancing the reliability of the converter.

[0121] The buck-boost DC converter cycles through the startup phase, the first discharging phase, and the first charging phase to provide appropriate voltage and current to the load.

[0122] In the boost mode, the steady-state operation of the buck-boost DC converter includes a second discharge phase and a second charge phase of the cyclic operation. Figure 15 This is a steady-state operating waveform diagram in boost mode provided by an embodiment of the present application.

[0123] At the beginning of each cycle, the clock signal CLK is input into the two-phase generator, and the sawtooth wave signal V RAMP Starting from the lowest point, the voltage control module 130 corresponds to the first driving signal V of the first power switch tube S1, the second power switch tube S2, the third power switch tube S3 and the fourth power switch tube S4. S1 , the second driving signal V S2 , the third driving signal V S3 and the fourth driving signal V S4 .

[0124] In the second discharge phase, the drive signal passes through the driver to turn on the fourth power switch S4, and the other power switches are in the off state. IN -V OUT The voltage difference makes the inductor current I L With (2V IN -V OUT ) / L increases. Flying capacitor C F It is connected in series with the inductor L and discharges to the output. It should be noted that when the buck-boost DC converter works in the boost mode, there is no fixed phase working mode. The first comparison signal V output by the first comparator CMP1 is CMP-VM Shielded. Output voltage V OUTThe voltage is collected and enters the voltage control module 130, and compared with the reference voltage V REF After error amplification and frequency compensation by the three-type compensation circuit, the error amplifier output voltage first voltage signal V is generated. EA Waiting for sawtooth wave signal V RAMP rises to the first voltage signal V EA When the two intersect, the second comparator CMP2 outputs the second comparison signal V CMP-EA The control signal output by the voltage control module 130 changes, and the buck-boost DC converter enters the second charging stage.

[0125] In the second charging stage, the first power switch tube S1 and the third power switch tube S3 are turned on, and the second power switch tube S2 and the fourth power switch tube S4 are turned off. IN -V OUT The voltage difference makes the inductor current I L (V IN -V OUT ) / L decreases (e.g. Figure 15 Flying capacitor C F With input voltage V IN The first power switch tube S1 and the third power switch tube S3 are connected in parallel to charge the flying capacitor C F The voltage V CF =V IN When a cycle ends, the clock signal CLK is input into the two-phase generator, and the sawtooth wave signal V RAMP It immediately drops to the lowest voltage and starts to rise again, re-entering the second discharge stage.

[0126] In summary, the phase-controllable buck-boost DC-DC converter provided in any of the above-described embodiments removes the right-half-plane zero in both the boost and buck modes, simplifying the design of the DC-DC converter's compensation network and enabling the power stage to reuse the same compensation network in both the boost and buck modes. Due to the unique topology, when the feedback network detects that the output load has switched from a light load to a heavy load, the power stage operates through switching, allowing the inductor to continue operating in a magnetized state during a transient, causing the inductor current to continue to rise, thereby compensating for the voltage drop on the output capacitor, reducing output voltage fluctuations, and enhancing the reliability of the converter.

[0127] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present application, ordinary technicians in this field can make several simple deductions, modifications or replacements based on the ideas of the present application without departing from the scope of protection of the purpose of the present application and the claims. All of these are within the protection of the present application.

Claims

1. A phase-controllable buck-boost DC converter, characterized in that: include: An input port, used for receiving an input voltage provided by an external power source; Output port, used to provide output voltage to the connected load; a voltage control module connected to the output port, the voltage control module comprising a three-type compensation circuit, a sawtooth wave generator, a first comparator, a second comparator, a three-phase generator, and a non-overlapping clock signal generating circuit; the three-type compensation circuit is configured to perform error amplification and frequency compensation on the output voltage to generate a first voltage signal; the sawtooth wave generator is configured to generate a sawtooth wave signal and a clock signal; the first comparator is configured to obtain the sawtooth wave signal and a preset second voltage signal and generate a first comparison signal representing a comparison result between the sawtooth wave signal and the second voltage signal; The second comparator is used to obtain the first voltage signal and the sawtooth wave signal, and generate a second comparison signal representing a comparison result between the first voltage signal and the sawtooth wave signal; The three-phase generator is used to obtain the clock signal, the first comparison signal and the second comparison signal, and generate phase selection signals corresponding to the startup phase, the first discharge phase and the first charging phase; The non-overlapping clock signal generating circuit generates corresponding non-overlapping gate drive signals in response to phase selection signals corresponding to the startup phase, the first discharge phase, and the first charge phase; A power switch module, comprising at least a power switch circuit, a flying capacitor, and an inductor; wherein a first input terminal of the power switch circuit is connected to the input port, a second input terminal of the power switch circuit is connected to the output terminal of the voltage control module, and an output terminal of the power switch circuit is connected to the output port; the flying capacitor is connected between the power switch circuit and a preset voltage terminal; and the inductor is connected between the power switch circuit and the output port. The power switching circuit includes at least two power switching tubes that are periodically turned on and off under the control of the non-overlapping gate drive signal, so that the input voltage is converted into the output voltage through the charging and discharging of the flying capacitor and the inductor; and the conduction time of the two power switching tubes under the control of the non-overlapping gate drive signal is controllable to meet the ratio of the current value of the inductor to the current value of the output port is a constant.

2. The phase-controllable buck-boost DC converter according to claim 1, wherein: The power switch circuit includes a first power switch tube, a second power switch tube, a third power switch tube and a fourth power switch tube; the non-overlapping gate drive signal includes a first drive signal, a second drive signal, a third drive signal and a fourth drive signal; The control end of the first power switch tube is used to receive the first drive signal, the first end of the first power switch tube is connected to the input port, and the second end of the first power switch tube is connected to both the first end of the flying capacitor and the first end of the inductor; the control end of the second power switch tube is used to receive the second drive signal, the first end of the second power switch tube is connected to the second end of the flying capacitor, and the second end of the second power switch tube is connected to the second end of the inductor; the control end of the third power switch tube is used to receive the third drive signal, the first end of the third power switch tube is connected to the second end of the flying capacitor, and the second end of the third power switch tube is connected to the preset voltage terminal; the control end of the fourth power switch tube is used to receive the fourth drive signal, the first end of the fourth power switch tube is connected to the input port, and the second end of the fourth power switch tube is connected to the second end of the flying capacitor.

3. The phase-controllable buck-boost DC converter according to claim 2, wherein: The buck-boost DC converter in buck mode includes a startup phase, a first discharging phase and a first charging phase of cyclic operation; During the startup phase, the first drive signal and the second drive signal respectively control the first power switch tube and the second power switch tube to be turned on, and the third drive signal and the fourth drive signal respectively control the third power switch tube and the fourth power switch tube to be turned off; In the first discharging stage, the first drive signal, the second drive signal and the third drive signal respectively control the first power switch tube, the second power switch tube and the third power switch tube to be turned off, and the fourth drive signal controls the fourth power switch tube to be turned on; In the first charging stage, the first drive signal, the second drive signal and the fourth drive signal respectively control the first power switch tube, the second power switch tube and the fourth power switch tube to be disconnected, and the third drive signal controls the third power switch tube to be turned on.

4. The phase-controllable buck-boost DC converter according to claim 3, wherein: The buck-boost DC converter comprises a second discharging phase and a second charging phase of cyclic operation in the boost mode; In the second discharging stage, the first drive signal, the second drive signal and the third drive signal respectively control the first power switch tube, the second power switch tube and the third power switch tube to be turned off, and the fourth drive signal controls the fourth power switch tube to be turned on; In the second charging stage, the first drive signal and the third drive signal respectively control the first power switch tube and the third power switch tube to be turned on, and the second drive signal and the fourth drive signal respectively control the second power switch tube and the fourth power switch tube to be turned off.

5. The phase-controllable buck-boost DC converter according to claim 4, characterized in that: The voltage control module also includes a two-phase generator; The two-phase generator is used to obtain the clock signal and the second comparison signal, and generate a phase selection signal corresponding to the second discharging phase and the second charging phase; The non-overlapping clock signal generating circuit generates corresponding non-overlapping first, second, third and fourth driving signals in response to phase selection signals corresponding to the second discharging phase and the second charging phase.

6. The phase-controllable buck-boost DC converter according to claim 4, characterized in that: The voltage control module includes a three-type compensation circuit, a sawtooth wave generator, a first comparator, a second comparator, a two- / three-phase generator, and a non-overlapping clock signal generating circuit; The input end of the three-type compensation circuit is connected to the output end of the power switch circuit, and is used to perform error amplification and frequency compensation on the output voltage to generate a first voltage signal; The sawtooth wave generator is used to generate a sawtooth wave signal and a clock signal; The first comparator is used to obtain the sawtooth wave signal and a preset second voltage signal, and generate a first comparison signal representing a comparison result between the sawtooth wave signal and the second voltage signal; The second comparator is used to obtain the first voltage signal and the sawtooth wave signal, and generate a second comparison signal representing a comparison result between the first voltage signal and the sawtooth wave signal; The two-phase / three-phase generator is used to obtain the clock signal, the first comparison signal, and the second comparison signal. When it is determined that the current state is the buck mode, the three-phase generator generates a phase selection signal corresponding to the startup phase, the first discharge phase, and the first charging phase based on the clock signal, the first comparison signal, and the second comparison signal; when it is determined that the current state is the boost mode, the two-phase generator generates a phase selection signal corresponding to the second discharge phase and the second charging phase based on the clock signal and the second comparison signal; The non-overlapping clock signal generating circuit is used to generate non-overlapping first driving signal, second driving signal, third driving signal and fourth driving signal according to phase selection signals corresponding to different phases.

7. The phase-controllable buck-boost DC converter according to claim 5 or 6, characterized in that: Also includes a load jump detection module; The input end of the load jump detection module is connected to the output end of the three-type compensation circuit, and the output end of the load jump detection module is connected to the reset input end of the three-phase generator; the load jump detection module is used to determine whether the current load current has changed based on the obtained compensated output voltage in the buck mode; when it is determined that the current load current has changed from light load to heavy load, output a transient signal; The three-phase generator generates, in response to the transient signal, phase selection signals corresponding to the startup phase, the first discharge phase, and the first charge phase according to the clock signal and a first comparison signal starting from the next cycle of the clock signal; The non-overlapping clock signal generating circuit generates corresponding first, second, third and fourth driving signals in response to the phase selection signals corresponding to the startup phase, the first discharging phase and the first charging phase.

8. The phase-controllable buck-boost DC converter according to claim 7, wherein: The load jump detection module includes a follower circuit and a third comparator; the input end of the follower circuit is connected to the input end of the load jump detection module; the non-inverting input end of the third comparator is connected to the input end of the follower circuit, the inverting input end of the third comparator is connected to the output end of the load jump detection module, and the output end of the third comparator is connected to the output end of the load jump detection module; The three-phase generator includes an RS latch, a first D flip-flop, a second D flip-flop, a first selector, and a second selector; the set end of the RS latch is used to obtain the clock signal, the reset end of the RS latch is connected to the output end of the first comparator, and the output end of the RS latch is connected to the first output end of the three-phase generator; the data input end of the first D flip-flop is set to a first level, the clock input end of the first D flip-flop is connected to the output end of the RS latch, and the output end of the first D flip-flop is connected to the second output end of the three-phase generator; the data input end of the second D flip-flop is set to a first level, the clock input end of the second D flip-flop is connected to the output end of the first D flip-flop, and the reset end of the second D flip-flop is used to obtain the clock signal; The first input terminal of the first selector is connected to the output terminal of the second comparator, the second input terminal of the first selector is used to obtain the clock signal, the reset terminal of the first selector is connected to the output terminal of the load jump detection module, and the output terminal of the first selector is connected to the reset terminal of the first D-type flip-flop; the first input terminal of the second selector is connected to the output terminal of the second D-type flip-flop, the second input terminal of the second selector is set to a second level, the reset terminal of the second selector is connected to the output terminal of the load jump detection module, and the output terminal of the second selector is connected to the third output terminal of the three-phase generator.

9. The phase-controllable buck-boost DC converter according to claim 2, wherein: The power switch circuit further includes a first dynamic body terminal selector and a second dynamic body terminal selector; The first power switch tube is an N-type power switch tube; the first dynamic body terminal selector is connected between the first terminal and the second terminal of the first power switch tube, and is used to connect the end with a lower potential between the first terminal and the second terminal of the first power switch tube to its substrate terminal when the first power switch tube is disconnected; The second power switch tube is a P-type power switch tube; the second dynamic body terminal selector is connected between the first end and the second end of the second power switch tube, and is used to connect the end with a higher potential between the first end and the second end of the second power switch tube to its substrate end when the second power switch tube is disconnected.

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