Optocoupler isolation interface circuit, integrated circuit and electronic equipment

Abstract

The invention discloses an optocoupler isolation interface circuit which comprises an RS-485 bus, an interface circuit unit, an optocoupler isolation circuit unit and a subsystem which are electrically connected in sequence. Under the condition that an optocoupler isolation circuit unit is electrically connected between a subsystem and an interface circuit unit and undertakes the communication isolation function of an RS-485 bus, when the working condition that the working voltage of the subsystem is powered down and the RS-485 interface voltage is continuously powered on, that is, the RS-485 bus continuously provides a first voltage exists, the optocoupler isolation circuit unit is electrically connected between the subsystem and the interface circuit unit; according to the RS-485 bus optical coupler isolation circuit, the RS-485 bus communication of other subsystems is not affected, an important role is played, the RS-485 bus optical coupler isolation circuit is successfully achieved, the RS-485 bus use requirement is met, and the RS-485 bus use effect is improved.

Description

Technical Field

[0001] The invention relates to the technical field of RS-485 bus interface, in particular to an optical coupling isolation interface circuit, an integrated circuit and an electronic device. Background Art

[0002] RS-485 is a balanced transmission standard used in digital communication networks. It can effectively transmit signals in an environment with large electronic noise at long distances. It has the characteristics of long transmission distance, strong anti-interference ability, and multi-node support. It is widely used in multi-system communications. RS-485 adopts half-duplex working mode and uses a bus to connect various nodes or subsystems in series.

[0003] Due to the characteristics of the RS-485 bus, as a subsystem interface circuit, the RS-485 bus needs to provide interface voltage and interface GND. In the case of interface isolation, in the prior art, an optocoupler isolation circuit unit is used for interface isolation. The peripheral circuit of the optocoupler isolation circuit unit is usually designed with a pull-up resistor, see Figure 1 The pull-up resistors R511 and R512 connected to the Gh22411 optocoupler isolator. Due to the existence of the pull-up resistors, when the subsystem working voltage, i.e. the second voltage, is powered off and the RS-485 bus continues to provide the working voltage, i.e. the first voltage, the enable signal RSRS-485_WE1 of the sending chip is still at a high level, and there is an abnormal situation that the RS-485 bus is occupied. Summary of the invention

[0004] The purpose of the present invention is to provide an optocoupler isolation interface circuit that can adapt to the need of not occupying the RS-485 bus, solve the problem that when a subsystem uses an optocoupler isolation circuit and the subsystem operating voltage is powered off but the RS-485 bus continues to provide the operating voltage, the RS-485 bus is still occupied, and meet the need of not affecting the normal communication of the RS-485 bus.

[0005] In a first aspect, an embodiment of the present invention provides an optocoupler isolation interface circuit, comprising an RS-485 bus, an interface circuit unit, an optocoupler isolation circuit unit, and a subsystem electrically connected in sequence;

[0006] The RS-485 bus is used to transmit clock signals and data signals according to the RS-485 protocol, and to supply power to the interface circuit unit and the optical coupling isolation circuit unit to provide a first voltage;

[0007] The interface circuit unit includes a receiving chip and a transmitting chip, and the clock signal and the data signal occupy two different channels of the receiving chip and the transmitting chip respectively to transmit the clock signal and the data signal;

[0008] The optical coupling isolation circuit unit includes an optical coupling isolator and its peripheral circuits, which are used to isolate the interface circuit unit and the subsystem, so that there is no direct electrical connection between the interface circuit unit and the subsystem; at the same time, the optical coupling isolator controls the enable signals of the receiving chip and the transmitting chip. When the working voltage of the subsystem is powered off and the voltage of the RS-485 interface circuit is continuously powered on, the receiving chip and the transmitting chip cannot be enabled, and neither the receiving chip nor the transmitting chip can receive or transmit signals, and the RS-485 bus is not occupied;

[0009] The subsystem includes an RS-485 protocol processor for processing the clock signal and the data signal, and for supplying power to the optical coupling isolation circuit unit to provide a second voltage.

[0010] In some embodiments, the receiving chip and the transmitting chip include sw3491 and adm2486 for both receiving and transmitting; or two paired chips, one is the receiving chip sw96f175, ds26c32 and DS96F175, and the other is the paired transmitting chips sw96f174, ds26c31 and DS96F174.

[0011] In some embodiments, the optocoupler isolator is Gh22411. When receiving a communication signal, the signal is sent to the receiving chip. At this time, the enable signal of the receiving chip is output by the optocoupler isolator. The pin of the optocoupler isolator connected to the receiving chip is set to a high level, so that the receiving chip is enabled and valid, and the signal data is received. Otherwise, the signal data cannot be received; after passing through the receiving chip, the communication signal is transmitted to the subsystem. When the subsystem processes the communication signal and needs to feedback information, the sending signal is transmitted to the sending chip. At this time, the enable signal of the sending chip is output by the optocoupler isolator. The pin of the optocoupler isolator connected to the sending chip is set to a high level, so that the sending chip is enabled and valid, and the signal data is sent. Otherwise, the signal data cannot be sent; when the second voltage of the subsystem is powered off and the RS-485 bus continues to provide the first voltage working state, the pins of the optocoupler isolator connected to the receiving chip and the sending chip are set to a low level, that is, the default is a low level, then the receiving chip and the sending chip cannot be enabled, and neither the signal is received nor the signal is sent, and the RS-485 bus is not occupied.

[0012] In some embodiments, the peripheral circuit specifically includes a first resistor and a second resistor, which are respectively connected in series with the 1st and 4th pins of the optocoupler isolator and then connected to the positive pole of the power supply of the subsystem; the 8th pin of the optocoupler isolator is electrically connected to the positive pole of the RS-485 bus power supply, and the 5th pin is electrically connected to the GND of the RS-485 bus power supply.

[0013] In some embodiments, the subsystem includes one or more combinations of FPGA, ARM, ZYNQ, or a single-chip microcomputer.

[0014] In some embodiments, the receiving chip is DS96F175, a third resistor is connected in series between the positive power supply of the RS-485 bus and the vacant enable pin of the receiving chip, the positive power supply of the RS-485 bus is directly electrically connected to the VCC pin of the receiving chip; the ground pin of the receiving chip is electrically connected to the RS-485 bus power supply GND;

[0015] The transmitting chip is DS96F174, a fourth resistor is connected in series between the positive power supply of the RS-485 bus and the vacant enable pin of the transmitting chip, the positive power supply of the RS-485 bus is directly electrically connected to the VCC pin of the transmitting chip; the ground pin of the transmitting chip is electrically connected to the RS-485 bus power supply GND.

[0016] In a second aspect, an embodiment of the present invention provides an integrated circuit, comprising the above-mentioned optocoupler isolation interface circuit.

[0017] In a third aspect, an embodiment of the present invention provides an electronic device, comprising the integrated circuit.

[0018] The advantages of the present invention are:

[0019] When the subsystem second voltage is powered off and the RS-485 bus continues to provide the first voltage, the pull-up resistor between the 6th and 7th pins of the Gh22411 optocoupler isolator and the positive pole of the RS-485 bus is removed. Figure 1The pull-up resistors R511 and R512 in the present invention, the default state (setting) of the 6th and 7th pins of the isolation optocoupler is low level in the technical solution of the present invention, and the communication receiving chip DS96F175 and the communication sending chip DS96F174 cannot be enabled, and neither the signal is received nor the signal is sent. At this time, the RS-485 bus will not be occupied, and the operation of the RS-485 bus will not be affected. In short, when the optocoupler isolation circuit unit is electrically connected between the subsystem and the interface circuit unit to undertake the RS-485 bus communication isolation function, when the subsystem working voltage is powered off, and the RS-485 interface voltage is continuously powered on, that is, the RS-485 bus continuously provides the first voltage, the RS-485 bus communication of the remaining subsystems can be achieved without affecting the RS-485 bus communication, which plays an important role, successfully realizes the RS-485 bus optocoupler isolation circuit, adapts to the use requirements of the RS-485 bus, and improves the use effect of the RS-485 bus. The technical solution is low in cost, components are easy to purchase, improves the product development and production efficiency, saves hardware development costs, and has good versatility and strong compatibility. The present invention can be extended to multi-system communication circuits to ensure the isolation of communication circuits and not occupy the use of RS-485 bus. According to a certain test verification, the circuit design is reliable and stable and has good promotion value. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 A circuit diagram of an optocoupler isolation circuit unit in the prior art;

[0021] Figure 2 It is a structural block diagram of an optocoupler isolation interface circuit in an embodiment of the present invention;

[0022] Figure 3 is a circuit diagram of an interface circuit unit in an embodiment of the present invention;

[0023] Figure 4 is a circuit diagram of an optocoupler isolation circuit unit in an embodiment of the present invention.

[0024] In the figure: 100-RS-485 bus, 200-interface circuit unit, 201-receiving chip, 202-transmitting chip, 300-optical coupler isolation circuit unit, 301-optical coupler isolator (or isolation optical coupler), 302-peripheral circuit, 400-subsystem, and 401-RS-485 protocol processor. DETAILED DESCRIPTION

[0025] The technical solution of the present invention is further described below in conjunction with specific implementation methods.

[0026] Embodiment 1

[0027] The embodiment of the present invention provides an optical coupling isolation interface circuit, see Figure 2, including an RS-485 bus, an interface circuit unit, an optocoupler isolation circuit unit, and a subsystem which are electrically connected in sequence.

[0028] The RS-485 bus is used to transmit clock signals and data signals according to the RS-485 protocol, and to power the interface circuit unit and the optical coupling isolation circuit unit to provide a first voltage of 5V; the interface circuit unit includes a receiving chip and a transmitting chip, and the clock signal and the data signal occupy two different channels of the receiving chip and the transmitting chip respectively to transmit the clock signal and the data signal; optionally, in some other embodiments, the receiving chip and the transmitting chip include SW3491 and ADM2486 for both receiving and transmitting; or two chips used in pairs, one is the receiving chip SW96F175, DS26C32 and DS96F175, and the other is the paired transmitting chips Sw96F174, DS26C31 and DS96F174 respectively. The optocoupler isolation circuit unit includes an optocoupler isolator and its peripheral circuits, which are used to isolate the interface circuit unit and the subsystem, so that there is no direct electrical connection between the interface circuit unit and the subsystem; at the same time, the optocoupler isolator controls the enable signals of the receiving chip and the transmitting chip. When the subsystem working voltage is powered off and the RS-485 interface circuit voltage is continuously powered on, the receiving chip and the transmitting chip cannot be enabled, and neither the signal is received nor sent, and the RS-485 bus is not occupied. The subsystem includes one or more combinations of FPGA, ARM, ZYNQ, or a single-chip microcomputer, and in the embodiment of the present invention, it is FPGA. The subsystem includes an RS-485 protocol processor for processing clock signals and data signals; the subsystem also provides a second voltage of 3.3V for itself and the optocoupler isolator.

[0029] See also Figure 3In the embodiment of the present invention, the receiving chip is DS96F175, a third resistor R319 is connected in series between the positive electrode of the RS-485 bus power supply and the vacant enable pin of the receiving chip, and the positive electrode of the RS-485 bus power supply is directly electrically connected to the VCC pin of the receiving chip; the ground pin of the receiving chip is electrically connected to the RS-485 bus power supply GND; the transmitting chip is DS96F174, a fourth resistor R320 is connected in series between the positive electrode of the RS-485 bus power supply and the vacant enable pin of the transmitting chip, and the positive electrode of the RS-485 bus power supply is directly electrically connected to the VCC pin of the transmitting chip; the ground pin of the transmitting chip is electrically connected to the RS-485 bus power supply GND. The clock signal and the data signal occupy two different channels 1A, 1B and 2A, 2B of the receiving chip DS96F175, respectively, and the data signal and the clock signal occupy two different channels OUT1+, OUT1- and OUT2+, OUT2- of the transmitting chip DS96F174, respectively. When the communication signal is sent to the subsystem, the 2nd and 3rd pins of the communication receiving chip DS96F175 receive the clock differential signal of RS-485 and output it as a single-ended clock signal to the 4th pin; the 4th pin of the communication receiving chip DS96F175 is electrically connected to the RS-485 protocol processor of the subsystem, and the processor responds to the communication. Similarly, the 8th and 9th pins of the communication receiving chip DS96F175 receive the data differential signal of RS-485 and output it as a single-ended data signal to the 7th pin; the 7th pin of the communication receiving chip DS96F175 is electrically connected to the RS-485 protocol processor of the subsystem, and the processor responds to the communication. The enable signal of the communication receiving chip DS96F175 is the 5th pin. When the enable signal is at a high level, the DS96F175 works normally and receives the communication signal; when the enable signal is at a low level, the DS96F175 cannot work normally and does not process the communication signal. The 15th pin of the communication receiving chip DS96F175 is connected in series with the R319 resistor 10k, and then electrically connected to the 5V of RS-485; the 20th pin is electrically connected to the 5V of RS-485; the 10th pin is electrically connected to the GND of RS-485. The 5th pin of the communication receiving chip DS96F175 is electrically connected to the 6th pin of the optocoupler isolator, and the optocoupler isolator controls the enable signal of the communication receiving chip.

[0030] The 15th pin of the communication transmission chip DS96F174 is connected in series with the R320 resistor 10k, and is electrically connected to the 5V of RS-485; the 20th pin is electrically connected to the 5V of RS-485; the 10th pin is electrically connected to the GND of RS-485. The 9th pin of the communication transmission chip DS96F174 is electrically connected to the subsystem, converting the response communication clock signal output by the processor into a differential signal, and outputting it to pins 7 and 8; the 2nd pin of the communication transmission chip DS96F174 is electrically connected to the subsystem, converting the response communication clock signal output by the processor into a differential signal, and outputting it to pins 3 and 4. The enable signal of the communication transmission chip DS96F174 is pin 5. When the enable signal is at a high level, the DS96F174 works normally and receives the communication signal; when the enable signal is at a low level, the DS96F174 cannot work normally and does not process the communication signal. Pin 5 of the communication transmission chip DS96F174 is electrically connected to pin 7 of the optocoupler isolator, and the optocoupler isolator controls the enable signal of the communication transmission chip.

[0031] See also Figure 4In this embodiment, the optocoupler isolator is Gh22411. When receiving a communication signal, the signal is sent to the receiving chip. At this time, the enable signal of the receiving chip is output by the optocoupler, and the pin of the optocoupler connected to the receiving chip is set to a high level, so that the receiving chip is enabled and effective, and the signal data is received. Otherwise, the signal data cannot be received; after passing through the receiving chip, the communication signal is transmitted to the subsystem. When the subsystem processes the communication signal and needs to feedback information, the sending signal is transmitted to the sending chip. At this time, the enable signal of the sending chip is output by the optocoupler, and the pin of the optocoupler connected to the sending chip is set to a high level, so that the sending chip is enabled and effective, and the signal data is sent. Otherwise, the signal data cannot be sent; when the second voltage 3.3V of the subsystem is powered off and the RS-485 bus continues to provide the first voltage 5V working state, the pins of the optocoupler connected to the receiving chip and the sending chip are set to a low level, then the receiving chip and the sending chip cannot be enabled, and neither the signal is received nor the signal is sent, and the RS-485 bus is not occupied. The peripheral circuit specifically includes a first resistor R509 and a second resistor R510. The first resistor and the second resistor are connected in series with the 1st and 4th pins of the optocoupler isolator respectively, and then connected to the 3.3V positive pole of the power supply of the subsystem; the 8th pin of the optocoupler isolator is electrically connected to the positive pole 5V of the RS-485 bus power supply, and the 5th pin is electrically connected to the GND of the RS-485 bus power supply. The 6th pin of the optocoupler isolator is an output pin, and the corresponding input pin is the 3rd pin, which is electrically connected to the RS-485 protocol processor of the subsystem; its control logic is that the default state of the 6th pin of the optocoupler is low level, when the input 3th pin is low level, the output 6th pin is high level; when the input 3th pin is high level, the output 6th pin is low level. Pin 7 of the optocoupler isolator is an output pin, and the corresponding input pin is pin 2, which is electrically connected to the RS-485 protocol processor of the subsystem. The control logic is that the default state of pin 7 of the optocoupler isolator is a low level. When the input pin 2 is a low level, the output pin 7 is a high level; when the input pin 2 is a high level, the output pin 7 is a low level.

[0032] In summary, when the subsystem working voltage is powered off and the RS-485 interface voltage is continuously powered on, since the default state of pins 6 and 7 of the optocoupler isolator is low, the communication receiving chip DS96F175 and the communication sending chip DS96F174 cannot be enabled, and neither the signal is received nor sent. At this time, the RS-485 bus will not be occupied and the operation of the RS-485 bus will not be affected.

[0033] Embodiment 2

[0034] An embodiment of the present invention further provides an integrated circuit, comprising the optocoupler isolation interface circuit of the first embodiment.

[0035] Embodiment 3

[0036] An embodiment of the present invention further provides an electronic device, comprising the integrated circuit of the second embodiment.

Claims

1. An optocoupler isolation interface circuit, characterized in that: It includes an RS-485 bus, an interface circuit unit, an optical coupling isolation circuit unit, and a subsystem which are electrically connected in sequence; The RS-485 bus is used to transmit clock signals and data signals according to the RS-485 protocol, and to supply power to the interface circuit unit and the optical coupling isolation circuit unit to provide a first voltage; The interface circuit unit includes a receiving chip and a transmitting chip, and the clock signal and the data signal occupy two different channels of the receiving chip and the transmitting chip respectively to transmit the clock signal and the data signal; The optical coupling isolation circuit unit includes an optical coupling isolator and its peripheral circuits, which are used to isolate the interface circuit unit and the subsystem, so that there is no direct electrical connection between the interface circuit unit and the subsystem; at the same time, the optical coupling isolator controls the enable signals of the receiving chip and the transmitting chip. When the working voltage of the subsystem is powered off and the voltage of the RS-485 interface circuit is continuously powered on, the receiving chip and the transmitting chip cannot be enabled, and neither the receiving chip nor the transmitting chip can receive or transmit signals, and the RS-485 bus is not occupied; The subsystem includes an RS-485 protocol processor for processing the clock signal and the data signal, and for supplying power to the optical coupling isolation circuit unit to provide a second voltage.

2. The optical coupler isolation interface circuit according to claim 1, characterized in that: The receiving chip and the transmitting chip include sw3491 and adm2486 for both receiving and transmitting; or two chips used in pairs, one is the receiving chip sw96f175, ds26c32 and DS96F175, and the other is the paired transmitting chips sw96f174, ds26c31 and DS96F174.

3. The optical coupler isolation interface circuit according to claim 1 or 2, characterized in that: The optocoupler isolator is Gh22411. When receiving a communication signal, the signal is sent to the receiving chip. At this time, the enable signal of the receiving chip is output by the optocoupler isolator. The optocoupler isolator is connected to the pin of the receiving chip and is set to a high level, so that the receiving chip is enabled and valid, and the signal data is received. Otherwise, the signal data cannot be received. After passing through the receiving chip, the communication signal is transmitted to the subsystem. When the subsystem processes the communication signal and needs to feedback information, the sending signal is transmitted to the sending chip. At this time, the enable signal of the sending chip is output by the optocoupler isolator. The optocoupler isolator is connected to the pin of the sending chip and is set to a high level, so that the sending chip is enabled and valid, and the signal data is sent. Otherwise, the signal data cannot be sent. When the second voltage of the subsystem is powered off and the RS-485 bus continues to provide the first voltage, the pins of the optocoupler isolator connecting the receiving chip and the sending chip are set to a low level.

4. The optical coupler isolation interface circuit according to claim 3 is characterized in that The peripheral circuit specifically includes a first resistor and a second resistor, which are respectively connected in series with the 1st pin and the 4th pin of the optocoupler isolator and then connected to the positive pole of the power supply of the subsystem; the 8th pin of the optocoupler isolator is electrically connected to the positive pole of the RS-485 bus power supply, and the 5th pin is electrically connected to the GND of the RS-485 bus power supply.

5. The optical coupler isolation interface circuit according to any one of claims 1 to 4, characterized in that: The subsystem includes one or more combinations of FPGA, ARM, ZYNQ, or a single-chip microcomputer.

6. The optical coupling isolation interface circuit according to any one of claims 1 to 5, characterized in that: The receiving chip is DS96F175, a third resistor is connected in series between the positive electrode of the RS-485 bus power supply and the vacant enable pin of the receiving chip, the positive electrode of the RS-485 bus power supply is directly electrically connected to the VCC pin of the receiving chip; the ground pin of the receiving chip is electrically connected to the RS-485 bus power supply GND; The transmitting chip is DS96F174, a fourth resistor is connected in series between the positive power supply of the RS-485 bus and the vacant enable pin of the transmitting chip, the positive power supply of the RS-485 bus is directly electrically connected to the VCC pin of the transmitting chip; the ground pin of the transmitting chip is electrically connected to the RS-485 bus power supply GND.

7. An integrated circuit, characterized in that: It comprises the optical coupling isolation interface circuit as described in any one of claims 1 to 6.

8. An electronic device, characterized in that: Comprising the integrated circuit of claim 7.

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