Miniature light emitting diode with high surface light extraction efficiency and preparation method thereof

Abstract

The invention discloses a miniature light emitting diode with high surface light extraction efficiency and a preparation method thereof. The preparation method comprises the following steps: providing an LED epitaxial wafer; the LED epitaxial wafer comprises a GaN semiconductor layer, a quantum well layer and a p-GaN layer, wherein the GaN semiconductor layer, the quantum well layer and the p-GaN layer are arranged in a stacked mode. Annealing treatment is carried out on the N surface of the GaN semiconductor layer, so that GaN on the surface of the GaN semiconductor layer is converted into GaO, and a GaN-GaO semiconductor layer is obtained; etching the N surface of the GaN-GaO semiconductor layer to obtain a multi-surface micro cone mirror pattern layer; wherein the multi-face micro-cone mirror pattern layer comprises a plurality of multi-face micro-cone mirrors which are regularly arranged, and the bottom edges of the adjacent multi-face micro-cone mirrors are attached to each other; and the bottom height ratio of the multi-surface micro cone mirror is (1-2.5): 1. According to the method for improving the surface light extraction efficiency of the micro light-emitting diode, the surface light extraction efficiency and the surface light extraction ratio can be improved by arranging the multi-surface micro cone mirror pattern layer with the special structure on the N surface of the semiconductor layer.

Description

Technical Field

[0001] The present invention relates to the technical field of micro light emitting diodes, and in particular to a method for preparing a micro light emitting diode with high surface light extraction efficiency and a micro light emitting diode with high surface light extraction efficiency prepared by the preparation method. Background Art

[0002] In recent years, Micro Light Emitting Diode (Micro-LED) has a very wide range of application prospects in display, communication, medical and other fields due to its higher light efficiency, higher brightness, ultra-high resolution and other advantages. Currently, most of the GaN-based Micro-LEDs on the market are heteroepitaxial, that is, the substrate is sapphire, and homoepitaxial Micro-LED chips are also being actively explored and have made relevant progress; sapphire substrates are relatively low in price, and homogeneous substrates have lower dislocation density (2-3 orders of magnitude lower) and extremely small stress compared to sapphire substrates.

[0003] However, the quantum efficiency of Micro-LED is still low, and the problem of improving the light extraction efficiency (LEE) needs to be solved urgently. For traditional large-size LEDs, the sidewall light emission accounts for a small proportion due to the small surface / volume ratio. However, as the size decreases, the surface / volume ratio increases, which makes the sidewall light emission ratio of Micro-LED gradually increase. Micro-LEDs used in the micro-display field are generally required to be below 10μm in size. For a 10μm Micro-LED, the sidewall light emission accounts for more than half of the total light emission. The surface light emission efficiency (LSE) and the surface light emission ratio (S) greatly limit the performance of Micro-LED. In real applications, since the sidewall light emission is large and the top light emission is small, this will cause serious crosstalk between pixels, reduce resolution and contrast, and will also cause sidewall light emission to be blocked during the packaging process. Therefore, the light extraction efficiency essentially still needs to improve the surface light emission efficiency.

[0004] However, the current methods for improving light extraction are costly and highly dependent on process precision and technology. They are more effective for large-size LEDs, but more limited for Micro-LEDs, and there is a lack of optimization solutions specifically for LSE. For example: patterned substrates, surface plasmons, photonic crystal micro-nano structures, etc. Among them, the preparation process of patterned substrates is complex, the cost is high, and the etching process is strict; the preparation process of photonic crystals is very complex and requires high process precision; the characteristics of surface plasmons are greatly affected by the surrounding environment, which may affect the stability and reliability of the device, and the preparation is relatively complex and the cost is high.

[0005] Traditional large-size LEDs only need to focus on the overall LEE, but Micro-LEDs are different. In view of the current problems of low LSE and low surface light output ratio of Micro-LEDs, there is an urgent need for a relatively simple and feasible method to improve LSE and S for Micro-LEDs. Summary of the invention

[0006] In view of this, an object of the present invention is to provide a method for preparing a micro-light emitting diode with high surface light extraction efficiency, which can effectively improve the surface light extraction efficiency of the micro-light emitting diode.

[0007] In a first aspect, the present invention provides a method for preparing a micro light emitting diode with high surface light extraction efficiency, comprising the following steps: An LED epitaxial wafer is provided; wherein the LED epitaxial wafer comprises a stacked GaN semiconductor layer, a quantum well layer and a p-GaN layer; Annealing the N-side of the GaN semiconductor layer to convert GaN on the surface of the GaN semiconductor layer into GaO to obtain a GaN-GaO semiconductor layer; Etching the N-side of the GaN-GaO semiconductor layer to obtain a multi-faceted micro-conical mirror pattern layer; The multifaceted microconical mirror pattern layer includes a plurality of multifaceted microconical mirrors arranged regularly, and the bottom edges of adjacent multifaceted microconical mirrors are attached to each other, that is, adjacent multifaceted microconical mirrors are closely arranged; the bottom-to-height ratio of the multifaceted microconical mirrors is (1-2.5): 1. Preferably, the bottom-to-height ratio of the multifaceted microconical mirrors is 1:1, 4:3, 5:3, 5:2; more preferably, the bottom-to-height ratio of the multifaceted microconical mirrors is 4:3.

[0008] According to some preferred embodiments of the present invention, the GaN semiconductor layer includes an n-GaN layer, and the polyhedral microconical mirror pattern layer is arranged on the n-GaN layer; or, the GaN semiconductor layer includes a u-GaN layer and an n-GaN layer, and the polyhedral microconical mirror pattern layer is arranged on the u-GaN layer.

[0009] According to some preferred implementation aspects of the present invention, the multi-faceted micro-cone mirror is a three-faceted micro-cone mirror, a six-faceted micro-cone mirror or a twelve-faceted micro-cone mirror. When the multi-faceted micro-cone mirror is a three-faceted micro-cone mirror or a six-faceted micro-cone mirror, the bottom edges of the multi-faceted micro-cone mirror are completely fitted together without gaps; when the multi-faceted micro-cone mirror is a twelve-faceted micro-cone mirror, part of the bottom edges of the multi-faceted micro-cone mirror are completely fitted together without gaps, and although the bottoms of the plurality of twelve-faceted micro-cones are closely arranged, there is a triangular gap in the middle of every three closely arranged twelve-faceted micro-cones.

[0010] According to some preferred embodiments of the present invention, the bottom surface size of the multi-faceted microcone is 100-1000nm, preferably 200-1000nm. When the multi-faceted microcone is a three-sided microcone, the height of the bottom triangle is 100-1000nm; when the multi-faceted microcone is a six-sided microcone or a twelve-sided microcone, the distance between the bottom edges is 100-1000nm. The six-sided microcone pattern has a good effect of enhancing the surface light emission. At the same time, not all pattern layer sizes have a positive effect on light extraction. When the bottom surface size is less than 100nm, the effect is not obvious, and it is even not conducive to the surface light emission of the micro light-emitting diode.

[0011] According to some preferred implementation aspects of the present invention, the etching method is wet etching, and the steps of the wet etching are as follows: Under the condition of temperature of 80-120° C., placing the GaN-GaO semiconductor layer in an etching solution and heating for 10-40 minutes, so as to obtain closely arranged six-sided micro-conical mirrors on the N-face of the GaN-GaO semiconductor layer, wherein the six faces of each six-sided micro-conical mirror are all {10-11} crystal faces; The etching solution is a mixed solution of ammonia water, H2O2 and H2O, and the volume ratio is ammonia water: H2O2: H2O = 1: 0.5-1.5: 4-6.

[0012] According to some preferred implementation aspects of the present invention, the etching method is wet etching, and the steps of the wet etching are as follows: Under the condition of temperature of 80-120° C., placing the GaN-GaO semiconductor layer in an etching solution and heating for 10-30 minutes, so as to obtain closely arranged six-sided micro-conical mirrors on the N-face of the GaN-GaO semiconductor layer, wherein the six faces of each six-sided micro-conical mirror are all {10-1-1} crystal planes; The etching solution is a mixture of KOH solution and water, and the volume ratio is KOH solution: H2O=1:4-6.

[0013] According to some preferred implementation aspects of the present invention, the etching method is wet etching, and the steps of the wet etching are as follows: Under the condition of temperature of 80-120° C., placing the GaN-GaO semiconductor layer in an etching solution and heating for 10-40 minutes, so as to obtain closely arranged twelve-sided micro-conical mirrors on the N-face of the GaN-GaO semiconductor layer, wherein six faces of each twelve-sided micro-conical mirror are {20-2-3} crystal faces, and the remaining six faces are {22-4-5} crystal faces, and the two are alternately distributed; The etching liquid is H3PO4 solution, or the etching liquid is a mixture of H3PO4 solution and water.

[0014] According to some preferred implementation aspects of the present invention, the process conditions of the annealing treatment include: a temperature of 400-600° C., an oxygen atmosphere, and a treatment time of 5-20 min; and / or, The steps also include pre-treatment before annealing: Cleaning the GaN semiconductor layer; The N surface of the GaN semiconductor layer is blown dry with nitrogen at room temperature for 3-30 minutes; or the GaN semiconductor layer is dried in a nitrogen oven, wherein the process conditions of the drying treatment include a drying time of 3-15 minutes and a drying temperature of 40-80°C.

[0015] According to some preferred implementation aspects of the present invention, the preparation of the LED epitaxial wafer includes: Providing a substrate structure, and sequentially preparing an n-GaN layer, a stress release layer, the quantum well layer, an electron blocking layer and the p-GaN layer on the substrate structure to obtain a first epitaxial wafer; Processing the first epitaxial wafer to obtain the LED epitaxial wafer; Before the step of annealing the N-side of the GaN semiconductor layer, the method comprises: Coating photoresist on the surface of the LED epitaxial wafer and baking it; After the step of annealing the N-side of the GaN semiconductor layer, the method further comprises: The photoresist is removed to obtain the micro light emitting diode.

[0016] According to some preferred implementation aspects of the present invention, the step of processing the first epitaxial wafer to obtain the LED epitaxial wafer includes: Cleaning the first epitaxial wafer; Preparing a transparent conductive layer on the p-GaN layer to obtain a second epitaxial wafer; wherein the second epitaxial wafer comprises the substrate structure, the n-GaN layer, the stress release layer, the quantum well layer, the electron blocking layer, the p-GaN layer and the transparent conductive layer which are stacked; Etching from the transparent conductive layer until the n-GaN layer is exposed to obtain a plurality of mesa structures; Depositing a passivation layer on the sidewall of the mesa structure, the upper surface of the mesa structure, and between two adjacent mesas; The passivation layer is etched to form an n-electrode window, and an n-electrode is prepared in the n-electrode window to form a first LED epitaxial structure; wherein the n-electrode is in contact with the n-GaN layer; Performing annealing treatment on the first LED epitaxial structure to obtain a second LED epitaxial structure; The passivation layer in the second LED epitaxial structure is etched to form a p-electrode window, and a p-electrode is prepared in the p-electrode window to obtain a third LED epitaxial structure; wherein the p-electrode is in contact with the transparent conductive layer; Bonding the third LED epitaxial structure to a driving substrate to obtain a fourth LED epitaxial structure; The fourth LED epitaxial structure is thinned or peeled off to obtain the LED epitaxial wafer.

[0017] According to some preferred implementation aspects of the present invention, the substrate structure includes a stacked heterogeneous substrate and a u-GaN layer, and the thinning or peeling of the fourth LED epitaxial structure to obtain the LED epitaxial wafer includes: peeling off the heterogeneous substrate to obtain the LED epitaxial wafer, wherein the GaN semiconductor layer is the u-GaN layer; or peeling off the heterogeneous substrate and the u-GaN layer to obtain the LED epitaxial wafer, wherein the GaN semiconductor layer is the n-GaN layer; Alternatively, the substrate structure is a u-GaN layer, and the fourth LED epitaxial structure is thinned or peeled off to obtain the LED epitaxial wafer, comprising: The u-GaN layer is thinned to obtain the LED epitaxial wafer, wherein the GaN semiconductor layer is the thinned u-GaN layer; or the u-GaN layer and the n-GaN layer are thinned to obtain the LED epitaxial wafer, wherein the GaN semiconductor layer is the thinned n-GaN layer.

[0018] In some embodiments of the present invention, a method for preparing a micro-LED with high surface light extraction efficiency specifically comprises the following steps: S1. Preparation of LED epitaxial wafers The preparation of the LED epitaxial wafer includes: S11. Provide a substrate structure, and sequentially prepare an n-GaN layer, a stress release layer, a quantum well layer, an electron blocking layer, and a p-GaN layer on the substrate structure by metal organic compound chemical vapor deposition to obtain a first epitaxial wafer.

[0019] S12: Process the first epitaxial wafer to obtain the LED epitaxial wafer.

[0020] Specifically include: S121, cleaning the first epitaxial wafer.

[0021] S122. Prepare a transparent conductive layer such as ITO on the p-GaN layer to obtain a second epitaxial wafer; wherein the second epitaxial wafer includes the stacked substrate structure, the n-GaN layer, the stress release layer, the quantum well layer, the electron blocking layer, the p-GaN layer and the transparent conductive layer.

[0022] S123, etching from the transparent conductive layer until the n-GaN layer is exposed to obtain a plurality of mesa structures.

[0023] S124, depositing a passivation layer on the sidewalls of the mesa structure, the upper surface of the mesa structure, and between two adjacent mesas.

[0024] S125, etching the passivation layer to form an n-electrode window, and preparing an n-electrode in the n-electrode window to form a first LED epitaxial structure; wherein the n-electrode is in contact with the n-GaN layer.

[0025] S126 , performing annealing treatment on the first LED epitaxial structure to obtain a second LED epitaxial structure.

[0026] S127, etching the passivation layer in the second LED epitaxial structure to form a p-electrode window, and preparing a p-electrode in the p-electrode window to obtain a third LED epitaxial structure; wherein the p-electrode is in contact with the transparent conductive layer.

[0027] S128, bonding the third LED epitaxial structure to a driving substrate to obtain a fourth LED epitaxial structure.

[0028] S129, thinning or peeling off the fourth LED epitaxial structure to obtain the LED epitaxial wafer.

[0029] Preferably, the above steps also include the step of depositing a sidewall metal reflective layer after depositing the passivation layer. The sidewall metal reflective layer can reflect the light originally emitted from the sidewall back, so that more light is emitted from the surface, which can better improve the surface light output efficiency of the micro light emitting diode.

[0030] In some embodiments, the substrate structure includes a stacked heterogeneous substrate (such as sapphire) and a u-GaN layer, and the thinning or peeling off the fourth LED epitaxial structure to obtain the LED epitaxial wafer includes: peeling off the heterogeneous substrate to obtain the LED epitaxial wafer, wherein the GaN semiconductor layer is the u-GaN layer; or peeling off the heterogeneous substrate and the u-GaN layer to obtain the LED epitaxial wafer, wherein the GaN semiconductor layer is the n-GaN layer.

[0031] In other embodiments, the substrate structure is a u-GaN layer, and the thinning or peeling off of the fourth LED epitaxial structure to obtain the LED epitaxial wafer includes: thinning the u-GaN layer to obtain the LED epitaxial wafer, wherein the GaN semiconductor layer is a homogeneous substrate after thinning; or thinning the u-GaN layer and the n-GaN layer to obtain the LED epitaxial wafer, wherein the GaN semiconductor layer is a thinned n-GaN layer.

[0032] S2, performing annealing treatment on the N-side of the GaN semiconductor layer to convert GaN on the surface of the GaN semiconductor layer into GaO, thereby obtaining a GaN-GaO semiconductor layer; S3, etching the N-side of the GaN-GaO semiconductor layer to obtain a multi-faceted micro-conical mirror pattern layer; By etching a multi-faceted micro-cone mirror pattern layer with a special structure on the N-face of the GaN-GaO semiconductor layer, the surface light extraction efficiency and surface light output ratio of the micro-light-emitting diode can be increased. Among them, the multi-faceted micro-cone mirror pattern layer includes a plurality of regularly arranged multi-faceted micro-cones, and the bottom edges of adjacent multi-faceted micro-cones fit each other, that is, the adjacent multi-faceted micro-cones are closely arranged; the bottom height ratio of the multi-faceted micro-cones is (1-2.5):1, and the multi-faceted micro-cones are three-faceted micro-cones, six-faceted micro-cones or twelve-faceted micro-cones; the bottom surface size of the multi-faceted micro-cones is 100-1000nm. When the multi-faceted micro-cones are three-faceted micro-cones or six-faceted micro-cones, the bottom edges of the multi-faceted micro-cones are completely fitted together without gaps; when the multi-faceted micro-cones are twelve-faceted micro-cones, some of the bottom edges of the multi-faceted micro-cones are completely fitted together without gaps.

[0033] Preferably, the etching method is one selected from wet etching, photolithography, dry etching, and laser direct writing lithography.

[0034] Specifically, when the etching method is wet etching, it includes the following steps: S31. Cleaning The GaN semiconductor layer of the micro-LED is ultrasonically cleaned in acetone, alcohol and deionized water for 3-20 minutes to remove organic contamination on the surface. The purpose of cleaning is to allow the N-side of the GaN semiconductor layer to better contact the etching solution.

[0035] S32, remove surface liquid residue At room temperature, use a nitrogen gun to blow dry the N surface of the GaN semiconductor layer with N2 for 3-30 minutes; or use a N2 oven to dry the GaN semiconductor layer for 3-15 minutes at a temperature of 40-80°C.

[0036] S33, Annealing The N-side of the GaN semiconductor layer is rapidly annealed to convert the GaN compound on the surface of the GaN semiconductor layer into a GaO compound that is easier to etch, forming a GaN-GaO semiconductor layer and enhancing the corrosion effect of the solution. The process conditions of the annealing treatment include: a temperature of 400-600°C, an oxygen atmosphere, and a treatment time of 5-20 minutes.

[0037] S34, wet etching The N-side of the GaN-GaO semiconductor layer is subjected to a wet etching process, as follows: Under the condition of temperature of 80-120° C., placing the GaN-GaO semiconductor layer in an etching solution and heating for 10-40 minutes, so as to obtain closely arranged six-sided micro-conical mirrors on the N-face of the GaN-GaO semiconductor layer, wherein the six faces of each six-sided micro-conical mirror are all {10-11} crystal faces; The etching liquid is a mixture of ammonia water, H2O2 and H2O, and the volume ratio is ammonia water: H2O2: H2O = 1: 0.5-1.5: 4-6; preferably, the volume ratio of the substances in the etching liquid is ammonia water: H2O2: H2O = 1: 1: 5 ammonia water. The ammonia water is an ammonia solution with a mass percentage of 20%-30%, and the concentration of the H2O2 solution is 25-35%.

[0038] Alternatively, the GaN-GaO semiconductor layer is placed in an etching solution at a temperature of 80-120° C. and heated for 10-30 minutes to obtain closely arranged six-sided micro-conical mirrors on the N-face of the GaN-GaO semiconductor layer, wherein the six faces of each six-sided micro-conical mirror are all {10-1-1} crystal planes; The etching liquid is a mixture of KOH solution and water, and the volume ratio is KOH solution: H2O=1:4-6; preferably, the volume ratio of substances in the etching liquid is KOH solution: H2O=1:5, wherein the KOH solution is a solution with a concentration of 0.01-0.02 mol / L.

[0039] Alternatively, the GaN-GaO semiconductor layer is placed in an etching solution at a temperature of 80-120° C. and heated for 10-40 minutes to obtain closely arranged twelve-sided micro-conical mirrors on the N-face of the GaN-GaO semiconductor layer, wherein six faces of each twelve-sided micro-conical mirror are {20-2-3} crystal faces, and the remaining six faces are {22-4-5} crystal faces, and the two are alternately distributed; The etching liquid is H3PO4 solution, or the etching liquid is a mixture of H3PO4 solution and water, with a volume ratio of H3PO4 solution: H2O=1:16-128. Preferably, the volume ratio of each substance in the etching liquid is H3PO4 solution: H2O=1:16, 1:32, 1:64 or 1:128, wherein the H3PO4 solution is a solution with a concentration of 0.1-0.3 mol / L.

[0040] S4, removing the photoresist to obtain the micro light emitting diode.

[0041] In a second aspect, the present invention also provides a micro light emitting diode prepared by the preparation method described above.

[0042] The present invention provides a method for preparing a micro-light-emitting diode with high surface light extraction efficiency. The method comprises the following steps: annealing the N-side of a GaN semiconductor layer to convert GaN on the surface of the GaN semiconductor layer into GaO to obtain a GaN-GaO semiconductor layer; then etching the N-side of the GaN-GaO semiconductor layer to obtain a multi-faceted micro-conical mirror pattern layer. The multi-faceted micro-conical mirror pattern layer comprises a plurality of regularly arranged multi-faceted micro-conical mirrors, the bottom edges of adjacent multi-faceted micro-conical mirrors are attached to each other, and the bottom-to-height ratio of the multi-faceted micro-conical mirrors is (1-2.5):1. By annealing the GaN semiconductor layer, the GaN on the surface of the GaN semiconductor layer can be converted into GaO, and the material with the GaO surface is convenient for subsequent etching to form the required multi-faceted micro-conical mirror pattern layer; and, since a closely arranged multi-faceted micro-conical mirror pattern layer is arranged on the N-face of the GaN-GaO semiconductor layer, the surface light extraction efficiency and the surface light output ratio of the micro-light emitting diode can be increased; in addition, by setting the bottom-to-height ratio of the multi-faceted micro-conical mirror to (1-2.5):1, a better surface light output efficiency can be achieved, and at the same time, it is more conducive to the preparation of the micro-light emitting diode. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0044] Figure 1 It is a schematic flow chart of a method for preparing a micro light emitting diode provided by the present invention; Figure 2 It is a schematic diagram of the structure of the micro light emitting diode provided by the present invention; Figure 3 is another structural schematic diagram of the micro light emitting diode provided by the present invention; Figure 41 is a schematic diagram of a top view structure of a six-sided micro-conical mirror pattern layer provided by the present invention; Figure 5 It is a schematic diagram of the three-dimensional structure of the six-sided micro-conical mirror pattern layer provided by the present invention; Figure 6 This is the LSE result diagram of the six-sided micro-cone mirror structure with different base-to-height ratios on the surface of a 10μm micro-LED; Figure 7 This is the LSE result diagram of the 10μm micro-LED corresponding to the three-sided micro-cone mirror, six-sided micro-cone mirror and twelve-sided micro-cone mirror structure, with a base-to-height ratio of 4:3; Figure 8 The LSE and S effect diagram of the six-sided microconical mirror pattern layer under different microconical mirror bottom surface sizes T for a 10μm micro-LED; Fig. 9 It is the photoluminescence (PL) spectrum of homogeneous 10μm micro-LED before and after wet etching; The reference numerals include: 10 is an n-GaN layer; 11 is a passivation layer; 12 is a main structure; 13 is a driving substrate; 14 is an n-electrode; 15 is a solder; 16 is a solder joint; 17 is a multi-faceted microconical mirror pattern layer; 18 is a sidewall metal reflective layer; and 19 is a p-electrode. DETAILED DESCRIPTION

[0045] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0046] Existing technologies such as patent CN201010617750.5 are methods for preparing patterned GaN substrates, which mainly prepare micro-nano patterns on the GaN surface of a GaN single crystal or a composite substrate, and can be used as a growth substrate to prepare high-performance GaN-based LEDs. When used for LEDs, since n-GaN needs to be grown again on the top of the substrate, the substrate and the epitaxial layer material will be the same, making the interface unclear, and it is impossible to achieve a good effect of reducing total reflection and increasing light extraction. At the same time, for Micro-LEDs, the structure in this patent cannot achieve a good enhancement effect. When used for flip-chips, the substrate needs to be peeled off, and the GaN pattern substrate cannot be well peeled off from the GaN-based material of the LED epitaxial layer, and the pattern layer cannot be well retained.

[0047] Another example is patent CN202010600418.1, which uses the micro-nano structure surface of AlN as the light extraction optimization layer, and the AlN surface after annealing is N-polar. Epitaxial layer growth and light extraction structure are carried out on the first surface and the second surface of the substrate respectively. However, since the substrate layer is very thick and has not been thinned, the heat dissipation effect is poor and the light will undergo a large total reflection between the epitaxial layer material and the substrate material. In addition, due to the absorption of the substrate, the light extraction structure on the first surface cannot actually achieve a better effect of enhancing light extraction.

[0048] Another example is patent CN201710024540.7, which is a method for preparing nanoscale patterned substrates using polymer microspheres. It can realize the preparation of micron- and nanoscale PSS sapphire substrates, which are used to improve the light extraction efficiency of GaN-based LEDs. However, in the actual preparation of flip-chip Micro-LED devices, thicker substrates will affect the light extraction, and the substrate needs to be peeled off and thinned. At this time, the PSS sapphire substrate is of limited use and the preparation process is relatively complicated.

[0049] Based on this, the present invention provides a method for preparing a micro light emitting diode based on a multi-faceted micro-cone mirror, which can increase the surface light extraction efficiency and the surface light output ratio, which is described in detail below.

[0050] like Figure 1 As shown, Figure 1 : is a schematic flow chart of a method for preparing a micro-light emitting diode provided by the present invention. The method for preparing a micro-light emitting diode with high surface light extraction efficiency of the present invention specifically comprises the following steps: S1. Preparation of LED epitaxial wafers The preparation of LED epitaxial wafers includes: S11. Provide a substrate structure, and sequentially prepare an n-GaN layer, a stress release layer, a quantum well layer, an electron blocking layer, and a p-GaN layer on the substrate structure by a metal-organic chemical vapor deposition (MOCVD) method to obtain a first epitaxial wafer.

[0051] S12, processing the first epitaxial wafer to obtain an LED epitaxial wafer.

[0052] Specifically include: S121, cleaning the first epitaxial wafer.

[0053] S122. Prepare a transparent conductive layer such as ITO on the p-GaN layer to obtain a second epitaxial wafer; wherein the second epitaxial wafer includes a stacked substrate structure, an n-GaN layer, a stress release layer, a quantum well layer, an electron blocking layer, a p-GaN layer and a transparent conductive layer.

[0054] S123, etching starts from the transparent conductive layer until the n-GaN layer is exposed, thereby obtaining a plurality of mesa structures.

[0055] S124. A passivation layer made of SiO2 is deposited on the sidewalls of the mesa structure, the upper surface of the mesa structure, and between two adjacent mesas using a plasma enhanced chemical vapor deposition (PECVD) method, with a deposition thickness of 50-300 nm.

[0056] S125, etching the passivation layer with BOE etching solution to form an n-electrode window, and preparing an n-electrode made of Ti / Al / Ti / Au in the n-electrode window by electron beam evaporation to form a first LED epitaxial structure; wherein the n-electrode is in contact with the n-GaN layer.

[0057] S126, performing annealing treatment on the first LED epitaxial structure to obtain a second LED epitaxial structure.

[0058] S127, etching the passivation layer in the second LED epitaxial structure to form a p-electrode window, and preparing a p-electrode in the p-electrode window to obtain a third LED epitaxial structure; wherein the p-electrode is in contact with the transparent conductive layer.

[0059] S128, bonding the third LED epitaxial structure to the driving substrate to obtain a fourth LED epitaxial structure.

[0060] S129, thinning or peeling off the fourth LED epitaxial structure to obtain an LED epitaxial wafer.

[0061] Preferably, the above steps also include the step of depositing a sidewall metal reflective layer after depositing the passivation layer. The material of the sidewall metal reflective layer can be metal materials such as Au, Al or Ag; the sidewall metal reflective layer is arranged on the outside of the stress release layer, the quantum well layer, the electron blocking layer and the p-GaN layer side passivation layer. The sidewall metal reflective layer is used to reflect the light from the side wall back. It cooperates with the multi-faceted micro-conical mirror pattern layer to enable more light to be emitted from the surface, thereby better improving the surface light output efficiency and surface light output ratio of the micro light emitting diode.

[0062] In some embodiments, the substrate structure includes a stacked heterogeneous substrate (such as sapphire) and a u-GaN layer, and the fourth LED epitaxial structure is thinned or peeled off to obtain an LED epitaxial wafer, including: peeling off the heterogeneous substrate to obtain an LED epitaxial wafer, wherein the GaN semiconductor layer is a u-GaN layer; or peeling off the heterogeneous substrate and the u-GaN layer to obtain an LED epitaxial wafer, wherein the GaN semiconductor layer is an n-GaN layer.

[0063] In other embodiments, the substrate structure is a u-GaN layer, and the fourth LED epitaxial structure is thinned or peeled off to obtain an LED epitaxial wafer, including: thinning the u-GaN layer to obtain an LED epitaxial wafer, wherein the GaN semiconductor layer is a homogeneous substrate after thinning; or thinning the u-GaN layer and the n-GaN layer to obtain an LED epitaxial wafer, wherein the GaN semiconductor layer is a thinned n-GaN layer.

[0064] That is, the substrate structure includes a u-GaN layer, and the first epitaxial wafer includes a stacked substrate structure, an n-GaN layer, a stress release layer, a quantum well layer, an electron blocking layer, and a p-GaN layer. If it is heterogeneous growth, laser stripping of the sapphire substrate is required; if it is homogeneous growth, the u-GaN layer needs to be thinned. After the substrate is processed, if the u-GaN layer is still retained on the LED epitaxial wafer, a dense multi-faceted micro-cone mirror pattern layer is subsequently etched on the u-GaN layer; if the u-GaN layer is completely removed, a dense multi-faceted micro-cone mirror pattern layer is subsequently etched on the n-GaN layer. The final LED epitaxial wafer includes a GaN semiconductor layer, a stress release layer, a quantum well layer, an electron blocking layer, and a p-GaN layer in sequence, and the GaN semiconductor layer is a thinned u-GaN layer or n-GaN layer.

[0065] S2. Annealing the N-side of the GaN semiconductor layer to convert GaN on the surface of the GaN semiconductor layer into GaO, thereby obtaining a GaN-GaO semiconductor layer.

[0066] S3, etching the N-side of the GaN-GaO semiconductor layer to obtain a multi-faceted micro-conical mirror pattern layer.

[0067] The N-side of the GaN-GaO semiconductor layer is coated with photoresist and baked, and then etched to obtain a multi-faceted micro-cone mirror pattern layer.

[0068] By etching a multi-faceted micro-conical mirror pattern layer with a special structure on the N-face of the GaN-GaO semiconductor layer, the surface light extraction efficiency and the surface light output ratio can be increased.

[0069] Furthermore, the multifaceted microconical mirror pattern layer includes a plurality of multifaceted microconical mirrors arranged regularly, and the bottom edges of adjacent multifaceted microconical mirrors are in contact with each other, that is, they are closely arranged; the bottom-to-height ratio of the multifaceted microconical mirrors is (1-2.5):1. Preferably, the bottom-to-height ratio of the multifaceted microconical mirrors is 1:1, 4:3, 5:3, 5:2; more preferably, the bottom-to-height ratio of the multifaceted microconical mirrors is 4:3. Figure 6 As shown in the figure, with the increase of the bottom-to-height ratio, the surface light extraction efficiency first increases and then decreases; the bottom-to-height ratio within this range can have a better surface light extraction efficiency and is more conducive to the preparation of actual products. A bottom-to-height ratio that is too large or too small will increase the difficulty of the preparation process.

[0070] Further, the multi-faceted microcone is a three-faceted microcone, a six-faceted microcone or a twelve-faceted microcone. When the multi-faceted microcone is a three-faceted microcone or a six-faceted microcone, the bottom edges of the multi-faceted microcone are completely fitted together without any gap; when the multi-faceted microcone is a twelve-faceted microcone, part of the bottom edges of the multi-faceted microcone are completely fitted together without any gap, and although the bottoms of the plurality of twelve-faceted microcones are closely arranged, there is a triangular gap in the middle of every three closely arranged twelve-faceted microcones.

[0071] Furthermore, the bottom surface size of the multifaceted microcone is 100-1000nm, preferably 200-1000nm. When the multifaceted microcone is a three-sided microcone, the height of the bottom triangle is 100-1000nm; when the multifaceted microcone is a six-sided microcone or a twelve-sided microcone, the distance between the bottom edge is 100-1000nm.

[0072] Preferably, the etching method is one selected from wet etching, photolithography, dry etching, and laser direct writing lithography.

[0073] Specifically, when the etching method is wet etching, the following steps are included: S31. Cleaning The GaN semiconductor layer is ultrasonically cleaned in acetone, alcohol and deionized water for 3-20 minutes to remove organic contamination on the surface. The purpose of cleaning is to allow the N-side of the GaN semiconductor layer to better contact the etching solution.

[0074] S32, remove surface liquid residue At room temperature, use a nitrogen gun to blow dry the N surface of the GaN semiconductor layer with N2 for 3-30 minutes; or use a N2 oven to dry the GaN semiconductor layer for 3-15 minutes at a temperature of 40-80°C.

[0075] S33, Annealing The N-side of the GaN semiconductor layer is rapidly annealed to convert the GaN compound on the surface of the GaN semiconductor layer into a GaO compound that is easier to etch, forming a GaN-GaO semiconductor layer and enhancing the corrosion effect of the solution. The process conditions of the annealing treatment include: a temperature of 400-600°C, an oxygen atmosphere, and a treatment time of 5-20 minutes.

[0076] S34, wet etching In one embodiment, a wet etching process is performed on the N-side of the GaN-GaO semiconductor layer, specifically as follows: Under the condition of a temperature of 80-120°C (for example, 80°C, 85°C, 90°C, 95°C, 100°C, 105°C, 110°C, 115°C or 120°C), the GaN-GaO semiconductor layer is placed in an etching solution and heated for 10-40 minutes (for example, 10 minutes, 15 minutes, 20 minutes, 25 minutes, 30 minutes, 35 minutes or 40 minutes) to obtain closely arranged six-sided micro-conical mirrors on the N-face of the GaN-GaO semiconductor layer, and the six faces of each six-sided micro-conical mirror are all {10-11} crystal planes.

[0077] Further, the etching liquid is a mixture of ammonia water, H2O2 and H2O, and the volume ratio is ammonia water: H2O2: H2O = 1: (0.5-1.5): (4-6), for example: 1:0.5:4, 1:1:4, 1:1.5:4, 1:0.5:5, 1:1:5, 1:1.5:5, 1:0.5:6, 1:1:6 or 1:1.5:6; preferably, the volume ratio of the substances in the etching liquid is ammonia water: H2O2: H2O = 1:1:5, the ammonia water is an ammonia solution with a mass percentage of 25%, and the concentration of the H2O2 solution is 30%.

[0078] In another embodiment, the N-side of the GaN-GaO semiconductor layer is subjected to a wet etching process as follows: Under the condition of a temperature of 80-120°C (for example, 80°C, 85°C, 90°C, 95°C, 100°C, 105°C, 110°C, 115°C or 120°C), the GaN-GaO semiconductor layer is placed in an etching solution and heated for 10-30 minutes (for example, 10 minutes, 13 minutes, 15 minutes, 17 minutes, 20 minutes, 23 minutes, 25 minutes, 27 minutes or 30 minutes) to obtain closely arranged six-sided micro-conical mirrors on the N-face of the GaN-GaO semiconductor layer, and the six faces of each six-sided micro-conical mirror are all {10-1-1} crystal planes.

[0079] Further, the etching liquid is a mixture of KOH solution and water, and the volume ratio is KOH solution: H2O=1:4-6, for example: 1:4, 1:4.2, 1:4.4, 1:4.6, 1:4.8, 1:5, 1:5.2, 1:5.4, 1:5.6, 1:5.8 or 1:6; preferably, the volume ratio of the substances in the etching liquid is KOH solution: H2O=1:5. The KOH solution is a solution with a concentration of 0.01 mol / L.

[0080] In other embodiments, the N-side of the GaN-GaO semiconductor layer is subjected to a wet etching process, specifically as follows: Under the condition of a temperature of 80-120°C (for example, 80°C, 85°C, 90°C, 95°C, 100°C, 105°C, 110°C, 115°C or 120°C), the GaN-GaO semiconductor layer is placed in an etching solution and heated for 10-40 minutes (for example, 10 minutes, 15 minutes, 20 minutes, 25 minutes, 30 minutes, 35 minutes or 40 minutes) to obtain closely arranged twelve-sided micro-conical mirrors on the N-face of the GaN-GaO semiconductor layer, wherein six faces of each of the twelve-sided micro-conical mirrors are {20-2-3} crystal planes, and the remaining six faces are {22-4-5} crystal planes, and the two are alternately distributed.

[0081] Further, the etching liquid is H3PO4 solution. Alternatively, the etching liquid is a mixture of H3PO4 solution and water, with a volume ratio of H3PO4 solution: H2O = 1: (16-128), for example: 1:16, 1:26, 1:32, 1:36, 1:46, 1:56, 1:64, 1:66, 1:76, 1:86, 1:96, 1:106, 1:116, 1:122 or 1:128; preferably, the volume ratio of the substances in the etching liquid is H3PO4 solution: H2O = 1:16, 1:32, 1:64 or 1:128, wherein the H3PO4 solution is a solution with a concentration of 0.2 mol / L.

[0082] After the etching is completed, organic cleaning is performed to remove the photoresist, thereby obtaining a micro light emitting diode with a multi-faceted micro-conical mirror pattern layer.

[0083] The size of the micro light emitting diode includes but is not limited to 10 μm, and can be 100 μm to infinitely small.

[0084] The micro-light emitting diode prepared by the above method includes a multi-faceted micro-conical mirror pattern layer, an epitaxial layer, an electrode and a driving substrate in sequence, which can effectively improve the surface light extraction efficiency and surface light output ratio of the micro-light emitting diode. Among them, the epitaxial layer includes a GaN-GaO semiconductor layer (n-GaN layer or a stacked u-GaN layer and n-GaN layer), a stress release layer, a quantum well layer, an electron blocking layer and a p-GaN layer in sequence, and the multi-faceted micro-conical mirror pattern layer is arranged on the GaN-GaO semiconductor layer, and the p-GaN layer has a p-electrode extending toward the driving substrate, and the semiconductor layer has an n-electrode extending toward the driving substrate, and the driving substrate has solder joints corresponding to the p-electrode and the n-electrode, and the p-electrode and the n-electrode are bonded to the solder joints by solder. The bottom surface of the GaN-GaO semiconductor layer and the sides of the stress release layer, the quantum well layer, the electron blocking layer and the p-GaN layer have a passivation layer.

[0085] The above etching step needs to control the solution ratio, water bath temperature and time according to the required multi-faceted micro-conical mirror pattern layer structure. When other methods such as dry etching are used for etching, the corresponding shape is prepared by bombarding the GaN surface with Cl2 or other gases, and the etching gas ratio, flow rate, time, etc. are adjusted as needed for control. Example 1

[0086] The etching method of the micro light emitting diode in this embodiment is wet etching, which includes the following steps: S31. Cleaning The GaN semiconductor layer was ultrasonically cleaned in acetone, alcohol and deionized water for 20 minutes to remove organic contamination on the surface. The purpose of cleaning is to allow the N-side of the GaN semiconductor layer to better contact the etching solution.

[0087] S32, remove surface liquid residue The N surface of the GaN semiconductor layer was blown dry with N2 using a nitrogen gun at room temperature for 30 minutes.

[0088] S33, Annealing The N-side of the GaN semiconductor layer is rapidly annealed to convert the GaN compound on the surface of the GaN semiconductor layer into a GaO compound that is easier to etch, forming a GaN-GaO semiconductor layer and enhancing the corrosion effect of the solution. The process conditions of the annealing treatment include: a temperature of 500°C, an oxygen atmosphere, and a treatment time of 20 minutes.

[0089] S34, wet etching At a temperature of 100°C, the GaN-GaO semiconductor layer is placed in an etching solution and heated for 30 minutes to obtain closely arranged six-sided micro-cones on the N surface of the GaN-GaO semiconductor layer. The six faces of each six-sided micro-cone are all of the same crystal plane family {10-11}S crystal plane. The bottom edges of multiple six-sided micro-cones are completely fitted together without any gaps.

[0090] The etching solution is a mixture of ammonia water, H2O2 and H2O, with a volume ratio of ammonia water: H2O2: H2O = 1:1:5, the ammonia water is a 25% ammonia solution by mass, and the concentration of the H2O2 solution is 30%. Example 2

[0091] The wet etching of this embodiment is different from that of Embodiment 1 in that step S32 and step S34 are different.

[0092] In step S32 of the present embodiment, a N2 oven is used to dry the whole wafer for 10 minutes at a temperature of 60°C.

[0093] The wet etching step of step S34 in this embodiment is specifically as follows: At a temperature of 100°C, the GaN-GaO semiconductor layer is placed in an etching solution and heated for 30 minutes to obtain closely arranged six-sided micro-cones on the N surface of the GaN-GaO semiconductor layer. The six faces of each six-sided micro-cone are all {10-1-1} crystal planes. The bottom edges of multiple six-sided micro-cones are completely fitted together without any gaps.

[0094] The etching solution is a mixture of KOH solution and water, and the volume ratio of substances in the etching solution is KOH solution: H2O=1:5, wherein the KOH solution has a concentration of 0.01 mol / L. Example 3

[0095] The wet etching of this embodiment is different from that of Embodiment 1 in that step S34 is different. The specific steps of the wet etching of step S34 of this embodiment are as follows: Under the condition of 100°C, the GaN-GaO semiconductor layer is placed in an etching solution and heated for 30 minutes to obtain closely arranged twelve-sided micro-cone mirrors on the N surface of the GaN-GaO semiconductor layer. Six faces of each twelve-sided micro-cone mirror are {20-2-3} crystal planes, and the remaining six faces are {22-4-5} crystal planes, and the two are alternately distributed. The bottoms of multiple twelve-sided micro-cone mirrors are closely arranged, and some bottom edges are completely fitted without gaps.

[0096] The etching liquid is a mixture of H3PO4 solution and water, and the volume ratio of substances in the etching liquid is H3PO4 solution: H2O=1:16, wherein the H3PO4 solution has a concentration of 0.2 mol / L. Example 4

[0097] like Figure 1-2 As shown, the method for preparing the micro light emitting diode of this embodiment specifically includes the following steps: S1. Preparation of LED epitaxial wafers The substrate structure is a u-GaN layer, and the preparation of LED epitaxial wafers includes: S11, growing a first epitaxial wafer on the substrate structure by a metal organic compound chemical vapor deposition method. The first epitaxial wafer includes, from bottom to top, a u-GaN layer, an n-GaN layer 10, a stress release layer, a quantum well layer, an electron blocking layer and a p-GaN layer.

[0098] S12, processing the first epitaxial wafer to obtain an LED epitaxial wafer, that is, using the first epitaxial wafer to prepare a Micro-LED flip chip, including LED epitaxial wafer cleaning, ITO film deposition, table etching, passivation layer 11 deposition, n-electrode 14 preparation, rapid annealing (high temperature annealing to form ohmic contact), p-electrode 19 preparation, thermal compression bonding with the drive substrate 13, and substrate structure processing. The details are as follows: S121, cleaning the first epitaxial wafer.

[0099] S122. Prepare a transparent conductive layer such as ITO on the p-GaN layer to obtain a second epitaxial wafer; wherein the second epitaxial wafer includes a stacked substrate structure, an n-GaN layer 10, a stress release layer, a quantum well layer, an electron blocking layer, a p-GaN layer and a transparent conductive layer.

[0100] S123 , etching is started from the transparent conductive layer until the n-GaN layer 10 is exposed, thereby obtaining a plurality of mesa structures.

[0101] S124, using PECVD to deposit a passivation layer 11 made of SiO2 on the sidewalls of the mesa structure, the upper surface of the mesa structure, and between two adjacent mesas, with a deposition thickness of 200 nm.

[0102] S125, using BOE etching solution to etch the passivation layer 11 to form an n-electrode 14 window, and using electron beam evaporation to prepare an n-electrode 14 made of Ti / Al / Ti / Au in the n-electrode 14 window to form a first LED epitaxial structure; wherein the n-electrode 14 is in contact with the n-GaN layer 10.

[0103] S126, performing annealing treatment on the first LED epitaxial structure to obtain a second LED epitaxial structure.

[0104] S127 , etching the passivation layer 11 in the second LED epitaxial structure to form a p-electrode window, and preparing a p-electrode 19 in the p-electrode window to obtain a third LED epitaxial structure; wherein the p-electrode 19 is in contact with the transparent conductive layer.

[0105] S128 , bonding the third LED epitaxial structure to the driving substrate 13 to obtain a fourth LED epitaxial structure.

[0106] S129, thinning the u-GaN layer of the fourth LED epitaxial structure to obtain an LED epitaxial wafer.

[0107] S2. Annealing the N-side of the GaN semiconductor layer to convert GaN on the surface of the GaN semiconductor layer into GaO, thereby obtaining a GaN-GaO semiconductor layer.

[0108] S3 , coating the N-side of the GaN—GaO semiconductor layer with photoresist and etching the layer to obtain a multi-faceted micro-conical mirror pattern layer 17 .

[0109] After the etching is completed, organic cleaning is performed to remove the photoresist, thereby obtaining a micro light emitting diode having a multi-faceted micro-conical mirror pattern layer 17 .

[0110] It can be understood that the semiconductor layer on the top of the chip is etched according to the etching steps in the above embodiment to obtain a dense multi-faceted micro-conical mirror pattern layer 17, that is, a plurality of multi-faceted micro-conical mirrors are closely arranged, which will not be repeated here.

[0111] like Figure 2 As shown, the micro-LED prepared by the above method includes a multi-faceted micro-conical mirror pattern layer 17, an epitaxial layer, an electrode and a driving substrate 13 in sequence, which can effectively improve the surface light extraction efficiency of the micro-LED.

[0112] Furthermore, the epitaxial layer includes an n-GaN layer 10 and a main structure 12 (including a stacked stress release layer, a quantum well layer, an electron blocking layer and a p-GaN layer) in sequence, a multi-faceted microconical mirror pattern layer 17 is arranged on the u-GaN layer, a p-electrode 19 extending toward the drive substrate 13 is provided on the p-GaN layer, an n-electrode 14 extending toward the drive substrate 13 is provided on the semiconductor layer, and solder joints 16 corresponding to the p-electrode 19 and the n-electrode 14 are provided on the drive substrate 13, and the p-electrode 19 and the n-electrode 14 are bonded to the corresponding solder joints 16 respectively through solder 15. A passivation layer 11 is provided on the bottom surface of the u-GaN layer and the side surfaces of the n-GaN layer 10, the stress release layer, the quantum well layer, the electron blocking layer and the p-GaN layer. Example 5

[0113] like Figure 3 As shown, the method for preparing a micro-light-emitting diode in this embodiment is different from that in Embodiment 4 in that, in this embodiment, there is a step of depositing a metal reflective layer on the side wall of the Micro-LED between the deposition of the passivation layer 11 (step S124) and the preparation of the n-electrode 14 (step S125), so as to form a side wall metal reflective layer 18 on the outside of the passivation layer 11 on the side of the stress release layer, the quantum well layer, the electron blocking layer and the p-GaN layer. The other steps are basically the same as those in Embodiment 4 and will not be repeated here.

[0114] Tests and Results According to the above-mentioned embodiment 1, after wet chemical etching, the N-side of the GaN-GaO semiconductor layer will appear as follows: Figure 4-5 The dense six-sided micro-cone mirror pattern layer shown in the figure, wherein T is the distance between the bottom surface and the edge of the six-sided micro-cone mirror, and H is the height of the six-sided micro-cone mirror. The size of different structures can be achieved by adjusting the solution ratio and the water bath temperature and time.

[0115] (1) Base-to-height ratio Figure 6 LSE diagram of the six-sided micro-conical mirror structure of a 10μm micro-light-emitting diode at different base:height ratios.

[0116] Figure 6 It shows that compared with the LSE (6.5%) of the structure without surface micro-cones, the LSE of the structure with six-sided micro-cones is more than twice the original. When the bottom: height = 4:3, the best LSE result can be achieved, which is 15.5%, which is 2.38 times that of the structure without surface micro-cones.

[0117] (2) Microconical mirror structures with different numbers of faces According to the aforementioned embodiments 1 to 3, micro-conical mirror structures with different numbers of faces are formed on the semiconductor layer. Figure 7 The N-side of the GaN-GaO semiconductor layer of the 10μm micro-light-emitting diode corresponds to the LSE of a three-sided micro-cone mirror, a six-sided micro-cone mirror, and a twelve-sided micro-cone mirror structure, and the base-to-height ratio of the multi-sided micro-cone mirror is 4:3. Figure 7 It shows that the three-sided / six-sided / twelve-sided micro-cone mirror structures have different improvement effects on LSE, among which the six-sided prism mirror structure can achieve the best improvement effect.

[0118] (3) Bottom size of microcone Taking the six-sided microconical mirror structure as an example, Figure 8 The surface light output efficiency (LSE) and surface light output ratio (S) of the six-sided microconical mirror pattern layer of a 10μm micro-light-emitting diode with different microconical mirror bottom surface sizes T (100-1200nm). Figure 8 It shows that the 100nm structure has no positive effect on LSE, but at 200-600nm, LSE increases with the increase of the micro-nano structure. The 600-800nm ​​structure remains relatively stable with slight fluctuations. The 1000nm structure achieves the best LSE and S effects. At this time, S can reach 47%, which is 2.14 times that of the structure without micro-conical mirror (S=22%), and the improvement effect is obvious.

[0119] (4) Photoluminescence spectrum Fig. 9 The photoluminescence spectrum of a homogeneous micro-LED with a size of 10μm before and after wet etching. The horizontal axis is wavelength (Wavelength) and the vertical axis is luminous intensity (Intensity). In order to reduce the error, multiple tests were carried out and the average value of the luminous intensity was taken. Fig. 9 It shows that the luminous intensity of the micro-light-emitting diode with a six-sided micro-conical mirror structure is significantly improved, and its luminous intensity is 146.08% of that without the six-sided micro-conical mirror structure. The optimization effect is more obvious, and the overall width of the spectrum becomes wider, but the half-height width does not change.

[0120] There are great differences between the concepts and goals of surface light extraction efficiency and overall light extraction efficiency. The method for preparing a micro-light emitting diode with high surface light extraction efficiency of the present invention improves the surface light extraction efficiency and surface light extraction ratio of a flip-chip Micro-LED device through a dense micro-nano structured multi-faceted micro-cone mirror pattern layer. It is applicable to micron-scale Micro-LEDs and does not limit the type of substrate. All LED epitaxial wafer structures are applicable, including but not limited to homogeneous (GaN) and heterogeneous (sapphire, Si, etc.) substrates. Homogeneous substrates are thinned and heterogeneous substrates are peeled off. At the same time, the multi-faceted micro-cone mirror pattern layer in the above-mentioned embodiments is formed after etching on the semiconductor. In other embodiments, a dielectric film such as ZnO, SiO2, Al2O3, etc. can also be formed on the semiconductor layer by evaporation, deposition, etc., and then a multi-faceted micro-cone mirror pattern layer is formed on the dielectric film by the above-mentioned etching method.

[0121] The preparation method of the micro-LED of the present invention can be used to improve the surface light extraction efficiency and surface light output ratio of the micro-LED, and can solve the problem of low surface light extraction efficiency of the Micro-LED. The surface light extraction efficiency of the micro-LED can be improved by using a multi-faceted micro-conical mirror pattern layer closely arranged on the top of the micro-LED, and multi-faceted micro-conical mirror pattern layers of different structures and sizes have different effects on improving the surface light extraction efficiency and surface light output ratio.

[0122] The above embodiments are only for illustrating the technical concept and features of the present invention, and their purpose is to enable people familiar with this technology to understand the contents of the present invention and implement them accordingly. They cannot be used to limit the protection scope of the present invention. Any equivalent changes or modifications made according to the spirit of the present invention should be included in the protection scope of the present invention.

[0123] The endpoints and any values ​​of the ranges disclosed in this article are not limited to the precise ranges or values, and these ranges or values ​​should be understood to include values ​​close to these ranges or values. For numerical ranges, the endpoint values ​​of each range, the endpoint values ​​of each range and the individual point values, and the individual point values ​​can be combined with each other to obtain one or more new numerical ranges, which should be considered as specifically disclosed in this article.

Claims

1. A method for preparing a micro light emitting diode with high surface light extraction efficiency, characterized in that: The preparation method comprises the following steps: An LED epitaxial wafer is provided; wherein the LED epitaxial wafer comprises a stacked GaN semiconductor layer, a quantum well layer and a p-GaN layer; Annealing the N-side of the GaN semiconductor layer to convert GaN on the surface of the GaN semiconductor layer into GaO to obtain a GaN-GaO semiconductor layer; Etching the N-side of the GaN-GaO semiconductor layer to obtain a multi-faceted micro-conical mirror pattern layer; The multifaceted microconical mirror pattern layer includes a plurality of regularly arranged multifaceted microconical mirrors, and the bottom edges of adjacent multifaceted microconical mirrors are in contact with each other; the bottom-to-height ratio of the multifaceted microconical mirrors is (1-2.5):

1.

2. The preparation method according to claim 1, characterized in that: The multi-faceted micro-cone mirror is a three-faceted micro-cone mirror, a six-faceted micro-cone mirror or a twelve-faceted micro-cone mirror.

3. The preparation method according to claim 2, characterized in that: The etching method is wet etching, and the steps of wet etching are as follows: Under the condition of temperature of 80-120° C., placing the GaN-GaO semiconductor layer in an etching solution and heating for 10-40 minutes, so as to obtain closely arranged six-sided micro-conical mirrors on the N-face of the GaN-GaO semiconductor layer, wherein the six faces of each six-sided micro-conical mirror are all {10-11} crystal faces; The etching solution is a mixed solution of ammonia water, H2O2 and H2O, and the volume ratio is ammonia water: H2O2: H2O = 1: (0.5-1.5): (4-6).

4. The preparation method according to claim 2, characterized in that: The etching method is wet etching, and the steps of wet etching are as follows: Under the condition of temperature of 80-120° C., placing the GaN-GaO semiconductor layer in an etching solution and heating for 10-30 minutes, so as to obtain closely arranged six-sided micro-conical mirrors on the N-face of the GaN-GaO semiconductor layer, wherein the six faces of each six-sided micro-conical mirror are all {10-1-1} crystal planes; The etching solution is a mixture of KOH solution and water, and the volume ratio is KOH solution: H2O=1:4-6.

5. The preparation method according to claim 2, characterized in that: The etching method is wet etching, and the steps of wet etching are as follows: Under the condition of temperature of 80-120° C., placing the GaN-GaO semiconductor layer in an etching solution and heating for 10-40 minutes, so as to obtain closely arranged twelve-sided micro-conical mirrors on the N-face of the GaN-GaO semiconductor layer, wherein six faces of each twelve-sided micro-conical mirror are {20-2-3} crystal faces, and the remaining six faces are {22-4-5} crystal faces, and the two are alternately distributed; Wherein, the etching liquid is H3PO4 solution, or the etching liquid is a mixture of H3PO4 solution and water.

6. The preparation method according to claim 1, characterized in that: The process conditions of the annealing treatment include: a temperature of 400-600° C., an oxygen atmosphere, or a treatment time of 5-20 min; and / or, The steps also include pre-treatment before annealing: Cleaning the GaN semiconductor layer; The N surface of the GaN semiconductor layer is blown dry with nitrogen at room temperature for 3-30 minutes; or the GaN semiconductor layer is dried in a nitrogen oven, wherein the process conditions of the drying treatment include a drying time of 3-15 minutes or a drying temperature of 40-80°C.

7. The preparation method according to claim 1, characterized in that: The preparation of the LED epitaxial wafer includes: Providing a substrate structure, and sequentially preparing an n-GaN layer, a stress release layer, the quantum well layer, an electron blocking layer and the p-GaN layer on the substrate structure to obtain a first epitaxial wafer; Processing the first epitaxial wafer to obtain the LED epitaxial wafer; Before the step of annealing the N-side of the GaN semiconductor layer, the method comprises: Coating photoresist on the surface of the LED epitaxial wafer and baking it; After the step of annealing the N-side of the GaN semiconductor layer, the method further comprises: The photoresist is removed to obtain the micro light emitting diode.

8. The preparation method according to claim 7, characterized in that: The step of processing the first epitaxial wafer to obtain the LED epitaxial wafer comprises: Cleaning the first epitaxial wafer; Preparing a transparent conductive layer on the p-GaN layer to obtain a second epitaxial wafer; wherein the second epitaxial wafer comprises the substrate structure, the n-GaN layer, the stress release layer, the quantum well layer, the electron blocking layer, the p-GaN layer and the transparent conductive layer which are stacked; Etching from the transparent conductive layer until the n-GaN layer is exposed to obtain a plurality of mesa structures; Depositing a passivation layer on the sidewall of the mesa structure, the upper surface of the mesa structure, and between two adjacent mesas; The passivation layer is etched to form an n-electrode window, and an n-electrode is prepared in the n-electrode window to form a first LED epitaxial structure; wherein the n-electrode is in contact with the n-GaN layer; Performing annealing treatment on the first LED epitaxial structure to obtain a second LED epitaxial structure; The passivation layer in the second LED epitaxial structure is etched to form a p-electrode window, and a p-electrode is prepared in the p-electrode window to obtain a third LED epitaxial structure; wherein the p-electrode is in contact with the transparent conductive layer; Bonding the third LED epitaxial structure to a driving substrate to obtain a fourth LED epitaxial structure; The fourth LED epitaxial structure is thinned or peeled off to obtain the LED epitaxial wafer.

9. The preparation method according to claim 8, characterized in that: The substrate structure includes a stacked heterogeneous substrate and a u-GaN layer, and the thinning or peeling off of the fourth LED epitaxial structure to obtain the LED epitaxial wafer includes: peeling off the heterogeneous substrate to obtain the LED epitaxial wafer, wherein the GaN semiconductor layer is the u-GaN layer; or peeling off the heterogeneous substrate and the u-GaN layer to obtain the LED epitaxial wafer, wherein the GaN semiconductor layer is the n-GaN layer; Alternatively, the substrate structure is a u-GaN layer, and the thinning or peeling off of the fourth LED epitaxial structure to obtain the LED epitaxial wafer includes: thinning the u-GaN layer to obtain the LED epitaxial wafer, wherein the GaN semiconductor layer is the thinned u-GaN layer; or thinning the u-GaN layer and the n-GaN layer to obtain the LED epitaxial wafer, wherein the GaN semiconductor layer is the thinned n-GaN layer.

10. A micro light emitting diode, wherein the micro light emitting diode is prepared by the preparation method according to any one of claims 1 to 9.

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