Power management system

Abstract

The invention relates to a power management system which comprises an awakening module, a super capacitor, an MCU module and a power supply module. The input end of the awakening module is connected to the positive electrode end of the super capacitor, and the output end of the awakening module is connected to the enabling input end of the MCU module and the enabling input end of the power supply module; the wake-up output end of the MCU module is connected to the wake-up input end of the power supply module; the super capacitor is connected in parallel with the load end; the super capacitor is used for discharging when a load is connected to the load end, and the voltage of the positive end is converted from a high level to a low level; the wake-up module is used for outputting an enable signal to wake up the MCU module and activate the power supply module when the voltage of the positive electrode end of the super capacitor is detected to be low level; and the MCU module is used for outputting a wake-up signal to the power supply module after waking up and waking up the activated power supply module. The energy consumption of the power management system can be reduced.

Description

Technical Field

[0001] The present application relates to the technical field of automobile power supplies, and in particular to a power management system. Background Art

[0002] At present, in order to quickly respond to the large current of the external load at the moment of starting the power supply, there are two types of battery management systems (BMS) used in lithium battery starting power supplies: BMS using low-side MOS switches and BMS using high-side MOS switches. Both solutions use the method of connecting supercapacitors in parallel at the battery end to provide the large current required for battery starting.

[0003] However, in a BMS using a low-side MOS switch, the load side and the battery side do not share a common ground, and there will be a problem of excessive voltage difference between the supercapacitor voltage and the battery voltage, resulting in the risk of overcurrent in the system circuit. Charging the supercapacitor using an additional capacitor charging circuit instead of the battery can reduce this risk, but it will increase the cost and circuit complexity. The BMS using a high-side MOS switch uses a solution of connecting a supercapacitor in parallel at the load side, which also has the problem of excessive voltage difference between the supercapacitor voltage and the battery voltage. The voltage of the supercapacitor needs to be monitored, resulting in excessive power consumption of the entire BMS system. Summary of the invention

[0004] In order to solve the deficiencies in the related art, the purpose of this application is to provide a power management system that can reduce the energy consumption of the power management system and improve the security of the power management system.

[0005] The present application provides a power management system, including a wake-up module, a super capacitor, an MCU module and a power supply module; The input end of the wake-up module is connected to the positive end of the super capacitor, and the output end of the wake-up module is respectively connected to the enable input end of the MCU module and the enable input end of the power supply module; the wake-up output end of the MCU module is connected to the wake-up input end of the power supply module; the super capacitor and the load end are connected in parallel; The supercapacitor is used to discharge when the load end is connected to a load, and the voltage at the positive end is converted from a high level to a low level; The wake-up module is used to output an enable signal to wake up the MCU module and activate the power supply module when detecting that the voltage at the positive terminal of the supercapacitor is at a low level; The MCU module is used to output a wake-up signal to the power supply module after waking up, so as to wake up the activated power supply module.

[0006] Through the above technical solution, the voltage detection of the supercapacitor can be realized when the system is dormant, and the system does not need to continuously monitor the voltage of the supercapacitor, which can reduce the energy consumption of the system. By connecting the supercapacitor in parallel with the load end, the risk of excessive voltage difference between the supercapacitor and the power supply module can be reduced, thereby improving system safety.

[0007] Preferably, the wake-up module includes a comparison operator, a first voltage divider circuit, a second voltage divider circuit and a third voltage divider circuit; The first end of the first voltage-dividing circuit is connected to the positive terminal of the supercapacitor, the second end of the first voltage-dividing circuit is connected to the target input terminal of the comparison operator, and the third end of the first voltage-dividing circuit is grounded; the first end of the second voltage-dividing circuit is connected to the reference voltage, the second end of the second voltage-dividing circuit is connected to the reference input terminal of the comparison operator, and the third end of the second voltage-dividing circuit is grounded; the first end of the third voltage-dividing circuit is connected to the working voltage of the comparison operator, the second end of the third voltage-dividing circuit is connected to the enable input terminal of the MCU module and the enable input terminal of the power supply module, and the third end of the third voltage-dividing circuit is connected to the output terminal of the comparison operator.

[0008] Through the above technical solution, the voltage detection of the supercapacitor can be realized by using a wake-up module with a simple circuit structure, which can reduce the circuit complexity of the system.

[0009] Preferably, the first voltage divider circuit includes a first resistor and a second resistor; One end of the first resistor is connected to the positive terminal of the super capacitor, and the other end of the first resistor is respectively connected to one end of the second resistor and the target input terminal of the comparison operator; the other end of the second resistor is grounded.

[0010] Through the above technical solution, the first voltage divider circuit can be simply implemented, reducing the complexity of the system circuit.

[0011] Preferably, the second voltage divider circuit includes a third resistor and a fourth resistor; One end of the third resistor is connected to the reference voltage, and the other end of the third resistor is respectively connected to one end of the fourth resistor and the reference input end of the comparison operator; the other end of the fourth resistor is grounded.

[0012] Through the above technical solution, the second voltage divider circuit can be simply implemented, reducing the complexity of the system circuit.

[0013] Preferably, the third voltage-dividing circuit includes a fifth resistor and a sixth resistor; One end of the fifth resistor is connected to the working voltage of the comparison operator, and the other end of the fifth resistor is respectively connected to the output end of the comparison operator and one end of the sixth resistor; the other end of the sixth resistor is respectively connected to the enable input end of the MCU module and the enable input end of the power supply module.

[0014] Through the above technical solution, the third voltage divider circuit can be simply implemented, reducing the complexity of the system circuit.

[0015] Preferably, the system further comprises an electrical switch module; The positive terminal of the electric switch module is connected to the positive terminal of the supercapacitor, the negative terminal of the electric switch module is connected to the positive terminal of the power supply module, and the input terminal of the electric switch module is connected to the switch signal output terminal of the MCU module; The MCU module is further used to send a switch closing signal to the electrical switch module after waking up; The electric switch module is used to control the electric switch to close when receiving the switch closing signal, so that the power supply module forms a path with the charging circuit of the supercapacitor, and the power supply module forms a path with the system circuit of the load; The power supply module is used to charge the super capacitor after the charging circuit is connected, and to supply power to the load after the system circuit is connected.

[0016] Through the above technical solution, the on-off of the system circuit and the charging circuit can be controlled by controlling the electric switch, so as to realize the effective management of the power management system.

[0017] Preferably, the system further comprises a voltage detection module: The input end of the voltage detection module is connected to the positive terminal of the super capacitor, and the output end of the voltage detection module is connected to the first voltage input end of the MCU module; The voltage detection module is used to detect the voltage of the positive terminal of the super capacitor, convert the voltage of the positive terminal of the super capacitor into a first voltage, and transmit the first voltage to the MCU module; The MCU module is used to restore the first voltage to the voltage of the positive terminal of the supercapacitor.

[0018] Through the above technical solution, the voltage detection of the super capacitor can be realized to reduce the excessive voltage difference between the super capacitor and the power supply module, thereby improving the safety of the power management system.

[0019] Preferably, the voltage detection module includes a seventh resistor, an eighth resistor and a ninth resistor; One end of the seventh resistor is connected to the positive terminal of the supercapacitor, and the other end of the seventh resistor is respectively connected to one end of the eighth resistor and one end of the ninth resistor; the other end of the eighth resistor is connected to the first voltage input terminal, and the other end of the ninth resistor is grounded.

[0020] Through the above technical solution, the voltage detection module can be simply implemented, reducing the complexity of the system circuit.

[0021] Preferably, the system comprises a tenth resistor; The tenth resistor is connected in series between the negative terminal of the super capacitor and the negative terminal of the load terminal; one end of the tenth resistor is connected to the second voltage input terminal of the MCU module, and the other end of the tenth resistor is connected to the third voltage input terminal of the MCU module; The tenth resistor is used to generate a second voltage and a third voltage at two ends respectively when the load end is connected to the load and the system loop path; The MCU module is also used to detect the second voltage and the third voltage, calculate the difference between the two, calculate the current of the system loop according to the resistance of the tenth resistor and the difference, and when the current of the system loop is less than a preset target current value, switch the wake-up signal to a sleep signal, transmit the sleep signal to the power supply module, and put the power supply module into sleep mode.

[0022] By detecting the circuit of the system loop through the voltage across the tenth resistor, not only is the circuit implementation simple, but the risk of overcurrent in the system loop can also be reduced, thereby improving the safety of the power management system.

[0023] Preferably, the wake-up module is further used to switch the enable signal to a disable signal when detecting that the voltage at the positive terminal of the supercapacitor is at a high level, and transmit the disable signal to the MCU module; The MCU module is further configured to send a switch disconnection signal to the electrical switch module when the current of the system loop is less than a preset target current value and the disable signal is received, and sleep after receiving a confirmation signal sent back by the electrical switch module; The electric switch module is further used to control the electric switch to be disconnected when receiving the switch disconnection signal.

[0024] Through the above technical solution, when no load is connected, the MCU module and the power supply module inside the power management system can be controlled to sleep, thereby reducing system power consumption.

[0025] In summary, the beneficial effects of this application are: 1. When the MCU module and power supply module of the power management system are in sleep mode, the supercapacitor voltage can be detected to reduce system energy consumption; 2. The circuit structure for realizing the wake-up module, voltage detection module and system loop current detection is simple and easy, which can reduce the circuit complexity of the system; 3. It can effectively detect the voltage of the supercapacitor and the current of the system loop, which can improve the safety of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 It is a schematic diagram of the system structure of a power management system provided by this application.

[0027] Figure 2 This is a schematic diagram of the module structure of a wake-up module provided in this application.

[0028] Figure 3 This is a schematic diagram of the circuit structure of a wake-up module provided in this application.

[0029] Figure 4 It is a system structure diagram of another power management system provided by the present application.

[0030] Figure 5 This is a system structure diagram of another power management system provided by the present application.

[0031] Figure 6 It is a circuit structure diagram of a voltage detection module provided in this application.

[0032] Figure 7 This is a schematic diagram of the system structure of another power management system provided by the present application. DETAILED DESCRIPTION

[0033] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application.

[0034] Reference Figure 1 , is a schematic diagram of the system structure of a power management system disclosed in the present application, including a super capacitor 101, a wake-up module 102, an MCU module 103 and a power supply module 104; The input end of the wake-up module 102 is connected to the positive end of the super capacitor 101, and the output end of the wake-up module 102 is respectively connected to the enable input end of the MCU module 103 and the enable input end of the power supply module 104; the wake-up output end of the MCU module 103 is connected to the wake-up input end of the power supply module 104; the super capacitor 101 and the load end are connected in parallel; The super capacitor 101 is used for discharging when the load end is connected to a load, and the voltage at the positive end is converted from a high level to a low level; The wake-up module 102 is used to output an enable signal to wake up the MCU module 103 and activate the power supply module 104 when detecting that the voltage at the positive terminal of the super capacitor 101 is at a low level; The MCU module 103 is used to output a wake-up signal to the power supply module 104 after waking up, so as to wake up the activated power supply module 104.

[0035] In the embodiment of the present application, the supercapacitor 101, the power supply module 104 and the load end are grounded together, so that the voltage at the positive end of the supercapacitor (positive electrode voltage) is the voltage of the supercapacitor, which can improve the accuracy and convenience of voltage detection of the supercapacitor.

[0036] In the embodiment of the present application, the wake-up module 102 detects the voltage of the supercapacitor 101, specifically, detects the voltage level of the supercapacitor 101. When the voltage of the supercapacitor 101 is at a high level, since the supercapacitor 101 is connected in parallel with the load end, it means that the load end of the power management system is not connected to the load at this time, and the signal output by the wake-up module 102 is a low level, that is, a disable signal. The low-level disable signal cannot wake up the MCU module 103 and activate the power supply module 104.

[0037] In the embodiment of the present application, the wake-up module 102 is used to wake up the MCU module 103, and wake up the power supply module 104 together with the awakened MCU module 103. Since the MCU module 103 and the power supply module 104 are the main modules of the power management system and are also important modules of the power management system, the wake-up module 102 can be said to be used to wake up the power management system.

[0038] In the embodiment of the present application, the working mode of the MCU module 103 includes a working state and a dormant state. When the MCU module 103 is in a working state, most or all of the electronic units in the MCU module 103 are in a running state, and can realize basic or all MCU functions and work normally. When the MCU module 103 is in a dormant state, a very small number of electronic units in the MCU module 103 are in a running state, realizing very few MCU functions. It can be understood that the energy consumption of the MCU module 103 when working in a working state is higher than the energy consumption when working in a dormant state. When the load end is not connected to a load, the MCU module 103 is in a low-power dormant state, which is conducive to reducing the energy consumption of the power management system. The MCU module 103 includes a plurality of general-purpose input / output ports (GPIO), which are used to communicate with external devices, modules or circuits. It can be understood that the enable input end of the MCU module 103 is a GPIO port, and the wake-up output end of the MCU module 103 is another GPIO port.

[0039] In an embodiment of the present application, the power supply module 104 includes a DC power supply and a power supply circuit. The DC power supply may be a battery or a battery pack, which is used to provide electrical energy to the load when the load end is connected to the load. The voltage of the DC power supply often does not meet the working voltage of the load, and the power supply circuit is required to convert the voltage of the battery to obtain a working voltage for the load. The working states of the power supply module 104 include three types: working state, activation state and sleep state. It can be understood that the power supply module 104 can work normally when it is in the working state, and the power consumption is high. The power supply module 104 cannot work normally when it is in the sleep state, and the power consumption is low. The activation state is a preparatory stage in the process of the power supply module 104 switching from the sleep state to the working state, and the power consumption is greater than the power consumption in the sleep state and less than the power consumption in the working state.

[0040] The working principle of the above technical solution is as follows: the supercapacitor 101 stores electric energy, and when the load end is not connected to a load, the voltage of the supercapacitor 101 is at a high level. The wake-up module 102 detects the high-level supercapacitor voltage and outputs a low-level disable signal. When the load end is connected to a load, since the supercapacitor 101 and the load are connected in parallel, a path is formed between the supercapacitor 101 and the load, and the supercapacitor 101 discharges the load. After the supercapacitor 101 is discharged, the voltage of the supercapacitor 101 changes from a high level to a low level. The wake-up module 102 detects the low-level supercapacitor voltage and outputs a high-level enable signal. The enable signal can enable the MCU module 103 to wake up the MCU module 103, and can also enable the power supply module 104 to activate the power supply module 104. The awakened MCU module 103 outputs the wake-up signal. The wake-up signal can wake up the power supply module 104 in an activated state.

[0041] Through the above technical solution, the voltage detection of the super capacitor 101 can be realized when the system is dormant, and the system does not need to continuously monitor the voltage of the super capacitor 101, which can reduce the energy consumption of the system. By connecting the super capacitor 101 in parallel with the load end, the risk of excessive voltage difference between the super capacitor 101 and the power supply module 104 can be reduced, thereby improving system safety.

[0042] In a specific embodiment, reference Figure 2 , is a schematic diagram of the module structure of a wake-up module provided in an embodiment of the present application, wherein the wake-up module 102 includes a comparison operator 201, a first voltage divider circuit 202, a second voltage divider circuit 203 and a third voltage divider circuit 204; The first end of the first voltage divider circuit 202 is connected to the positive terminal of the supercapacitor 101, the second end of the first voltage divider circuit 202 is connected to the target input terminal of the comparison operator 201, and the third end of the first voltage divider circuit 202 is grounded; the first end of the second voltage divider circuit 203 is connected to the reference voltage, the second end of the second voltage divider circuit 203 is connected to the reference input terminal of the comparison operator 201, and the third end of the second voltage divider circuit 203 is grounded; the first end of the third voltage divider circuit 204 is connected to the working voltage of the comparison operator 201, the second end of the third voltage divider circuit 204 is connected to the enable input terminal of the MCU module 103 and the enable input terminal of the power supply module 104, and the third end of the third voltage divider circuit 204 is connected to the output terminal of the comparison operator.

[0043] In a specific embodiment, the reference input terminal of the comparison operator 201 may be its in-phase amplification input terminal, and the target input terminal may be its inverting amplification input terminal.

[0044] In a specific embodiment, the first voltage-dividing circuit 202 , the second voltage-dividing circuit 203 , and the third voltage-dividing circuit 204 may be different resistance circuits.

[0045] In a specific embodiment, the impedance circuits may be different from each other and include capacitors and inductors.

[0046] Through the above technical solution, the voltage detection of the supercapacitor can be realized by using a wake-up module with a simple circuit structure, which can reduce the circuit complexity of the system.

[0047] In a specific embodiment, reference Figure 3 , is a schematic diagram of a circuit structure of a wake-up module provided in an embodiment of the present application, wherein the first voltage divider circuit 202 includes a first resistor 301 and a second resistor 302; One end of the first resistor 301 is connected to the positive terminal of the super capacitor 101, and the other end of the first resistor 301 is respectively connected to one end of the second resistor 302 and the target input terminal of the comparison operator 201; the other end of the second resistor 302 is grounded.

[0048] It can be understood that the voltage dividing function of the first voltage dividing circuit 202 can be realized by using a resistor circuit, and the circuit complexity is also simpler than that of an impedance circuit. Among them, the voltage dividing function is conducive to protecting the system circuit and improving the system safety.

[0049] Specifically, the supercapacitor voltage detected at the first end of the first voltage divider circuit 202 is recorded as , the resistance of the first resistor 301 is recorded as , the output of the second terminal is recorded as ,but The calculation formula is shown in Formula 1.

[0050] Formula 1 Through the above technical solution, the first voltage divider circuit 202 can be simply implemented, reducing the complexity of the system circuit.

[0051] like Figure 3 As shown, the second voltage divider circuit 203 includes a third resistor 303 and a fourth resistor 304; One end of the third resistor 303 is connected to the reference voltage, and the other end of the third resistor 303 is connected to one end of the fourth resistor 304 and the reference input end of the comparison operator 201 respectively; the other end of the fourth resistor 304 is grounded.

[0052] Specifically, the reference voltage is determined based on actual application requirements, such as 3.3V.

[0053] It can be understood that the voltage dividing function of the second voltage dividing circuit 203 can be realized by using a resistor circuit, and the circuit complexity is also simpler than that of an impedance circuit. Among them, the voltage dividing function is conducive to protecting the system circuit and improving the system safety.

[0054] Specifically, the reference voltage is recorded as , the resistance of the third resistor 303 is recorded as , the resistance of the fourth resistor 304 is recorded as , the output of the second end of the second voltage divider circuit 203 is recorded as ,but The calculation formula is shown in Formula 2.

[0055] Formula 2 Through the above technical solution, the second voltage divider circuit 203 can be simply implemented, reducing the complexity of the system circuit.

[0056] like Figure 3 As shown, the third voltage divider circuit 204 includes a fifth resistor 305 and a sixth resistor 306; One end of the fifth resistor 305 is connected to the working voltage of the comparator 201, and the other end of the fifth resistor 305 is respectively connected to the output end of the comparator 201 and one end of the sixth resistor 306; the other end of the sixth resistor 306 is respectively connected to the enable input end of the MCU module 103 and the enable input end of the power supply module 104.

[0057] It can be understood that the voltage dividing function of the third voltage dividing circuit 204 can be realized by using a resistor circuit, and the circuit complexity is also simpler than that of an impedance circuit. Among them, the voltage dividing function is conducive to protecting the system circuit and improving the system safety.

[0058] Specifically, the output of the comparison operator 201 is recorded as , the amplification factor is recorded as ,but The calculation formula can refer to Formula 3.

[0059] Formula 3 Specifically, the operating voltage of the comparison operator 201 is expressed as , the resistance of the fifth resistor 305 is recorded as , the resistance of the sixth resistor 306 is recorded as , the enable signal outputted from the second end of the third voltage divider circuit 204 is recorded as ,but The calculation formula of is shown in Formula 4.

[0060] Formula 4 Specifically, the restoration coefficient can be derived according to the above formulas 1 to 4, and the positive electrode voltage can be restored according to the restoration coefficient and the voltage of the enable signal.

[0061] It is understandable that the process of deriving the reduction coefficient will increase the complexity, so the voltage detection module 106 is subsequently used to detect the positive electrode voltage.

[0062] In a specific embodiment, it is not necessary to restore the positive electrode voltage, and it is only necessary to ensure that the enable signal is a high level signal.

[0063] Through the above technical solution, the third voltage divider circuit 204 can be simply implemented, reducing the complexity of the system circuit.

[0064] In a specific embodiment, reference Figure 4 , is a schematic diagram of the system structure of another power management system provided by the present application, wherein the system further includes an electric switch module 105; The positive terminal of the electric switch module 105 is connected to the positive terminal of the super capacitor 101, the negative terminal of the electric switch module 105 is connected to the positive terminal of the power supply module 104, and the input terminal of the electric switch module 105 is connected to the switch signal output terminal of the MCU module 103; The MCU module 103 is also used to send a switch closing signal to the electrical switch module 105 after waking up; The electric switch module 105 is used to control the electric switch to close when receiving the switch closing signal, so that the power supply module 104 forms a path with the charging circuit of the super capacitor 101, and the power supply module 104 forms a path with the system circuit of the load; The power supply module 104 is used to charge the super capacitor 101 after the charging circuit is connected, and to supply power to the load after the system circuit is connected.

[0065] In the embodiment of the present application, the electric switch module 105 may be a high-side MOS switch module, and the switch closing signal may be a high-level PWM signal. The electric switch module 105 is used to control the on and off of the system loop and the charging loop. The system loop includes the power supply module 104, the electric switch module 105 and the load. The charging loop includes the power supply module 104, the electric switch module 105 and the supercapacitor 101.

[0066] Through the above technical solution, the electric switch module 105 can be used to control the on and off of the system circuit and the charging circuit, thereby realizing effective management of the power management system.

[0067] In a specific embodiment, reference Figure 5 , is a schematic diagram of the system structure of another power management system provided by the present application, wherein the system further includes a voltage detection module 106: The input end of the voltage detection module 106 is connected to the positive terminal of the super capacitor 101, and the output end of the voltage detection module 106 is connected to the first voltage input end of the MCU module 103; The voltage detection module 106 is used to detect the voltage of the positive terminal of the super capacitor 101, convert the voltage of the positive terminal of the super capacitor 101 into a first voltage, and transmit the first voltage to the MCU module 103; The MCU module 103 is used to restore the first voltage to the voltage of the positive terminal of the super capacitor 101.

[0068] Specifically, the voltage detection module 106 can be implemented by a voltage divider circuit.

[0069] Through the above technical solution, the voltage detection of the super capacitor can be realized to avoid excessive voltage difference between the super capacitor 101 and the power supply module 104, thereby improving the safety of the power management system.

[0070] In a specific embodiment, reference Figure 6 , is a schematic diagram of a circuit structure of a voltage detection module provided in an embodiment of the present application, wherein the voltage detection module 106 includes a seventh resistor 307, an eighth resistor 308 and a ninth resistor 309; One end of the seventh resistor 307 is connected to the positive terminal of the supercapacitor 101, and the other end of the seventh resistor 307 is respectively connected to one end of the eighth resistor 308 and one end of the ninth resistor 309; the other end of the eighth resistor 308 is connected to the first voltage input terminal, and the other end of the ninth resistor 309 is grounded.

[0071] Specifically, the resistance of the seventh resistor 307 is recorded as , the resistance of the eighth resistor 308 is recorded as , the resistance of the ninth resistor 309 is recorded as , the first voltage is recorded as , then the positive electrode voltage It can be calculated by formula 5.

[0072] Formula 5 Through the above technical solution, the voltage detection module 106 can be simply implemented, reducing the complexity of the system circuit.

[0073] In a specific embodiment, reference Figure 7 , is a schematic diagram of the system structure of another power management system provided in an embodiment of the present application, wherein the system includes a tenth resistor 310; The tenth resistor 310 is connected in series between the negative terminal of the super capacitor 101 and the negative terminal of the load terminal; one end of the tenth resistor 310 is connected to the second voltage input terminal of the MCU module 103, and the other end of the tenth resistor 310 is connected to the third voltage input terminal of the MCU module 103; The tenth resistor 310 is used to generate a second voltage and a third voltage at both ends respectively when the load end is connected to the load and the system loop path; The MCU module 103 is also used to detect the second voltage and the third voltage, calculate the difference between the two, calculate the current of the system loop according to the resistance of the tenth resistor 310 and the difference, and when the current of the system loop is less than a preset target current value, switch the wake-up signal to a sleep signal, transmit the sleep signal to the power supply module 104, and put the power supply module 104 into sleep mode.

[0074] In the embodiment of the present application, the sleep signal may be a low-level voltage signal.

[0075] Specifically, the preset target current value may be determined based on actual demand.

[0076] Specifically, the second voltage is recorded as , the third voltage is recorded as , the resistance of the tenth resistor 310 is recorded as , the current of the system loop is recorded as ,but The calculation of is shown in Formula 6.

[0077] Formula 6 By detecting the circuit of the system loop through the voltage across the tenth resistor, not only is the circuit implementation simple, but the risk of overcurrent in the system loop can also be reduced, thereby improving the safety of the power management system.

[0078] In a specific embodiment: The wake-up module 102 is further configured to switch the enable signal to a disable signal when detecting that the voltage at the positive terminal of the super capacitor 101 is at a high level, and transmit the disable signal to the MCU module 103; The MCU module 103 is further configured to send a switch disconnection signal to the electrical switch module 105 when the current of the system loop is less than a preset target current value and the disable signal is received, and sleep after receiving a confirmation signal sent back by the electrical switch module 105; The electrical switch module 105 is further configured to control the electrical switch to be disconnected when receiving the switch disconnection signal.

[0079] Specifically, the switch disconnection signal may be a low-level PWM signal.

[0080] Specifically, the principle of the above technical solution can be: when the load end is not connected to the load, the voltage of the super capacitor 101 is at a high level, and the loop current is less than the preset target current value. The wake-up module 102 detects the high-level super capacitor voltage and outputs a low-level prohibition signal. When the MCU module 103 receives the prohibition signal and detects that the loop current is too small, it can be determined that the load end is not connected to the load, and can send a sleep signal to the power supply module 104 and send the switch disconnection signal to the electric switch module 105, so that the power supply module 104 sleeps and the electric switch of the electric switch module 105 is disconnected, thereby disconnecting the system loop and the charging loop.

[0081] Through the above technical solution, when no load is connected, the MCU module and the power supply module inside the power management system can be controlled to sleep, thereby reducing system power consumption.

[0082] The implementation principle of the embodiment of the present application is as follows: a wake-up module 102, a voltage detection module 106 and a current detection circuit (the tenth resistor 310) are used in a BMS based on a high-side MOS. The wake-up module 102 is used to detect the voltage of the supercapacitor, and the voltage of the supercapacitor 101 is used to determine whether there is a load connected to the load end of the system. When the voltage of the supercapacitor 101 is at a high level, it is determined that there is a load connected, thereby outputting a high-level enable signal to enable the MCU module 103 and activate the power supply module 104. After the MCU module 103 wakes up, it outputs a wake-up signal to wake up the power supply module 104. The voltage of the supercapacitor 101 is detected by the voltage-dividing characteristic of the voltage detection module 106, which can prevent the MCU module 103 from being damaged by excessive voltage. The current of the system loop is obtained through simple calculations using the voltage and resistance value at both ends of the tenth resistor 310.

[0083] The embodiments of this specific implementation method are all preferred embodiments of the present invention, and are not intended to limit the protection scope of the present invention. Therefore, any equivalent changes made based on the structure, shape, and principle of the present invention should be included in the protection scope of the present invention.

[0084] Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making any creative work shall fall within the scope of protection of this application.

[0085] It should be noted that the terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, including a series of steps or units, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

Claims

1. A power management system, characterized in that: Including wake-up module, super capacitor, MCU module and power supply module; The input end of the wake-up module is connected to the positive end of the super capacitor, and the output end of the wake-up module is respectively connected to the enable input end of the MCU module and the enable input end of the power supply module; the wake-up output end of the MCU module is connected to the wake-up input end of the power supply module; the super capacitor and the load end are connected in parallel; The supercapacitor is used to discharge when the load end is connected to a load, and the voltage at the positive end is converted from a high level to a low level; The wake-up module is used to output an enable signal to wake up the MCU module and activate the power supply module when detecting that the voltage at the positive terminal of the supercapacitor is at a low level; The MCU module is used to output a wake-up signal to the power supply module after waking up, so as to wake up the activated power supply module.

2. The power management system according to claim 1, characterized in that: The wake-up module includes a comparison operator, a first voltage divider circuit, a second voltage divider circuit and a third voltage divider circuit; The first end of the first voltage-dividing circuit is connected to the positive terminal of the supercapacitor, the second end of the first voltage-dividing circuit is connected to the target input terminal of the comparison operator, and the third end of the first voltage-dividing circuit is grounded; the first end of the second voltage-dividing circuit is connected to the reference voltage, the second end of the second voltage-dividing circuit is connected to the reference input terminal of the comparison operator, and the third end of the second voltage-dividing circuit is grounded; the first end of the third voltage-dividing circuit is connected to the working voltage of the comparison operator, the second end of the third voltage-dividing circuit is connected to the enable input terminal of the MCU module and the enable input terminal of the power supply module, and the third end of the third voltage-dividing circuit is connected to the output terminal of the comparison operator.

3. The power management system according to claim 2, characterized in that: The first voltage divider circuit includes a first resistor and a second resistor; One end of the first resistor is connected to the positive terminal of the super capacitor, and the other end of the first resistor is respectively connected to one end of the second resistor and the target input terminal of the comparison operator; the other end of the second resistor is grounded.

4. The power management system according to claim 2, characterized in that: The second voltage divider circuit includes a third resistor and a fourth resistor; One end of the third resistor is connected to the reference voltage, and the other end of the third resistor is respectively connected to one end of the fourth resistor and the reference input end of the comparison operator; the other end of the fourth resistor is grounded.

5. The power management system according to claim 2, characterized in that: The third voltage-dividing circuit includes a fifth resistor and a sixth resistor; One end of the fifth resistor is connected to the working voltage of the comparison operator, and the other end of the fifth resistor is respectively connected to the output end of the comparison operator and one end of the sixth resistor; the other end of the sixth resistor is respectively connected to the enable input end of the MCU module and the enable input end of the power supply module.

6. The power management system according to claim 1, characterized in that: The system also includes an electrical switch module; The positive terminal of the electric switch module is connected to the positive terminal of the supercapacitor, the negative terminal of the electric switch module is connected to the positive terminal of the power supply module, and the input terminal of the electric switch module is connected to the switch signal output terminal of the MCU module; The MCU module is further used to send a switch closing signal to the electrical switch module after waking up; The electric switch module is used to control the electric switch to close when receiving the switch closing signal, so that the power supply module forms a path with the charging circuit of the supercapacitor, and the power supply module forms a path with the system circuit of the load; The power supply module is used to charge the super capacitor after the charging circuit is connected, and to supply power to the load after the system circuit is connected.

7. The power management system according to claim 1, characterized in that: The system also includes a voltage detection module: The input end of the voltage detection module is connected to the positive terminal of the super capacitor, and the output end of the voltage detection module is connected to the first voltage input end of the MCU module; The voltage detection module is used to detect the voltage of the positive terminal of the super capacitor, convert the voltage of the positive terminal of the super capacitor into a first voltage, and transmit the first voltage to the MCU module; The MCU module is used to restore the first voltage to the voltage of the positive terminal of the supercapacitor.

8. The power management system according to claim 7, characterized in that: The voltage detection module includes a seventh resistor, an eighth resistor and a ninth resistor; One end of the seventh resistor is connected to the positive terminal of the supercapacitor, and the other end of the seventh resistor is connected to one end of the eighth resistor and one end of the ninth resistor respectively; The other end of the eighth resistor is connected to the first voltage input terminal, and the other end of the ninth resistor is grounded.

9. The power management system according to claim 6, characterized in that: The system includes a tenth resistor; The tenth resistor is connected in series between the negative terminal of the super capacitor and the negative terminal of the load terminal; one end of the tenth resistor is connected to the second voltage input terminal of the MCU module, and the other end of the tenth resistor is connected to the third voltage input terminal of the MCU module; The tenth resistor is used to generate a second voltage and a third voltage at two ends respectively when the load end is connected to the load and the system loop path; The MCU module is also used to detect the second voltage and the third voltage, calculate the difference between the two, calculate the current of the system loop according to the resistance of the tenth resistor and the difference, and when the current of the system loop is less than a preset target current value, switch the wake-up signal to a sleep signal, transmit the sleep signal to the power supply module, and put the power supply module into sleep mode.

10. The power management system according to claim 9, characterized in that: The wake-up module is further configured to switch the enable signal to a disable signal when detecting that the voltage at the positive terminal of the supercapacitor is at a high level, and transmit the disable signal to the MCU module; The MCU module is further configured to send a switch disconnection signal to the electrical switch module when the current of the system loop is less than a preset target current value and the disable signal is received, and sleep after receiving a confirmation signal sent back by the electrical switch module; The electric switch module is further used to control the electric switch to be disconnected when receiving the switch disconnection signal.

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