Test method and test system of semiconductor circuit

Abstract

The invention provides a semiconductor circuit test method and test system, and the method comprises the steps: inputting test signals to the circuit input ends of a plurality of semiconductor circuits, and obtaining feedback signals at the circuit output ends; counting and preprocessing the plurality of groups of feedback signals; judging whether the corresponding semiconductor circuit is detected to be qualified or not according to the preprocessed feedback signal and a preset qualification condition; generating frequency fluctuation data of the semiconductor circuit according to the preprocessed feedback signal, and obtaining abnormal fluctuation according to the frequency fluctuation data; and performing qualification prediction on the undetected semiconductor circuit according to the abnormal fluctuation. According to the method, firstly, a machine learning method is adopted to carry out qualification test on part of semiconductor products, and after the test is completed, the number and the position of to-be-detected semiconductors are obtained according to the number and the position of frequency fluctuation semiconductors, so that accurate qualification prediction of to-be-detected semiconductor circuits is realized; and the test efficiency of the semiconductor product is greatly improved while the test precision is ensured.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor circuit testing, and in particular to a semiconductor circuit testing method and a testing system. Background Art

[0002] Semiconductor circuit testing technology is a key step in ensuring the quality and reliability of semiconductor devices. It covers the entire process from wafer testing (Wafer Test) to post-packaging testing (Final Test or Package Test), and aims to verify whether each independent Die or packaged chip meets the design specifications and performance requirements. Common types of semiconductor circuit testing include functional testing, characteristic parameter testing, etc. For this type of testing technology, if the integration scale of the semiconductor integrated circuit is large, the test vectors will increase, which will affect the test efficiency and extend the test time. In addition, the testing of characteristic parameters often requires specific conditions and high-precision measurement equipment. Therefore, this type of testing technology often has the defect of insufficient test accuracy. Summary of the invention

[0003] In view of this, the present invention proposes a semiconductor circuit testing method and a testing system to solve the above problems in the prior art.

[0004] On the one hand, to achieve the above-mentioned object, the present invention provides a method for testing a semiconductor circuit, comprising:

[0005] Inputting test signals to circuit input terminals of a plurality of semiconductor circuits respectively, and obtaining feedback signals of the semiconductor circuits at circuit output terminals;

[0006] Performing statistics and preprocessing on a plurality of groups of feedback signals;

[0007] Determine whether the corresponding semiconductor circuit is qualified according to the pre-processed feedback signal and the preset qualified condition;

[0008] generating frequency fluctuation data of the semiconductor circuit according to the preprocessed feedback signal, and obtaining abnormal fluctuation according to the frequency fluctuation data;

[0009] The quality of the untested semiconductor circuit is predicted to be good according to the abnormal fluctuation.

[0010] Furthermore, the test signal includes a test level signal, a test current signal and a test voltage signal, and the feedback signal includes a feedback level signal, a feedback current signal and a feedback voltage signal. The feedback level signal is used to determine the on-off state of the semiconductor circuit; the feedback current signal is used to determine the characteristic parameters of the semiconductor circuit; and the feedback voltage signal is used to determine the open-short circuit state of the semiconductor circuit.

[0011] Furthermore, the process of performing statistics and preprocessing on a plurality of groups of feedback signals includes:

[0012] Using a low-pass filtering method to remove noise in the feedback signal;

[0013] Using a cluster analysis method to identify missing values ​​and outliers in the feedback signal, and using data visualization technology to fill in missing values ​​and replace outliers based on mean data and median data in the feedback signal;

[0014] The feedback signal is converted into binary data by using a dimensionless method.

[0015] Furthermore, the process of judging whether the corresponding semiconductor circuit is qualified according to the preprocessed feedback signal and the preset qualified condition includes:

[0016] A circuit detection model is constructed using a gradient boosting tree, the preprocessed feedback signal is divided into a training set and a test set, a loss function is constructed, the training set is used to optimize and train the circuit detection model parameters, and the circuit detection model with optimal parameters is obtained. The circuit detection model with the optimal parameters is used to determine whether the semiconductor circuit corresponding to the feedback signal is qualified.

[0017] Furthermore, the process of predicting the quality of the untested semiconductor circuit according to the abnormal fluctuation includes:

[0018] Calculate the abnormal proportion of the number of semiconductor circuits corresponding to the abnormal fluctuation to the total number of semiconductor circuits in this round of detection; obtain the detection order of the number of semiconductor circuits corresponding to the abnormal fluctuation in the total number of semiconductor circuits;

[0019] Obtaining the number of semiconductor devices that need to be predicted in the next round of detection according to the abnormal ratio; and obtaining the position of the semiconductor devices that need to be predicted in the next round of detection in the total amount according to the detection order;

[0020] A logistic regression algorithm is used to predict whether the semiconductor devices extracted in the next round of inspection are qualified.

[0021] On the other hand, to achieve the above-mentioned purpose, the present invention proposes a semiconductor circuit test system, comprising a signal acquisition module, a signal preprocessing module, a circuit test module, and a test prediction module connected in sequence;

[0022] The signal acquisition module is used to input test signals to the circuit input terminals of several semiconductor circuits respectively, and obtain feedback signals of the semiconductor circuits at the circuit output terminals;

[0023] The signal preprocessing module is used to perform statistics and preprocessing on a plurality of groups of feedback signals;

[0024] The circuit testing module is used to determine whether the corresponding semiconductor circuit is qualified according to the pre-processed feedback signal and the preset qualified condition;

[0025] The test prediction module is used to generate frequency fluctuation data of the semiconductor circuit according to the preprocessed feedback signal, and obtain abnormal fluctuation according to the frequency fluctuation data;

[0026] The quality of the untested semiconductor circuit is predicted to be good according to the abnormal fluctuation.

[0027] Further, the signal acquisition module includes a signal sending device and a signal receiving device, the signal sending device and the signal receiving device are respectively connected to the input end and the output end of the semiconductor circuit, and are respectively used to input a test signal to the semiconductor circuit and receive a feedback signal;

[0028] The test signal includes a test level signal, a test current signal and a test voltage signal; the feedback signal includes a feedback level signal, a feedback current signal and a feedback voltage signal, the feedback level signal is used to judge the on-off state of the semiconductor circuit; the feedback current signal is used to judge the characteristic parameters of the semiconductor circuit; the feedback voltage signal is used to judge the open-short circuit state of the semiconductor circuit.

[0029] Furthermore, the signal preprocessing module includes a filtering module, a signal optimization module and a signal conversion module, and the filtering module is used to remove noise in the feedback signal by using a low-pass filtering method;

[0030] The signal optimization module is used to identify missing values ​​and outliers in the feedback signal by using a cluster analysis method, and to fill missing values ​​and replace outliers according to mean data and median data in the feedback signal by using data visualization technology;

[0031] The signal conversion module converts the feedback signal into binary data using a dimensionless method.

[0032] Furthermore, the circuit testing module uses a gradient boosting tree to construct a circuit detection model, divides the preprocessed feedback signal into a training set and a test set, constructs a loss function, uses the training set to optimize and train the circuit detection model parameters, obtains the circuit detection model with optimal parameters, and uses the circuit detection model with the optimal parameters to determine whether the semiconductor circuit corresponding to the feedback signal is qualified.

[0033] Furthermore, the test prediction module calculates the abnormal proportion of the number of semiconductor circuits corresponding to the abnormal fluctuation in the total number of semiconductor circuits in this round of detection, and obtains the detection order of the number of semiconductor circuits corresponding to the abnormal fluctuation in the total number of semiconductor circuits; obtains the number of semiconductor devices that need to be predicted in the next round of detection according to the abnormal proportion; and obtains the position of the semiconductor devices that need to be predicted in the next round of detection according to the detection order, and finally makes a qualified prediction for the undetected semiconductor circuits based on the abnormal fluctuation.

[0034] Compared with the prior art, the present invention has the following beneficial effects:

[0035] During the testing process of semiconductor circuits, the present invention first uses a machine learning method to perform a qualified test on some semiconductor products. After the test is completed, the frequency fluctuation data of the tested semiconductors is obtained. The number and position of the semiconductors to be tested are obtained through the number and position of the semiconductors in the frequency fluctuation data, thereby achieving an accurate qualified prediction of the semiconductor circuit to be tested, greatly improving the testing efficiency of semiconductor products while ensuring the test accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Various other advantages and benefits will become apparent to those of ordinary skill in the art by reading the detailed description of the preferred embodiments below. The accompanying drawings are only for the purpose of illustrating the preferred embodiments and are not to be considered as limiting the present invention. Moreover, the same reference symbols are used throughout the accompanying drawings to represent the same components. In the accompanying drawings:

[0037] Figure 1 Schematic diagram of a semiconductor circuit testing method according to an embodiment of the present invention;

[0038] Figure 2 Schematic diagram of the structure of a semiconductor circuit testing system in an embodiment of the present invention. DETAILED DESCRIPTION

[0039] Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided in order to enable a more thorough understanding of the present disclosure and to be able to fully convey the scope of the present disclosure to those skilled in the art. It should be noted that, in the absence of conflict, the embodiments of the present invention and the features described in the embodiments can be combined with each other. The present invention will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0040] Embodiment 1

[0041] This embodiment provides a method for testing a semiconductor circuit. Figure 1As shown, the following steps are included:

[0042] Step S1: inputting test signals to circuit input terminals of a plurality of semiconductor circuits respectively, and obtaining feedback signals of the semiconductor circuits at circuit output terminals;

[0043] As a preferred embodiment, the test signal input in this embodiment includes a test level signal, a test current signal and a test voltage signal, and the feedback signal includes a feedback level signal, a feedback current signal and a feedback voltage signal;

[0044] By inputting a test level signal to the semiconductor circuit to be tested, and judging the on-off state of the semiconductor circuit according to the corresponding feedback level signal; by inputting a test current signal to the semiconductor circuit to be tested, and obtaining the characteristic parameters of the semiconductor circuit according to the corresponding feedback level signal; by inputting a test voltage signal to the semiconductor circuit to be tested, and obtaining the open-short circuit state of the semiconductor circuit according to the corresponding feedback voltage signal;

[0045] Step S2: performing statistics and preprocessing on a plurality of groups of feedback signals;

[0046] Step S3: judging whether the corresponding semiconductor circuit is qualified according to the pre-processed feedback signal and the preset qualified condition;

[0047] Step S4: generating frequency fluctuation data of the semiconductor circuit according to the preprocessed feedback signal, and obtaining abnormal fluctuation according to the frequency fluctuation data;

[0048] Step S5: performing a pass prediction on the untested semiconductor circuit according to the abnormal fluctuation.

[0049] As a preferred embodiment, the feedback signal may include some missing values, outliers, noise and outliers. Therefore, in step S2 of this embodiment, a low-pass filtering method is first used to remove the noise in the feedback signal, and a cluster analysis method is used to identify the missing values ​​and outliers in the feedback signal. Data visualization technology is used to fill the missing values ​​with the attribute mean or median in the feedback signal to achieve secondary smoothing of the noise and replacement of outliers. Finally, due to the different types of data, they cannot be compared as a unified feature. Therefore, different data need to be converted into the same type to facilitate subsequent model training. Therefore, this embodiment uses a dimensionless method to convert the feedback signal into binary data, and converts the above data into "0" or "1".

[0050] As a preferred embodiment, in step S3, whether the semiconductor circuit is a qualified circuit is judged by constructing a gradient boosting tree and the judgment is implemented by preset conditions.

[0051] A circuit detection model is constructed by using a gradient boosting tree, the preprocessed feedback signal is divided into a training set and a test set, a loss function is constructed, the training set is used to optimize and train the parameters of the circuit detection model, and a circuit detection model with optimal parameters is obtained. The circuit detection model with the optimal parameters is used to determine whether the semiconductor circuit corresponding to the feedback signal is qualified:

[0052] The gradient boosting tree is a strong classifier, which is formed by linear addition of multiple weak classifiers and can be written as follows:

[0053]

[0054] Among them, h(x; a m ) represents a decision tree, a m is the model parameter, which represents the splitting feature of each tree node, the best split point, and the predicted value of the node. M refers to the number of weak classifiers.

[0055] Assuming the prediction function is F(x; P), the loss function is as follows:

[0056] φ(P)=L(y,F(x,P))

[0057] The optimal solution of the parameters obtained after optimization is:

[0058] P = argmin P φ(P)

[0059] Using the optimization method of stochastic gradient descent, we select the direction with the fastest gradient descent and move the optimal step size. The optimal parameters can be expressed as follows:

[0060]

[0061] p m =-ρ m g m

[0062] Starting from the initial value P0, m corresponds to each update iteration, negative gradient -g m is the direction of fastest descent, p m It is the optimal step size obtained by line search in this direction of steepest descent.

[0063] The prediction function F (x) Corresponding to parameter P, the optimal solution is:

[0064]

[0065] This is equivalent to gradient descent in the function space. Each step of gradient descent is expressed as:

[0066] f m(x))=-ρ m g m (x)

[0067]

[0068] According to the above formula, we can get:

[0069]

[0070] Then perform line search to determine the optimal step size ρm

[0071]

[0072] F m (x) = F m-1 (x)+ρ m (x; a m )

[0073] To sum up, the overall process of the gradient boosting tree algorithm is:

[0074] initialization: Where N represents the number of feedback signals;

[0075] From the first iteration update to the mth iteration update:

[0076]

[0077] F m (x) = F m-1 (x)+ρh m (x; a m ).

[0078] After the training is completed, the echelon boosting tree algorithm model with optimal parameters can be obtained. Using the optimal parameter model, the corresponding qualified judgment conditions are input into the model according to the type of semiconductor device, and the qualifiedness of the semiconductor circuit is judged based on the preprocessed feedback data.

[0079] As a preferred embodiment, while implementing semiconductor circuit testing, it is necessary to make a qualified prediction for untested semiconductor products to improve the efficiency and accuracy of the test. This embodiment generates frequency fluctuation data of the semiconductor circuit based on the preprocessed feedback signal, obtains abnormal fluctuations based on the frequency fluctuation data, and finally implements a qualified prediction for untested products based on semiconductor products with abnormal fluctuations.

[0080] As a preferred embodiment, since there may be a large number of semiconductors to be tested, it is difficult to achieve qualified prediction of untested products based on less data. In step S5, the number and position of predicted target products are obtained based on the proportion of semiconductors with abnormal fluctuations in the total number of tests and their positions therein:

[0081] Calculate the abnormal proportion of the number of semiconductor circuits corresponding to the abnormal fluctuation to the total number of semiconductor circuits in this round of detection; obtain the detection order of the number of semiconductor circuits corresponding to the abnormal fluctuation in the total number of semiconductor circuits;

[0082] Obtaining the number of semiconductor devices that need to be predicted in the next round of detection according to the abnormal ratio; and obtaining the position of the semiconductor devices that need to be predicted in the next round of detection in the total amount according to the detection order;

[0083] Finally, the logistic regression algorithm is used to predict whether the semiconductor devices in the next round of testing are qualified according to the predicted number and position of semiconductors obtained in the previous step. The specific prediction method is shown in the following formula:

[0084]

[0085] P=(e β0+β1+β2+...+βmxm ) / (1+e β0+β1+β2+...+βmxm )

[0086] Where P represents the probability of circuit failure, x1, x2, x3...x m Indicates the factors that cause failure in frequency fluctuation data, β0, β1, β2, β m is the regression coefficient of the logistic regression algorithm. By calculating according to the above formula, the qualified and unqualified prediction of uninspected semiconductor circuit products can be achieved.

[0087] Embodiment 2

[0088] This embodiment provides a semiconductor circuit testing system, such as Figure 2 As shown, it includes a signal acquisition module, a signal preprocessing module, a circuit testing module, and a test prediction module connected in sequence;

[0089] The signal acquisition module is used to input test signals to the circuit input terminals of several semiconductor circuits respectively, and obtain feedback signals of the semiconductor circuits at the circuit output terminals;

[0090] The signal preprocessing module is used to perform statistics and preprocessing on a plurality of groups of feedback signals;

[0091] The circuit testing module is used to determine whether the corresponding semiconductor circuit is qualified according to the pre-processed feedback signal and the preset qualified condition;

[0092] The test prediction module is used to generate frequency fluctuation data of the semiconductor circuit according to the preprocessed feedback signal, and obtain abnormal fluctuation according to the frequency fluctuation data;

[0093] The quality of the untested semiconductor circuit is predicted to be good according to the abnormal fluctuation.

[0094] As a preferred embodiment, the signal acquisition module includes a signal sending device and a signal receiving device, wherein the signal sending device and the signal receiving device are respectively connected to the input end and the output end of the semiconductor circuit, and are respectively used to input a test signal to the semiconductor circuit and receive a feedback signal;

[0095] The test signal includes a test level signal, a test current signal and a test voltage signal; the feedback signal includes a feedback level signal, a feedback current signal and a feedback voltage signal, the feedback level signal is used to judge the on-off state of the semiconductor circuit; the feedback current signal is used to judge the characteristic parameters of the semiconductor circuit; the feedback voltage signal is used to judge the open-short circuit state of the semiconductor circuit.

[0096] As a preferred implementation, the signal preprocessing module includes a filtering module, a signal optimization module and a signal conversion module, and the filtering module is used to remove noise in the feedback signal by using a low-pass filtering method;

[0097] The signal optimization module is used to identify missing values ​​and outliers in the feedback signal by using a cluster analysis method, and to fill missing values ​​and replace outliers according to mean data and median data in the feedback signal by using data visualization technology;

[0098] The signal conversion module converts the feedback signal into binary data using a dimensionless method.

[0099] As a preferred embodiment, the circuit testing module uses a gradient boosting tree to construct a circuit detection model, divides the preprocessed feedback signal into a training set and a test set, constructs a loss function, uses the training set to optimize and train the circuit detection model parameters, obtains the circuit detection model with optimal parameters, and uses the circuit detection model with the optimal parameters to determine whether the semiconductor circuit corresponding to the feedback signal is qualified.

[0100] As a preferred implementation, the test prediction module calculates the abnormal proportion of the number of semiconductor circuits corresponding to the abnormal fluctuation in the total number of semiconductor circuits in this round of detection, and obtains the detection order of the number of semiconductor circuits corresponding to the abnormal fluctuation in the total number of semiconductor circuits; obtains the number of semiconductor devices that need to be predicted in the next round of detection according to the abnormal proportion; and obtains the position of the semiconductor devices that need to be predicted in the next round of detection according to the detection order, and finally makes a qualified prediction for the undetected semiconductor circuits based on the abnormal fluctuation.

[0101] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the system disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.

[0102] Finally, it should be noted that the above-described embodiments are only specific implementations of the present invention, which are used to illustrate the technical solutions of the present invention, rather than to limit them. The protection scope of the present invention is not limited thereto. Although the present invention is described in detail with reference to the above-described embodiments, those skilled in the art should understand that any person skilled in the art can still modify the technical solutions described in the above-described embodiments within the technical scope disclosed by the present invention, or can easily think of changes, or perform equivalent replacements on some of the technical features thereof; and these modifications, changes or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention. They should all be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims

1. A method for testing a semiconductor circuit, characterized in that: include: Inputting test signals to circuit input terminals of a plurality of semiconductor circuits respectively, and obtaining feedback signals of the semiconductor circuits at circuit output terminals; Performing statistics and preprocessing on a plurality of groups of feedback signals; Determine whether the corresponding semiconductor circuit is qualified according to the pre-processed feedback signal and the preset qualified condition; generating frequency fluctuation data of the semiconductor circuit according to the preprocessed feedback signal, and obtaining abnormal fluctuation according to the frequency fluctuation data; The quality of the untested semiconductor circuit is predicted to be good according to the abnormal fluctuation.

2. The semiconductor circuit testing method according to claim 1, characterized in that: The test signal includes a test level signal, a test current signal and a test voltage signal, the feedback signal includes a feedback level signal, a feedback current signal and a feedback voltage signal, and the feedback level signal is used to determine the on-off state of the semiconductor circuit; The feedback current signal is used to determine the characteristic parameters of the semiconductor circuit; the feedback voltage signal is used to determine the open-circuit or short-circuit state of the semiconductor circuit.

3. The semiconductor circuit testing method according to claim 1, characterized in that: The process of performing statistics and preprocessing on a plurality of groups of feedback signals includes: Using a low-pass filtering method to remove noise in the feedback signal; Using a cluster analysis method to identify missing values ​​and outliers in the feedback signal, and using data visualization technology to fill in missing values ​​and replace outliers based on mean data and median data in the feedback signal; The feedback signal is converted into binary data by using a dimensionless method.

4. The method for testing a semiconductor circuit according to claim 1, wherein: The process of judging whether the corresponding semiconductor circuit is qualified according to the pre-processed feedback signal and the preset qualified condition includes: A circuit detection model is constructed using a gradient boosting tree, the preprocessed feedback signal is divided into a training set and a test set, a loss function is constructed, the training set is used to optimize and train the circuit detection model parameters, and the circuit detection model with optimal parameters is obtained. The circuit detection model with the optimal parameters is used to determine whether the semiconductor circuit corresponding to the feedback signal is qualified.

5. The semiconductor circuit testing method according to claim 1, characterized in that: The process of predicting the quality of an untested semiconductor circuit according to the abnormal fluctuation includes: Calculate the abnormal proportion of the number of semiconductor circuits corresponding to the abnormal fluctuation to the total number of semiconductor circuits in this round of detection; obtain the detection order of the number of semiconductor circuits corresponding to the abnormal fluctuation in the total number of semiconductor circuits; Obtaining the number of semiconductor devices that need to be predicted in the next round of detection according to the abnormal ratio; and obtaining the position of the semiconductor devices that need to be predicted in the next round of detection in the total amount according to the detection order; A logistic regression algorithm is used to predict whether the semiconductor devices extracted in the next round of inspection are qualified.

6. A semiconductor circuit testing system, characterized in that: It includes a signal acquisition module, a signal preprocessing module, a circuit testing module, and a test prediction module which are connected in sequence; The signal acquisition module is used to input test signals to the circuit input terminals of several semiconductor circuits respectively, and obtain feedback signals of the semiconductor circuits at the circuit output terminals; The signal preprocessing module is used to perform statistics and preprocessing on a plurality of groups of feedback signals; The circuit testing module is used to determine whether the corresponding semiconductor circuit is qualified according to the pre-processed feedback signal and the preset qualified condition; The test prediction module is used to generate frequency fluctuation data of the semiconductor circuit according to the preprocessed feedback signal, and obtain abnormal fluctuation according to the frequency fluctuation data; The quality of the untested semiconductor circuit is predicted to be good according to the abnormal fluctuation.

7. The semiconductor circuit testing method according to claim 6, characterized in that: The signal acquisition module includes a signal sending device and a signal receiving device, wherein the signal sending device and the signal receiving device are respectively connected to the input end and the output end of the semiconductor circuit, and are respectively used to input a test signal to the semiconductor circuit and receive a feedback signal; The test signal includes a test level signal, a test current signal and a test voltage signal; the feedback signal includes a feedback level signal, a feedback current signal and a feedback voltage signal, and the feedback level signal is used to determine the on-off state of the semiconductor circuit; The feedback current signal is used to determine the characteristic parameters of the semiconductor circuit; the feedback voltage signal is used to determine the open-circuit or short-circuit state of the semiconductor circuit.

8. The method for testing a semiconductor circuit according to claim 6, wherein: The signal preprocessing module includes a filtering module, a signal optimization module and a signal conversion module, wherein the filtering module is used to remove noise in the feedback signal by using a low-pass filtering method; The signal optimization module is used to identify missing values ​​and outliers in the feedback signal by using a cluster analysis method, and to fill missing values ​​and replace outliers according to mean data and median data in the feedback signal by using data visualization technology; The signal conversion module converts the feedback signal into binary data using a dimensionless method.

9. The method for testing a semiconductor circuit according to claim 6, wherein: The circuit testing module uses a gradient boosting tree to construct a circuit detection model, divides the preprocessed feedback signal into a training set and a test set, constructs a loss function, uses the training set to optimize and train the circuit detection model parameters, obtains the circuit detection model with optimal parameters, and uses the circuit detection model with the optimal parameters to determine whether the semiconductor circuit corresponding to the feedback signal is qualified.

10. The method for testing a semiconductor circuit according to claim 6, wherein: The test prediction module calculates the abnormal proportion of the number of semiconductor circuits corresponding to the abnormal fluctuation to the total number of semiconductor circuits in this round of detection, and obtains the detection order of the number of semiconductor circuits corresponding to the abnormal fluctuation in the total number of semiconductor circuits; According to the abnormal ratio, the number of semiconductor devices that need to be predicted in the next round of detection is obtained; The position of the semiconductor devices that need to be predicted in the next round of detection is obtained according to the detection order, and finally the undetected semiconductor circuits are predicted to be qualified according to the abnormal fluctuation.

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