A one-time password circuit based on ferroelectric memory

By adopting a one-time cryptographic circuit based on ferroelectric memory in data encryption technology and using its destructive read and write characteristics for one-time encryption, the problems of weak security and data leakage risks in the prior art are solved, and a more efficient, secure and economical data encryption solution is achieved.

CN119989431BActive Publication Date: 2025-06-20XIDIAN UNIV HANGZHOU RES INST
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Patent Information

Application Number
CN202510436629.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-04-09
Publication Date
2025-06-20
Estimated Expiration
2045-04-09

AI Technical Summary

Technical Problem

Existing data encryption technologies face problems such as weak security, intensified data leakage risks, complex operation processes and high hardware costs, especially the risk of data leakage in frequent read and write operations.

Method used

A one-time cryptographic circuit based on ferroelectric memory is adopted to encrypt it once using its destructive read and write characteristics to ensure that the data is cleared once read, thereby preventing data leakage.

Benefits of technology

Through the destructive read and write characteristics of ferroelectric memory, safer, convenient and cost-effective data encryption is achieved, reducing the risk of data leakage and improving the security and stability of the system.

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Abstract

The present application discloses a one-time password circuit based on a ferroelectric memory. The one-time password circuit based on the ferroelectric memory is used for performing one-time encryption on data to be encrypted, and includes: a processor circuit, an encryption module, and a ferroelectric memory. The processor circuit is used for outputting plaintext data, key data, and read-write addresses; the encryption module is used for performing encryption logic operations on the plaintext data based on the key data to output ciphertext data; the ferroelectric memory is used for writing and storing the ciphertext data to obtain stored data, and reading out the stored data to obtain the data to be encrypted; wherein, the ferroelectric memory is configured to automatically clear the stored data after reading out the stored data. In this way, the one-time password circuit based on the ferroelectric memory can make full use of its unique destructive read-write characteristics to provide the possibility for one-time encryption.
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Description

Technical Field

[0001] This application relates to the field of data encryption, and specifically to a one-time password circuit based on a ferroelectric memory. Background Art

[0002] With the development of information technology, data security has become a key issue. In traditional encryption technologies, confidential data is encrypted through encryption operations to become ciphertext data, and this ciphertext data can be further stored in a memory device. Based on this, only the hardware device that obtains the key and algorithm of the encryption operation can decrypt the ciphertext data.

[0003] However, existing data encryption technologies face some challenges. The main challenges include: weak security, increased risk of data leakage, complex operation processes, and high hardware costs, etc. These problems are mainly attributed to the technical bottlenecks of traditional encryption algorithms and logic circuits, as well as the high cost and difficulty in updating of hardware encryption technologies.

[0004] Specifically, in the process of traditional encryption and decryption, it is usually necessary to perform multiple read and write operations on the storage device. This not only reduces the efficiency of data transmission and processing, making the encryption and decryption processes cumbersome and time-consuming, but more importantly, frequent read and write operations increase the risk of data being intercepted or leaked during transmission. Especially in some occasions with extremely high security requirements, such as financial transactions, government information confidentiality and other fields, the consequences of data leakage may be catastrophic.

[0005] As a new type of non-volatile memory, ferroelectric memory has the advantages of fast read and write speed, low power consumption, long data retention time, etc. Although there have been studies attempting to use the non-volatile characteristics of ferroelectric memory for data encryption, the application of ferroelectric memory in data encryption is still scarce.

[0006] Therefore, how to make full use of the unique characteristics of ferroelectric memory to develop a more secure, convenient and cost-effective data encryption technology has become an urgent problem to be solved. Summary of the Invention

[0007] One advantage of this application is to provide a one-time password circuit based on a ferroelectric memory. Among them, the one-time password circuit based on a ferroelectric memory can make full use of its unique destructive read and write characteristics to provide the possibility for one-time encryption.

[0008] Another advantage of this application is to provide a one-time password circuit based on a ferroelectric memory. Among them, the one-time password circuit based on a ferroelectric memory has set up protection for data, and can reduce the impact of data damage or read errors on data to a certain extent.

[0009] According to one aspect of the present application, a one-time password circuit based on a ferroelectric memory is provided for performing one-time encryption on data to be encrypted, which includes: a processor circuit for outputting plaintext data, key data, and read-write addresses; an encryption module communicatively connected to the processor circuit for performing encryption logic operations on the plaintext data based on the key data to output ciphertext data; and a ferroelectric memory communicatively connected to the encryption module for writing and storing the ciphertext data to obtain stored data, and reading the stored data to obtain the data to be encrypted; wherein the ferroelectric memory is configured to automatically clear the stored data after reading the stored data.

[0010] In an embodiment of the one-time password circuit based on a ferroelectric memory according to the present application, the read-write address includes a write address and a read address; the ferroelectric memory includes a write module, a read module, and a storage unit; wherein the write module is used to write the ciphertext data into the storage unit based on the write address; the read module is used to read the stored data based on the read address and automatically clear the stored data in the storage unit during the reading process.

[0011] In an embodiment of the one-time password circuit based on a ferroelectric memory according to the present application, the storage unit includes a plurality of storage subunits, and the write module is further used to write the ciphertext data corresponding to the plurality of plaintext data into the plurality of storage subunits respectively.

[0012] In an embodiment of the one-time password circuit based on a ferroelectric memory according to the present application, the processor circuit is used to generate a plurality of the plaintext data based on the same data to be encrypted received multiple times, and compare the plurality of plaintext data, and when it is detected that the plurality of plaintext data are the same, different read-write addresses are allocated to the plurality of plaintext data respectively.

[0013] In an embodiment of the one-time password circuit based on a ferroelectric memory according to the present application, the processor circuit generates a plurality of the plaintext data based on the received data to be encrypted and its copy, and allocates different read-write addresses to the plurality of plaintext data respectively.

[0014] In an embodiment of the one-time password circuit based on a ferroelectric memory according to the present application, the one-time password circuit based on a ferroelectric memory includes a replication module communicatively connected to the processor circuit; the replication module is used to replicate the data to be encrypted to obtain at least one copy of the data to be encrypted; the processor circuit is used to generate a plurality of the plaintext data based on the received data to be encrypted and its copy, and allocate different read-write addresses to the plurality of plaintext data respectively.

[0015] In an embodiment of the one-time password circuit based on a ferroelectric memory according to the present application, the one-time password circuit based on a ferroelectric memory further includes a chunking module; the chunking module is communicatively connected to the processor circuit; the chunking module is configured to divide the data to be encrypted into at least two sub-data to be encrypted, and respectively assign importance expression values to the at least two sub-data to be encrypted, wherein the importance expression value is used to represent the importance of the sub-data to be encrypted.

[0016] In an embodiment of the one-time password circuit based on a ferroelectric memory according to the present application, the one-time password circuit based on a ferroelectric memory further includes a replication module, the replication module is configured to determine the replication times based on the importance expression value, and replicate at least one sub-data to be encrypted based on the replication times to obtain at least one copy of the sub-data to be encrypted; the processor circuit is configured to generate a plurality of the plaintext data based on all the sub-data to be encrypted and at least one copy of the sub-data to be encrypted, and respectively assign different read / write addresses to the plurality of the plaintext data.

[0017] In an embodiment of the one-time password circuit based on a ferroelectric memory according to the present application, the importance expression value is a natural number to represent the level of the sub-data to be encrypted, the lower the value, the higher the importance of the sub-data to be encrypted; alternatively, the importance expression value can be implemented as a weighted value, greater than or equal to 0 and less than or equal to 1, the higher the value, the higher the importance of the sub-data to be encrypted.

[0018] In an embodiment of the one-time password circuit based on a ferroelectric memory according to the present application, the one-time password circuit based on a ferroelectric memory further includes an error correction code allocation module; the error correction code allocation module is communicatively connected to the processor circuit, and is configured to respectively allocate a plurality of error correction codes to the plurality of the plaintext data or the plurality of the ciphertext data corresponding to the plurality of the plaintext data.

[0019] Through the understanding of the subsequent description and the drawings, further objects and advantages of the present application will be fully embodied.

[0020] These and other objects, features and advantages of the present application will be fully embodied through the following detailed description, drawings and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] By describing the embodiments of the present application in more detail in conjunction with the drawings, the above and other objects, features and advantages of the present application will become more obvious. The drawings are used to provide a further understanding of the embodiments of the present application, and constitute a part of the specification, and are used to explain the present application together with the embodiments of the present application, and do not constitute a limitation to the present application. In the drawings, the same reference numerals generally represent the same components or steps.

[0022] Figure 1 The structural block diagram of a one-time password circuit based on a ferroelectric memory according to an embodiment of the present application is illustrated.

[0023] Figure 2 The flowchart of the one-time encryption of data to be encrypted by a one-time password circuit based on a ferroelectric memory according to an embodiment of the present application is illustrated.

[0024] Figure 3 The schematic diagram of the hysteresis loop characteristic curve of the ferroelectric memory of a one-time password circuit based on a ferroelectric memory according to an embodiment of the present application is illustrated.

[0025] Figure 4 The schematic diagram of the charge change at different voltages during the destructive reading of the ferroelectric memory of a one-time password circuit based on a ferroelectric memory according to an embodiment of the present application is illustrated.

[0026] Figure 5 The structural block diagram of an embodiment of a one-time password circuit based on a ferroelectric memory according to an embodiment of the present application is illustrated.

[0027] Figure 6 The structural block diagram of another embodiment of a one-time password circuit based on a ferroelectric memory according to an embodiment of the present application is illustrated.

[0028] Figure 7 The structural block diagram of yet another embodiment of a one-time password circuit based on a ferroelectric memory according to an embodiment of the present application is illustrated.

[0029] Figure 8 The wiring diagram of the ferroelectric capacitor of a one-time password circuit based on a ferroelectric memory according to an embodiment of the present application is illustrated. Detailed implementation manners

[0030] Hereinafter, exemplary embodiments according to the present application will be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments of the present application. It should be understood that the present application is not limited by the exemplary embodiments described herein.

[0031] It can be understood that the term "a" should be understood as "at least one" or "one or more". That is, in one embodiment, the number of an element can be one, while in other embodiments, the number of the element can be multiple. The term "a" should not be construed as a limitation on the number. "Multiple" means greater than or equal to two.

[0032] Although ordinal numbers such as "first", "second", etc. will be used to describe various components, those components are not limited herein. The term is only used to distinguish one component from another. For example, the first component may be referred to as the second component, and similarly, the second component may also be referred to as the first component, without departing from the teachings of the concept of this application. The term "and / or" used herein includes any and all combinations of one or more of the associated listed items.

[0033] The terms used herein are for the purpose of describing various embodiments only and are not intended to be limiting. As used herein, the singular form also includes the plural form unless the context clearly indicates otherwise. It will be further understood that the terms "comprising" and / or "having", when used in this specification, specify the presence of the stated features, numbers, operations, components, elements, or combinations thereof, without precluding the presence or addition of one or more other features, numbers, operations, components, elements, or combinations thereof.

[0034] As Figures 1 to 8 shown, a ferroelectric memory-based one-time password circuit 100 according to an embodiment of the present application is illustrated. The ferroelectric memory-based one-time password circuit 100 is used to perform one-time encryption on data to be encrypted. Considering the destructive read / write characteristic of the ferroelectric memory 30, that is, the data is cleared once it is read out, the present application proposes to develop a relatively safe, convenient and more cost-effective data encryption scheme by using this destructive read / write characteristic of the ferroelectric memory 30.

[0035] Specifically, the ferroelectric memory-based one-time password circuit 100 includes a processor circuit 10, an encryption module 20, and a ferroelectric memory 30. The processor circuit 10 is used to output plaintext data, key data, and read / write addresses, wherein the plaintext data is obtained based on the data to be encrypted; the encryption module 20 is communicatively connected to the processor circuit 10 and is used to perform an encryption logic operation on the plaintext data based on the key data to output ciphertext data; the ferroelectric memory 30 is communicatively connected to the encryption module 20 and is used to write and store the ciphertext data to obtain stored data, and read out the stored data to obtain the data to be encrypted; wherein the ferroelectric memory 30 is configured to automatically clear the stored data after reading out the stored data.

[0036] The read / write address includes a write address and a read address. The ferroelectric memory 30 includes a write module 31, a read module 33, and a storage unit 32; wherein the write module 31 is used to write the ciphertext data into the storage unit 32 based on the write address; the read module 33 is used to read out the stored data based on the read address and automatically clear the stored data in the storage unit 32 during the reading process. The storage unit 32 includes a ferroelectric capacitor 3211. As Figure 8As shown, one end of the ferroelectric capacitor 3211 can be connected to a plate line (PL), and the other end can be connected to a bit line (BL).

[0037] Figure 3 and Figure 4 shows the basic principle of the destructive read of the ferroelectric memory 30. The ferroelectric memory 30 uses a ferroelectric capacitor as a storage capacitor. Among them, there is a phenomenon of spontaneous polarization in the ferroelectric capacitor: the inherent displacement of the crystal structure of the material will not disappear without an electric field; when an appropriate electric field is applied, the direction of this polarization can be reversed or reoriented.

[0038] Figure 3 shows the hysteresis loop characteristic curve of the ferroelectric memory 30. When a negative voltage pulse is applied to the ferroelectric memory 30 and the ferroelectric polarization is downward, when the voltage at both ends of the ferroelectric capacitor returns to zero voltage, the remaining charge -Qr corresponds to the binary number "1"; when a positive voltage pulse is applied, the ferroelectric polarization is upward, and the remaining charge Qr at zero voltage of the ferroelectric capacitor corresponds to the binary number "0". Figure 4 shows the destructive read process of the ferroelectric memory 30. Initially, for the ferroelectric capacitor in the remaining polarization state, when a positive pulse is applied to one end connected to the plate line, the polarization state will flip when reading the binary number "1", but will not when reading the binary number "0", and the original polarization state of the ferroelectric capacitor is destroyed, that is, the data in the storage unit 32 of the ferroelectric memory 30 is all cleared.

[0039] Furthermore, considering that the performance of the ferroelectric memory 30 is greatly affected by environmental factors (such as temperature, radiation), and accidents may occur during the read process, resulting in data damage or read errors; this application has set data protection.

[0040] Specifically, this application proposes: by storing the data multiple times and storing them in different storage units 32; even if the data read from some storage units 32 is lost or damaged, it can still be obtained from the data in other storage units 32.

[0041] More specifically, the data can be stored multiple times in different storage units 32 in multiple ways; for example, the same data to be encrypted is input into the ferroelectric memory-based one-time password circuit 100 multiple times in sequence, and the processor circuit 10 assigns different read / write addresses to the data to be encrypted for multiple times; for another example, multiple copies of the data to be encrypted are input into the ferroelectric memory-based one-time password circuit 100, and the processor circuit 10 assigns different read / write addresses to the multiple copies of the data to be encrypted; wherein, the multiple copies of the data to be encrypted can be input into the ferroelectric memory-based one-time password circuit 100 simultaneously or non-simultaneously; for yet another example, the data to be encrypted is input into the ferroelectric memory-based one-time password circuit 100, the data to be encrypted is copied to form at least one copy of the data to be encrypted, and then the processor circuit 10 assigns different read / write addresses to the multiple copies of the data to be encrypted.

[0042] Correspondingly, in an embodiment of the present application, after the ferroelectric memory-based one-time password circuit 100 receives the same data to be encrypted multiple times in sequence, the processor circuit 10 can generate multiple pieces of the plaintext data based on the same data to be encrypted received multiple times, and compare the multiple pieces of the plaintext data. When it is detected that the multiple pieces of the plaintext data are the same, different read / write addresses are assigned to the multiple pieces of the plaintext data respectively.

[0043] In another embodiment of the present application, after the ferroelectric memory-based one-time password circuit 100 receives the data to be encrypted and its copies, the processor circuit 10 can generate multiple pieces of the plaintext data based on the received data to be encrypted and its copies, and assign different read / write addresses to the multiple pieces of the plaintext data respectively.

[0044] In yet another embodiment of the present application, the ferroelectric memory-based one-time password circuit 100 includes a replication module 40, as Figure 6 shown. The replication module 40 is communicatively connected to the processor circuit 10. The replication module 40 is used to copy the data to be encrypted to obtain at least one copy of the data to be encrypted. The processor circuit 10 is used to generate multiple pieces of the plaintext data based on the received data to be encrypted and its copies, and assign different read / write addresses to the multiple pieces of the plaintext data respectively. The replication module 40 can be implemented as a multiplexer, an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), etc.

[0045] Accordingly, the encryption module 20 is further configured to perform encryption logic operations on the multiple plaintext data based on the key data to output multiple ciphertext data; as Figure 5 shown, the storage unit 32 includes multiple sub-storage units 321. The writing module 31 is further configured to write the multiple ciphertext data into the multiple sub-storage units 321 respectively based on multiple write addresses. The reading module 33 is further configured to read the stored data based on multiple read addresses.

[0046] Furthermore, at least some of the data to be encrypted can be selectively stored multiple times according to the importance of the data, and each part of the data to be encrypted can be stored a corresponding number of times according to the importance of the data. For example, the data with greater importance is stored more times; the data with less importance is stored fewer times, or only stored once.

[0047] Accordingly, as Figure 7 shown, the one-time password circuit 100 based on the ferroelectric memory further includes a block module 50. The block module 50 is communicatively connected to the processor circuit 10. The block module 50 is configured to divide the data to be encrypted into at least two parts of sub-data to be encrypted and assign importance expression values to the at least two parts of sub-data to be encrypted respectively, where the importance expression value is used to express the importance of the sub-data to be encrypted. For example, the importance expression value can be implemented as natural numbers 1, 2, 3..., representing the level of the sub-data to be encrypted. The lower the value, the higher the importance of the sub-data to be encrypted; for another example, the importance expression value can be implemented as a weighted value, greater than or equal to 0 and less than or equal to 1. The higher the value, the higher the importance of the sub-data to be encrypted.

[0048] The replication module 40 is configured to determine the replication times based on the importance expression value. When the importance expression values of all the sub-data to be encrypted do not reach the preset standard, no sub-data to be encrypted is replicated; for example, when the importance expression values implemented as natural numbers are all greater than 4, no sub-data to be encrypted is replicated; for another example, when the importance expression values implemented as weighted values do not exceed 0.5, no sub-data to be encrypted is replicated. When at least one of the importance expression values of all the sub-data to be encrypted reaches the preset standard, at least one sub-data to be encrypted is replicated based on the replication times to obtain a copy of at least one sub-data to be encrypted.

[0049] The processor circuit 10 is configured to generate a plurality of the plaintext data based on all the sub-data to be encrypted and copies of at least one sub-data to be encrypted, and respectively assign different read / write addresses to the plurality of the plaintext data. A numerical range and corresponding replication times can be preset in advance, and the replication times are determined according to the preset range where the importance expression value is located. The higher the importance of the sub-data to be encrypted represented by the importance expression value, the more the replication times.

[0050] Further, error correction codes can be combined to detect and correct data errors on the basis of storing data multiple times and storing them in different storage units 32; in this way, even if some data is lost or damaged due to destructive reading, the original data can still be restored through the error correction codes.

[0051] Correspondingly, the ferroelectric memory-based one-time password circuit 100 further includes an error correction code allocation module. The error correction code allocation module is communicatively connected to the processor circuit 10 and is configured to respectively allocate a plurality of error correction codes to the plurality of the plaintext data or the plurality of the ciphertext data. The form of the error correction code is not limited in this application. For example, Reed-Solomon, Hamming Code, etc. When an external device reads the data of the ferroelectric memory-based one-time password circuit 100, the received data can be verified and corrected according to the error correction code.

[0052] This application proposes a one-time password data confidentiality method based on the ferroelectric memory 30 according to the working mode of the ferroelectric memory-based one-time password circuit 100, which includes the steps: as Figure 2 shown, S110, output the plaintext data, key data, and read / write address; S120, perform an encryption logic operation on the plaintext data based on the key data to output ciphertext data; S130, write and store the ciphertext data to obtain stored data, and read out the stored data; and, S140, automatically clear the stored data. Automatically clearing the stored data means setting the stored data to zero.

[0053] In an embodiment of this application, step S130 includes the step of respectively writing the ciphertext data corresponding to the plurality of the plaintext data into a plurality of storage sub-units.

[0054] In an embodiment of this application, the one-time password data confidentiality method based on the ferroelectric memory 30 further includes step S100A of generating a plurality of the plaintext data based on the same data to be encrypted received multiple times, and comparing the plurality of the plaintext data. When it is detected that the plurality of the plaintext data are the same, different read / write addresses are respectively assigned to the plurality of the plaintext data.

[0055] In an embodiment of the present application, the one-time password data confidentiality method based on the ferroelectric memory 30 further includes step S100B of generating a plurality of the plaintext data based on the received data to be encrypted and its copy, and respectively assigning different read / write addresses to the plurality of the plaintext data.

[0056] In an embodiment of the present application, the one-time password data confidentiality method based on the ferroelectric memory 30 further includes step S100C1 of copying the data to be encrypted to obtain at least one copy of the data to be encrypted; and step S100C2 of generating a plurality of the plaintext data based on the received data to be encrypted and its copy, and respectively assigning different read / write addresses to the plurality of the plaintext data.

[0057] In an embodiment of the present application, the one-time password data confidentiality method based on the ferroelectric memory 30 further includes step S100D1 of dividing the data to be encrypted into at least two sub-data to be encrypted; S100D2 of respectively assigning importance expression values to the at least two sub-data to be encrypted, where the importance expression value is used to express the importance of the sub-data to be encrypted.

[0058] In an embodiment of the present application, the one-time password data confidentiality method based on the ferroelectric memory 30 further includes step S100D3 of determining the number of replications based on the importance expression value, and replicating at least one sub-data to be encrypted based on the number of replications to obtain at least one copy of the sub-data to be encrypted; S100D4 of generating a plurality of the plaintext data based on all the sub-data to be encrypted and at least one copy of the sub-data to be encrypted, and respectively assigning different read / write addresses to the plurality of the plaintext data.

[0059] In an embodiment of the present application, the one-time password data confidentiality method based on the ferroelectric memory 30 further includes step S100E: respectively assigning a plurality of error correction codes to the plurality of the plaintext data or the plurality of ciphertext data corresponding to the plurality of the plaintext data.

[0060] In summary, the one-time password circuit 100 based on the ferroelectric memory is illustrated. The present application optimizes the security problem caused by frequent reading and writing of the storage device in the existing encryption method. Through the destructive read / write characteristic of the ferroelectric memory 30, it is ensured that once the data is encrypted and read, it cannot be read or modified again, physically preventing data leakage. Compared with the traditional encryption scheme, the security and stability of the system can be further improved.

[0061] The above description of the present application and its implementation manners is not restrictive. What is shown in the drawings is only one of the implementation manners of the present application, and the actual structure is not limited thereto. Generally speaking, if those of ordinary skill in the art are inspired by it and design, without creative efforts, structural manners and embodiments similar to the technical solution without departing from the gist of the creation of the present application, they shall fall within the protection scope of the present application.

Claims

1. A one-time password circuit based on ferroelectric memory, used for one-time encryption of encrypted data, characterized in that: include: A processor circuit for outputting plaintext data, key data, and read and write addresses; an encryption module, communicatively connected to the processor circuit, for performing encryption logic operations on the plaintext data based on the key data to output ciphertext data; as well as A ferroelectric memory, communicatively connected to the encryption module, for writing and storing the ciphertext data to obtain stored data, and reading the stored data to obtain the data to be encrypted; Wherein, the ferroelectric memory is configured to automatically clear the stored data after reading the stored data; The processor circuit is used to generate multiple plaintext data based on the same data to be encrypted received multiple times, and compare the multiple plaintext data. When it is detected that the multiple plaintext data are the same, different read and write addresses are respectively assigned to the multiple plaintext data.

2. The one-time password circuit based on ferroelectric memory according to claim 1, characterized in that: The read-write address includes a write address and a read address; the ferroelectric memory includes a write module, a read module and a storage unit; wherein the write module is used to write the ciphertext data into the storage unit based on the write address; the read module is used to read the stored data based on the read address, and automatically clear the stored data in the storage unit during the read process.

3. The one-time password circuit based on ferroelectric memory according to claim 2, characterized in that: The storage unit includes a plurality of storage sub-units, and the writing module is further used to write the ciphertext data corresponding to the plurality of plaintext data into the plurality of storage sub-units respectively.

4. The one-time password circuit based on ferroelectric memory according to claim 3, characterized in that: The processor circuit generates a plurality of the plaintext data based on the received data to be encrypted and its copy, and allocates different read and write addresses to the plurality of the plaintext data respectively.

5. The one-time password circuit based on ferroelectric memory according to claim 3, characterized in that: The one-time password circuit based on ferroelectric memory includes a copy module, and the copy module is communicatively connected to the processor circuit; The copy module is used to copy the data to be encrypted to obtain at least one copy of the data to be encrypted; The processor circuit is used for generating a plurality of the plaintext data based on the received data to be encrypted and its copy, and respectively allocating different read and write addresses to the plurality of the plaintext data.

6. The one-time password circuit based on ferroelectric memory according to claim 2, characterized in that: The one-time password circuit based on ferroelectric memory also includes a block division module; the block division module can be communicatively connected to the processor circuit; the block division module is used to divide the data to be encrypted into at least two parts of sub-data to be encrypted, and assign importance expression values ​​to the at least two parts of sub-data to be encrypted respectively, wherein the importance expression value is used to express the importance of the sub-data to be encrypted.

7. The one-time password circuit based on ferroelectric memory according to claim 6, characterized in that: The one-time password circuit based on ferroelectric memory further includes a copy module, the copy module is used to determine the number of copies based on the importance expression value, and copy at least one sub-data to be encrypted based on the number of copies to obtain a copy of at least one sub-data to be encrypted; The processor circuit is used to generate a plurality of the plaintext data based on all the sub-data to be encrypted and at least one copy of the sub-data to be encrypted, and to assign different read and write addresses to the plurality of the plaintext data respectively.

8. The one-time password circuit based on ferroelectric memory according to claim 6, characterized in that: The importance expression value is a natural number to represent the level of the sub-data to be encrypted. The lower the value, the higher the importance of the sub-data to be encrypted. Alternatively, the importance expression value can be implemented as a weighted value greater than or equal to 0 and less than or equal to 1. The higher the value, the higher the importance of the sub-data to be encrypted.

9. The one-time password circuit based on ferroelectric memory according to claim 3 or 7, characterized in that: The one-time password circuit based on ferroelectric memory also includes an error correction code allocation module; the error correction code allocation module can be communicatively connected to the processor circuit, and is used to allocate multiple error correction codes to multiple plaintext data or multiple ciphertext data corresponding to multiple plaintext data.

Citation Information

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