Design method of large model auxiliary circuit embedded with electrical characteristics of transistor

Abstract

The invention discloses a method for designing a large model auxiliary circuit embedded with electrical characteristics of a transistor, relates to the technical field of electronic design automation, and solves the technical problem that high automation of current electronic design is difficult to realize. The method comprises the following steps: acquiring a design target of a circuit, generating an initial solution of the design target by utilizing a large model, and generating a target function for optimizing the circuit according to the initial solution of the design target; the method comprises the following steps: mapping electrical characteristics of transistors in a circuit into design parameters of the circuit, generating a corresponding netlist, and simulating the design of the circuit according to the netlist to obtain a simulation result; and combining the objective function with the simulation result, and optimizing the initial solution to obtain an optimal circuit design. According to the invention, high automation of electronic design can be realized.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic design automation, and in particular to a large model auxiliary circuit design method embedded with transistor electrical characteristics. Background Art

[0002] In recent years, Electronic Design Automation (EDA) technology has made significant progress in the field of integrated circuit (IC) design, especially in analog integrated circuit (Analog IC) design. Analog IC design involves accurate modeling of the electrical characteristics, nonlinear behavior, and physical implementation of the circuit, and is a key link in ensuring product performance, reliability, and power consumption optimization. With the increasing complexity of electronic products, analog IC design faces huge challenges in design optimization, multi-objective balance, and efficient simulation, which has led to an increasing demand for design automation technology.

[0003] At present, analog IC design automation mainly relies on traditional optimization algorithms and deep learning technology. These methods have improved design efficiency and accuracy to a certain extent, but there are still many limitations. For example, traditional optimization algorithms are computationally expensive and difficult to converge quickly when dealing with high-dimensional, multi-objective design spaces; although deep learning methods can learn complex electrical characteristics through large amounts of data, they are still insufficient in terms of accurate modeling and real-time optimization. In addition, parameter adjustment and simulation verification in the analog IC design process usually require a lot of manual intervention, making it difficult to achieve true high automation, which limits the further improvement of design efficiency and design quality.

[0004] In the process of implementing the present invention, the inventors found that there are at least the following problems in the prior art: Currently, electronic design is difficult to achieve a high degree of automation. Summary of the invention

[0005] The purpose of the present invention is to provide a large model-assisted circuit design method embedded with transistor electrical characteristics to solve the technical problem that electronic design in the prior art is still difficult to achieve high automation. The preferred technical solutions among the many technical solutions provided by the present invention can produce many technical effects as described below.

[0006] To achieve the above object, the present invention provides the following technical solutions: The present invention provides a large model-assisted circuit design method with embedded transistor electrical characteristics, comprising the following steps: obtaining a design goal of a circuit, generating a preliminary solution of the design goal using a large model, and generating an objective function for optimizing the circuit based on the preliminary solution of the design goal; mapping the electrical characteristics of transistors in the circuit to design parameters of the circuit, generating a corresponding netlist, and simulating the design of the circuit based on the netlist to obtain a simulation result; combining the objective function with the simulation result, optimizing the preliminary solution, and obtaining an optimal circuit design.

[0007] Optionally, the use of a large model to generate a preliminary solution to the design goal includes: retrieving domain knowledge related to optimized circuit design expertise in a knowledge base based on the design goal; decomposing the design goal into multiple subtasks, and embedding the domain knowledge as constraints into the optimization process of the multiple subtasks to generate a preliminary solution to the design goal.

[0008] Optionally, during the optimization process of the multiple subtasks, the electrical behavior of the transistor is fully described by combining large-signal parameters and small-signal parameters of the circuit, thereby decoupling the circuit characteristics from the process limitations of the circuit.

[0009] Optionally, the initial solution of the design goal includes: initial size setting of the transistor, bias circuit parameters and configuration of the basic topology structure.

[0010] Optionally, generating an objective function for optimizing the circuit based on a preliminary solution of the optimization target includes: analyzing performance indicators and design constraints of the circuit to determine the optimization target; wherein the performance indicators include gain, bandwidth, noise figure and linearity in the circuit; the design constraints include power consumption limit, area limit and manufacturing process limit of the circuit; and generating the objective function based on the optimization target using the large model.

[0011] Optionally, mapping the electrical characteristics of the transistors in the circuit into design parameters of the circuit to generate a corresponding netlist includes: parsing the electrical characteristics of the transistors, including transconductance, transition frequency, overdrive voltage and drain-source voltage; associating the transconductance, transition frequency, overdrive voltage and drain-source voltage of the transistors with the design parameters; and generating a corresponding netlist from the associated content.

[0012] Optionally, the method further includes: taking the channel length and channel width of the transistor as design parameters.

[0013] Optionally, the transconductance of the transistor The associated formula with the design parameters is: ; in, is the carrier mobility of the transistor, is the oxide layer capacitance of the transistor, is the channel width of the transistor, is the channel length of the transistor, is the drain-source current of the transistor; The transistor's corner frequency The associated formula with the design parameters is: ; in, is the initial transconductance of the transistor; The overdrive voltage of the transistor The associated formula with the design parameters is: ; in, is the initial turning frequency of the transistor; The drain-source voltage of the transistor The associated formula with the design parameters is: .

[0014] Optionally, the objective function is combined with the simulation results to optimize the initial solution to obtain an optimal circuit design, including: constructing a comprehensive optimization model using the objective function and the simulation results; iteratively optimizing the comprehensive optimization model using an optimization algorithm to obtain a circuit design model; and generating an optimal circuit design through the circuit design model.

[0015] Optionally, the optimization algorithm includes a genetic algorithm, a particle swarm optimization algorithm and a simulated annealing algorithm.

[0016] Implementing one of the above technical solutions of the present invention has the following advantages or beneficial effects: The large model-assisted circuit design method for embedding transistor electrical characteristics provided by the present invention uses the large model as the core controller in analog integrated circuit design, first generates a preliminary solution according to the design goal, and then optimizes the preliminary solution by embedding the electrical characteristics of the transistor and simulating the circuit, thereby realizing the full process automation from design goal extraction, knowledge retrieval, target function generation, electrical characteristic mapping, simulation model generation and final optimization, without the need for human intervention throughout the process, thus achieving high automation of electronic design; not only significantly improving the efficiency of analog integrated circuit design, but also ensuring the accuracy and reliability of design results, thereby promoting the development of analog integrated circuit design technology. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. It is obvious that the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work. In the drawings: Figure 1 is a flow chart of a large model-assisted circuit design method for embedding transistor electrical characteristics according to an embodiment of the present invention; Figure 2 is a flow chart of step S1 of a large model-assisted circuit design method for embedding transistor electrical characteristics according to an embodiment of the present invention; Figure 3 is a flow chart of step S2 of the large model auxiliary circuit design method for embedding transistor electrical characteristics according to an embodiment of the present invention; Figure 4 It is the final optimized circuit diagram of the embodiment of the present invention. DETAILED DESCRIPTION

[0018] In order to make the purpose, technical solutions and advantages of the present invention clearer, the various exemplary embodiments to be described below will refer to the corresponding drawings, which constitute a part of the exemplary embodiments, wherein various exemplary embodiments that may be used to implement the present invention are described. Unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The implementation methods described in the following exemplary embodiments do not represent all implementation methods consistent with the present disclosure. It should be understood that they are only examples of processes, methods, devices, etc. that are consistent with some aspects of the present disclosure as detailed in the attached claims, and other embodiments may also be used, or the embodiments listed herein may be modified in structure and function without departing from the scope and essence of the present invention.

[0019] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", etc. indicate the orientation or positional relationship based on the drawings, which is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the elements referred to must have a specific orientation, be constructed and operated in a specific orientation. The terms "first", "second", etc. are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. The term "multiple" means two or more. The terms "connected" and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, an integral connection, a mechanical connection, an electrical connection, a communication connection, a direct connection, an indirect connection through an intermediate medium, and can be the internal connection of two elements or the interaction relationship between two elements. The term "and / or" includes any and all combinations of one or more related listed items. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to the specific circumstances.

[0020] In order to illustrate the technical solution of the present invention, a specific embodiment is used below for description, and only the parts related to the embodiment of the present invention are shown.

[0021] Embodiment 1: like Figure 1 As shown, the present invention provides a large model-assisted circuit design method embedded with transistor electrical characteristics, including the following steps: S1, obtaining the design goal of the circuit, generating a preliminary solution of the design goal using a large model, and generating an objective function for optimizing the circuit based on the preliminary solution of the design goal; S2, mapping the electrical characteristics of the transistors in the circuit to the design parameters of the circuit, generating a corresponding netlist, and simulating the circuit design based on the netlist to obtain a simulation result; S3, combining the objective function with the simulation result, optimizing the preliminary solution, and obtaining the optimal circuit design.

[0022] The large model-assisted circuit design method with embedded transistor electrical characteristics provided in this embodiment is suitable for the field of electronic design automation, especially for the automated design of analog integrated circuits. The large model is used as the core controller in the analog integrated circuit design. A preliminary solution is first generated according to the design goal, and then the preliminary solution is optimized by embedding the electrical characteristics of the transistor and simulating the circuit. The whole process from design goal extraction, knowledge retrieval, target function generation, to electrical characteristics mapping, simulation model generation and final optimization is automated. No human intervention is required throughout the process, thus achieving a high degree of automation in electronic design. It not only significantly improves the efficiency of analog integrated circuit design, but also ensures the accuracy and reliability of the design results, thereby promoting the development of analog integrated circuit design technology.

[0023] Next, combine Figures 1 to 4, the specific implementation steps of the large model auxiliary circuit design method with embedded transistor electrical characteristics provided in this embodiment are described in detail: First, execute step S1, obtain the design goal of the circuit, use the large model to generate a preliminary solution of the design goal, and generate an objective function for optimizing the circuit based on the preliminary solution of the design goal. This embodiment uses a large model (Large Language Model, LLM for short, full name large language model) as the core controller, inputs the circuit specifications into the large model, and the large model automatically extracts the design goals based on the circuit specifications. It should be noted that circuit specifications refer to the performance parameters and characteristics of circuit components in the circuit, including size, parameters and types; circuit specifications are important indicators for circuit design and assembly.

[0024] Specifically, Figure 2 As shown, the initial solution of the design goal is generated by using a large model, including: S11, searching the knowledge base for domain knowledge related to the optimization circuit design profession according to the design goal; after obtaining the design goal, the circuit design professional knowledge related to the design goal will be retrieved from the knowledge base of the large language model, and based on the retrieved domain knowledge, the large model can be assisted to generate a high-quality initial solution that meets the design requirements. S12, decomposing the design goal into multiple subtasks, and embedding the domain knowledge as a constraint in the optimization process of multiple subtasks to generate an initial solution of the design goal. Using a large model to decompose the design goal into multiple subtasks, such as transistor size optimization tasks, matching circuit adjustment tasks, bias point optimization tasks, temperature compensation design tasks, etc.; and using relevant domain knowledge as the optimization conditions of multiple subtasks can ensure that the optimization process of each subtask meets the professional standards and design requirements of analog integrated circuit design. Among them, the initial solution of the design goal includes the initial size setting of the transistor, the bias circuit parameters, and the configuration of the basic topology structure.

[0025] It should be noted that in the optimization process of multiple subtasks, the electrical behavior of the transistor is fully described by combining the large-signal parameters and small-signal parameters of the circuit, decoupling the circuit characteristics from the process limitations of the circuit. Large-signal parameters are used to analyze the behavior of the circuit under large-amplitude input signals, usually involving the nonlinear characteristics of nonlinear elements (such as transistors); small-signal parameters are used to analyze the behavior of the circuit under tiny input signals, assuming that the signal amplitude is small enough, the nonlinear elements can be approximated as linear, usually involving the linear characteristics of nonlinear elements; combining large-parameter signals and small-parameter signals can fully understand the performance of the circuit under different signal conditions, which is conducive to the decoupling of circuit characteristics from circuit process limitations. Small-signal parameters include transconductance and the turning frequency etc. Large signal parameters include drain-source voltage and overdrive voltage This characterization method can more accurately reflect the performance of transistors under different working conditions, ensuring that the optimization results can meet the actual application requirements of the circuit while taking into account the process constraints.

[0026] Furthermore, the objective function of the optimized circuit is generated based on the initial solution of the optimization target, including: analyzing the performance indicators and design constraints of the circuit to determine the optimization target; wherein the performance indicators include the gain, bandwidth, noise figure and linearity in the circuit; the design constraints include the power consumption limit, area limit and manufacturing process limit of the circuit; and according to the optimization target, the objective function is generated using the large model. Based on the performance indicators and design constraints, the large language model can generate a specific and accurate objective function. In order to make the generated objective function open to subsequent models, the objective function can be converted into an interface that can be called by subsequent steps, so that the model can receive feedback at the level of the complex physical world, eliminating the dependence on the mathematical capabilities of the large model during the optimization process.

[0027] Then, step S2 is executed to map the electrical characteristics of the transistors in the circuit to the design parameters of the circuit, generate a corresponding netlist, and simulate the design of the circuit according to the netlist to obtain a simulation result. Circuit simulation based on electrical characteristics can more accurately reflect the performance of transistors under different working conditions, ensuring that the optimization results can meet the actual application requirements of the circuit while taking into account process constraints.

[0028] Specifically, Figure 3 As shown, the electrical characteristics of the transistor in the circuit are mapped to the design parameters of the circuit, and the corresponding netlist is generated, including: S21, parsing the electrical characteristics of the transistor, including transconductance, transition frequency, overdrive voltage and drain-source voltage; S22, associating the transconductance, transition frequency, overdrive voltage and drain-source voltage of the transistor with the design parameters; S23, generating a corresponding netlist from the associated content. In this process, the channel length L and channel width W of the transistor are used as design parameters. The netlist is used to describe the connection relationship and component information of each component in the circuit, and usually includes the following information: the type of component in the circuit (such as transistor, resistor, capacitor, etc.), the specific parameter value describing the component (such as the resistance of a resistor is 1Ω), the connection relationship between the components (the connection relationship between the drain, gate, source and body of the transistor M1), etc.

[0029] In step S22, the relationships between the electrical characteristics and the design parameters are: The correlation formula with the design parameters is: ; in, is the carrier mobility of the transistor, is the oxide capacitance of the transistor, is the channel width of the transistor, is the channel length of the transistor, is the drain-source current of the transistor; the formula shows that the transconductance and By adjusting the channel width and channel length , the transconductance of the transistor can be precisely controlled, thereby optimizing the gain and other performance indicators of the circuit.

[0030] Transistor corner frequency The correlation formula with the design parameters is: ; in, is the initial transconductance of the transistor; this formula shows that the corner frequency and By shortening the channel length , which can significantly increase the transistor's transition frequency and improve the circuit's bandwidth and high-frequency performance.

[0031] Transistor overdrive voltage The correlation formula with the design parameters is: ; in, is the initial corner frequency of the transistor; this formula shows and By properly designing the channel length L and channel width W, the overdrive voltage of the transistor can be optimized to ensure the stability and linearity of the circuit under different working conditions.

[0032] The drain-source voltage of the transistor The correlation formula with the design parameters is: ; illustrate and By adjusting the channel length and channel width , the drain-source voltage of the transistor can be controlled to meet the power consumption and performance requirements of the circuit.

[0033] Based on the above formula, the electrical characteristics of the transistor can be mapped to specific design parameters and It can more accurately reflect the performance of transistors under different working conditions, ensuring that the optimization results can meet the actual application requirements of the circuit while taking into account the process constraints. and , which can ensure that the electrical characteristics are accurately reflected in the simulation tool. The netlist records the specific parameter configuration of each transistor in detail, providing basic data for subsequent simulation and optimization.

[0034] As an optional implementation, a simulation interface compatible with simulation tools (such as SPICE) can be constructed through a large model to be opened to subsequent simulation tools to achieve accurate simulation of electrical characteristics. The simulation interface can effectively pass the design parameters to the simulation tool and feed back the simulation results to the optimization module to ensure that the feedback during the optimization process can effectively reflect the actual performance of the design parameters.

[0035] Finally, execute step S3, combine the objective function with the simulation results, optimize the initial solution, and obtain the optimal circuit design. By combining the objective function with the simulation results to optimize the initial solution, the model can learn a large number of complex electrical characteristics and improve the accuracy of circuit design; you only need to enter the circuit specifications to get the following: Figure 4 The circuit design diagram shown does not require any human intervention throughout the process, thus achieving high-precision automation of circuit design.

[0036] Specifically, the objective function is combined with the simulation results to optimize the circuit to obtain the optimal circuit design, including: S31, using the objective function and the simulation results to build a comprehensive optimization model; S32, using the optimization algorithm to iteratively optimize the comprehensive optimization model to obtain a circuit design model; S3, generating the optimal circuit design through the circuit design model. Figure 4 As shown, the circuit diagram obtained by the method of this embodiment only needs to input the required circuit specifications to obtain a high-precision circuit design, which realizes a high degree of automation of circuit design and greatly improves the design efficiency. Optionally, when iteratively optimizing the comprehensive optimization model, the optimization algorithm includes a genetic algorithm, a particle swarm optimization algorithm, and a simulated annealing algorithm. The comprehensive optimization model is iteratively optimized using the optimization algorithm to meet the specifications required in the design goal.

[0037] After obtaining the final circuit design scheme, the circuit design scheme can also be evaluated through the large model; for example, the final design scheme can be evaluated by checking the convergence of the curve or the distribution of the Pareto front. If it is detected that the final design scheme has not converged, the large model will adjust the hyperparameters in the optimization process (such as learning rate, number of iterations, etc.) and re-execute the optimization steps to ensure the convergence and reliability of the optimization results.

[0038] The embodiment is only a specific example and does not represent only one implementation mode of the present invention.

[0039] The above description is only the preferred embodiment of the present invention. It is known to those skilled in the art that various changes or equivalent substitutions may be made to these features and embodiments without departing from the spirit and scope of the present invention. In addition, under the teachings of the present invention, these features and embodiments may be modified to adapt to specific circumstances and materials without departing from the spirit and scope of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of this application belong to the protection scope of the present invention.

Claims

1. A large model-assisted circuit design method embedded with transistor electrical characteristics, characterized in that: The following steps are involved: Obtaining a design goal of a circuit, generating a preliminary solution of the design goal using a large model, and generating an objective function for optimizing the circuit based on the preliminary solution of the design goal; Mapping electrical characteristics of transistors in the circuit into design parameters of the circuit, generating a corresponding netlist, and simulating the design of the circuit according to the netlist to obtain simulation results; The objective function is combined with the simulation results, the initial solution is optimized, and the optimal circuit design is obtained.

2. A large model-assisted circuit design method for embedding transistor electrical characteristics according to claim 1, characterized in that: The method of generating a preliminary solution of the design target by using a large model includes: Retrieving domain knowledge related to the optimization circuit design profession in the knowledge base according to the design goal; The design goal is decomposed into multiple subtasks, and the domain knowledge is embedded as a constraint condition in the optimization process of the multiple subtasks to generate a preliminary solution to the design goal.

3. A large model-assisted circuit design method for embedding transistor electrical characteristics according to claim 2, characterized in that: During the optimization of the plurality of subtasks, the electrical behavior of the transistor is fully described by combining the large signal parameters and the small signal parameters of the circuit, thereby decoupling the circuit characteristics from the process limitations of the circuit.

4. The large model-assisted circuit design method for embedding transistor electrical characteristics according to claim 1, characterized in that: The initial solution of the design goal includes: initial size setting of the transistor, bias circuit parameters and configuration of the basic topology structure.

5. The large model-assisted circuit design method for embedding transistor electrical characteristics according to claim 1, characterized in that: Generating an objective function for optimizing the circuit according to the initial solution of the optimization target includes: Analyze the performance indicators and design constraints of the circuit to determine the optimization target; wherein the performance indicators include the gain, bandwidth, noise figure and linearity in the circuit; the design constraints include the power consumption limit, area limit and manufacturing process limit of the circuit; According to the optimization goal, the objective function is generated using the large model.

6. The method for designing a circuit with a large model embedded with the electrical characteristics of a transistor according to claim 1, characterized in that: Mapping the electrical characteristics of the transistors in the circuit into design parameters of the circuit to generate a corresponding netlist includes: Analyzing the electrical characteristics of the transistor, including transconductance, corner frequency, overdrive voltage, and drain-source voltage; correlating a transconductance, a corner frequency, an overdrive voltage, and a drain-source voltage of the transistor with the design parameters; Generate a corresponding netlist from the associated content.

7. A large model-assisted circuit design method for embedding transistor electrical characteristics according to claim 6, characterized in that: The method further includes: taking the channel length and channel width of the transistor as design parameters.

8. A large model-assisted circuit design method for embedding transistor electrical characteristics according to claim 7, characterized in that: The transconductance of the transistor The associated formula with the design parameters is: ； in, is the carrier mobility of the transistor, is the oxide layer capacitance of the transistor, is the channel width of the transistor, is the channel length of the transistor, is the drain-source current of the transistor; The transistor's corner frequency The associated formula with the design parameters is: ； in, is the initial transconductance of the transistor; The overdrive voltage of the transistor The associated formula with the design parameters is: ； in, is the initial turning frequency of the transistor; The drain-source voltage of the transistor The associated formula with the design parameters is: 。 9. The large model-assisted circuit design method for embedding transistor electrical characteristics according to claim 1, characterized in that: The step of combining the objective function with the simulation result to optimize the initial solution and obtain an optimal circuit design includes: Constructing a comprehensive optimization model using the objective function and the simulation results; Iteratively optimizing the comprehensive optimization model using an optimization algorithm to obtain a circuit design model; An optimal circuit design is generated through the circuit design model.

10. A large model-assisted circuit design method for embedding transistor electrical characteristics according to claim 9, characterized in that: The optimization algorithms include genetic algorithm, particle swarm optimization algorithm and simulated annealing algorithm.

Images