Virtual metal filling method, electronic equipment and storage medium

Abstract

The embodiment of the invention provides a virtual metal filling method, electronic equipment and a storage medium, virtual metal comprises a plurality of virtual metal blocks, the method comprises the steps that a to-be-filled layout is acquired, and the to-be-filled layout comprises a plurality of metal layers; determining a fillable area of each metal layer; the fillable area is a blank area used for filling virtual metal; marking a first overlapping region between the fillable regions of the multiple metal layers; filling a plurality of virtual metal blocks in fillable areas of any marked at least two continuous metal layers respectively; in the at least two metal layers filled with the multiple virtual metal blocks, multiple second overlapping areas between the multiple virtual metal blocks in the two adjacent metal layers are marked; in the plurality of second overlapping areas, marking the second overlapping areas meeting a preset condition as third overlapping areas; and filling at least one virtual through hole in the third overlapping region.

Description

Technical Field

[0001] The present disclosure relates to the field of semiconductor technology, and in particular to a virtual metal filling method, electronic equipment and storage medium. Background Art

[0002] In integrated circuit layout, dummy elements are elements that do not directly participate in the circuit function but are added to the layout to improve the manufacturing process and circuit performance. Dummy elements help maintain the global relative consistency of the chip and reduce the impact of local non-uniformity in the manufacturing process on the chip structure and performance.

[0003] Dummy metal filling is an important technology in integrated circuit manufacturing. In layout design, dummy metal needs to be filled to meet the production process requirements for each metal layer of the chip. In related technologies, dummy metal filling will bring some problems. Summary of the invention

[0004] Embodiments of the present disclosure provide a virtual metal filling method, an electronic device, and a storage medium.

[0005] In a first aspect, an embodiment of the present disclosure provides a method for filling virtual metal, wherein the virtual metal includes a plurality of virtual metal blocks, and the method includes:

[0006] Acquire a layout to be filled, wherein the layout to be filled includes multiple metal layers;

[0007] Determine a fillable area of ​​each metal layer; the fillable area is a blank area for filling the virtual metal;

[0008] marking a first overlapping region between the fillable regions of the multiple metal layers;

[0009] Fill the multiple virtual metal blocks in the fillable areas of any marked at least two consecutive metal layers respectively;

[0010] In at least two of the metal layers filled with the multiple virtual metal blocks, marking a plurality of second overlapping regions between the multiple virtual metal blocks in two adjacent metal layers;

[0011] Among the plurality of second overlapping regions, marking the second overlapping region satisfying a preset condition as a third overlapping region;

[0012] At least one dummy through hole is filled in the third overlapping area.

[0013] In some embodiments, marking the first overlapping region between the fillable regions of the multi-layer metal layer comprises:

[0014] Determining whether the first overlapping region exists between the fillable regions of the multiple metal layers;

[0015] If the first overlapping region exists, the first overlapping region is determined, and the first overlapping region between the fillable regions of any at least two consecutive metal layers in the multiple metal layers is marked.

[0016] In some embodiments, before filling the plurality of virtual metal blocks respectively, the method further comprises:

[0017] Determine the displacement distance between the virtual metals in any at least two consecutive metal layers according to the displacement formula;

[0018] The multiple virtual metal blocks in the virtual metal all move the same displacement distance.

[0019] In some embodiments, the displacement distance includes a first displacement distance along a first direction and a second displacement distance along a second direction;

[0020] The first displacement distance is equal to the ratio of the first size to the number of layers of the metal layer, and the second displacement distance is equal to the ratio of the second size to the number of layers of the metal layer;

[0021] The first size is equal to the sum of the length of the virtual metal block along the first direction and the spacing between adjacent virtual metal blocks, and the second size is equal to the sum of the length of the virtual metal block along the second direction and the spacing between adjacent virtual metal blocks.

[0022] In some embodiments, among the plurality of second overlapping regions, marking the second overlapping region satisfying a preset condition as a third overlapping region includes:

[0023] In the plurality of second overlapping regions, calculating the length of each of the second overlapping regions along the first direction and the length along the second direction;

[0024] determining whether the plurality of second overlapping regions meet the preset condition according to the lengths of all the second overlapping regions along the first direction and the lengths of all the second overlapping regions along the second direction;

[0025] If the preset condition is met, the second overlapping area that meets the preset condition is marked as the third overlapping area.

[0026] In some embodiments, the preset conditions include:

[0027] A length of the second overlapping area along the first direction and a length of the second overlapping area along the second direction are both greater than a preset length.

[0028] In some embodiments, the method further comprises:

[0029] The multiple virtual metal blocks and the at least one virtual through hole are filled in a uniform filling manner.

[0030] In some embodiments, the shapes of the virtual metal block include: square, rectangle, parallelogram, triangle, ring, circle, and ellipse.

[0031] In a second aspect, an embodiment of the present disclosure provides an electronic device, characterized in that the electronic device includes a memory and a processor, wherein:

[0032] The memory is used to store a computer program that can be run on the processor;

[0033] The processor is configured to execute the method as described in any one of the first aspects when running the computer program.

[0034] In a third aspect, an embodiment of the present disclosure provides a storage medium, characterized in that the storage medium stores a computer program, and when the computer program is executed by at least one processor, it implements the method as described in any one of the first aspects.

[0035] The disclosed embodiment provides a method for filling virtual metal, an electronic device and a storage medium, wherein the virtual metal includes a plurality of virtual metal blocks, and the method includes: obtaining a layout to be filled, wherein the layout to be filled includes multiple metal layers; determining a fillable area of ​​each metal layer; the fillable area is a blank area for filling virtual metal; marking the first overlapping area between the fillable areas of the multiple metal layers; filling multiple virtual metal blocks in the fillable areas of any continuous at least two marked metal layers; marking multiple second overlapping areas between multiple virtual metal blocks in two adjacent metal layers in at least two metal layers filled with multiple virtual metal blocks; marking the second overlapping areas that meet preset conditions as third overlapping areas in the multiple second overlapping areas; and filling at least one virtual through hole in the third overlapping area. In this way, virtual through holes are filled in the third overlapping area between the multiple virtual metal blocks, and the adjacent two layers of virtual metal are connected through the virtual through holes, thereby realizing the overall interconnection of the local area, and the heat generated by the corresponding metal layer can be dissipated through the connected virtual metal, thereby improving the heat dissipation efficiency and achieving uniform heat distribution. In addition, through the filling method, the staggered distribution of multiple virtual metal blocks in at least two continuous metal layers is achieved, so that it has an electromagnetic shielding effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 A schematic diagram of a flow chart of a method for filling virtual metal provided in an embodiment of the present disclosure;

[0037] Figure 2 A schematic diagram of a semiconductor structure provided in an embodiment of the present disclosure Figure 1 ;

[0038] Figure 3 A schematic diagram of a semiconductor structure provided in an embodiment of the present disclosure Figure 2 ;

[0039] Figure 4 A schematic diagram of the structure of an electronic device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0040] The following will be combined with the drawings in the embodiments of the present disclosure to clearly and completely describe the technical solutions in the embodiments of the present disclosure. It is understood that the specific embodiments described herein are only used to explain the relevant disclosure, rather than to limit the disclosure. It should also be noted that, for the convenience of description, only the parts related to the relevant disclosure are shown in the drawings.

[0041] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. The terms used herein are only for the purpose of describing the embodiments of the present disclosure and are not intended to limit the present disclosure.

[0042] In the following description, reference is made to “some embodiments”, which describe a subset of all possible embodiments, but it will be understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0043] It should be pointed out that the terms "first\second\third" involved in the embodiments of the present disclosure are merely used to distinguish similar objects and do not represent a specific ordering of the objects. It can be understood that "first\second\third" can be interchanged in a specific order or sequence where permitted, so that the embodiments of the present disclosure described here can be implemented in an order other than that illustrated or described here.

[0044] In the chip design and manufacturing process, dummy elements play an important role. Among them, the dummy elements of the back-end metal layer (BEOL) are used for positioning and monitoring during the manufacturing process to ensure the accuracy of the process and the yield of the chip and reduce the non-uniformity in the manufacturing process.

[0045] In the related art, the virtual metals filled in two adjacent metal layers are generally in direct contact, and the heat generated by the chip cannot be dissipated in time, causing the chip temperature to rise and affecting the chip performance. In addition, there is electromagnetic interference between the metal layers.

[0046] Based on this, the embodiment of the present disclosure provides a method for filling virtual metal, wherein the virtual metal includes multiple virtual metal blocks, and the method includes: obtaining a layout to be filled, wherein the layout to be filled includes multiple metal layers; determining the fillable area of ​​each metal layer; the fillable area is a blank area for filling virtual metal; marking the first overlapping area between the fillable areas of the multiple metal layers; filling multiple virtual metal blocks in the fillable areas of any continuous at least two marked metal layers; marking multiple second overlapping areas between multiple virtual metal blocks in two adjacent metal layers in at least two metal layers filled with multiple virtual metal blocks; marking the second overlapping areas that meet the preset conditions as the third overlapping areas in the multiple second overlapping areas; and filling at least one virtual through hole in the third overlapping area. In this way, virtual through holes are filled in the third overlapping area between the multiple virtual metal blocks, and the two adjacent virtual metal layers are connected through the virtual through holes, thereby realizing the overall interconnection of the local area, and the heat generated by the corresponding metal layer can be dissipated through the connected virtual metal, thereby improving the heat dissipation efficiency and achieving uniform heat distribution. In addition, through the filling method, the staggered distribution of multiple virtual metal blocks in at least two continuous metal layers is achieved, so that it has an electromagnetic shielding effect.

[0047] The embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings.

[0048] In one embodiment of the present disclosure, see Figure 1 , which shows a schematic flow chart of a method for filling virtual metal provided by an embodiment of the present disclosure. The virtual metal includes a plurality of virtual metal blocks. Figure 1 As shown, the method may include:

[0049] S101, obtaining a layout to be filled, where the layout to be filled includes multiple metal layers.

[0050] It should be noted that the embodiment of the present disclosure provides a method for filling virtual metal, specifically a method for designing and implementing virtual metal that can be used for heat dissipation and electromagnetic shielding. Through this method, the filling process of the virtual metal is adjusted so that the virtual metal has a certain optimized heat dissipation and electromagnetic shielding effect.

[0051] Here, the metal layer may be BEOL, such as a redistribution layer (RDL). The dummy metal filled in the RDL may be represented by a dummy RDL. The multi-layer metal layer may include a first metal layer, a second metal layer, ..., an Nth metal layer (N is an integer greater than 1), and the N metal layers are represented by M1, M2, ..., MN, respectively. M1 is the first metal layer, M2 is located above M1, M3 is located above M2, and so on.

[0052] It should also be noted that the obtained layout to be filled does not have dummy metal filled in it, and it is necessary to first layout the devices with actual functions, such as circuit functions; after the main graphics of the device layout are determined, dummy metal is filled in each metal layer according to the position of the main graphics and the filling rule (dummy rule). Among them, the filling rule refers to the rules that need to be met when filling the dummy metal, such as the area that can be filled with dummy metal.

[0053] S102, determining a fillable area of ​​each metal layer; the fillable area is a blank area used to fill virtual metal.

[0054] It should be noted that not all areas of the metal layer can be used to fill the dummy metal. Before filling the dummy metal, it is necessary to first determine the fillable area of ​​each metal layer.

[0055] Here, determining the fillable region of each metal layer may include determining a position of the fillable region and calculating an area of ​​the fillable region.

[0056] It should also be noted that the fillable area of ​​each metal layer can be determined by electronic design automation (EDA) software. EDA refers to the design method that uses computer-aided design software to complete the functional design, synthesis, verification, physical design (including layout, routing, layout, design rule checking, etc.) of ultra-large-scale integrated circuit chips.

[0057] Exemplarily, the fillable area of ​​each metal layer can be determined by the Calibre software in the EDA software, which is not specifically limited. Calibre is a software for integrated circuit design verification and manufacturing preparation. It is widely used in the semiconductor industry to verify design layout, simulate electrical characteristics, perform process simulation, etc. to ensure the reliability and manufacturability of the design. Specifically, the Calibre software can determine the framed area based on the chip, and the framed area cannot be used to fill virtual metal; then determine whether the remaining positions of the chip can be filled with virtual metal based on the position of the main graphic on the chip, that is, determine the fillable area.

[0058] S103 , marking a first overlapping region between fillable regions of the multiple metal layers.

[0059] It should be noted that after determining the fillable area of ​​each metal layer, all first overlapping areas between the fillable areas of multiple metal layers can be marked for subsequent operations. It can be understood that the overlap of the fillable areas refers to the overlap of the orthographic projections of the fillable areas along the stacking direction of the metal layers.

[0060] It should also be noted that the fillable areas of all metal layers can be scanned by EDA software, such as Calibre software, to determine the first overlapping area and perform the first marking, and there is no specific limitation on this.

[0061] In some embodiments, marking a first overlapping region between fillable regions of a plurality of metal layers comprises:

[0062] Determining whether there is a first overlapping area between fillable areas of the multiple metal layers;

[0063] If the first overlapping region exists, the first overlapping region is determined, and the first overlapping region between any fillable regions of at least two consecutive metal layers in the multi-layer metal layer is marked.

[0064] It should be noted that after calculating the fillable areas of each metal layer on the chip, it is determined whether the fillable areas of the N metal layers overlap, that is, whether there is a first overlapping area, based on the calculation results. If the fillable areas of the N metal layers overlap, that is, there is a first overlapping area, the first overlapping area is extracted; if the fillable areas of the N metal layers do not overlap, that is, there is no first overlapping area, no subsequent operations are performed.

[0065] It should also be noted that if there is a first overlapping area, after all the first overlapping areas are determined, all the first overlapping areas can be marked, or the area where the fillable area of ​​any adjacent L (L is an integer greater than 1 and less than or equal to N) layers in the N metal layers overlaps (i.e., the first overlapping area) can be marked for the first time.

[0066] Exemplarily, if N=4, and the four metal layers are M1, M2, M3, and M4, the first overlapping area between the fillable areas of any two adjacent metal layers can be marked, for example, there is an overlapping area between the fillable areas of M1 and M2, or there is an overlapping area between the fillable areas of M2 and M3, or there is an overlapping area between the fillable areas of M3 and M4; the first overlapping area between the fillable areas of any three adjacent metal layers can also be marked, for example, there are overlapping areas between the fillable areas of M1, M2, and M3, and there are overlapping areas between the fillable areas of M2, M3, and M4; the first overlapping area between the fillable areas of the four metal layers M1, M2, M3, and M4 can also be marked. The disclosed embodiment does not make specific limitations on this, and all first overlapping areas, or the first overlapping areas between the fillable areas of any two or more adjacent metal layers, can be marked according to actual needs.

[0067] S104 , filling a plurality of virtual metal blocks in any marked fillable areas of at least two consecutive metal layers.

[0068] It should be noted that after marking the first overlapping region, a plurality of virtual metal blocks are respectively filled in any marked adjacent two or more metal layer fillable regions.

[0069] Exemplarily, if the first overlapping area between the fillable areas of M1 and M2 is marked, multiple virtual metal blocks are filled in the fillable areas of M1 and M2, respectively. If the first overlapping area between the fillable areas of M1, M2, and M3 is marked, multiple virtual metal blocks can be filled in the fillable areas of any two adjacent metal layers, such as the fillable areas of M1 and M2, or the fillable areas of M2 and M3, respectively; multiple virtual metal blocks can also be filled in the fillable areas of the three layers of M1, M2, and M3, respectively. The embodiments of the present disclosure do not make specific limitations on this, and multiple virtual metal blocks can be filled in the fillable areas of any two or more adjacent metal layers that have been marked, respectively, according to actual needs.

[0070] In some embodiments, before filling the plurality of virtual metal blocks respectively, the method further comprises:

[0071] According to the displacement formula, determining the displacement distance between virtual metals in any at least two consecutive metal layers;

[0072] Wherein, multiple virtual metal blocks in the virtual metal all move the same displacement distance.

[0073] It should be noted that if the virtual metal is not shifted before filling, the multiple virtual metal blocks in adjacent metal layers are almost completely corresponding to each other, and the anti-electromagnetic interference effect is poor. In the embodiment of the present disclosure, the virtual metals in any two or more consecutive metal layers are shifted according to the shift formula, and the blank areas (i.e., gaps) between the multiple virtual metal blocks in the lower metal layer can be covered by the multiple virtual metal blocks in the upper metal layer. That is to say, along the stacking direction of the metal layers, the orthographic projections of the multiple virtual metal blocks in the upper metal layer overlap with the orthographic projections of the blank areas of the multiple virtual metal blocks in the lower metal layer, so that the structure of this virtual metal can play an electromagnetic shielding effect.

[0074] Exemplarily, if multiple virtual metal blocks are filled in the fillable areas of M1 and M2 respectively, and the virtual metal of M2 is shifted relative to the virtual metal of M1 (or the virtual metal of M1 is shifted relative to the virtual metal of M2) according to the shift formula, the multiple virtual metal blocks in M2 cover the blank areas between the multiple virtual metal blocks in M1. If multiple virtual metal blocks are filled in the fillable areas of M1, M2, and M3 respectively, and the virtual metal of M2 is shifted relative to the virtual metal of M1 (or the virtual metal of M1 is shifted relative to the virtual metal of M2) according to the shift formula, and the virtual metal of M3 is shifted relative to the virtual metal of M2 (or the virtual metal of M2 is shifted relative to the virtual metal of M3) according to the shift formula, that is to say, a step-like structure is formed between the virtual metals of M1, M2, and M3, so that the blank areas between the multiple virtual metal blocks in M1 can be covered by the multiple virtual metal blocks in M2 and the multiple virtual metal blocks in M3, and the blank areas between the multiple virtual metal blocks in M2 can also be covered by the multiple virtual metal blocks in M3. The overall virtual metal structure has fewer blank areas and has a good electromagnetic shielding effect.

[0075] In some embodiments, the shift distance includes a first shift distance along the first direction and a second shift distance along the second direction;

[0076] The first displacement distance is equal to the ratio of the first size to the number of metal layers, and the second displacement distance is equal to the ratio of the second size to the number of metal layers;

[0077] The first size is equal to the sum of the length of the virtual metal block along the first direction and the spacing between adjacent virtual metal blocks, and the second size is equal to the sum of the length of the virtual metal block along the second direction and the spacing between adjacent virtual metal blocks.

[0078] It should be noted that the shift formula includes formula (1) and formula (2):

[0079] ShiftX=(Dummy pitch X) / L (1)

[0080] ShiftY=(Dummy pitch Y) / L (2)

[0081] Among them, ShiftX represents the first shift distance; Dummy pitch X represents the first size; ShiftY represents the second shift distance; Dummy pitch Y represents the second size; L represents the number of metal layers. For details, please refer to the following Figure 2 and Figure 3 To understand.

[0082] It should also be noted that on the surface of the chip, two directions perpendicular to each other are defined, namely, a first direction (X) and a second direction (Y). In the embodiment of the present disclosure, the first direction and the second direction intersect, and the first direction and the second direction may be perpendicular to each other or may intersect at other angles, which is not specifically limited. Exemplarily, the specific implementation of the embodiment of the present disclosure is described in detail by taking the first direction and the second direction being perpendicular to each other as an example.

[0083] It should also be noted that the first size and the second size may be sizes related to a virtual metal block in any one of at least two consecutive metal layers, and no specific limitation is imposed on this.

[0084] For example, if L=2, the two metal layers are M1 and M2, the coordinates of the lower left corner of the virtual metal of M1 are (0, 0), and after the shift, the coordinates of the lower left corner of the virtual metal of M2 are (ShiftX, ShiftY). If L=3, the three metal layers are M1, M2, and M3, the coordinates of the lower left corner of the virtual metal of M1 are (0, 0), and after the shift, the coordinates of the lower left corner of the virtual metal of M2 are (ShiftX, ShiftY), and the coordinates of the lower left corner of the virtual metal of M3 are (2ShiftX, 2ShiftY).

[0085] In the embodiment of the present disclosure, the shift is performed according to the shift formula, so that there are as many overlapping areas between the metal layers as possible.

[0086] In some embodiments, the method further comprises:

[0087] A uniform filling method is adopted to fill multiple virtual metal blocks.

[0088] In this way, the uniformity of filling of the multiple virtual metal blocks can be ensured, so that the virtual metal blocks are placed at equal intervals.

[0089] S105 . In at least two metal layers filled with a plurality of virtual metal blocks, mark a plurality of second overlapping regions between a plurality of virtual metal blocks in two adjacent metal layers.

[0090] It should be noted that, in the fillable area of ​​any marked adjacent two or more metal layers, after filling multiple virtual metal blocks respectively, the fillable area of ​​the metal layer filled with multiple virtual metal blocks can be scanned by EDA software, such as Calibre software, to determine the overlapping area (i.e., the second overlapping area) between the multiple virtual metal blocks in the two adjacent metal layers, and perform corresponding second marking, without specific limitation.

[0091] S106. Among the multiple second overlapping regions, mark a second overlapping region that meets a preset condition as a third overlapping region.

[0092] It should be noted that after marking multiple second overlapping areas, whether the second overlapping areas meet the preset conditions can be determined by marking the second overlapping areas that meet the preset conditions for a third time through EDA software, such as Calibre software, and there is no specific limitation on this.

[0093] Specifically, in some embodiments, among the plurality of second overlapping regions, marking a second overlapping region that meets a preset condition as a third overlapping region includes:

[0094] In the plurality of second overlapping regions, calculating the length of each second overlapping region along the first direction and the length along the second direction;

[0095] Determining whether the plurality of second overlapping regions meet a preset condition according to the lengths of all the second overlapping regions along the first direction and along the second direction;

[0096] If the preset condition is met, the second overlapping area meeting the preset condition is marked as the third overlapping area.

[0097] It should be noted that the length of the second overlapping area along the first direction can be represented by X1, and the length of the second overlapping area along the second direction can be represented by Y1. In multiple second overlapping areas, the X1 value and Y1 value of each second overlapping area are calculated. After the calculation, based on the X1 value and Y1 value of all second overlapping areas, it is determined whether the multiple second overlapping areas meet the preset conditions. If there is a second overlapping area that meets the preset conditions among the multiple second overlapping areas, the second overlapping area is marked for the third time and marked as the third overlapping area; if there is no second overlapping area that meets the preset conditions among the multiple second overlapping areas, no subsequent operation (such as filling the virtual through hole) is performed.

[0098] In some embodiments, the preset conditions include:

[0099] The length of the second overlapping area along the first direction and the length of the second overlapping area along the second direction are both greater than the preset length.

[0100] It should be noted that the preset length can be expressed as (via CD+2*Enclosed rule). Wherein, via CD represents the critical dimension (CD) of the dummy via; Enclosed rule represents the enclosed distance, specifically the distance between the dummy via and the edge of the connected dummy metal block. Here, the preset length is provided by the engineer according to the manufacturing process.

[0101] It should also be noted that the virtual through hole electrically connects the virtual metal blocks in the upper and lower metal layers. In the embodiment of the present disclosure, the wrapping distance selects a larger value for the virtual metal block wrapping requirement in the upper and lower metal layers electrically connected by the virtual through hole, that is, a larger value is selected for the distance between the virtual through hole and the edge of the connected virtual metal block.

[0102] It should also be noted that the key dimensions and the wrapping distance have corresponding values ​​along the first direction and along the second direction, respectively, that is, the preset lengths have corresponding values ​​along the first direction and along the second direction, respectively. The length of the second overlapping region along the first direction is compared with the preset length along the first direction, and the length of the second overlapping region along the second direction is compared with the preset length along the second direction. A second overlapping region whose length along the first direction and the length along the second direction of the second overlapping region are both greater than the corresponding preset lengths is selected and marked as a third overlapping region.

[0103] S107 . Fill at least one virtual through hole in the third overlapping area.

[0104] It should be noted that after marking the third overlapping area, a virtual via that meets the via design rule is filled in the third overlapping area. It can be understood that the via design rule means that at least one virtual via must be filled in the second overlapping area that meets the preset condition, that is, X1 and Y1 are both greater than (via CD+2*Enclosed rule).

[0105] In some embodiments, the method further comprises:

[0106] At least one virtual through hole is filled in a uniform filling manner.

[0107] It should be noted that one or more virtual vias can be filled according to actual needs, and there is no specific limitation on this. When filling multiple virtual vias, a uniform filling method can ensure the uniformity of filling the multiple virtual vias, so that the virtual vias are placed at equal intervals.

[0108] In some embodiments, the shape of the virtual metal block may include: square, rectangle, parallelogram, triangle, ring, circle, ellipse.

[0109] It should be noted that the shape of the virtual metal block may also include any other shapes such as a concave shape, an H shape, an I shape, etc. In the embodiment of the present disclosure, one or more of any shapes may be selected as the shape of the virtual metal block according to actual needs, and this is not specifically limited.

[0110] It should also be noted that the shape of the virtual metal block specifically refers to the shape of the orthographic projection of the virtual metal block along the stacking direction of the metal layers.

[0111] In some embodiments, the method further comprises:

[0112] When the density of the dummy metal in the multiple metal layers is greater than a preset value, the above-mentioned dummy metal filling method is performed.

[0113] It should be noted that the density of the dummy metal can be obtained by selecting a window, such as a fillable area, or a portion of a fillable area, and then filling the selected area with dummy metal. The ratio of the area of ​​the dummy metal to the area of ​​the selected area is the density of the dummy metal. Specifically, the area of ​​the dummy metal is the sum of the areas of all dummy metal blocks.

[0114] It should also be noted that the preset value may be 25%, that is, the above filling method may be applicable only when the density of the virtual metal is greater than 25%, but this is not specifically limited. Here, the preferred density of the virtual metal may be 30% to 80%.

[0115] It should also be noted that the virtual metal in each metal layer has a corresponding virtual metal density, and the basic graphics of the virtual metal block corresponding to each metal layer can be defined according to the density requirements of the virtual metal. In addition, the structure and density of the virtual metal in different metal layers are mainly based on the process requirements, and the shape and density of each layer of virtual metal can be the same or different, and there is no specific limitation on this.

[0116] The disclosed embodiment provides a method for filling virtual metal, which optimizes the shape of the virtual metal block and adjusts the process of filling the virtual metal, so that the virtual metal has a certain optimized heat dissipation and electromagnetic shielding effect. The filling method provided by the disclosed embodiment realizes the collaborative design of virtual metal of multiple metal layers, and realizes metal interconnection and heat dissipation by using virtual through holes, which can improve the heat dissipation effect of the chip, reduce noise signals, improve signal integrity, and protect sensitive circuits. In addition, the filling of virtual metal can be completed based on the existing wafer processing technology, and the process compatibility is high.

[0117] See also Figure 2 , which shows a schematic diagram of the composition structure of a semiconductor structure provided by an embodiment of the present disclosure Figure 1 , specifically the floor plan. Figure 3 , which shows a schematic diagram of the composition structure of a semiconductor structure provided by an embodiment of the present disclosure Figure 2 , specifically a three-dimensional stereogram. Figure 2 and Figure 3 A semiconductor structure is prepared by applying the above-mentioned virtual metal filling method.

[0118] For example, Figure 2 and Figure 3 Two layers of RDL filled dummy metal are shown, and the density of the dummy metal is 45%. However, there is no specific limit on the density of the dummy metal, as long as it is greater than a preset value, an overlapping area is ensured between two adjacent layers of dummy metal, and dummy vias can be placed.

[0119] It should be noted that Figure 2 and Figure 3 It is just an example of local virtual metal.

[0120] like Figure 2 and Figure 3 As shown, the virtual metal filled in the first layer of RDL includes multiple virtual metal blocks 21 (only one number is shown in the figure), and the virtual metal filled in the second layer of RDL includes multiple virtual metal blocks 22 (only one number is shown in the figure). Exemplarily, the virtual metal blocks 21 and 22 are rectangular in shape.

[0121] exist Figure 2 In the figure, two virtual vias 23 (only one number is shown in the figure) are placed in the overlapping areas between the multiple virtual metal blocks in the two layers of RDL; Figure 3 In the example, one virtual via 23 is placed in each overlapping region between multiple virtual metal blocks in the two layers of RDL. It can be understood that there is no specific limitation on the number of virtual vias, as long as two adjacent layers of virtual metal can be electrically connected through at least one virtual via.

[0122] like Figure 2 and Figure 3 As shown, the multiple virtual metal blocks 22 filled by the second layer (or upper layer) RDL cover the blank areas between the multiple virtual metal blocks 21 filled by the first layer (or lower layer) RDL, thereby forming a relatively dense pattern on the layout. In addition, one virtual metal block 22 overlaps with four virtual metal blocks 21, and the filling method provided by the embodiment of the present disclosure can ensure as many overlapping areas as possible.

[0123] In summary, based on the filling method provided above, multiple virtual metal blocks can realize overall interconnection of local areas (i.e., filling areas) through virtual through holes, and the overall interconnection structure of the local areas can quickly make the heat distribution in the area more uniform, achieving the effect of improving heat dissipation. At the same time, through the staggered distribution of multiple virtual metal blocks in two or more metal layers, a certain electromagnetic shielding effect can be achieved.

[0124] The technical solution of this embodiment, in essence, or the part that contributes to the prior art, or the whole or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor to execute all or part of the steps of the method described in this embodiment. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0125] Therefore, this embodiment provides a computer storage medium (referred to as storage medium), which stores a computer program. When the computer program is executed by at least one processor, it implements the steps of the virtual metal filling method described in any of the aforementioned embodiments.

[0126] See also Figure 4 , which shows a schematic diagram of the composition structure of an electronic device provided by an embodiment of the present disclosure. Figure 4 As shown, the electronic device 30 may include: a communication interface 301, a memory 302 and a processor 303; each component is coupled together via a bus system 304. It is understood that the bus system 304 is used to realize the connection and communication between these components. In addition to the data bus, the bus system 304 also includes a power bus, a control bus and a status signal bus. However, for the sake of clarity, Figure 4Various buses are labeled as bus system 304. Among them, the communication interface 301 is used for receiving and sending signals in the process of sending and receiving information between other external network elements;

[0127] Memory 302, used to store computer programs that can be run on processor 303;

[0128] The processor 303 is configured to execute, when running the computer program:

[0129] Acquire a layout to be filled, where the layout to be filled includes multiple metal layers;

[0130] Determine a fillable area of ​​each metal layer; the fillable area is a blank area used to fill virtual metal;

[0131] marking a first overlapping region between fillable regions of the plurality of metal layers;

[0132] Filling a plurality of virtual metal blocks in the marked fillable areas of any at least two consecutive metal layers respectively;

[0133] In at least two metal layers filled with a plurality of virtual metal blocks, marking a plurality of second overlapping regions between a plurality of virtual metal blocks in two adjacent metal layers;

[0134] Among the plurality of second overlapping regions, marking a second overlapping region that meets a preset condition as a third overlapping region;

[0135] At least one dummy via is filled in the third overlapping region.

[0136] It can be understood that the memory 302 in the embodiment of the present disclosure can be a volatile memory or a non-volatile memory, or can include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory can be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM), and direct memory bus random access memory (DRRAM). The memory 302 of the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0137] The processor 303 may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method can be completed by the hardware integrated logic circuit or software instructions in the processor 303. The above processor 303 may be a general processor, a digital signal processor (Digital Signal Processor, DSP), an application specific integrated circuit (Application Specific Integrated Circuit, ASIC), a field programmable gate array (Field Programmable Gate Array, FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components. The methods, steps and logic block diagrams disclosed in the embodiments of the present disclosure can be implemented or executed. The general processor can be a microprocessor or the processor can also be any conventional processor. The steps of the method disclosed in conjunction with the embodiments of the present disclosure can be directly embodied as a hardware decoding processor to perform, or the hardware and software modules in the decoding processor are combined to perform. The software module can be located in a mature storage medium in the field such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory or an electrically erasable programmable memory, a register, etc. The storage medium is located in the memory 302, and the processor 303 reads the information in the memory 302 and completes the steps of the above method in combination with its hardware.

[0138] It is understood that the embodiments described herein may be implemented in hardware, software, firmware, middleware, microcode, or a combination thereof. For hardware implementation, the processing unit may be implemented in one or more application specific integrated circuits (ASIC), digital signal processors (DSP), digital signal processing devices (DSPD), programmable logic devices (PLD), field programmable gate arrays (FPGA), general purpose processors, controllers, microcontrollers, microprocessors, other electronic units for performing the functions described in the present disclosure, or a combination thereof.

[0139] For software implementation, the techniques described herein can be implemented by modules (e.g., procedures, functions, etc.) that perform the functions described herein. The software code can be stored in a memory and executed by a processor. The memory can be implemented in the processor or outside the processor.

[0140] Optionally, as another embodiment, the processor 303 is further configured to execute any one of the methods described in the foregoing embodiments when running the computer program.

[0141] The above description is only a preferred embodiment of the present disclosure and is not intended to limit the protection scope of the present disclosure.

[0142] It should be noted that in the present disclosure, the terms "include", "comprises" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "includes a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0143] The serial numbers of the above-mentioned embodiments of the present disclosure are only for description and do not represent the advantages or disadvantages of the embodiments.

[0144] The methods disclosed in several method embodiments provided in the present disclosure can be arbitrarily combined without conflict to obtain new method embodiments.

[0145] The features disclosed in several product embodiments provided in the present disclosure can be arbitrarily combined without conflict to obtain new product embodiments.

[0146] The features disclosed in several method or device embodiments provided in the present disclosure may be arbitrarily combined without conflict to obtain new method embodiments or device embodiments.

[0147] The above is only a specific implementation of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art who is familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present disclosure, which should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.

Claims

1. A method for filling virtual metal, characterized in that: The virtual metal includes a plurality of virtual metal blocks, and the method includes: Acquire a layout to be filled, wherein the layout to be filled includes multiple metal layers; Determine a fillable area of ​​each metal layer; the fillable area is a blank area for filling the virtual metal; marking a first overlapping region between the fillable regions of the multiple metal layers; Fill the multiple virtual metal blocks in the fillable areas of any marked at least two consecutive metal layers respectively; In at least two of the metal layers filled with the multiple virtual metal blocks, marking a plurality of second overlapping regions between the multiple virtual metal blocks in two adjacent metal layers; Among the plurality of second overlapping regions, marking the second overlapping region satisfying a preset condition as a third overlapping region; At least one dummy through hole is filled in the third overlapping area.

2. The method according to claim 1, characterized in that The marking of the first overlapping area between the fillable areas of the multi-layer metal layer comprises: Determining whether the first overlapping region exists between the fillable regions of the multiple metal layers; If the first overlapping region exists, the first overlapping region is determined, and the first overlapping region between the fillable regions of any at least two consecutive metal layers in the multiple metal layers is marked.

3. The method according to claim 1, characterized in that Before filling the plurality of virtual metal blocks respectively, the method further comprises: Determine the displacement distance between the virtual metals in any at least two consecutive metal layers according to the displacement formula; The multiple virtual metal blocks in the virtual metal all move the same displacement distance.

4. The method according to claim 3, characterized in that The displacement distance includes a first displacement distance along a first direction and a second displacement distance along a second direction; The first displacement distance is equal to the ratio of the first size to the number of layers of the metal layer, and the second displacement distance is equal to the ratio of the second size to the number of layers of the metal layer; The first size is equal to the sum of the length of the virtual metal block along the first direction and the spacing between adjacent virtual metal blocks, and the second size is equal to the sum of the length of the virtual metal block along the second direction and the spacing between adjacent virtual metal blocks.

5. The method according to claim 4, characterized in that The step of marking, among the plurality of second overlapping regions, the second overlapping region satisfying a preset condition as a third overlapping region comprises: In the plurality of second overlapping regions, calculating the length of each of the second overlapping regions along the first direction and the length along the second direction; determining whether the plurality of second overlapping regions meet the preset condition according to the lengths of all the second overlapping regions along the first direction and the lengths of all the second overlapping regions along the second direction; If the preset condition is met, the second overlapping area that meets the preset condition is marked as the third overlapping area.

6. The method according to claim 5, characterized in that The preset conditions include: A length of the second overlapping area along the first direction and a length of the second overlapping area along the second direction are both greater than a preset length.

7. The method according to claim 1, characterized in that The method further comprises: The plurality of virtual metal blocks and the at least one virtual through hole are filled in a uniform filling manner.

8. The method according to any one of claims 1 to 7, characterized in that The shapes of the virtual metal block include: square, rectangle, parallelogram, triangle, ring, circle, and ellipse.

9. An electronic device, characterized in that: The electronic device comprises a memory and a processor, wherein: The memory is used to store a computer program that can be run on the processor; The processor is configured to execute the method according to any one of claims 1 to 8 when running the computer program.

10. A storage medium, characterized in that: The storage medium stores a computer program, and when the computer program is executed by at least one processor, the method according to any one of claims 1 to 8 is implemented.

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