Preparation method of doping layer, preparation method of solar cell and solar cell

Abstract

The invention provides a preparation method of a doping layer, a preparation method of a solar cell and the solar cell. The preparation method of the doping layer comprises the following steps: depositing a doping source layer containing doping elements on a substrate; forming a diffusion inhibition layer on the doping source layer, and patterning the diffusion inhibition layer to expose a part of the doping source layer; and carrying out annealing treatment on the doping source layer to form a doping layer. According to the preparation method of the doping layer, a selective heavily doped region can be formed. Moreover, according to the preparation method of the doping layer, a laser heavy doping forming mode in the traditional technology is avoided, and the doping layer does not need to be directly fused by laser, so that the problem of thermal damage can be avoided.

Description

Technical Field

[0001] The invention relates to the field of photovoltaic technology, and in particular to a method for preparing a doping layer, a method for preparing a solar cell, and a solar cell. Background Art

[0002] Solar cells are devices based on the photovoltaic effect of semiconductor materials. Crystalline silicon solar cells are a type of solar cell with relatively mature technology and a wide range of applications. Crystalline silicon solar cells usually include a silicon wafer and a doped layer on the surface of the silicon wafer, which can also serve as an emitter. The doped layer and the silicon wafer form a PN junction to conduct the photogenerated carriers therein.

[0003] The method of preparing the doping layer on the surface of the silicon wafer is usually the thermal diffusion method. The process of the thermal diffusion method generally needs to be carried out at a temperature of up to 900℃~1000℃. In order to further improve the electrical properties of the doping layer, some traditional technologies have proposed a selectively heavily doped doping layer. This doping layer usually needs to be laser heavily doped after thermal diffusion to form a heavily doped area. However, the laser heavy doping treatment method usually also causes damage to the laser scanning area, limiting the further improvement of the efficiency of solar cells. Summary of the invention

[0004] Based on this, it is necessary to provide a method for preparing a doping layer to address the problems in the above-mentioned background technology, which can improve the damage problem while forming a selective heavily doped region.

[0005] According to some embodiments of the present invention, a method for preparing a doping layer is provided, which comprises the following steps:

[0006] depositing a doping source layer containing doping elements on a substrate;

[0007] forming a diffusion suppression layer on the doping source layer, and patterning the diffusion suppression layer to expose a portion of the doping source layer; and,

[0008] The doping source layer is annealed to form the doping layer.

[0009] In some embodiments of the present invention, the material of the diffusion suppression layer is selected from one or more of silicon nitride, silicon oxynitride, aluminum nitride and silicon oxide.

[0010] In some embodiments of the present invention, the process of patterning the diffusion suppression layer includes: removing a portion of the diffusion suppression layer by laser irradiation.

[0011] In some embodiments of the present invention, during the laser irradiation, the energy density of the laser used is 0.24 J / cm 2~16 J / cm 2 .

[0012] In some embodiments of the present invention, the material of the doping source layer includes doped oxide of silicon, and the doping source layer is deposited by chemical vapor deposition or atomic layer deposition.

[0013] In some embodiments of the present invention, the step of depositing the doping source layer comprises:

[0014] placing the substrate in a deposition chamber; and,

[0015] A silicon source gas, an oxygen source gas and a doping source gas are introduced into the deposition chamber to react with each other to form the doping source layer.

[0016] In some embodiments of the present invention, the material of the diffusion suppression layer is selected from silicon compounds, and the diffusion suppression layer is formed by chemical vapor deposition or atomic layer deposition.

[0017] In some embodiments of the present invention, the step of forming the diffusion suppression layer comprises:

[0018] placing the substrate in a deposition chamber; and,

[0019] A silicon source gas and a reaction gas are introduced into the deposition chamber to react with each other to form the diffusion suppression layer.

[0020] In some embodiments of the present invention, the thickness of the doping source layer is 60nm-150nm; and / or,

[0021] The thickness of the diffusion suppression layer is 2nm-10nm.

[0022] In some embodiments of the present invention, the formed doped layer includes a heavily doped region shielded by the diffusion suppression layer and a lightly doped region not shielded by the diffusion suppression layer; wherein,

[0023] The doping concentration of the heavily doped region is 2×10 19 cm -3 ~1×10 20 cm -3 and / or,

[0024] The doping concentration of the lightly doped region is 1×10 18 cm -3 ~5×10 18 cm -3 .

[0025] In some embodiments of the present invention, in the step of annealing the doping source layer, the annealing temperature is controlled to be 950° C. to 1100° C.;

[0026] After forming the doping layer, the step of placing the substrate in an oxidizing gas environment for oxidation treatment is also included.

[0027] Further, according to some embodiments of the present invention, a method for preparing a solar cell is provided, which comprises the following steps:

[0028] providing a silicon wafer as a substrate; and,

[0029] A doping layer is formed on the silicon wafer using the method for preparing a doping layer as described in any of the above embodiments.

[0030] In some embodiments of the present invention, the doping type of the silicon wafer is N-type, and the doping element in the doping layer is selected from one or more of boron, aluminum, gallium and indium; or,

[0031] The doping type of the silicon wafer is P type, and the doping elements in the doping layer are selected from one or both of phosphorus and arsenic.

[0032] In some embodiments of the present invention, the doped layer is formed as a first doped layer, and after forming the first doped layer, the following steps are further included:

[0033] A tunneling layer and a second doping layer are sequentially formed on a side of the silicon wafer away from the first doping layer, and the doping type of the second doping layer is opposite to that of the first doping layer.

[0034] In some embodiments of the present invention, the following steps are also included:

[0035] forming a first surface functional layer and a first electrode in sequence on a side of the first doped layer away from the silicon wafer; and / or,

[0036] A second surface functional layer and a second electrode are sequentially formed on a side of the second doped layer away from the silicon wafer.

[0037] Furthermore, the present invention also provides a solar cell, which is prepared by the method for preparing a solar cell as described in any of the above embodiments.

[0038] In the method for preparing the doping layer of the embodiment of the present invention, a doping source layer is first deposited on the substrate, and then a patterned diffusion suppression layer is formed on the doping source layer. The diffusion suppression layer is used to suppress the diffusion of doping elements toward the diffusion suppression layer. In the process of annealing to diffuse the doping elements toward the substrate, the diffusion suppression layer suppresses the diffusion of doping elements in the doping source layer toward the outside, so that more doping elements diffuse toward the inside, so that the part of the doping layer shielded by the diffusion suppression layer has a higher doping concentration, and the other part of the doping layer not shielded by the diffusion suppression layer has a lower doping concentration. Therefore, the method for preparing the doping layer can form a selectively heavily doped region. In addition, the method for preparing the doping layer avoids the formation method of laser heavy doping in the traditional technology, and does not need to use laser to directly melt the doping layer, so the problem of thermal damage can be avoided.

[0039] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention and implement it according to the contents of the specification, the following is a detailed description of the preferred embodiments of the present invention in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the technical solution of the present application, the following is a brief introduction to the drawings used in the present application. Obviously, the drawings described below are only some embodiments of the present application, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0041] Figure 1 A schematic diagram of the steps of a method for preparing a doping layer;

[0042] Figure 2 It is a schematic diagram of a structure for forming a doping source layer on a substrate;

[0043] Figure 3 For Figure 2 A schematic diagram of a structure in which a patterned diffusion suppression layer is formed on the basis of the structure shown;

[0044] Figure 4 For Figure 3 A schematic diagram of a structure in which a doping layer is formed on the basis of the structure shown;

[0045] Figure 5 A schematic diagram of the steps of a method for preparing a solar cell;

[0046] Figure 6 A schematic diagram of a cross-sectional structure of a silicon wafer;

[0047] Figure 7 For Figure 6 A schematic cross-sectional structure diagram of a first doping layer formed on the structure shown;

[0048] Figure 8 For Figure 7 A schematic diagram of a structure in which a tunneling layer and a second doping layer are formed on the basis of the structure shown;

[0049] Fig. 9 For Figure 8 A schematic diagram of a structure in which a first surface functional layer and a second surface functional layer are formed on the basis of the structure shown;

[0050] Fig.10 For Fig. 9 Schematic diagram of the structure in which the first electrode and the second electrode are formed on the basis of the structure shown.

[0051] The reference numerals and their meanings are as follows:

[0052] 100, substrate; 101, doping source layer; 110, doping layer; 111, heavily doped region; 112, lightly doped region; 120, diffusion inhibition layer; 200, silicon wafer; 210, first doping layer; 211, heavily doped region; 212, lightly doped region; 220, second doping layer; 230, tunneling layer; 240, first surface functional layer; 250, second surface functional layer; 260, first electrode; 270, second electrode. DETAILED DESCRIPTION

[0053] The following embodiments of the technical solution of the present application are described in detail in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present application, and are therefore only used as examples, and cannot be used to limit the scope of protection of the present application.

[0054] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by technicians in the technical field to which this application belongs; the terms used herein are only for the purpose of describing specific embodiments and are not intended to limit this application; the terms "including" and "having" in the specification and claims of this application and the above-mentioned figure descriptions and any variations thereof are intended to cover non-exclusive inclusions.

[0055] In the description of the embodiments of the present application, the technical terms "first", "second", etc. are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "multiple" is more than two, unless otherwise clearly and specifically defined.

[0056] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0057] In the description of the embodiments of the present application, the term "and / or" is only a description of the association relationship of the associated objects, indicating that there may be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0058] In the description of the embodiments of the present application, the term "multiple" refers to more than two (including two). Similarly, "multiple groups" refers to more than two groups (including two groups), and "multiple pieces" refers to more than two pieces (including two pieces).

[0059] In the description of the embodiments of the present application, the technical terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, which are only for the convenience of describing the embodiments of the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the embodiments of the present application.

[0060] In the description of the embodiments of the present application, unless otherwise clearly specified and limited, technical terms such as "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, and it can be the internal connection of two elements or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the embodiments of the present application can be understood according to the specific circumstances.

[0061] The present invention provides a method for preparing a doping layer, which comprises the following steps: depositing a doping source layer containing doping elements on a substrate; forming a diffusion inhibition layer on the doping source layer, and patterning the diffusion inhibition layer to expose a portion of the doping source layer; and annealing the doping source layer to form a doping layer.

[0062] In the method for preparing the doping layer of the embodiment of the present invention, a doping source layer is first deposited on the substrate, and then a patterned diffusion suppression layer is formed on the doping source layer. The diffusion suppression layer is used to suppress the diffusion of doping elements toward the diffusion suppression layer. In the process of annealing to diffuse the doping elements toward the substrate, the diffusion suppression layer suppresses the diffusion of doping elements in the doping source layer toward the outside, so that more doping elements diffuse toward the inside, so that the part of the doping layer shielded by the diffusion suppression layer has a higher doping concentration, and the other part of the doping layer not shielded by the diffusion suppression layer has a lower doping concentration. Therefore, the method for preparing the doping layer can form a selectively heavily doped region. In addition, the method for preparing the doping layer avoids the formation method of laser heavy doping in the traditional technology, and does not need to use laser to directly melt the doping layer, so the problem of thermal damage can be avoided.

[0063] The present invention Figure 1 Schematic diagram of a method for preparing a doping layer. Figure 1 As shown, the method for preparing the doping layer includes steps S1.1 to S1.3, which are specifically as follows.

[0064] Step S1.1, depositing a doping source layer containing doping elements on a substrate.

[0065] Figure 2 FIG. 1 is a schematic diagram of a structure in which a doping source layer 101 is formed on a substrate 100. Figure 2 As shown, the doping source layer 101 is stacked on the substrate 100 , and the doping source layer 101 can entirely cover one side surface of the substrate 100 .

[0066] As an example of this embodiment, the substrate 100 may include a semiconductor material, for example, the substrate 100 may include one or more of silicon, germanium, gallium nitride, gallium arsenide, and silicon carbide. Further, a silicon wafer may be selected as the substrate 100.

[0067] As an example of this embodiment, the material of the doping source layer 101 includes doped oxide of silicon, and the method of depositing the doping source layer 101 is chemical vapor deposition or atomic layer deposition. Compared with the thermal diffusion method used in the conventional technology, the temperature conditions required for preparing the doping source layer 101 by chemical vapor deposition or atomic layer deposition are relatively low, which is not only conducive to reducing production energy consumption, but also can reduce the negative impact of high temperature conditions on the substrate 100, and is also conducive to extending the service life of the deposition furnace tube.

[0068] As an example of this embodiment, the step of depositing the doping source layer 101 includes: placing the substrate 100 in a deposition chamber, and introducing silicon source gas, oxygen source gas and doping source gas into the deposition chamber to react to form the doping source layer 101 .

[0069] As an example of this embodiment, in the step of depositing the doping source layer 101 , the temperature in the deposition chamber is controlled to be ≤ 600° C.

[0070] As a further example of this embodiment, the deposition chamber may be a deposition chamber of a chemical vapor deposition device, and a chemical vapor deposition method is used to form the doping source layer 101. Specifically, a deposition chamber of a plasma enhanced chemical vapor deposition device may be selected.

[0071] As a further example of this embodiment, the silicon source gas may include one or more of silane, bis(diethylamino)silane, di(isopropylamino)silane, and ethyl orthosilicate.

[0072] As a further example of this embodiment, the oxygen source gas may be selected from one or more of ozone (O 3 ), oxygen (O 2 ), laughing gas (N 2 O), carbon monoxide (CO) and carbon dioxide (CO 2 ).

[0073] It can be understood that the doping source-containing gas should contain doping elements. The doping elements can be selected according to the desired doping type. For example, when the desired doping type is P-type, the doping elements are selected from one or more of boron, aluminum, gallium and indium. When the desired doping type is N-type, the doping elements are selected from one or more of phosphorus and arsenic. The doping source-containing gas can also include a carrier gas and a doping source, and the carrier gas is used to carry the doping source.

[0074] As a further example of this embodiment, when the doping element contains boron, the doping source may include one or more of boron trichloride, trimethyl borate, triethyl borane, diborane, trimethyl borane and triethyl borate.

[0075] As a further example of this embodiment, when the doping element contains phosphorus, the doping source may include one or more of phosphorus oxychloride, phosphine, phosphorus trichloride, phosphorus pentachloride, trimethyl phosphorus and phosphine.

[0076] It can be understood that by adjusting the flow rates of the silicon source gas, the oxygen source gas and the doping source gas, the ratios of the doping element, the silicon element and the oxygen element in the doping source layer 101 can be controlled accordingly.

[0077] As an example of this embodiment, the doping source layer 101 may be a borosilicate glass layer (BSG) or a phosphosilicate glass layer (PSG).

[0078] As an example of this embodiment, the thickness of the formed doping source layer 101 is 60nm-150nm. For example, the thickness of the doping source layer 101 is 60nm, 70nm, 80nm, 90nm, 100nm, 110nm, 120nm, 130nm, 140nm, 150nm, or the thickness of the doping source layer 101 can also be between any two of the above thicknesses.

[0079] Step S1.2, forming a diffusion suppression layer on the doping source layer, and patterning the diffusion suppression layer.

[0080] Figure 3 For Figure 2 A schematic diagram of a structure in which a patterned diffusion suppression layer 120 is formed on the basis of the structure shown. Figure 3 As shown, after the diffusion suppression layer 120 is patterned, a portion of the doping source layer 101 is shielded, and another portion of the doping source layer 101 is exposed from the opening of the diffusion suppression layer 120 .

[0081] In this embodiment, the material of the diffusion suppression layer 120 can be selected from a dense dielectric material that can block the diffusion of doping elements. As an example of this embodiment, the material of the diffusion suppression layer 120 is selected from one or more of silicon compounds and aluminum compounds.

[0082] As a further example of this embodiment, the material of the diffusion suppression layer 120 is selected from silicon nitride (SiN x ), silicon oxynitride (SiON x ), silicon oxide (SiO x ) and aluminum nitride (AlN). Silicon nitride, silicon oxynitride, silicon oxide and aluminum nitride can inhibit the outward diffusion of doping elements during the push-in process, thereby promoting more doping elements to diffuse into the substrate 100.

[0083] As an example of this embodiment, the doping source layer 101 may be a stacked structure of a silicon nitride layer and a silicon nitride oxide layer.

[0084] As an example of this embodiment, the material of the diffusion suppression layer 120 is selected from silicon compounds. It can be understood that the material of the doping source layer 101 includes silicon doped oxides. Using silicon compounds as the material of the diffusion suppression layer 120 can be more smoothly combined with the doping source layer 101 in the production process, reduce the switching of production raw materials and deposition chambers, and improve production efficiency. Further, the diffusion suppression layer 120 is formed by chemical vapor deposition or atomic layer deposition.

[0085] As an example of this embodiment, the step of forming the diffusion suppression layer 120 includes: placing the substrate 100 in a deposition chamber; and introducing a silicon source gas and a reaction gas into the deposition chamber to react to form the diffusion suppression layer 120 .

[0086] It can be understood that the reaction gas is used to react with the silicon source gas to form the material of the diffusion suppression layer 120, and the reaction gas can be selected according to the material of the diffusion suppression layer 120. As a further example of this embodiment, the reaction gas may include a nitrogen source gas. The nitrogen source gas can react with the silicon source gas to form silicon nitride. Optionally, the nitrogen source gas can be selected from ammonia.

[0087] Optionally, the reaction gas may further include an oxygen source gas, wherein the oxygen source gas and the nitrogen source gas can react with the silicon source gas to form silicon oxynitride.

[0088] As an example of this embodiment, the doping source layer 101 and the diffusion suppression layer 120 may be deposited and prepared in sequence in the same deposition chamber to simplify the preparation process of the doping source layer 101 and the diffusion suppression layer 120 .

[0089] As an example of this embodiment, the thickness of the diffusion suppression layer 120 may be 2nm to 10nm. For example, the thickness of the diffusion suppression layer 120 may be 2nm, 3nm, 4nm, 5nm, 6nm, 7nm, 8nm, 9nm, 10nm, or the thickness of the diffusion suppression layer 120 may be between any two of the above thicknesses. The use of the diffusion suppression layer 120 in this thickness range can ensure that the doping elements are fully inhibited while making the diffusion suppression layer 120 easier to remove. When the diffusion suppression layer 120 is thicker, it is more difficult to remove the diffusion suppression layer 120, and the diffusion suppression layer 120 may also be damaged during the removal process.

[0090] It can be understood that “patterning” refers to removing part of the diffusion suppression layer 120 and retaining another part of the diffusion suppression layer 120. As an example of this embodiment, the process of patterning the diffusion suppression layer 120 includes: removing a part of the diffusion suppression layer 120 by laser irradiation. By focusing the laser on the diffusion suppression layer 120, the diffusion suppression layer 120 can be quickly ablated and removed without substantially affecting the doping source layer 101.

[0091] In other examples, a patterning process may also be performed by etching after preparing a mask. In contrast, the laser irradiation process is simpler in terms of process, and the removal amount in the thickness direction is highly controllable, which can ensure that the removal thickness of each region of the diffusion suppression layer 120 is consistent, thereby ensuring that the thickness of the doping source layer 101 is uniform during the processing.

[0092] As an example of this embodiment, during the laser irradiation, the energy density of the laser used is 0.24 J / cm 2 ~16 J / cm 2 .

[0093] Step S1.3, annealing the doping source layer to form a doping layer.

[0094] In this embodiment, during the annealing process of the doping source layer 101, the doping elements in the doping source layer 101 can diffuse into the substrate 100, thereby forming a doping layer 110 on the surface of the substrate 100. This process can also be called push-in.

[0095] As an example of this embodiment, in the step of annealing the doping source layer 101, the annealing temperature is controlled to be 950° C. to 1100° C. Optionally, the substrate 100 may be placed in an annealing furnace, and a protective gas may be introduced into the annealing furnace to perform the annealing process in a protective gas environment.

[0096] As a further example of this embodiment, the protective gas may be selected from one or more of nitrogen, argon, and helium.

[0097] As a further example of this embodiment, the heating temperature can be controlled to 950°C, 960°C, 980°C, 1000°C, 1020°C, 1050°C, 1080°C, 1100°C, or the heating temperature can be controlled between any two of the above temperatures.

[0098] As an example of this embodiment, after forming the doping layer 110 , the step of placing the substrate 100 in an oxidizing gas environment for oxidation treatment is further included. The purpose of the oxidation treatment is to repair the surface damage of the doping source layer 101 .

[0099] Figure 4 For Figure 3 A schematic diagram of a structure in which a doping layer 110 is formed on the basis of the structure shown in FIG. Figure 4 As shown, the doping layer 110 includes a heavily doped region 111 shielded by the diffusion suppression layer 120 and a lightly doped region 112 not shielded by the diffusion suppression layer 120 .

[0100] It can be understood that during the annealing process of the doping source layer 101, more doping elements in the doping source layer 101 shielded by the diffusion suppression layer 120 diffuse toward the substrate 100, thereby forming a heavily doped region 111 with a high doping concentration on the surface of the substrate 100, and the heavily doped region 111 is shielded by the diffusion suppression layer 120. The doping elements in the doping source layer 101 not shielded by the diffusion suppression layer 120 will diffuse toward the substrate 100 and the surface, respectively, thereby forming a lightly doped region 112 with a low doping concentration on the surface of the substrate 100, and the lightly doped region 112 is not shielded by the diffusion suppression layer 120. The doping concentration of the heavily doped region 111 is higher than the doping concentration of the lightly doped region 112. Therefore, through steps S1 to S3, a selectively heavily doped doping layer 110 can be formed.

[0101] As an example of this embodiment, in the doping layer 110, the doping concentration of the heavily doped region 111 is 2×10 19 cm -3 ~1×10 20 cm -3 For example, the doping concentration of the heavily doped region 111 may be 2×10 19 cm -3 , 3×10 19 cm -3 , 4×10 19 cm -3 , 5×10 19 cm -3 , 6×10 19 cm -3 ,7×10 19 cm -3 , 8×10 19 cm -3 ,9×10 19 cm -3 , 1×10 20 cm -3 Alternatively, the doping concentration of the heavily doped region 111 may also be between any two of the above doping concentrations.

[0102] As an example of this embodiment, in the doping layer 110, the doping concentration of the lightly doped region 112 is 1×10 18 cm -3 ~5×10 18 cm -3 For example, the doping concentration of the lightly doped region 112 may be 1×10 18 cm -3 , 2×10 18 cm -3 , 3×10 18 cm -3 , 4×10 18 cm -3 , 5×10 18 cm -3 Alternatively, the doping concentration of the lightly doped region 112 may also be between any two of the above doping concentrations.

[0103] It can be understood that the method for preparing the doping layer 110 can be completed through the above steps S1 to S3.

[0104] In a second aspect, the present invention further provides a doping layer, which can be prepared by the preparation method of the above embodiment.

[0105] As an example of this embodiment, the doping layer includes a silicon substrate and a doping element doped in the silicon substrate. The silicon substrate may be polycrystalline silicon. The doping element is selected from one or more of boron, aluminum, gallium and indium, or the doping element is selected from one or both of phosphorus and arsenic.

[0106] In a third aspect, the present invention also provides a method for preparing a solar cell. Figure 5 The figure is a schematic diagram of the steps of the method for preparing the solar cell, which includes steps S2.1 to S2.4, as follows.

[0107] Step S2.1, providing a silicon wafer as a substrate.

[0108] Figure 6 2 is a schematic diagram of a cross-sectional structure of a silicon wafer 200. Figure 6 As shown, the silicon wafer 200 has a relative light-receiving surface (such as Figure 6 The upper surface in the Figure 6 The light-receiving surface of the silicon wafer 200 has a velvet structure.

[0109] As an example of this embodiment, in the step of providing the silicon wafer 200 as a substrate, the silicon wafer 200 may be cleaned and textured, wherein the cleaning process is used to remove impurities and contaminants on the surface of the silicon wafer 200, and the textured process is used to form a velvet structure on the surface of the silicon wafer 200.

[0110] Step S2.2, forming a first doping layer on the silicon wafer.

[0111] Figure 7 For Figure 6 A schematic cross-sectional view of a structure in which a first doping layer 210 is formed on the structure shown in FIG. Figure 7 As shown, the first doping layer 210 is disposed on the light-receiving surface of the silicon wafer 200. In this embodiment, a doping layer can be formed on the silicon wafer 200 using the preparation method of steps S1.1 to S1.3, and the doping layer is used as the first doping layer 210. It can be understood that after forming the first doping layer 210, a step of removing the diffusion suppression layer is also included.

[0112] Reference Figure 7 As shown, as an example of this embodiment, the first doping layer 210 includes a heavily doped region 211 and a lightly doped region 212. The doping concentration of the heavily doped region 211 is higher than the doping concentration of the lightly doped region 212.

[0113] As an example of this embodiment, the doping type of the first doping layer 210 is opposite to the doping type of the silicon wafer 200 .

[0114] As a further example of this embodiment, the doping type of the silicon wafer 200 is N-type, and the doping type of the first doping layer 210 is P-type, and the doping element therein is selected from one or more of boron, aluminum, gallium and indium.

[0115] As a further example of this embodiment, the doping type of the silicon wafer 200 is P-type, and the doping type of the first doping layer 210 is N-type, and the doping element therein is selected from one or both of phosphorus and arsenic.

[0116] Step S2.3, forming a tunneling layer and a second doping layer in sequence on a side of the silicon wafer away from the first doping layer.

[0117] Figure 8 For Figure 7 A schematic diagram of a structure in which a tunneling layer 230 and a second doping layer 220 are formed on the basis of the structure shown in FIG. Figure 8 As shown, the tunneling layer 230 and the second doping layer 220 are sequentially stacked on the backlight surface of the silicon wafer 200 .

[0118] In this embodiment, the doping type of the second doping layer 220 is opposite to the doping type of the first doping layer 210, and the doping type of the second doping layer 220 is the same as the doping type of the silicon wafer 200. The tunneling layer 230 and the second doping layer 220 form a passivation contact structure, which is used to passivate the surface of the silicon wafer 200 away from the first doping layer 210 and improve the transmission performance of carriers.

[0119] As an example of this embodiment, the material of the tunneling layer 230 is silicon oxide.

[0120] As a further example of this embodiment, the tunneling layer 230 is formed by thermal oxidation or chemical vapor deposition. Further, the chemical vapor deposition method may be plasma enhanced chemical vapor deposition or low pressure chemical vapor deposition.

[0121] As an example of this embodiment, the thickness of the tunneling layer 230 is 1 nm to 3 nm.

[0122] As an example of this embodiment, the material of the second doping layer 220 includes polysilicon. The step of forming the second doping layer 220 includes: depositing doped amorphous silicon material on the silicon wafer 200, and then converting the doped amorphous silicon material into doped polysilicon material by annealing to serve as the second doping layer 220.

[0123] As a further example of this embodiment, the doped amorphous silicon material is deposited on the silicon wafer 200 by chemical vapor deposition or physical vapor deposition. Further, the chemical vapor deposition method may be plasma enhanced chemical vapor deposition or low pressure chemical vapor deposition.

[0124] As a further example of this embodiment, in the process of converting the doped amorphous silicon material into the doped polysilicon material, the annealing temperature is 850° C. to 950° C.

[0125] In this embodiment, after the tunneling layer 230 and the second doping layer 220 are formed, a step of performing de-coating and cleaning on the silicon wafer 200 is further included to remove the de-coated film layer.

[0126] Step S2.4, forming a first surface functional layer, a second surface functional layer, a first electrode and a second electrode.

[0127] Fig. 9 For Figure 8 A schematic diagram of a structure in which a first surface functional layer 240 and a second surface functional layer 250 are formed on the basis of the structure shown in FIG. Fig. 9 As shown, the first surface functional layer 240 is formed on the surface of the first doping layer 210 away from the silicon wafer 200 , and the second surface functional layer 250 is formed on the surface of the second doping layer 220 away from the silicon wafer 200 .

[0128] As an example of this embodiment, the first surface functional layer 240 includes at least one of a first passivation film and a first anti-reflection film. Further, the first surface functional layer 240 includes the first passivation film and the first anti-reflection film sequentially stacked on the first doping layer 210.

[0129] As a further example of this embodiment, the material of the first passivation film includes one or more of silicon oxide and aluminum oxide. The first passivation film is formed by chemical vapor deposition or physical vapor deposition.

[0130] As a further example of this embodiment, the material of the first anti-reflection film includes silicon nitride. The first passivation film is formed by chemical vapor deposition or physical vapor deposition.

[0131] As an example of this embodiment, the second surface functional layer 250 includes at least one of a second passivation film and a second anti-reflection film. Further, the second surface functional layer 250 includes a second anti-reflection film stacked on the second doping layer 220.

[0132] As a further example of this embodiment, the material of the second passivation film includes silicon nitride. The second passivation film is formed by chemical vapor deposition or physical vapor deposition.

[0133] As a further example of this embodiment, the material of the second anti-reflection film includes silicon nitride. The second passivation film is formed by chemical vapor deposition or physical vapor deposition.

[0134] Fig.10 For Fig. 9A schematic diagram of a structure in which a first electrode 260 and a second electrode 270 are formed on the basis of the structure shown in FIG. Fig.10 As shown, the first electrode 260 is in electrical contact with the first doping layer 210 , and the second electrode 270 is in electrical contact with the second doping layer 220 .

[0135] As an example of this embodiment, the first doped layer 210 has a heavily doped region 211, and the first electrode 260 contacts the heavily doped region 211 in the first doped layer 210. The heavily doped region 211 of the first doped layer 210 is the region shielded by the diffusion suppression layer during the preparation process.

[0136] As an example of this embodiment, the materials of the first electrode 260 and the second electrode 270 are metals. Further, the materials of the first electrode 260 and the second electrode 270 are each independently selected from one or more of silver, copper, gold, aluminum and iron.

[0137] As a further example of this embodiment, the first electrode 260 and the second electrode 270 may be prepared by screen printing and sintering.

[0138] Through the above steps S2.1 to S2.4, the solar cell of the present invention can be formed.

[0139] In a fourth aspect, the present invention further provides a solar cell, which is prepared by the method for preparing the solar cell in the above embodiment.

[0140] It should be noted that the present application is not limited to the above-mentioned embodiments. The above-mentioned embodiments are only examples, and the embodiments having the same structure as the technical idea and exerting the same effect within the scope of the technical solution of the present application are all included in the technical scope of the present application. In addition, within the scope of the subject matter of the present application, various modifications that can be thought of by those skilled in the art to the embodiments and other methods of combining some of the constituent elements in the embodiments are also included in the scope of the present application.

Claims

1. A method for preparing a doping layer, characterized in that: The steps include: depositing a doping source layer containing doping elements on a substrate; forming a diffusion suppression layer on the doping source layer, and patterning the diffusion suppression layer to expose a portion of the doping source layer; and, The doping source layer is annealed to form the doping layer.

2. The method for preparing a doping layer according to claim 1, characterized in that: The material of the diffusion suppression layer is selected from one or more of silicon nitride, silicon oxynitride, aluminum nitride and silicon oxide.

3. The method for preparing a doping layer according to claim 1, characterized in that: The process of patterning the diffusion suppression layer includes: removing a part of the diffusion suppression layer by laser irradiation.

4. The method for preparing a doping layer according to claim 3, characterized in that: During the laser irradiation process, the energy density of the laser used was 0.24 J / cm 2 ~16 J / cm 2 .

5. The method for preparing a doping layer according to any one of claims 1 to 4, characterized in that: The material of the doping source layer includes doped oxide of silicon, and the doping source layer is deposited by chemical vapor deposition or atomic layer deposition.

6. The method for preparing a doping layer according to claim 5, characterized in that: The step of depositing the doping source layer comprises: placing the substrate in a deposition chamber; and, A silicon source gas, an oxygen source gas and a doping source gas are introduced into the deposition chamber to react with each other to form the doping source layer.

7. The method for preparing a doping layer according to claims 1 to 4 and 6, characterized in that: The material of the diffusion suppression layer is selected from silicon compounds, and the diffusion suppression layer is formed by chemical vapor deposition or atomic layer deposition.

8. The method for preparing a doping layer according to claim 7, characterized in that: The step of forming the diffusion suppression layer comprises: placing the substrate in a deposition chamber; and, A silicon source gas and a reaction gas are introduced into the deposition chamber to react with each other to form the diffusion suppression layer.

9. The method for preparing a doping layer according to any one of claims 1 to 4, 6 and 8, characterized in that: The thickness of the doping source layer is 60nm-150nm; and / or, The thickness of the diffusion suppression layer is 2nm-10nm.

10. The method for preparing a doping layer according to any one of claims 1 to 4, 6 and 8, characterized in that: The formed doping layer includes a heavily doped region shielded by the diffusion suppression layer and a lightly doped region not shielded by the diffusion suppression layer; wherein, The doping concentration of the heavily doped region is 2×10 19 cm -3 ~1×10 20 cm -3 and / or, The doping concentration of the lightly doped region is 1×10 18 cm -3 ~5×10 18 cm -3 .

11. The method for preparing a doping layer according to any one of claims 1 to 4, 6 and 8, characterized in that: In the step of annealing the doping source layer, the annealing temperature is controlled to be 950° C. to 1100° C.; After forming the doping layer, the step of placing the substrate in an oxidizing gas environment for oxidation treatment is also included.

12. A method for preparing a solar cell, characterized in that: The steps include: providing a silicon wafer as a substrate; and, A doping layer is formed on the silicon wafer using the method for preparing a doping layer as described in any one of claims 1 to 11.

13. The method for preparing a solar cell according to claim 12, characterized in that: The doping type of the silicon wafer is N-type, and the doping element in the doping layer is selected from one or more of boron, aluminum, gallium and indium; or, The doping type of the silicon wafer is P type, and the doping elements in the doping layer are selected from one or both of phosphorus and arsenic.

14. The method for preparing a solar cell according to any one of claims 12 to 13, characterized in that: The formed doping layer is used as a first doping layer. After forming the first doping layer, the following steps are further included: A tunneling layer and a second doping layer are sequentially formed on a side of the silicon wafer away from the first doping layer, and the doping type of the second doping layer is opposite to that of the first doping layer.

15. The method for preparing a solar cell according to claim 14, characterized in that: The following steps are also included: forming a first surface functional layer and a first electrode in sequence on a side of the first doped layer away from the silicon wafer; and / or, A second surface functional layer and a second electrode are sequentially formed on a side of the second doped layer away from the silicon wafer.

16. A solar cell, characterized in that: The solar cell is prepared by the method for preparing the solar cell according to any one of claims 12 to 15.

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