Wafer Map and method and system for judging whether inclined wafer exists or not

Abstract

The invention discloses a wafer Map and a method and system for judging whether a wafer is inclined or not, and relates to the technical field of semiconductor ion implantation control, and the method comprises the steps: sequentially generating standard arrays from a first wafer to a last wafer based on the distance between adjacent wafer grooves in a wafer rack; marking the position of each wafer passing through the photoelectric sensor in the wafer rack; and generating a mapping array P [p1, p2, p3,..., pn] according to one-to-one comparison between the actual position array of each wafer and a preset standard position array, defining a preset error value as D, and judging whether the system carries out wafer marking or not. The method comprises the following steps: firstly, calculating an intermediate value of position data when a wafer passes through the center of an optical sensor for the first time and finally, taking the intermediate value as an actual position of the wafer, sequentially comparing the actual position with a preset wafer standard position, and determining the final position of the wafer in an error allowable range. And an identification error caused by inconsistent wafer thickness is prevented.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor ion implantation control, and in particular to a wafer map and a method and system for determining whether a wafer is tilted. Background Art

[0002] Ion implantation of wafers is a key step in semiconductor manufacturing. It involves implanting impurity atoms into the wafer in the form of ions to change its electrical properties. During the ion implantation process, the transfer of the wafer is crucial. First, the specific position of the wafer in the cassette must be accurately determined before the wafer is transferred. Secondly, the wafer must be placed accurately and the wafer must not be tilted to avoid any damage to the wafer caused by the robotic arm during the grabbing process. The above measures are all to ensure the smooth progress of the ion implantation process.

[0003] When performing a Map operation in the prior art, the specific position of the wafer is determined only by a single position measurement when the wafer first reaches the center of the optical sensor. However, due to the uneven thickness of the wafer, this measurement method may have errors, resulting in inaccurate wafer position identification, and may even mistakenly identify an improperly placed wafer as correct and mark it. In addition, when performing a Map operation, the system can only determine the position of the wafer, but cannot identify a tilted wafer. Such a wafer may be damaged during the robotic arm's pick-and-place process, making it impossible to continue the ion implantation process, reducing the yield of ion implantation. Summary of the invention

[0004] In order to solve the problem of inaccurate wafer positioning, easy wafer damage and ion implantation, the present invention provides a wafer map and a method and system for determining whether the wafer is tilted.

[0005] The technical solution of the present invention is as follows:

[0006] A wafer map and a method for determining whether a wafer is tilted include the following operations:

[0007] S1, controlling the movement of the wafer rack, obtaining the position parameters of the first wafer on the wafer rack when it moves to the position of the photoelectric sensor, and marking the position of the first wafer, recorded as a1;

[0008] S2, based on the spacing between adjacent wafer slots on the wafer rack, a standard array is generated from the first wafer to the last wafer in sequence, recorded as a preset standard position array A[a1, a2, a3, ..., an];

[0009] S3, controlling the movement of the wafer rack to mark the position where each wafer in the wafer rack passes the photoelectric sensor;

[0010] S31. Mark the position where each wafer just arrives at the photoelectric sensor as B1[b11, b12, b13, ……, b1n];

[0011] S32. Mark the position where each wafer just leaves the photoelectric sensor as B2[b21, b22, b23, ……, b2n];

[0012] S33. Calculate the actual position of each wafer based on the positions where the wafer arrives at and leaves the photoelectric sensor, and obtain the actual position array W[w1, w2, w3, ……, wn], where W = (B1 + B2) / 2;

[0013] S4. Generate a mapping array P[p1, p2, p3, ……, pn] by comparing the actual position array of each wafer with the preset standard position array one by one, and define the preset error value as D. Determine whether the system performs wafer marking, where pn = 丨wn - an丨,

[0014] If pn ≤ D, then mark pn at the an label position corresponding to the preset standard position array as 1, indicating that there is a wafer at this position. If pn > D, then mark pn at this position as 0, indicating that there is no wafer at this position.

[0015] The wafers are placed in the wafer rack in such a way that multiple wafers are arranged in sequence along the vertical direction within the wafer rack.

[0016] To improve the accuracy of wafer position acquisition, the wafer rack and the photoelectric sensor are arranged staggeredly front and back in operations S1 and S3, and the moving direction of the wafer rack is the vertical direction. The wafer positions marked in operations S1, S31, and S32 are all at the center position of the wafer moving to the photoelectric sensor.

[0017] To be able to mark tilted wafers and give an alarm indication, and prevent misjudgment by the system that there is no wafer at a position where a tilted wafer is marked with pn > D. In operation S4, when pn > D and pn ≤ Y, then pn at this position is still marked as 0, and the system gives an alarm to indicate that there is a tilted wafer at this position, where Y is the distance between adjacent wafer slots.

[0018] The specific design of the wafer slots is that there are 20 - 30 wafer slots in the wafer rack, and the distance Y between adjacent wafer slots is 3 mm - 5 mm, and the preset error value D is 1 mm - 2 mm.

[0019] A wafer Map and a system for judging whether there is a tilted wafer, used to implement the method of wafer Map and judging whether there is a tilted wafer, which is characterized by including:

[0020] A wafer rack for arranging and placing multiple wafers in the vertical direction;

[0021] Photoelectric sensor, used to detect and mark the position of the wafer as it moves with the wafer rack;

[0022] The wafer rack driving module is used to drive the wafer rack to move in the vertical direction after receiving the vertical movement path signal of the wafer rack;

[0023] A calculation module is used to generate an array of wafer positions marked by the photoelectric sensor, and when each wafer passes the photoelectric sensor, determine the position of the wafer just arriving at and just leaving the photoelectric sensor and calculate the actual array W[w1, w2, w3, ..., wn]; generate a mapping array P[p1, p2, p3, ..., pn] based on the actual position array of each wafer and the preset standard position array; compare the mapping array with the preset error value D and the distance Y between adjacent wafer slots;

[0024] A computer device comprises a processor and a memory, wherein the processor is used to implement instructions; and the memory is used to store a plurality of instructions, wherein the instructions are suitable for being loaded by the processor and executing the operations of the method.

[0025] A computer-readable storage medium having a computer program / instruction stored thereon, characterized in that the computer program / instruction implements the operation of the method when executed by a processor.

[0026] The beneficial effects of the present invention are as follows: the present invention is a method and system for wafer mapping and determining whether a wafer is tilted, which can improve the accuracy of wafer position identification. The method first calculates the middle value of the position data when the wafer passes the center of the optical sensor for the first and last time as the actual position of the wafer, and then compares the actual position with the preset wafer standard position in sequence, and determines the final position of the wafer within the allowable error range to prevent identification errors caused by inconsistent wafer thickness. On the basis of determining the wafer position, an error range is set to detect whether there is a tilted piece in the wafer rack. The error range can avoid false alarms caused by non-adjacent placement of wafers. Not only does it improve the accuracy of wafer position identification, but it also successfully avoids the risk of the wafer being damaged during robot grasping due to tilt, thereby ensuring the integrity of the wafer and ensuring a high yield rate of ion implantation. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] By reading the detailed description of the preferred embodiment below, the scheme and advantages of the present application will become clear to those skilled in the art. The accompanying drawings are only for the purpose of illustrating the preferred embodiment and are not to be considered as limiting the present invention.

[0028] In the attached picture:

[0029] Figure 1 Schematic diagram of the process of wafer map and method for determining whether a wafer is tilted in an embodiment;

[0030] Figure 2 The specific steps of operation S3 of the embodiment;

[0031] Figure 3 It is a schematic diagram of the position of the wafer rack and the photoelectric sensor;

[0032] Figure 4 This is a diagram to verify the relative positions of the sensor and the photoelectric sensor. DETAILED DESCRIPTION

[0033] The exemplary embodiments of the present disclosure will be described in more detail below in conjunction with the accompanying drawings. It should be noted that these embodiments are provided to enable a more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art. The present disclosure can be implemented in various forms and should not be limited by the embodiments described herein.

[0034] Example

[0035] First, this embodiment provides a wafer map and a system for determining whether a wafer is tilted, which is used to implement the following wafer map and method for determining whether a wafer is tilted, including:

[0036] Wafer rack, combined Figure 3 , used to arrange and place multiple wafers in the vertical direction, there are 20-30 wafer slots distributed vertically in the wafer rack, and in this embodiment, there are 25 wafer slots designed, and the distance Y between adjacent wafer slots is 3mm-5mm. In this solution, the distance Y between adjacent wafer slots is 4.75mm, and, in order to ensure the accuracy of measurement, multiple wafers are arranged in sequence in the vertical direction in the wafer rack, that is, multiple wafers are placed in multiple wafer slots in sequence.

[0037] The wafer rack driving module is used to drive the wafer rack to move in the vertical direction after receiving the vertical movement path signal of the wafer rack. It should be noted that the wafer rack and the photoelectric sensor are staggered front to back, and the movement direction of the wafer rack is vertical. After receiving the signal from the general control module, the wafer rack driving module can drive the wafer rack to move vertically. Since the wafer rack and the photoelectric sensor are staggered front to back, multiple wafers in the wafer rack can pass through the photoelectric sensor in sequence.

[0038] The photoelectric sensor is used to detect the position of the wafer when the wafer rack moves and mark it. When the wafer rack drive module drives the wafer rack to move, it can drive the wafer to move to the photoelectric sensor. In the following method, the wafer is driven to move to the center position of the photoelectric sensor for marking.

[0039] A calculation module is used to generate an array of the positions of the wafers marked by the optoelectronic sensors in the following method, and when each wafer passes through the optoelectronic sensor, determine the positions where the wafer just arrives and just leaves the optoelectronic sensor, and calculate the actual array W[w1, w2, w3, ……, wn]; generate a mapping array P[p1, p2, p3, ……, pn] based on the actual position array of each wafer and the preset standard position array; compare the mapping array with the preset error value D and the distance Y between adjacent wafer slots.

[0040] This embodiment also provides a wafer Map and a method for judging whether the wafer is skewed. Refer to Figure 1 , including the following operations:

[0041] S1. Control the movement of the wafer rack, obtain the position parameters when the first wafer on the wafer rack moves to the position of the optoelectronic sensor, and mark the position of the first wafer, denoted as a1;

[0042] S2. Generate a standard array in sequence from the first wafer to the last wafer based on the spacing between adjacent wafer slots on the wafer rack, denoted as the preset standard position array A[a1, a2, a3, ……, an];

[0043] S3. Combine Figure 2 , control the movement of the wafer rack, and mark the positions where each wafer in the wafer rack passes through the optoelectronic sensor;

[0044] S31. Mark the position where each wafer just arrives at the optoelectronic sensor as B1[b11, b12, b13, ……, b1n];

[0045] S32. Mark the position where each wafer just leaves the optoelectronic sensor as B2[b21, b22, b23, ……, b2n];

[0046] S33. Calculate the actual position of each wafer based on the positions where the wafer arrives and leaves the optoelectronic sensor and obtain the actual position array W[w1, w2, w3, ……, wn], where W = (B1 + B2) / 2;

[0047] S4. Generate a mapping array P[p1, p2, p3, ……, pn] by comparing the actual position array of each wafer with the preset standard position array one by one, and define the preset error value as D to judge whether the system performs wafer marking, where pn = 丨wn - an丨,

[0048] If pn ≤ D, then pn at the an label position corresponding to the preset standard position array is marked as 1, indicating that there is a wafer at this position. If pn > D, then pn at this position is marked as 0, indicating that there is no wafer at this position.

[0049] S1. Control the movement of the wafer rack, obtain the position parameters of the first wafer on the wafer rack when it moves to the position of the photoelectric sensor, and mark the position of the first wafer, which is recorded as a1.

[0050] Before moving, the wafer to be injected is placed in the wafer rack, and the wafer rack drive module is used to control the movement of the wafer rack so that the first wafer moves just to the center position of the photoelectric sensor. At this time, it is the preset standard position of the first wafer.

[0051] S2. Generate a standard array from the first wafer to the last wafer in sequence based on the spacing between adjacent wafer slots on the wafer rack, recorded as a preset standard position array A[a1, a2, a3, ..., an].

[0052] Since the distance between each wafer slot in the wafer rack is fixed, the preset standard position of each wafer is obtained from the first wafer down to the nth wafer, which is recorded as the preset standard position array.

[0053] After the calculation module completes the marking, the master control module sends the signal to the wafer rack drive module for subsequent operations.

[0054] S3, controlling the movement of the wafer rack to mark the position of each wafer in the wafer rack passing the photoelectric sensor. In this embodiment, it is necessary to control each wafer to move to the center position of the photoelectric sensor before marking the wafer;

[0055] S31, mark the position of each wafer just reaching the photoelectric sensor as B1 [b11, b12, b13, ..., b1n], that is, mark the position when the highest position of the upper surface of each wafer reaches the center position of the photoelectric sensor. After performing the wafer marking in the last wafer slot, obtain the position parameters of all wafers just reaching the center of the photoelectric sensor and record them as array B1;

[0056] S32, mark the position of each wafer just leaving the photoelectric sensor as B2 [b21, b22, b23, ..., b2n], that is, mark the position when the lowest position of the lower surface of each wafer reaches the center position of the photoelectric sensor. After completing the wafer marking in the last wafer slot, obtain the position parameters of all wafers just leaving the center of the photoelectric sensor and record them as array B2;

[0057] S33. Calculate the actual position of each wafer based on the position where the wafer arrives at and leaves the photoelectric sensor and obtain the actual position array W[w1, w2, w3, ..., wn]. The actual position is the average of the above two marked positions, where W=(B1+B2) / 2 is calculated by the calculation module.

[0058] S4. Generate a mapping array P[p1, p2, p3, ……, pn] by comparing the actual position array of each wafer with the preset standard position array one by one. The initial values in the array are all assigned 0, and a preset error value D is defined. Determine whether the system performs wafer marking. Considering that the wafer may be coated or spin-coated with photoresist, etc., resulting in an uncertain wafer thickness, during the process of calculating the difference between the corresponding values in the actual position array W and the preset standard position array A, certain errors may occur. Therefore, a preset error value D of 1 mm - 2 mm is formulated, and D takes a value of 1.5 mm in this embodiment.

[0059] Where pn = 丨wn - an丨. If pn ≤ D, it proves that there is a wafer in the corresponding wafer slot, and the position of the wafer is standard. The pn corresponding to the an label position in the preset standard position array is recorded as 1, indicating that there is a wafer at this position. Of course, if pn > D, the pn at this position is recorded as 0, indicating that there is no wafer at this position.

[0060] It should be noted that when the wafer is tilted in the wafer slot, the calculated pn value will be greater than the preset error value D. However, at this time, it will be marked that there is no wafer at this position. Therefore, in the operation S4, when pn > D and pn ≤ Y, the pn at this position is still recorded as 0, and the system alarms to prompt that there is a tilted wafer at this position, where Y is the spacing between adjacent wafer slots. Considering that a range is set when defining the wafer tilt alarm, this range needs to be less than or equal to the distance between two wafer racks: to prevent the wafers from not being placed adjacent to each other, at this time, it should be marked as no wafer to avoid false alarms caused by too far a distance. This range is |wn - an| ≤ Y, and Y takes a value of 4.75 mm in this embodiment.

[0061] In this embodiment, a computer device is disclosed, which includes a processor and a memory. The processor is used to implement instructions; the memory is used to store multiple instructions, and the instructions are suitable for being loaded and executed by the processor to perform the operations of the wafer Map and the method for judging whether there is a tilted wafer.

[0062] In this embodiment, the processor can be a central processing unit CPU, and the processor can also be other general-purpose processors, digital signal processors DSP, application-specific integrated circuits ASIC, off-the-shelf programmable gate arrays FPGA or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc.

[0063] The memory can include a read-only memory and a random access memory, and provide instructions and data to the processor. A part of the memory can also include a non-volatile random memory. For example, the memory can also store information about the device type.

[0064] This embodiment also discloses a computer-readable storage medium, on which a computer program / instruction is stored. When the computer program / instruction is executed by a processor, the operations of the wafer map and the method for determining whether the wafer is tilted are implemented.

[0065] It should be noted that the above embodiments describe the basic principle and working method of the judgment system provided by the present invention, which is not limited by the number of photoelectric sensors and the number of position detection points. Figure 3 In the schematic diagram of the invention shown, the photoelectric sensor and the position detection point are in one place, and Figure 4 In another improved embodiment of the present invention shown, the photoelectric sensor and the position detection point are set in two places, but the detection and judgment principles are the same.

[0066] Figure 4 The situation refers to that another photoelectric sensor, denoted as a verification sensor, is provided at a position where the original photoelectric sensor (denoted as the working sensor) is rotated 45°-90° (90° in the figure) around the center of the wafer rack, and the working sensor and the verification sensor can be rotated together on the same circular bracket (shown by the dotted line in the figure) around the center of the wafer rack to adjust the position. In the operation of wafer mapping and judging whether the wafer is tilted, the verification sensor and the working sensor execute the same procedure, and the system compares the judgment result obtained by the verification sensor with the judgment result obtained by the working sensor to verify each other. Since the working sensor and the verification sensor are arranged at an angle around the wafer rack and detect different wafer positions, if the judgment results of different detection positions based on the preset error value D are different, the system can issue a warning prompt while rotating the working sensor and the verification sensor around the center of the wafer rack at a certain angle, preferably 20°-60°, such as Figure 4 As shown, the detection and judgment procedures are repeatedly executed, and the consistency of the judgment results is continuously verified until a consistent judgment result is output, or an alarm is still issued after executing the detection and judgment procedures for a set number of times, prompting the staff to check the wafer at that position.

Claims

1. A wafer map and a method for determining whether a wafer is tilted, characterized in that: Including the following operations: S1. Control the movement of the wafer rack, obtain the position parameters when the first wafer on the wafer rack moves to the position of the photoelectric sensor, and mark the position of the first wafer, denoted as a1; S2. Generate a standard array in sequence from the first wafer to the last wafer based on the spacing between adjacent wafer slots on the wafer rack, denoted as the preset standard position array A[a1, a2, a3, ……, an]; S3. Control the movement of the wafer rack, mark the position where each wafer in the wafer rack passes through the photoelectric sensor and obtain the actual position array W[w1, w2, w3, ……, wn] corresponding to each wafer; S31. Mark the position where each wafer just reaches the photoelectric sensor as B1[b11, b12, b13, ……, b1n]; S32. Mark the position where each wafer just leaves the photoelectric sensor as B2[b21, b22, b23, ……, b2n]; S33. Calculate the actual position of each wafer based on the positions where the wafer reaches and leaves the photoelectric sensor and obtain the actual position array W[w1, w2, w3, ……, wn], where W = (B1 + B2) / 2; S4. Generate a mapping array P[p1, p2, p3, ……, pn] by comparing the actual position array of each wafer with the preset standard position array one by one, and define the preset error value as D, and judge whether the system performs wafer marking, where pn = 丨wn - an丨, If pn ≤ D, then pn at the an label position corresponding to the preset standard position array is recorded as 1, indicating that there is a wafer at this position; if pn > D, then pn at this position is recorded as 0, indicating that there is no wafer at this position.

2. A wafer map and a method for determining whether a wafer is tilted according to claim 1, characterized in that: Multiple wafers are arranged in sequence in the wafer rack in the vertical direction.

3. The wafer map and the method for determining whether the wafer is tilted according to claim 1, characterized in that: In the operations S1 and S3, the wafer rack and the photoelectric sensor are arranged staggeredly front and back, and the moving direction of the wafer rack is the vertical direction.

4. The wafer map and the method for determining whether the wafer is tilted according to claim 1, characterized in that: In the operations S1, S31, and S32, the marked wafer positions are all at the center position where the wafer moves to the photoelectric sensor.

5. The wafer map and the method for determining whether the wafer is tilted according to claim 1, characterized in that: In the operation S4, when pn > D and pn ≤ Y, then pn at this position is still recorded as 0, and the system alarms to prompt that there is a tilted wafer at this position, where Y is the spacing between adjacent wafer slots.

6. The wafer map and the method for determining whether the wafer is tilted according to claim 1, characterized in that: There are 20 - 30 wafer slots in the wafer rack, the distance Y between adjacent wafer slots is 3 mm - 5 mm, and the preset error value D is 1 mm - 2 mm.

7. A system for wafer mapping and determining whether a wafer is tilted, used to implement the method for wafer mapping and determining whether a wafer is tilted as described in claim 1, characterized in that: Including: A wafer rack for arranging and placing multiple wafers in the vertical direction; A photoelectric sensor for detecting the position of the wafer when the wafer moves with the wafer rack and marking it; A wafer rack drive module for driving the wafer rack to move in the vertical direction after receiving the vertical direction movement path signal of the wafer rack; A calculation module is used to generate an array of wafer positions marked by the photoelectric sensor, and when each wafer passes the photoelectric sensor, determine the position of the wafer just arriving at and just leaving the photoelectric sensor and calculate the actual array W[w1, w2, w3, ..., wn]; generate a mapping array P[p1, p2, p3, ..., pn] based on the actual position array of each wafer and the preset standard position array; compare the mapping array with the preset error value D and the distance Y between adjacent wafer slots.

8. A computer device comprising a processor and a memory, wherein the processor is used to implement instructions; and the memory is used to store multiple instructions, wherein: The instructions are suitable for being loaded by a processor and executing the operations of the method according to any one of claims 1 to 6.

9. A computer-readable storage medium having a computer program / instruction stored thereon, characterized in that: When the computer program / instructions are executed by a processor, the operations of the method according to any one of claims 1 to 6 are implemented.

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