AIP airtight tube shell based on LTCC technology

Abstract

The invention relates to the technical field of AIP airtight tube shells, in particular to an AIP airtight tube shell based on an LTCC technology. According to the invention, through an LTCC technology, lamination and co-firing are successively carried out according to a sequence; the AIP airtight tube shell is sequentially provided with a bottom bonding pad layer, two layers of first dielectric substrates, a layer of second dielectric substrate, a first metal layer, three layers of third dielectric substrates, a second metal layer, four layers of fourth dielectric substrates, a third metal layer, three layers of fifth dielectric substrates, a fourth metal layer, three layers of sixth dielectric substrates and a fifth metal layer from bottom to top. And the seventh layer comprises a seventh dielectric substrate and a sixth metal layer. The packaging structure has the advantages of being high in reliability, flexible in form, high in integration level, low in loss, good in heat dissipation performance and capable of achieving larger effective radiation power and meeting air tightness, miniaturization is carried out while high isolation of the radio frequency end of the chip is guaranteed, meanwhile, a cavity is dug in the tube shell and used for containing a molybdenum copper block, and the heat dissipation problem of the chip is well solved.

Description

Technical Field

[0001] The invention relates to the technical field of AIP airtight tube shells, and in particular to an AIP airtight tube shell based on LTCC technology. Background Art

[0002] With the development of the communications industry and AIP technology, the pursuit of airtightness, high reliability, high integration, more flexible layout and low loss is becoming more and more intense. Traditional packaging processes are gradually unable to meet market demand, especially in the Ka frequency band and above. The implementation of traditional packaging processes is more difficult and the loss is often greater.

[0003] The existing AIP processes mainly include LTCC (low temperature co-fired ceramics), HDI (high density interconnect) and FOWLP (wafer-level fan-out packaging). The existing technology uses a complete AIP solution for 60GHz phased array systems. This solution integrates 16 rectangular microstrip antennas in a BGA package based on the LTCC process, and the transmitting or receiving bare chip is connected to the AIP through flip-chip technology. Another complete AIP solution for 60GHz phased array systems based on organic material high-density interconnect technology (HDI) realizes the embedding of air cavities in the AIP to improve the impedance and radiation characteristics of the microstrip antenna.

[0004] However, in the prior art, the AIP technology based on the LTCC process is mostly BGA packaging, which has poor flexibility and heat dissipation, and is large in size and high in cost. Summary of the invention

[0005] In view of the above-mentioned shortcomings of the prior art, the object of the present invention is to provide an AIP airtight tube shell based on the LTCC process, which has high reliability, flexible form, high integration, low loss, good heat dissipation, and can achieve greater effective radiation power.

[0006] To achieve the above-mentioned purpose and other related purposes, the present invention provides an AIP airtight tube shell based on the LTCC process, wherein the AIP airtight tube shell is formed by stacking and co-firing in sequence through the LTCC process, and wherein the AIP airtight tube shell is provided with a bottom pad layer, two layers of a first dielectric substrate, one layer of a second dielectric substrate, a first metal layer, three layers of a third dielectric substrate, a second metal layer, four layers of a fourth dielectric substrate, a third metal layer, three layers of a fifth dielectric substrate, a fourth metal layer, three layers of a sixth dielectric substrate, a fifth metal layer, seven layers of a seventh dielectric substrate, and a sixth metal layer from the bottom layer to the top layer.

[0007] In one embodiment of the present invention, the bottom pad layer includes four pairs of RF input pins, four pairs of functional pins, and ground pins. The fourth pin on each side of the bottom pad layer is a RF input pin, the tenth pin and the twelfth pin on each side are functional pins, and the rest are ground pins.

[0008] In one embodiment of the present invention, the first dielectric substrate, the second dielectric substrate, and the two third dielectric substrates of the bottom layer are all distributed in a centrally symmetrical structure, and four rectangular cavities are provided on the first dielectric substrate, the second dielectric substrate, and the two third dielectric substrates of the bottom layer, and the rectangular cavities are used to place molybdenum-copper blocks, and the platform on the molybdenum-copper block is bonded to the ground plane of the first metal layer, and the protrusion on the molybdenum-copper block is flush with the bottom pad layer.

[0009] In one embodiment of the present invention, the third dielectric substrate on the top layer is distributed in a centrally symmetrical structure, and four rectangular cavities are arranged on the third dielectric substrate, and the rectangular cavities are used to place chips.

[0010] In one embodiment of the present invention, the four layers of the fourth dielectric substrate are ceramic frame layers, and the ceramic frame layers are rectangular blocks with a hollow center.

[0011] In one embodiment of the present invention, the sixth metal layer is a 2×2 array antenna, and the array antenna includes a U-shaped patch and a ground probe.

[0012] In one embodiment of the present invention, the RF pin of the first metal layer is connected to the second dielectric substrate, the first dielectric substrate, and the bottom pad layer in sequence through a metal through hole through a stripline; the RF pin of the first metal layer is connected to the third dielectric substrate, the second metal layer, the fourth dielectric substrate, and the third metal layer in sequence through a metal through hole through a stripline; the RF pin of the third metal layer is connected to the fifth dielectric substrate, the fourth metal layer, the sixth dielectric substrate, the fifth metal layer, the seventh dielectric substrate, and the sixth metal layer in sequence through a metal through hole through a coaxial structure.

[0013] In one embodiment of the present invention, circles with a radius of 0.3 mm are hollowed out from four corners of the third metal layer for passing through the coaxial structure.

[0014] In one embodiment of the present invention, the fourth metal layer includes four strip lines.

[0015] In one embodiment of the present invention, circles with a radius of 0.3 mm are hollowed out from four corners of the fifth metal layer for passing through the coaxial structure.

[0016] As described above, the AIP airtight tube shell based on the LTCC process of the present invention has the following beneficial effects:

[0017] (1) The AIP airtight tube shell based on the LTCC process of the present invention has high reliability, flexible form, high integration, low loss, good heat dissipation, and can achieve greater effective radiation power, and can also meet the requirements of airtightness.

[0018] (2) The AIP airtight tube shell based on the LTCC process of the present invention is miniaturized while ensuring high isolation of the chip RF end. At the same time, a cavity is dug inside the tube shell for placing a molybdenum-copper block, which better improves the heat dissipation problem of the chip.

[0019] (3) The AIP airtight tube shell based on the LTCC process of the present invention has a ceramic frame on the top of the tube shell. The air cavity of the frame can also be used to improve the impedance and radiation characteristics of the microstrip antenna, thereby improving reliability.

[0020] (4) In the AIP airtight tube shell based on the LTCC process of the present invention, the metal ground of the ceramic antenna can reduce the radiation of the tube shell, that is, the integration performance of the ceramic antenna and the tube shell under the package is better. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 A schematic diagram of the layer-by-layer stacking of an AIP airtight tube shell based on the LTCC process provided in an embodiment of the present application.

[0022] Figure 2 A schematic diagram of a stack of layers of an AIP airtight tube shell based on LTCC technology provided in an embodiment of the present application, connected by metal vias.

[0023] Figure 3 A schematic structural diagram of a bottom pad layer C00 of an AIP airtight tube shell based on LTCC process provided in an embodiment of the present application.

[0024] Figure 4 A schematic structural diagram of the first metal layer C03 of an AIP airtight tube shell based on LTCC process provided in an embodiment of the present application.

[0025] Figure 5 A schematic structural diagram of the second metal layer C06 of an AIP airtight tube shell based on LTCC process provided in an embodiment of the present application.

[0026] Figure 6 A schematic structural diagram of a third metal layer C10 of an AIP airtight tube shell based on LTCC process provided in an embodiment of the present application.

[0027] Figure 7 A schematic structural diagram of a fourth metal layer C13 of an AIP airtight tube shell based on LTCC process provided in an embodiment of the present application.

[0028] Figure 8A schematic structural diagram of the fifth metal layer C16 of an AIP airtight tube shell based on LTCC process provided in an embodiment of the present application.

[0029] Fig. 9 A schematic structural diagram of the sixth metal layer C23 of an AIP airtight tube shell based on LTCC process provided in an embodiment of the present application.

[0030] Fig.10 A top view of the interior of an AIP airtight tube shell based on LTCC process provided in an embodiment of the present application.

[0031] Fig.11 This is an external structural diagram of an AIP airtight tube shell based on LTCC process provided in an embodiment of the present application.

[0032] Fig.12 A simulation result diagram of a ceramic antenna of an AIP airtight tube shell based on LTCC process provided in an embodiment of the present application.

[0033] Fig.13 A simulation result diagram of an AIP airtight tube shell based on LTCC process provided in an embodiment of the present application.

[0034] Fig.14 A diagram of the simulation results of the cascade connection of an AIP airtight tube shell and a ceramic antenna based on the LTCC process provided in an embodiment of the present application.

[0035] Component number description

[0036] C00 Bottom pad layer

[0037] VIA01-VIA02 First dielectric substrate

[0038] VIA03 Second dielectric substrate

[0039] C03 First Metal Layer

[0040] VIA04-VIA06 Third dielectric substrate

[0041] C06 Second Metal Layer

[0042] VIA07-VIA010 Four-layer fourth dielectric substrate

[0043] C10 Third metal layer

[0044] VIA11-VIA13 three-layer fifth dielectric substrate

[0045] C13 Fourth metal layer

[0046] VIA14-VIA16 three-layer sixth dielectric substrate

[0047] C16 Fifth Metal Layer

[0048] VIA17-VIA23 Seven-layer seventh dielectric substrate

[0049] C23 Sixth metal layer DETAILED DESCRIPTION

[0050] The following describes the embodiments of the present invention by specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict.

[0051] It should be noted that the illustrations provided in the following embodiments are only used to illustrate the basic concept of the present invention in a schematic manner, and thus the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0052] Terms such as first or second can be used to describe various components, but these components are not limited by the above terms. The above terms are used to distinguish one component from another component, for example, without departing from the scope of the concept according to the present disclosure, a first component can be referred to as a second component, and similarly, a second component can be referred to as a first component.

[0053] In addition, "connected / coupled" means that one component is directly electrically coupled to another component or is indirectly electrically coupled through another component. The singular form may include the plural form unless explicitly stated in the sentence. In addition, "include / comprise" or "includes / comprises" used in this specification indicates that one or more components, steps, operations, and elements exist or have been added. The specific structural or functional descriptions of the examples of the implementation of the concepts disclosed in this specification are only illustrated to describe the examples of the implementation of the concepts, and the examples of the implementation of the concepts can be implemented in various forms, but these descriptions are not limited to the examples of the implementation described in this specification.

[0054] According to the concept, various modifications and changes can be applied to the examples of the embodiments, so that the examples of the embodiments will be illustrated in the drawings and described in the specification. However, the examples of the embodiments according to the concept are not limited to the specific embodiments, but include all changes, equivalents or replacements included in the spirit and technical scope of the present disclosure.

[0055] It should be understood that when an element is described as being "coupled" or "connected" to another element, the element may be directly coupled or directly connected to the other element, or may be coupled or connected to the other element through a third element. Conversely, it should be understood that when an element is referred to as being "directly coupled to" or "directly coupled to" another element, no other element is placed between them. Other expressions describing the relationship between components (i.e., "between" and "directly between" or "adjacent to" and "directly adjacent to") need to be interpreted in the same manner.

[0056] The terms used in this specification are only used to describe specific examples of the embodiments and are not intended to limit the present disclosure. If there is no clear opposite meaning in the context, the singular form may include the plural form. In this specification, it should be understood that the term "including" or "having" indicates the presence of the features, quantities, steps, operations, components, parts or combinations thereof described in the specification, but the possibility of the presence or addition of one or more other features, quantities, steps, operations, components, parts or combinations thereof cannot be precluded.

[0057] If there is no contrary definition, all terms (including technical terms or scientific terms) used herein have the same meaning as those generally understood by ordinary technicians in the field. If the terms defined in the commonly used dictionary are not clearly defined in this specification, they should be interpreted as having the same meaning as in the context of the relevant technology, and not interpreted as ideal or overly formal meanings.

[0058] Descriptions of well-known components and processing techniques may be omitted so as not to unnecessarily obscure the embodiments of the disclosure.

[0059] Throughout the specification, the same reference numerals refer to the same elements. Thus, even if a reference numeral is not mentioned or described with reference to one figure, it may be mentioned or described with reference to another figure. Furthermore, even if a reference numeral is not shown in one figure, it may be mentioned or described with reference to another figure.

[0060] In addition, the logic level of the signal may be different or opposite to the described logic level. For example, a signal described as having a logic "high" level may alternatively have a logic "low" level, and a signal described as having a logic "low" level may alternatively have a logic "high" level.

[0061] The following will describe the various embodiments of the present disclosure in detail with reference to the accompanying drawings. However, it will be appreciated by those skilled in the art that in the various embodiments of the present disclosure, many technical details are provided in order to enable the reader to better understand the present disclosure. However, even without these technical details and various changes and modifications based on the following embodiments, the technical solutions claimed in the present disclosure can be implemented.

[0062] See also Figure 1 , Figure 2 , Figure 1 A schematic diagram of the layer-by-layer stacking of an AIP airtight tube shell based on the LTCC process provided in an embodiment of the present application. Figure 2 A schematic diagram of a stacking of layers of an AIP airtight tube shell based on LTCC technology provided in an embodiment of the present application, which is connected by metal vias. The present invention provides an AIP airtight tube shell based on LTCC technology, which is formed by stacking and co-firing in sequence through the LTCC process, and the AIP airtight tube shell is sequentially provided with a bottom pad layer C00, two layers of first dielectric substrates VIA01-VIA02, one layer of second dielectric substrate VIA03, a first metal layer C03, three layers of third dielectric substrates VIA04-VIA06, a second metal layer C06, four layers of fourth dielectric substrates VIA07-VIA010, a third metal layer C10, three layers of fifth dielectric substrates VIA11-VIA13, a fourth metal layer C13, three layers of sixth dielectric substrates VIA14-VIA16, a fifth metal layer C16, seven layers of seventh dielectric substrates VIA17-VIA23, and a sixth metal layer C23 from the bottom layer to the top layer.

[0063] Specifically, the bottom pad layer C00 includes four pairs of RF input pins, four pairs of functional pins, and ground pins. The fourth pin on each side of the bottom pad layer C00 is an RF input pin, the tenth pin and the twelfth pin on each side are functional pins, and the rest are ground pins.

[0064] In one embodiment of the present invention, an AIP airtight tube shell based on LTCC process of the present invention is formed by stacking multiple layers of dielectric substrates, and each layer of substrates is spliced ​​together through LTCC process.

[0065] Specifically, the first dielectric substrate VIA01-VIA02, the second dielectric substrate VIA03, and the two third dielectric substrates VIA04-VIA05 at the bottom layer are all distributed in a centrally symmetrical structure, and four rectangular cavities are provided on the first dielectric substrate VIA01-VIA02, the second dielectric substrate VIA03, and the two third dielectric substrates VIA04-VIA05 at the bottom layer, and the rectangular cavities are used to place molybdenum-copper blocks, and the platforms on the molybdenum-copper blocks are bonded to the ground plane of the first metal layer C03, and the protrusions on the molybdenum-copper blocks are flush with the bottom pad layer C00.

[0066] Specifically, the third dielectric substrates VIA04 - VIA06 of the top layer are distributed in a centrally symmetrical structure, and four rectangular cavities are arranged on the third dielectric substrates VIA04 - VIA06 , and the rectangular cavities are used to place chips.

[0067] Specifically, the four fourth dielectric substrates VIA07 - VIA010 are ceramic frame layers, and the ceramic frame layer is a rectangular block with a hollow center.

[0068] Specifically, the sixth metal layer C23 is a 2×2 array antenna, and the array antenna includes a U-shaped patch and a ground probe.

[0069] In one embodiment of the present invention, an AIP airtight tube shell based on LTCC process of the present invention adopts a central symmetrical structure design, and four cavities are reserved in the middle of the tube shell, which can place four chips at the same time to achieve four channels working at the same time. The cavities are separated by a ground plane and a metal through hole to the ground, which can provide a high degree of isolation and ensure that the four internal chips will not be mutually coupled and self-excited.

[0070] In one embodiment of the present invention, each dielectric substrate of an AIP airtight tube shell based on LTCC process of the present invention uses ceramic as the substrate material. The characteristics of the dielectric material are lower loss and more stable electrical constant.

[0071] The AIP airtight tube shell based on the LTCC process of the present invention is a dielectric block formed by stacking multiple layers of dielectric substrates. The dielectric block is embedded with metal silver or gold as a metal pattern of the conductor, which can achieve the required electrical performance conditions and has good conductivity, greatly reducing the transmission loss of the metal conductor.

[0072] The AIP airtight tube shell based on the LTCC process of the present invention can be designed into an airtight package through the LTCC process, which provides an airtight environment for the chip, isolates the external water vapor, and can be used in an environment with airtightness requirements.

[0073] The AIP airtight tube shell based on the LTCC process of the present invention is made through the LTCC process, and the definition of each layer of the dielectric substrate and the required number of layers are flexibly designed by engineers. The definition of each layer of the dielectric substrate of the present invention includes a molybdenum-copper placement layer, a chip placement layer, a ceramic frame layer and a ceramic antenna layer, which are stacked and co-fired in the order described.

[0074] The fourth dielectric substrate VIA07-VIA010 of the present invention is a ceramic frame layer, which is characterized by a rectangular block with a hollow center. A rectangular block with rounded corners is dug out from the center area, with a wall thickness of 1.5 mm. The ceramic antenna welded thereon can meet the airtightness requirements.

[0075] The sixth metal layer C23 of the present invention is characterized by a 2×2 array antenna designed based on LTCC technology, and its appearance is composed of a U-shaped patch plus a grounding probe, which is used as a closed tube shell to isolate water vapor to achieve integration of chip and antenna.

[0076] Specifically, the RF pin of the first metal layer C03 is connected to the second dielectric substrate VIA03, the first dielectric substrate VIA01-VIA02, and the bottom pad layer C00 in sequence through metal through holes through strip lines; the RF pin of the first metal layer C03 is connected to the third dielectric substrate VIA04-VIA06, the second metal layer C06, the fourth dielectric substrate VIA07-VIA010, and the third metal layer C10 in sequence through metal through holes through strip lines; the RF pin of the third metal layer C10 is connected to the fifth dielectric substrate VIA11-VIA13, the fourth metal layer C13, the sixth dielectric substrate VIA14-VIA16, the fifth metal layer C16, the seventh dielectric substrate VIA17-VIA23, and the sixth metal layer C23 in sequence through metal through holes through coaxial structures.

[0077] Specifically, circles with a radius of 0.3 mm are dug out from the four corners of the third metal layer C10 to pass through the coaxial structure.

[0078] Specifically, the fourth metal layer C13 includes four strip lines.

[0079] Specifically, circles with a radius of 0.3 mm are dug out from the four corners of the fifth metal layer C16 to pass through the coaxial structure.

[0080] The present invention discloses an AIP airtight tube shell based on LTCC process, wherein the interior of the AIP airtight tube shell presents a centrally symmetrical structural distribution, wherein the platform on the molybdenum-copper pair is bonded to the ground plane of the first metal layer C03, the ground plane and the pin pair are connected to the corresponding pins at the bottom of the tube shell through metal vias, and the protrusions on the molybdenum-copper pair are flush with the bottom pad layer C00.

[0081] The present invention is an AIP airtight tube shell based on LTCC process. First, a strip line is connected through a metal via and then connected to the top RF bonding area through the metal via. Second, the top RF bonding area is connected to a strip line through a through hole and then connected to the AIP through a metal via connecting different media. The through hole aperture is calculated based on the impedance transformation principle, which can effectively achieve a better impedance matching effect of the conversion structure. According to the ground spacing on both sides of the through hole and the medium difference between the tube shell and the AIP, the initial values ​​of the aperture and line width are calculated, and then the aperture size, the distance from the ground and the strip line width are adjusted according to the actual situation of the overall simulation, which can achieve a better impedance matching effect, reduce the return loss of the RF pin, and output a 50Ω signal.

[0082] See also Figure 3 , Figure 3 This is a schematic diagram of the structure of the bottom pad layer C00 of an AIP airtight tube shell based on the LTCC process provided in an embodiment of the present application. The pattern printed on the bottom pad layer C00 can match the standard WQFN-NJE0032A package, and the counterclockwise direction of the cut corner side starts at pin 1. The pad pin size is 0.4mm×0.25mm, and the size to the ground plane is 7mm×7mm. Four 1.6mm×0.6mm rectangles are dug out to the ground plane to place the raised part of the molybdenum copper block flush with C00.

[0083] See also Figure 4 , Figure 4 The schematic diagram of the structure of the first metal layer C03 of an AIP airtight tube shell based on LTCC process provided in the embodiment of the present application. The internal RF circuit of the first metal layer C03 is as follows Figure 4 As shown, the RF pin is extended from the metal through hole to the stripline of the first metal layer C03, and then connected to the RF bonding area through the metal through hole. The stripline width is a = 0.16mm, and the distance between the ground plane and the stripline is b = 0.3mm. The RF input stripline consists of two sections, with a length of c = 0.6mm, a width of a1 = 0.22mm and a length of c1 = 0.65mm, a width of a = 0.16mm. The aperture of the RF hole connected to the stripline is r = 0.05mm, and the aperture of the ground hole is r1 = 0.06mm. Most of the area of ​​the first metal layer C03 is the ground plane. The large area of ​​the ground is to reduce the radiation of the RF line and reduce the parasitic parameters at high frequencies. While shortening the length of the chip surface current to the ground, it is also to allow the active chip to have better heat dissipation to avoid damaging the integrated circuit inside the chip.

[0084] See also Figure 5 , Figure 5A schematic diagram of the structure of the second metal layer C06 of an AIP airtight tube shell based on the LTCC process provided in an embodiment of the present application. The second metal layer C06 achieves impedance matching at the conversion structure by adjusting the metal through-hole aperture, the distance from the ground and the width of the strip line, and achieves impedance matching between the package and the chip. Finally, it is bonded to the pad at the RF end of the chip through gold wire to output a 50Ω signal. The size of the RF bonding area is 0.3mm×0.2mm, and circles with a radius of 0.25mm are dug out at the four corners, which are connected to the ceramic antenna through through holes. The routing of the functional leads passes through the pins required for the metal leads to conduct, which greatly improves the flexibility of chip design.

[0085] See also Figure 6 , Figure 6 The third metal layer C10 is a schematic diagram of the structure of an AIP airtight tube shell based on LTCC process provided in an embodiment of the present application. The four corners of the third metal layer C10 are cut out to form circles with a radius of 0.3 mm, and are connected to the tube shell through a coaxial structure in a ceramic frame.

[0086] See also Figure 7 , Figure 7 The fourth metal layer C13 of the AIP airtight tube shell based on the LTCC process is provided in the embodiment of the present application. The ceramic antenna of the fourth metal layer C13 is converted inside by a strip line, which effectively reduces the coupling between the tube shell and the antenna.

[0087] See also Figure 8 , Figure 8 A schematic diagram of the structure of the fifth metal layer C16 of an AIP airtight tube shell based on LTCC process provided in an embodiment of the present application. The fifth metal layer C16 has circles with a diameter of 0.3 mm dug out at four RF holes and is connected to the antenna metal pattern on the top through through holes.

[0088] See also Fig. 9 , Fig. 9 The sixth metal layer C23 of the AIP airtight tube shell based on LTCC process is provided in the embodiment of the present application. The metal pattern of the sixth metal layer C23 is a 1.6mm×1.6mm rectangular block with rounded corners and a 0.75mm×0.65mm U-shaped groove dug out.

[0089] See also Fig.10 , Fig.10 The top view of the interior of an AIP airtight tube shell based on LTCC process provided in the embodiment of the present application. The appearance of the ceramic frame is a rectangular block with a hollow center. A rectangular block with rounded corners is dug out from the center area. The wall thickness is 1.5mm. It is composed of four layers of green porcelain with a thickness of 0.1mm. Fig.10As shown in the black filled area, the ceramic antenna can be welded to meet the airtightness requirements. Four pairs of molybdenum copper blocks are placed in the chip placement cavity area. The molybdenum copper protrusions are located on the first dielectric substrate and the second dielectric substrate, with a size of 1.6mm×0.6mm, and the excavated cavity is 1.7mm×0.7mm. The molybdenum copper platform is located on the third dielectric substrate, with a size of 2.6mm×1.6mm, and the excavated cavity is 2.7mm×1.7mm. Fix the molybdenum copper and then place the chip. It is fixed on the molybdenum copper with conductive glue, which can meet the heat dissipation requirements of the power amplifier or low-noise amplifier. Placing four cavities can meet the needs of four channels working simultaneously. Four pairs of functional leads and RF bonding areas surround the chip and are connected by gold wire bonding.

[0090] See also Fig.11 , Fig.11 The external structure diagram of an AIP airtight tube shell based on LTCC process provided in the embodiment of the present application. The size of the AIP airtight tube shell is 9mm×9mm, and it is specifically composed of 6 layers of chip packaging, 4 layers of ceramic surrounding frames, 6 layers of ceramic antenna conversion structures, and 7 layers of ceramic antennas.

[0091] See also Fig.12 , Fig.13 , Fig.14 , Fig.12 A simulation result diagram of a ceramic antenna of an AIP airtight tube shell based on LTCC process provided in an embodiment of the present application. Fig.13 A simulation result diagram of an AIP airtight tube shell based on LTCC process provided in an embodiment of the present application. Fig.14 The simulation result diagram of the cascade connection of an AIP airtight tube shell and a ceramic antenna provided in an embodiment of the present application is shown in FIG. The return loss of the ceramic antenna and the AIP tube shell at 32-40GHz is less than -10dB, and the cascade result is also less than -10dB. The AIP tube shell meets the design requirements.

[0092] In summary, the AIP airtight shell based on the LTCC process of the present invention has high reliability, flexible form, high integration, low loss, good heat dissipation, and can achieve greater effective radiation power. It can also meet the requirements of airtightness. It is miniaturized while ensuring high isolation of the chip RF end. At the same time, a cavity is dug inside the shell to place a molybdenum copper block, which better improves the heat dissipation problem of the chip. The top of the shell is a circle of ceramic frame, and the air cavity of the frame can also be used to improve the impedance and radiation characteristics of the microstrip antenna, thereby improving reliability. The metal ground of the ceramic antenna can reduce the radiation of the shell, that is, the integration performance of the ceramic antenna and the shell under this package is better.

[0093] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. An AIP airtight tube shell based on LTCC process, characterized in that: The AIP airtight tube shell is formed by stacking and co-firing in sequence through the LTCC process. The AIP airtight tube shell is provided with a bottom pad layer (C00), two layers of first dielectric substrates (VIA01-VIA02), one layer of second dielectric substrate (VIA03), a first metal layer (C03), three layers of third dielectric substrates (VIA04-VIA06), a second metal layer (C06), four layers of fourth dielectric substrates (VIA07-VIA010), a third metal layer (C10), three layers of fifth dielectric substrates (VIA11-VIA13), a fourth metal layer (C13), three layers of sixth dielectric substrates (VIA14-VIA16), a fifth metal layer (C16), seven layers of seventh dielectric substrates (VIA17-VIA23), and a sixth metal layer (C23) from the bottom layer to the top layer.

2. The AIP airtight tube shell based on LTCC process according to claim 1, characterized in that: The bottom pad layer (C00) includes four pairs of RF input pins, four pairs of functional pins, and ground pins. The fourth pin on each side of the bottom pad layer (C00) is a RF input pin, the tenth pin and the twelfth pin on each side are functional pins, and the rest are ground pins.

3. The AIP airtight tube shell based on LTCC process according to claim 2, characterized in that: The first dielectric substrate (VIA01-VIA02), the second dielectric substrate (VIA03), and the bottom two layers of the third dielectric substrate (VIA04-VIA05) are all distributed in a centrally symmetrical structure, and four rectangular cavities are provided on the first dielectric substrate (VIA01-VIA02), the second dielectric substrate (VIA03), and the bottom two layers of the third dielectric substrate (VIA04-VIA05), and the rectangular cavities are used to place molybdenum-copper blocks, and the platform on the molybdenum-copper block is bonded to the ground plane of the first metal layer (C03), and the protrusion on the molybdenum-copper block is flush with the bottom pad layer (C00).

4. The AIP airtight tube shell based on LTCC process according to claim 3, characterized in that: The third dielectric substrate (VIA04-VIA06) of the top layer is distributed in a central symmetrical structure, and four rectangular cavities are arranged on the third dielectric substrate (VIA04-VIA06), and the rectangular cavities are used to place chips.

5. The AIP airtight tube shell based on LTCC process according to claim 1, characterized in that: The four fourth dielectric substrates (VIA07-VIA010) are ceramic frame layers, and the ceramic frame layers are rectangular blocks with a hollow center.

6. The AIP airtight tube shell based on LTCC process according to claim 1, characterized in that: The sixth metal layer (C23) is a 2×2 array antenna, and the array antenna includes a U-shaped patch and a ground probe.

7. The AIP airtight tube shell based on LTCC process according to claim 2, characterized in that: The radio frequency pins of the first metal layer (C03) are connected to the second dielectric substrate (VIA03), the first dielectric substrate (VIA01-VIA02), and the bottom pad layer (C00) in sequence through metal through holes through strip lines; the radio frequency pins of the first metal layer (C03) are connected to the third dielectric substrate (VIA04-VIA06), the second metal layer (C06), the fourth dielectric substrate (VIA07-VIA010), and the third metal layer (C10) in sequence through metal through holes through strip lines; the radio frequency pins of the third metal layer (C10) are connected to the fifth dielectric substrate (VIA11-VIA13), the fourth metal layer (C13), the sixth dielectric substrate (VIA14-VIA16), the fifth metal layer (C16), the seventh dielectric substrate (VIA17-VIA23), and the sixth metal layer (C23) in sequence through metal through holes through coaxial structures.

8. The AIP airtight tube shell based on LTCC process according to claim 7, characterized in that: Circles with a radius of 0.3 mm are dug out from the four corners of the third metal layer (C10) for passing through the coaxial structure.

9. The AIP airtight tube shell based on LTCC process according to claim 7, characterized in that: The fourth metal layer (C13) includes four strip lines.

10. The AIP airtight tube shell based on LTCC process according to claim 7, characterized in that: Circles with a radius of 0.3 mm are dug out from the four corners of the fifth metal layer (C16) for passing through the coaxial structure.

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