Wake-up circuit

Abstract

The invention provides a wake-up circuit. The wake-up circuit comprises a self-locking key, a first capacitor and a control circuit, the self-locking key is arranged between the battery and the first capacitor; the first capacitor is connected with the control circuit; the first capacitor is charged when the self-locking key is pressed down; the control circuit is used for outputting a wake-up signal to a power supply chip of the battery management system when the first capacitor is in a charging state. When the self-locking key is pressed down, the first capacitor starts to be charged, and in the charging process, the control circuit is switched on and outputs the wake-up signal to the power supply chip of the battery management system, so that the power supply chip of the battery management system is awakened. And after the first capacitor is charged, the control circuit does not output the wake-up signal to the power supply chip of the battery management system any more. At the moment, the single-chip microcomputer outputs voltage to the power supply chip so that the power supply chip can work continuously. Therefore, based on the wake-up circuit, when the battery management system is dormant, the power supply chip is also dormant, so that the energy consumption in the battery management system is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of power supply equipment, and in particular to a wake-up circuit. Background Art

[0002] Battery Management System (BMS) is a key technology in electric vehicles and energy storage solutions. As the brain of the battery pack, it is responsible for monitoring, managing and maintaining battery cells to ensure safe and efficient operation of the battery and maximize its service life.

[0003] In order to effectively extend battery life, reducing energy consumption is crucial. Low power management strategies can not only extend the battery life cycle by reducing the overall energy consumption of the system, but also reduce the user's need to charge.

[0004] The implementation of this low-power management system relies on carefully designed software logic and hardware circuits. It has intelligent sleep and wake-up functions, that is, when the device is not in use, it automatically enters a low-energy sleep state to reduce energy consumption; and when the device needs to resume work, the hardware wake-up mechanism quickly activates the device to normal working mode. This design ensures that the device will only be awakened from the sleep state when an external trigger signal appears.

[0005] However, the inventors have found that current low-power management systems mainly focus on managing the power of microcontrollers and other chips, while the power chips themselves continue to consume energy, and therefore cannot effectively reduce energy consumption. Summary of the invention

[0006] The embodiment of the present invention provides a wake-up circuit to solve the problem that the low power management system cannot effectively reduce energy consumption because the power chip itself still continues to consume energy at this stage.

[0007] In a first aspect, an embodiment of the present invention provides a wake-up circuit, which is applied to a battery management system; the wake-up circuit includes: A self-locking button, a first capacitor and a control circuit; The self-locking button is arranged between the battery and the first capacitor; the first capacitor is connected to the control circuit; The first capacitor is charged when the self-locking button is pressed; the control circuit is used to output a wake-up signal to the power chip of the battery management system when the first capacitor is in a charging state.

[0008] In a possible implementation, the control circuit includes a first transistor; The collector of the first transistor is connected to the first end of the first capacitor, and the base is respectively connected to the emitter, the second end of the first capacitor and the negative electrode of the battery.

[0009] In a possible implementation, the control circuit further includes a first resistor, a second resistor, and a second transistor; The first end of the first resistor is respectively connected to the first end of the first capacitor and the emitter of the second transistor, and the second end is respectively connected to the first end of the second resistor and the base of the second transistor; The second end of the second resistor is connected to the collector of the first transistor; The collector of the second transistor is connected to the battery management system.

[0010] In a possible implementation, the control circuit further includes a third resistor; The first end of the third resistor is connected to the first end of the first capacitor, and the second end is connected to the second end of the second resistor and the collector of the first transistor respectively.

[0011] In a possible implementation, the control circuit further includes a fourth resistor, a fifth resistor, and a sixth resistor; The first end of the fourth resistor is respectively connected to the second end of the first capacitor and the first end of the sixth resistor, and the second end is respectively connected to the base of the first transistor and the first end of the fifth resistor; The second end of the fifth resistor is connected to the negative electrode of the battery and the emitter of the first transistor respectively; The second end of the sixth resistor is connected to the self-locking button and the first end of the first capacitor respectively.

[0012] In a possible implementation, the control circuit further includes a first diode and a seventh resistor; The anode of the first diode is connected to the collector of the second transistor, and the cathode is connected to the first end of the seventh resistor; The second end of the seventh resistor is connected to the power chip of the battery management system.

[0013] In a possible implementation, the control circuit further includes an eighth resistor and a second diode; A first end of the eighth resistor is connected to the second end of the seventh resistor, and a second end of the eighth resistor is connected to the cathode of the second diode; The anode of the second diode is connected to the single chip microcomputer.

[0014] In a possible implementation, the control circuit further includes a second capacitor; The first end of the second capacitor is respectively connected to the power chip of the battery management system and the second end of the seventh resistor, and the second end is grounded.

[0015] In a possible implementation, the control circuit further includes a ninth resistor; A first end of the ninth resistor is connected to the collector of the second transistor and the anode of the first diode respectively, and a second end of the ninth resistor is grounded.

[0016] In a possible implementation, the control circuit is connected to an EN pin of a power chip in the battery management system, and is configured to output a wake-up signal to the EN pin of the power chip in the battery management system when the first capacitor is in a charging state.

[0017] The embodiment of the present invention provides a wake-up circuit, which is applied to a battery management system to solve the problem that the existing low-power management system cannot effectively reduce energy consumption because the power chip itself continues to consume energy. Specifically, the embodiment of the present invention sets a self-locking button, a first capacitor and a control circuit in the wake-up circuit. When the self-locking button is in a disconnected state, the battery is disconnected from the battery management system, and the battery management system is in a power-off mode. At this time, the power chip in the battery management system is also turned off, and the power chip does not consume energy. When the self-locking button is pressed, the first capacitor is connected to the battery, and the first capacitor starts to charge. During the charging process, the control circuit is turned on and outputs a wake-up signal to the power chip of the battery management system, so that the power chip of the battery management system is awakened. When the first capacitor is fully charged, the control circuit no longer outputs a wake-up signal to the power chip of the battery management system. At this time, the system starts to work, and the single-chip microcomputer outputs a voltage to the power chip to keep the power chip working. It can be seen that the embodiment of the present invention is based on the wake-up circuit, so that the power chip is also dormant when the battery management system is dormant, which can reduce the energy consumption in the battery management system. At the same time, the battery management system is controlled to work by closing the self-locking button in the wake-up circuit, which is easy to operate and can save costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0019] Figure 1 is a structural schematic diagram of a wake-up circuit provided by an embodiment of the present invention; Figure 2 It is a schematic diagram of the structure of a control circuit provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0020] In order to enable people in the technical field to better understand the present solution, the technical solution in the embodiment of the present solution will be clearly described below in conjunction with the drawings in the embodiment of the present solution. Obviously, the described embodiment is an embodiment of a part of the present solution, not all of the embodiments. Based on the embodiments in the present solution, all other embodiments obtained by ordinary technicians in the field without creative work should fall within the scope of protection of the present solution.

[0021] The term "including" and any other variations in the specification and claims of this solution and the above drawings mean "including but not limited to", and is intended to cover non-exclusive inclusions and is not limited to the examples listed in the text. In addition, the terms "first" and "second" are used to distinguish different objects, not to describe a specific order.

[0022] The following is a detailed description of the implementation of the present invention in conjunction with the specific drawings: Figure 1 A schematic diagram of a wake-up circuit provided by an embodiment of the present invention. Figure 1 , the wake-up circuit includes: Self-locking button T1, first capacitor C1 and control circuit ZT1.

[0023] The self-locking button T1 is arranged between the battery E1 and the first capacitor C1; the first capacitor C1 is connected to the control circuit ZT1.

[0024] The first capacitor C1 is charged when the self-locking button T1 is pressed; the control circuit ZT1 is used to output a wake-up signal to the power chip M1 of the battery management system BMS when the first capacitor C1 is in a charging state.

[0025] In this embodiment, the battery E1 can be a 24V battery. The battery E1 is connected to the first capacitor C1 through the self-locking button T1. When the self-locking button T1 is pressed, the battery E1 starts to charge the first capacitor C1. During the charging process of the first capacitor C1, the voltage of the node connected to the control circuit ZT1 gradually increases, and the control circuit ZT1 is turned on. In this process, the control circuit ZT1 outputs a voltage to the power chip M1 of the battery management system BMS. When the voltage is higher than the working voltage of the power chip M1, the power chip M1 is awakened and starts working.

[0026] The power chip M1 outputs the working voltage, and the single chip microcomputer starts to work. At this time, the first capacitor C1 is fully charged, and the control circuit ZT1 no longer outputs voltage to the power chip M1 of the battery management system BMS. The power chip M1 is provided with a wake-up signal by the single chip microcomputer.

[0027] When the target device is not needed, the battery management system BMS enters a sleep state, and the voltage output by the microcontroller is 0, that is, the power chip M1 is no longer provided with a wake-up signal, and the power chip M1 stops working and enters a sleep state.

[0028] When the target device needs to be used again, the battery management system BMS needs to enter the wake-up state. Since the self-locking button T1 was pressed, that is, closed, after the last use, the self-locking button T1 needs to be disconnected and then pressed again to close it in order to wake up the power chip M1.

[0029] Compared with the traditional wake-up circuit, after waking up the power chip M1, it is necessary to continuously output the wake-up signal through the wake-up circuit to ensure that the power chip M1 remains in the awake state during the working stage. The wake-up circuit provided in the embodiment of the present invention stops outputting the wake-up signal after the power chip M1 wakes up. The wake-up signal of the power chip M1 in the working state is provided by the single-chip microcomputer, which can prevent additional energy consumption.

[0030] Figure 2 is a schematic diagram of the structure of the control circuit provided by an embodiment of the present invention, the control circuit ZT1 and the connection relationship therein are as shown in FIG. Figure 2 shown.

[0031] In an optional embodiment, the control circuit ZT1 includes a first transistor Q1.

[0032] The collector of the first transistor Q1 is connected to the first end of the first capacitor C1 , and the base is connected to the emitter, the second end of the first capacitor C1 , and the negative electrode of the battery E1 .

[0033] In this embodiment, the connection node between the self-locking button T1 and the first end of the first capacitor C1 is point A. When the self-locking button T1 is pressed, the voltage at point A is 24V, and the first capacitor C1 starts to charge. During the charging process, the voltage at point B rises from 0 to 0.7V and maintains at 0.7V. The first transistor Q1 is turned on, and the voltage at point C is 0 to generate a potential difference, so that the control circuit ZT1 outputs a voltage to the power chip M1 of the battery management system BMS, which is also a wake-up signal. Among them, the time that the voltage at point B is maintained at 0.7V is determined by the charging time of the first capacitor C1. The capacity of the first capacitor C1 selected in this embodiment is 10uF, and the charging time can be maintained at about 200ms.

[0034] In an optional embodiment, the control circuit ZT1 further includes a first resistor R1, a second resistor R2 and a second transistor Q2.

[0035] The first end of the first resistor R1 is respectively connected to the first end of the first capacitor C1 and the emitter of the second transistor Q2 , and the second end is respectively connected to the first end of the second resistor R2 and the base of the second transistor Q2 .

[0036] The second end of the second resistor R2 is connected to the collector of the first transistor Q1 .

[0037] The collector of the second transistor Q2 is connected to the battery management system BMS.

[0038] In this embodiment, after the voltage is output from points A and C, after passing through the first resistor R1 and the second resistor R2, the voltage at point D is 23.3V, and the second transistor Q2 is turned on. Since point E is connected to point A, the voltage at point E rises to 24V, and the voltage flows through point E to be transmitted to the power chip M1.

[0039] In an optional embodiment, the control circuit ZT1 further includes a third resistor R3.

[0040] A first end of the third resistor R3 is connected to the first end of the first capacitor C1 , and a second end of the third resistor R3 is connected to the second end of the second resistor R2 and the collector of the first transistor Q1 .

[0041] In an optional embodiment, the control circuit ZT1 further includes a fourth resistor R4, a fifth resistor R5 and a sixth resistor R6.

[0042] The first end of the fourth resistor R4 is respectively connected to the second end of the first capacitor C1 and the first end of the sixth resistor R6, and the second end is respectively connected to the base of the first transistor Q1 and the first end of the fifth resistor R5.

[0043] The second end of the fifth resistor R5 is connected to the negative electrode of the battery E1 and the emitter of the first transistor Q1 respectively.

[0044] The second end of the sixth resistor R6 is connected to the self-locking button T1 and the first end of the first capacitor C1 respectively.

[0045] In this embodiment, the third resistor R3, the fourth resistor R4, the fifth resistor R5 and the sixth resistor R6 are provided to realize functions such as current limiting protection, bias setting, voltage division, and stable operating point, so as to ensure that the wake-up circuit can work normally.

[0046] In an optional embodiment, the control circuit ZT1 further includes a first diode D1 and a seventh resistor R7.

[0047] The anode of the first diode D1 is connected to the collector of the second transistor Q2 , and the cathode of the first diode D1 is connected to the first end of the seventh resistor R7 .

[0048] The second end of the seventh resistor R7 is connected to the power chip M1 of the battery management system BMS.

[0049] In an optional embodiment, the control circuit ZT1 is connected to the EN pin of the power chip M1 in the battery management system BMS, and is used to output a wake-up signal to the EN pin of the power chip M1 of the battery management system BMS when the first capacitor is in a charging state.

[0050] In this embodiment, when the voltage at point E is transmitted to the EN pin of the power chip M1 through the first diode D1 and the seventh resistor R7, so that the voltage at the EN pin of the power chip M1 is higher than 1.23V, the power chip M1 is activated and starts to work.

[0051] In an optional embodiment, the control circuit ZT1 further includes an eighth resistor R8 and a second diode D2.

[0052] A first end of the eighth resistor R8 is connected to the second end of the seventh resistor R7 , and a second end of the eighth resistor R8 is connected to the cathode of the second diode D2 .

[0053] The anode of the second diode D2 is connected to the single chip microcomputer.

[0054] In this embodiment, when the power chip M1 starts to work, the OUT pin outputs a 5V voltage, and the single-chip computer starts to work. At this time, the first capacitor C1 is fully charged, and the battery E1 no longer supplies power. During the operation of the single-chip computer, the LOCK pin outputs a 5V voltage, which is transmitted to the EN pin of the power chip M1 through the eighth resistor R8 and the second diode D2, so that the voltage of the EN pin of the power chip M1 is higher than 1.23V, keeping the power chip M1 in an awake state, so that the power chip M1 can continue to work.

[0055] When the target device is not needed, the battery management system BMS enters the sleep stage, and the voltage output by the LOCK pin is 0. At this time, the voltage at the EN pin of the power chip M1 is lower than 1.23V, and the power chip M1 stops working and enters the sleep stage.

[0056] When the battery management system BMS needs to be woken up again, the self-locking button T1 needs to be disconnected first and then closed.

[0057] In an optional embodiment, the control circuit ZT1 further includes a second capacitor C2.

[0058] A first end of the second capacitor C2 is respectively connected to the power chip M1 of the battery management system BMS and a second end of the seventh resistor R7 , and a second end thereof is grounded.

[0059] In an optional embodiment, the control circuit ZT1 further includes a ninth resistor R9.

[0060] A first end of the ninth resistor R9 is respectively connected to the collector of the second transistor Q2 and the anode of the first diode D1 , and a second end thereof is grounded.

[0061] In this embodiment, in order to ensure safety, a second capacitor C2 is set at the EN pin of the power chip M1 and grounded through the second capacitor C2. The second capacitor C2 can be used as a filter capacitor to filter out noise and AC components of the power supply, smooth the pulsating DC voltage, and store electrical energy.

[0062] In addition, in this embodiment, a ninth resistor R9 is further provided in the control circuit ZT1 , and the ninth resistor R9 is grounded to ensure the stability of the system and prevent voltage accumulation.

[0063] In summary, a wake-up circuit provided by an embodiment of the present invention can solve the problem that the existing low-power management system cannot effectively reduce energy consumption because the power chip itself is still consuming energy. Specifically, the embodiment of the present invention sets a self-locking button T1, a first capacitor C1 and a control circuit ZT1 in the wake-up circuit. When the self-locking button T1 is in a disconnected state, the battery E1 is disconnected from the battery management system BMS, and the battery management system BMS is in a power-off mode. At this time, the power chip M1 in the battery management system BMS is also turned off, and the power chip M1 does not consume energy. When the self-locking button T1 is pressed, the first capacitor C1 is connected to the battery E1, and the first capacitor C1 starts to charge. During the charging process, the control circuit ZT1 is turned on and outputs a wake-up signal to the power chip M1 of the battery management system BMS, so that the power chip M1 of the battery management system BMS is awakened. When the first capacitor C1 is fully charged, the control circuit ZT1 no longer outputs a wake-up signal to the power chip M1 of the battery management system BMS. At this time, the system starts to work, and the single-chip microcomputer outputs a voltage to the power chip M1 so that the power chip M1 continues to work. It can be seen that the embodiment of the present invention is based on the wake-up circuit, which makes the power chip M1 also sleep when the battery management system BMS sleeps, which can reduce the energy consumption in the battery management system BMS. At the same time, the battery management system BMS is controlled to work by closing the self-locking button T1 in the wake-up circuit, which is easy to operate and can save costs.

[0064] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A wake-up circuit, characterized in that: Applied to a battery management system; the wake-up circuit comprises: A self-locking button, a first capacitor and a control circuit; The self-locking button is arranged between the battery and the first capacitor; the first capacitor is connected to the control circuit; The first capacitor is charged when the self-locking button is pressed; and the control circuit is used to output a wake-up signal to the power chip of the battery management system when the first capacitor is in a charging state.

2. The wake-up circuit according to claim 1, characterized in that: The control circuit includes a first transistor; The collector of the first transistor is connected to the first end of the first capacitor, and the base is respectively connected to the emitter, the second end of the first capacitor and the negative electrode of the battery.

3. The wake-up circuit according to claim 2, characterized in that: The control circuit also includes a first resistor, a second resistor and a second triode; The first end of the first resistor is respectively connected to the first end of the first capacitor and the emitter of the second transistor, and the second end is respectively connected to the first end of the second resistor and the base of the second transistor; The second end of the second resistor is connected to the collector of the first transistor; The collector of the second transistor is connected to the battery management system.

4. The wake-up circuit according to claim 3, characterized in that: The control circuit also includes a third resistor; The first end of the third resistor is connected to the first end of the first capacitor, and the second end is connected to the second end of the second resistor and the collector of the first transistor respectively.

5. The wake-up circuit according to claim 4, characterized in that: The control circuit further includes a fourth resistor, a fifth resistor and a sixth resistor; The first end of the fourth resistor is respectively connected to the second end of the first capacitor and the first end of the sixth resistor, and the second end is respectively connected to the base of the first transistor and the first end of the fifth resistor; The second end of the fifth resistor is connected to the negative electrode of the battery and the emitter of the first transistor respectively; The second end of the sixth resistor is connected to the self-locking button and the first end of the first capacitor respectively.

6. The wake-up circuit according to claim 3, characterized in that: The control circuit also includes a first diode and a seventh resistor; The anode of the first diode is connected to the collector of the second transistor, and the cathode is connected to the first end of the seventh resistor; The second end of the seventh resistor is connected to the power chip of the battery management system.

7. The wake-up circuit according to claim 6, characterized in that: The control circuit also includes an eighth resistor and a second diode; The first end of the eighth resistor is connected to the second end of the seventh resistor, and the second end is connected to the cathode of the second diode; The anode of the second diode is connected to the single chip microcomputer.

8. The wake-up circuit according to claim 6, characterized in that: The control circuit also includes a second capacitor; The first end of the second capacitor is connected to the power chip of the battery management system and the second end of the seventh resistor respectively, and the second end is grounded.

9. The wake-up circuit according to claim 6, characterized in that: The control circuit also includes a ninth resistor; The first end of the ninth resistor is connected to the collector of the second transistor and the anode of the first diode respectively, and the second end is grounded.

10. The wake-up circuit according to claim 1, characterized in that: The control circuit is connected to the EN pin of the power chip in the battery management system, and is used to output a wake-up signal to the EN pin of the power chip in the battery management system when the first capacitor is in a charging state.

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