Decoding method of rotary transformer, rotary digital converter and storage medium

Abstract

The invention discloses a decoding method of a rotary transformer, a rotary digital converter and a storage medium, and relates to the technical field of motor control, and the method comprises the steps: receiving an input signal sent by the rotary transformer, and the input signal is generated based on an excitation signal of the rotary transformer; performing analog-to-digital conversion on the input signal according to the excitation signal to obtain a digital signal corresponding to the input signal; and demodulating the digital signal according to the excitation signal to obtain an angle error signal, and decoding the angle error signal. According to the invention, when the excitation frequency of the input signal is high frequency or low frequency, different analog-to-digital conversion modes determined based on the excitation signal and a demodulation mode of the digital signal are adopted, so that the digital signal can be demodulated in a rotary digital converter architecture; and meanwhile, the effect of decoding the input signal of the rotary digital converter with high-frequency or low-frequency excitation frequency is supported.

Description

Technical Field

[0001] The present application relates to the field of motor control technology, and in particular to a decoding method of a rotary transformer, a rotary digital converter and a storage medium. Background Art

[0002] Since rotary transformers (resolvers for short) can maintain high reliability and high precision in harsh environments, they are widely used in aerospace, railways, automobiles, robotics and other fields. The resolver to digital converter (RDC) implements an interface between the resolver and the system microprocessor to decode information such as the angular position and rotation speed of the motor shaft. The resolver uses an excitation signal to excite the primary winding, which generates two electromagnetic induction differential output signals on the secondary winding, namely the sine input signal and the cosine input signal. The rotary digital converter decodes the two differential output signals generated by the resolver to obtain information such as the rotation phase and rotation speed of the motor shaft.

[0003] In different application situations, the frequency of the excitation signal applied to the resolver will be very different. If the excitation signal applied to the resolver is a high-frequency signal, the rotary digital converter needs to support the RDC architecture of the high-frequency excitation signal; if the excitation signal applied to the resolver is a low-frequency signal, the rotary digital converter needs to support the RDC architecture of the low-frequency excitation signal. Since the RDC architecture supporting high-frequency excitation signals and the RDC architecture supporting low-frequency excitation signals are completely different, the current RDC can only decode resolvers using high-frequency excitation signals, or can only decode resolvers using low-frequency excitation signals. It is not possible to decode resolvers using both high-frequency excitation signals and low-frequency excitation signals. Therefore, how the rotary digital converter can simultaneously support the decoding of resolvers with high-frequency excitation signals and resolvers with low-frequency excitation signals is a problem that urgently needs to be solved. Summary of the invention

[0004] The main purpose of the present application is to provide a decoding method of a rotary transformer, a rotary digital converter and a storage medium, aiming to solve the technical problem of how a rotary digital converter can simultaneously support the decoding of a rotary transformer with a high-frequency excitation signal and a rotary transformer with a low-frequency excitation signal.

[0005] To achieve the above object, the present application proposes a decoding method for a rotary transformer, the method comprising: Receiving an input signal sent by a rotary transformer, wherein the input signal is generated based on an excitation signal of the rotary transformer; Performing analog-to-digital conversion on the input signal according to the excitation signal to obtain a digital signal corresponding to the input signal; The digital signal is demodulated according to the excitation signal to obtain an angle error signal, and the angle error signal is decoded.

[0006] In one embodiment, the step of performing analog-to-digital conversion on the input signal according to the excitation signal to obtain a digital signal corresponding to the input signal includes: In the case where the excitation signal is a high-frequency excitation signal, performing analog-to-digital conversion on the input signal according to the excitation clock frequency of the high-frequency excitation signal to obtain a digital signal corresponding to the input signal; In the case where the excitation signal is a low-frequency excitation signal, the input signal is converted into a digital form according to a preset low-frequency clock frequency to obtain a digital signal corresponding to the input signal, wherein the excitation clock frequency of the high-frequency excitation signal and the excitation clock frequency of the low-frequency excitation signal constitute a value range of the preset low-frequency clock frequency.

[0007] In one embodiment, the step of performing analog-to-digital conversion on the input signal according to the excitation clock frequency of the high-frequency excitation signal to obtain a digital signal corresponding to the input signal includes: Determine a chopping clock frequency of a preset operational amplifier according to the excitation clock frequency of the high-frequency excitation signal, and down-convert the input signal through the preset operational amplifier at the chopping clock frequency to obtain an envelope signal corresponding to the input signal; determine a first sampling clock frequency of a preset delta-sigma modulator DSM according to a preset system clock frequency, and perform analog-to-digital conversion on the envelope signal through the DSM at the first sampling clock frequency to obtain a digital signal corresponding to the input signal; or The second sampling clock frequency of the preset analog-to-digital converter is determined according to the excitation clock frequency of the high-frequency excitation signal, and the input signal is analog-to-digital converted by the analog-to-digital converter at the second sampling clock frequency to obtain a digital signal corresponding to the input signal.

[0008] In one embodiment, the step of performing analog-to-digital conversion on the input signal according to a preset low-frequency clock frequency to obtain a digital signal corresponding to the input signal includes: Using a preset system clock frequency as a preset low-frequency clock frequency; determining a third sampling clock frequency of a preset delta-sigma modulator DSM according to the preset low-frequency clock frequency, and performing analog-to-digital conversion on the input signal through the DSM at the third sampling clock frequency to obtain a digital signal corresponding to the input signal; or A fourth sampling clock frequency of a preset analog-to-digital converter is determined according to the low-frequency clock frequency, and the input signal is analog-to-digital converted by the analog-to-digital converter at the fourth sampling clock frequency to obtain a digital signal corresponding to the input signal.

[0009] In one embodiment, the decoding process of the angle error signal is performed in a tracking loop, and the step of demodulating the digital signal according to the excitation signal to obtain the angle error signal includes: Acquire the rotation phase signal decoded by the tracking loop at the last moment; The digital signal is demodulated according to the rotation phase signal and the excitation signal to obtain an angle error signal.

[0010] In one embodiment, the step of demodulating the digital signal according to the rotation phase signal and the excitation signal to obtain the angle error signal comprises: In the case where the excitation signal is a high-frequency excitation signal, the digital signal is demodulated according to the rotation phase signal to obtain an angle error signal; In the case where the excitation signal is a low-frequency excitation signal, the digital signal is demodulated according to the low-frequency excitation signal and the rotation phase signal to obtain an angle error signal.

[0011] In one embodiment, the digital signal includes a sine digital signal and a cosine digital signal, and the step of demodulating the digital signal according to the rotation phase signal to obtain the angle error signal includes: Determine a first frequency composite signal and a second frequency composite signal according to the phase information of the rotation phase signal, and calculate an angle error signal based on the product of the first frequency composite signal and the sine digital signal, and the product of the second frequency composite signal and the cosine digital signal; or The rotation phase signal is oscillated to obtain a rotation sine signal and a rotation cosine signal; an angle error signal is calculated based on the product of the rotation cosine signal and the sine digital signal, and the product of the rotation sine signal and the cosine digital signal.

[0012] In one embodiment, the digital signal includes a sine digital signal and a cosine digital signal, and the step of demodulating the digital signal according to the low-frequency excitation signal and the rotation phase signal to obtain the angle error signal includes: Determine a third frequency composite signal and a fourth frequency composite signal according to phase information of the low-frequency excitation signal and the rotation phase signal, and calculate an angle error signal based on a product of the third frequency composite signal and the sine digital signal, and a product of the fourth frequency composite signal and the cosine digital signal; or The rotating phase signal is oscillated to obtain a rotating sine signal and a rotating cosine signal; an initial angle error signal is calculated based on the product of the rotating cosine signal and the sine digital signal, and the product of the rotating sine signal and the cosine digital signal; and the low-frequency excitation signal is multiplied by the initial angle error signal to obtain an angle error signal.

[0013] In addition, to achieve the above-mentioned purpose, the present application also proposes a rotational digital converter, which includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the computer program is configured to implement the steps of the rotary transformer decoding method as described above.

[0014] In addition, to achieve the above objectives, the present application also proposes a storage medium, which is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by a processor, the steps of the rotary transformer decoding method described above are implemented.

[0015] One or more technical solutions proposed in this application have at least the following technical effects: The present application receives an input signal sent by a rotary transformer, wherein the input signal is generated based on an excitation signal of the rotary transformer, so as to obtain a signal to be decoded from the rotary transformer; performs analog-to-digital conversion on the input signal according to the excitation signal to obtain a digital signal corresponding to the input signal, so as to convert the analog signal of the high-frequency or low-frequency excitation frequency into a discrete digital signal through different analog-to-digital conversion methods adopted for the input signal generated under the high-frequency or low-frequency excitation signal; demodulates the digital signal according to the excitation signal to obtain an angle error signal, and decodes the angle error signal, so as to adopt different demodulation methods determined based on the frequency of the excitation signal for the digital signal corresponding to the high-frequency or low-frequency excitation signal, thereby restoring the original information of the rotary transformer.

[0016] In summary, the present application achieves the effect of simultaneously supporting decoding of RDC input signals with high or low excitation frequencies in one RDC architecture by adopting different analog-to-digital conversion methods determined based on the excitation signal and demodulation methods of the digital signal when the excitation frequency of the input signal is high or low frequency. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0018] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art are briefly introduced below.

[0019] Figure 1 A flowchart of the first embodiment of the rotary transformer decoding method of the present application is provided; Figure 2 A schematic diagram of a sampling scenario of a rotary transformer decoding method provided in Embodiment 1 of the present application; Figure 3 A flowchart diagram of the second embodiment of the rotary transformer decoding method of the present application is provided; Figure 4 A schematic diagram of the system architecture of the rotary transformer decoding method provided in the second embodiment of the present application; Figure 5 A schematic diagram of a first embodiment of an input signal processing module of a rotary transformer decoding method provided in Embodiment 2 of the present application; Figure 6 A schematic diagram of a second embodiment of an input signal processing module of a rotary transformer decoding method provided in Embodiment 2 of the present application; Figure 7 A schematic diagram of the system architecture of the frequency synthesis method of the rotary transformer decoding method provided in the second embodiment of the present application; Figure 8 A schematic diagram of the system architecture of a conventional demodulation method of a rotary transformer decoding method provided in Embodiment 2 of the present application; Fig. 9 Schematic diagram of the device structure of the hardware operating environment involved in the rotary transformer decoding method in the embodiment of the present application.

[0020] Description of the accompanying drawings of the embodiments: DETAILED DESCRIPTION

[0021] It should be understood that the specific embodiments described herein are only used to explain the technical solutions of the present application and are not used to limit the present application.

[0022] In order to better understand the technical solution of the present application, a detailed description will be given below in conjunction with the accompanying drawings and specific implementation methods.

[0023] The main solution of the embodiment of the present application is: receiving an input signal sent by a rotary transformer, wherein the input signal is generated based on an excitation signal of the rotary transformer; performing analog-to-digital conversion on the input signal according to the excitation signal to obtain a digital signal corresponding to the input signal; demodulating the digital signal according to the excitation signal to obtain an angle error signal, and decoding the angle error signal.

[0024] In different application situations, the frequency of the excitation signal acting on the resolver will be very different. If the excitation signal acting on the resolver is a high-frequency excitation signal, the rotary digital converter needs to support the RDC architecture of the high-frequency excitation signal; if the excitation signal acting on the resolver is a low-frequency excitation signal, the rotary digital converter needs to support the RDC architecture of the low-frequency excitation signal. Since the RDC architecture supporting high-frequency excitation signals and the RDC architecture supporting low-frequency excitation signals are completely different, the current RDC can only decode the resolver using high-frequency excitation signals, or can only decode the resolver using low-frequency excitation signals. It is impossible to decode both the resolver using high-frequency excitation signals and the resolver using low-frequency excitation signals. Therefore, how the rotary digital converter can simultaneously support the decoding of resolvers with high-frequency excitation signals and resolvers with low-frequency excitation signals is a problem that needs to be solved urgently.

[0025] The present application provides a solution, by adopting different analog-to-digital conversion methods determined based on the excitation signal and the demodulation method of the digital signal when the excitation frequency of the input signal is high frequency or low frequency, to achieve the effect of simultaneously supporting the decoding of RDC input signals with high frequency or low frequency excitation frequency in one RDC architecture.

[0026] It should be noted that the execution subject of this embodiment may be a computing service device with data processing, network communication and program running functions, such as a tablet computer, a personal computer, a mobile phone, etc., or an electronic device capable of realizing the above functions, a rotary digitizer, etc. The rotary digitizer is taken as an example to illustrate this embodiment and the following embodiments.

[0027] Based on this, the embodiment of the present application provides a rotary transformer decoding method, referring to Figure 1 , Figure 1 This is a flowchart of the first embodiment of the resolver decoding method of the present application.

[0028] In this embodiment, the resolver decoding method includes steps S10 to S30: Step S10, receiving an input signal sent by a rotary transformer, wherein the input signal is generated based on an excitation signal of the rotary transformer; It should be noted that a rotary transformer is a transformer that uses the principle of electromagnetic induction to change the voltage ratio by rotating. It consists of a primary winding and two secondary windings, one of which is tightly coupled to the primary winding, and the other is coupled to the primary winding through a rotating shaft. When the rotary transformer rotates, the magnetic flux generated by the primary winding cuts the secondary winding, thereby generating an electromotive force in the secondary winding, which is the input signal.

[0029] In addition, it should be noted that the input signal is an electromagnetic induction signal generated on the secondary winding of the rotary transformer under the stimulation of the excitation signal, and the rotation information of the motor shaft of the rotary transformer can be obtained by decoding the input signal.

[0030] For example, the resolver uses a sinusoidal signal The excitation signal generates two electromagnetic induction input signals, which are sinusoidal input signals. and cosine input signal ,in, is the resolver input shaft angle, is the excitation angle of the excitation signal, is the amplitude of the excitation signal, is the resolver conversion ratio. Receives the input signal sent by the resolver, that is, receives the sinusoidal input signal sent by the resolver and cosine input signal .

[0031] Step S20, performing analog-to-digital conversion on the input signal according to the excitation signal to obtain a digital signal corresponding to the input signal; It is understandable that, since the current RDC can only perform analog-to-digital conversion on a resolver using a high-frequency excitation signal, or can only perform analog-to-digital conversion on a resolver using a low-frequency excitation signal, it is impossible to perform analog-to-digital conversion on both the resolver using a high-frequency excitation signal and the resolver using a low-frequency excitation signal. Therefore, step S20 is performed to perform specific analog-to-digital conversion on the input signal of the resolver according to the excitation signal in the resolver, which can simultaneously support avoiding the distortion and interference problems that may occur in the transmission and processing of the high-frequency or low-frequency analog signal, thereby improving the versatility, accuracy and stability of the high-frequency or low-frequency signal processing, and creating reliable conditions for accurately decoding the rotation phase and rotation speed information of the motor shaft.

[0032] For example, the ADC (Analog to Digital Converter) built into the RDC samples and quantizes these analog input signals according to the frequency and phase of the excitation signal. The ADC converts the continuous analog signal into a discrete digital signal, usually through components such as a sample-and-hold circuit, an analog comparator, and a digital encoder. Ultimately, a digital signal corresponding to the original input signal is obtained.

[0033] In a feasible implementation, step S20 may include steps S21-S22: Step S21, when the excitation signal is a high-frequency excitation signal, performing analog-to-digital conversion on the input signal according to the excitation clock frequency of the high-frequency excitation signal to obtain a digital signal corresponding to the input signal; It should be noted that a high-frequency excitation signal generally refers to an excitation signal having an excitation clock frequency above the MHz level.

[0034] It can be understood that since the high-frequency excitation signal can provide higher resolution and more accurate angle measurement, performing step S21 can avoid the problem of information loss or inaccurate angle measurement due to insufficient sampling frequency. By using the excitation clock frequency of the high-frequency excitation signal for analog-to-digital conversion, the resolution and measurement accuracy of the system are improved, ensuring that the position information of the motor shaft can be accurately obtained even under high-speed rotation conditions.

[0035] Exemplarily, the excitation signal is first identified as a high-frequency excitation signal, and then the ADC in the RDC is configured to operate at the excitation clock frequency of the high-frequency excitation signal. The ADC synchronously samples the sine and cosine analog signals generated by the secondary winding of the rotary transformer, ensuring that the sampling rate is the excitation clock frequency of the high-frequency excitation signal. In this way, the ADC converts the analog signal into a digital signal, which is then used to calculate the precise angular position of the motor. In specific implementation, it may involve setting the sampling clock source of the ADC to the clock of the high-frequency excitation signal, and ensuring that the sampling window of the ADC is synchronized with the excitation signal period.

[0036] Step S22, when the excitation signal is a low-frequency excitation signal, the input signal is converted into a digital form according to a preset low-frequency clock frequency to obtain a digital signal corresponding to the input signal, wherein the excitation clock frequency of the high-frequency excitation signal and the excitation clock frequency of the low-frequency excitation signal constitute a value range of the preset low-frequency clock frequency.

[0037] It should be noted that the low-frequency excitation signal generally refers to an excitation signal with an excitation clock frequency below the KHz level; the low-frequency clock frequency may be n times the excitation clock frequency of the low-frequency excitation signal, and may meet the Nyquist frequency.

[0038] It is understandable that since low-frequency excitation signals may be more suitable in specific application scenarios, such as when the motor speed is low or there are strict restrictions on power consumption, performing step S22 can avoid unnecessary power consumption and resource waste caused by using too high a sampling frequency under low-frequency working conditions. By using a preset low-frequency clock frequency for analog-to-digital conversion, while ensuring sufficient measurement accuracy, the system's power consumption and cost are reduced, thereby improving the overall efficiency of the system.

[0039] Exemplarily, the excitation signal is first identified as a low-frequency excitation signal, and the sampling frequency of the ADC is adjusted accordingly. The preset low-frequency clock frequency is selected to be between the excitation clock frequencies of the high-frequency and low-frequency excitation signals to ensure a sufficient sampling rate to avoid aliasing, while reducing unnecessary sampling, thereby reducing power consumption. In specific operations, the microprocessor or dedicated clock management unit in the RDC configures the sampling clock of the ADC to run at a preset low-frequency clock frequency. The ADC samples and converts the input signal of the resolver according to this new sampling frequency to generate a digital signal. This method allows the system to maintain effective signal processing when the motor speed is low, while optimizing the energy efficiency and resource utilization of the system.

[0040] In this embodiment, by dynamically performing analog-to-digital conversion according to the frequency of the excitation signal, that is, dynamically adjusting the sampling frequency of the analog-to-digital converter, problems caused by insufficient or excessive sampling of signals that may occur at different excitation frequencies, such as signal distortion, resource waste, and increased power consumption, are avoided. The effect of maintaining high precision of signal processing and high efficiency of the system under different working conditions is achieved, ensuring that the rotary digital converter can accurately and efficiently obtain the position information of the motor shaft under both high-frequency and low-frequency excitation signals.

[0041] Step S30: demodulate the digital signal according to the excitation signal to obtain an angle error signal, and decode the angle error signal.

[0042] It should be noted that the angle error signal refers to the error signal corresponding to the phase difference between the input shaft angle and the RDC output shaft angle, which contains high-frequency components and low-frequency components. The high-frequency components will be filtered out in the subsequent second-order tracking loop, and finally decoded into information such as angular position and rotation speed.

[0043] It is understandable that, since the current RDC can only digitally demodulate the resolver using a high-frequency excitation signal, or can only digitally demodulate the resolver using a low-frequency excitation signal, it is impossible to digitally demodulate the resolver using a high-frequency excitation signal and the resolver using a low-frequency excitation signal. Therefore, step S30 is performed to perform a specific demodulation method on the input digital signal of the resolver according to the excitation signal in the resolver, which can simultaneously support avoiding the position tracking error problem caused by the inability to accurately demodulate the signal during the demodulation process of the high-frequency or low-frequency digital signal, thereby improving the decoding versatility and accuracy of the RDC for the resolver output signal, and ensuring the precise control of the motor shaft position.

[0044] Exemplarily, the rotary digital converter can use a DSP (Digital Signal Processor) to perform demodulation operations. The demodulation process involves comparing the digitized sine and cosine signals with a reference signal (usually the same frequency sine and cosine waveforms of the rotor signal). This process can be implemented by a digital mixer and an adder, where the digital mixer multiplies the input digital signal with the reference signal to produce two mixed signals. Then, the adder subtracts the two signals to obtain an angle error signal. The angle error signal contains high-frequency components and low-frequency components. Finally, the angle decoding algorithm processes the angle error signal, and the high-frequency components in the angle error signal are filtered out at this stage, and the precise angle position of the motor shaft is finally calculated. This process may include algorithms such as a phase-locked loop or an orthogonal demodulator to ensure the accuracy and stability of the angle information. In this way, the rotary digital converter can accurately decode and control the position of the motor shaft.

[0045] In a feasible implementation manner, the decoding process of the angle error signal is performed in a tracking loop, and the step of demodulating the digital signal according to the excitation signal to obtain the angle error signal in step S30 may include steps S31-S32: Step S31, obtaining the rotation phase signal decoded by the tracking loop at the last moment; It should be noted that the tracking loop refers to a closed-loop control system used to track and lock the phase of the resolver output signal, usually composed of a phase-locked loop or a similar algorithm; the rotating phase signal refers to the phase information of the motor shaft obtained after decoding the input signal sent by the resolver.

[0046] It can be understood that since it is necessary to continuously track the position changes of the motor shaft, performing step S31 can avoid the problem of position information loss or error accumulation caused by the inability to continuously track phase changes, thereby ensuring the continuity and accuracy of the motor shaft position and providing a reliable phase reference for subsequent control algorithms.

[0047] Exemplarily, the system first decodes the digital signal of the resolver through a Type-II tracking loop to obtain real-time phase information of the motor shaft. This process involves calculating the rotational phase signal through a digital signal processing algorithm from the digital signal of the resolver. The system then stores or buffers this rotational phase signal so that it can be used as the "last moment" rotational phase signal at the beginning of the next sampling cycle. In specific operations, this may involve storing the decoded phase value in a register or memory for subsequent processing.

[0048] Step S32: demodulate the digital signal according to the rotation phase signal and the excitation signal to obtain an angle error signal.

[0049] It can be understood that in order to extract accurate resolver motor shaft angle information from the digital signal, step S31 is performed, which can avoid the problem of angle measurement error caused by inaccurate demodulation of digital signals at different excitation frequencies. By comparing the actual decoded rotation phase signal with the current digital signal, an accurate angle error signal is generated, thereby improving the accuracy and response speed of motor shaft position control.

[0050] Exemplarily, the system uses the acquired rotation phase signal and the current excitation signal to demodulate the digital signal after analog-to-digital conversion. The demodulation process usually includes mixing the digital signal with the excitation signal to produce a baseband signal containing angle information. Next, the angle error component in the baseband signal is extracted through a low-pass filter. This process may involve the use of orthogonal demodulation technology, in which two orthogonal reference signals (usually sine and cosine signals generated by the excitation signal) are multiplied with the input signal, and then the angle error signal is separated through a filter group. Finally, the system calculates an accurate angle error signal by comparing the current rotation phase signal with the angle information obtained after demodulation for feedback control or position correction.

[0051] In this embodiment, by adopting phase tracking and targeted demodulation, the problems of position measurement error and system instability caused by the inability to accurately track the digital signal at different excitation frequencies due to the signal phase change are avoided, and the effect of continuously and accurately obtaining the motor shaft position information is achieved, thereby improving the performance and reliability of RDC under dynamic working conditions.

[0052] The present embodiment provides a rotating transformer decoding method, which achieves the effect of supporting decoding of RDC input signals with high or low excitation frequencies in one RDC architecture by adopting different analog-to-digital conversion methods determined based on the excitation signal and demodulating methods of the digital signal when the excitation frequency of the input signal is high or low frequency.

[0053] In a feasible implementation manner, the step of performing analog-to-digital conversion on the input signal according to the excitation clock frequency of the high-frequency excitation signal in step S21 to obtain a digital signal corresponding to the input signal may include steps A211-A212: Step A211, determining a chopping clock frequency of a preset operational amplifier according to the excitation clock frequency of the high-frequency excitation signal, and down-converting the input signal through the preset operational amplifier at the chopping clock frequency to obtain an envelope signal corresponding to the input signal; It should be noted that the chopping clock frequency refers to the clock frequency used to control the chopping stability of the operational amplifier, which determines the switching rate of the chopping switch inside the operational amplifier; the envelope signal refers to the signal whose amplitude changes with the envelope of the original input signal after down-conversion processing. This signal contains the amplitude information of the input signal, but the frequency is lower, which is convenient for subsequent processing.

[0054] It can be understood that when the excitation signal is a high-frequency excitation signal, the frequency of the input signal is relatively high, so step A211 is performed. By configuring the chopping clock frequency of the operational amplifier based on the excitation clock frequency of the high-frequency excitation signal, the hardware performance limitation or insufficient sampling rate caused by the excessively high signal frequency can be avoided, thereby reducing the frequency of the input signal through down-conversion, simplifying the signal processing process, and improving the stability of signal processing.

[0055] Exemplarily, the chopping clock frequency of the operational amplifier is set to the excitation clock frequency of the high-frequency excitation signal to ensure the stability of the down-conversion process. Next, the operational amplifier is configured in a chopper-stabilized mode and performs down-conversion processing on the input signal under the control of the chopping clock frequency. This usually involves using switched capacitor technology or an analog multiplier to multiply the input signal with a high-frequency chopping signal, and extracting the envelope of the product signal through a low-pass filter, that is, obtaining the envelope signal of the input signal.

[0056] Step A212, determining a first sampling clock frequency of a preset delta-sigma modulator DSM according to a preset system clock frequency, and performing analog-to-digital conversion on the envelope signal through the DSM at the first sampling clock frequency to obtain a digital signal corresponding to the input signal.

[0057] It should be noted that the system clock refers to the clock used by the entire rotary converter system, and the system clock frequency may not be higher than the excitation clock frequency of the high-frequency excitation signal; the first sampling clock frequency refers to the sampling frequency used to control the DSM (DeltaSigma Modulator) for analog-to-digital conversion, which determines the speed and resolution of DSM sampling.

[0058] It can be understood that, since it is necessary to perform high-precision analog-to-digital conversion on the envelope signal after down-conversion, step A212 is performed to avoid signal distortion or quantization error caused by sampling frequency mismatch. By oversampling the DSM based on the system clock frequency, the noise spectral density can be reduced, thereby improving the signal-to-noise ratio of the sine digital signal and the cosine digital signal output by the DSM. At the same time, due to the noise shaping function of the DSM, the signal-to-noise ratio of the sine digital signal and the cosine digital signal output by the DSM can be further improved. In addition, since the DSM output is a 1-bit digital code, the multiplier required for the multiplication operation in the subsequent demodulation process can be a 1-bit multiplier by N bits. Therefore, the multiplier is simple to implement and the area can be made very small, which greatly saves hardware expenses.

[0059] Exemplarily, the first sampling clock frequency of the DSM is set to a preset system clock frequency to ensure sufficient sampling rate and signal accuracy. Under the control of the first sampling clock frequency, the DSM samples and quantizes the envelope signal obtained by down-conversion. Specifically, the DSM converts the continuous envelope signal into a discrete digital signal through its internal analog-to-digital conversion mechanism. This process may include comparing the analog signal with a series of increasing reference voltages, and recording the comparison results through a digital accumulator, and finally obtaining an accurate digital representation of the input signal.

[0060] In this embodiment, by using chopper stabilization technology and DSM analog-to-digital conversion, problems caused by DC offset, temperature drift and nonlinear distortion in analog signal processing are avoided, and the effect of accurately converting analog input signals into digital signals while maintaining high precision and wide dynamic range is achieved. This method not only improves the stability and reliability of signal conversion, but also optimizes the system's adaptability to high-frequency and low-frequency signals, ensuring that high-quality digital signal output can be obtained under different working conditions.

[0061] In another feasible implementation manner, the step of performing analog-to-digital conversion on the input signal according to the excitation clock frequency of the high-frequency excitation signal in step 21 to obtain a digital signal corresponding to the input signal may further include step B211: Step B211, determining a second sampling clock frequency of a preset analog-to-digital converter according to the excitation clock frequency of the high-frequency excitation signal, and performing analog-to-digital conversion on the input signal through the analog-to-digital converter at the second sampling clock frequency to obtain a digital signal corresponding to the input signal.

[0062] It should be noted that the second sampling clock frequency refers to the sampling frequency used to control the analog-to-digital converter (ADC) to perform analog-to-digital conversion. This frequency determines the sampling speed and resolution of the ADC and is usually matched with the frequency characteristics of the input signal.

[0063] It can be understood that since it is necessary to ensure that the ADC can convert the input signal at an appropriate sampling rate to avoid signal distortion or information loss due to sampling rate mismatch, step B211 is performed to avoid problems such as aliasing or quantization errors caused by improper sampling frequency, thereby ensuring the accuracy and integrity of the input signal in the digital domain and providing high-quality data for subsequent digital signal processing.

[0064] For example, the excitation clock frequency of the high-frequency excitation signal is used as the second sampling clock frequency of the analog-to-digital converter to achieve the effect of spectrum shifting. Then, the system configures the ADC to use this second sampling clock frequency, and the ADC samples and converts the input signal of the resolver at this frequency. For example: to sample the continuous-time input signal with an impulse sequence, please refer to Figure 2 , Figure 2 The x-axis of the two coordinate systems represents the signal frequency, and the y-axis represents the signal amplitude. The following analysis can be done:

[0065] in, is the sampling signal, is the original input signal, sampling time , is the sampling frequency, and the impulse signal It can be expressed as follows:

[0066] in, is an impulse function, so, Can be rewritten as:

[0067] Since multiplication in the time domain is equal to convolution in the frequency domain, , through Fourier transform, the time domain of the signal Transform to frequency domain , we can get:

[0068] in, The original signal The frequency domain signal obtained by Fourier transform, the image of which is referenced Figure 2 middle Coordinate diagram. The Fourier transform of is:

[0069] in, is the sampling frequency. Substitution The formula is:

[0070] in, is the sampling frequency domain signal obtained by Fourier transform of the sampling signal. The image of the sampling frequency domain signal is referenced Figure 2 middle Coordinate diagram, which represents the exist Sampling is performed at integer multiples of .

[0071] In this implementation, the only hardware expenses required are the sampling clock selection module and the analog-to-digital conversion module, and the sampling clock frequency of the analog-to-digital conversion module only needs to support the excitation clock frequency at most. It can be seen that the analog-to-digital conversion process does not have high requirements for the sampling clock, is very simple to implement, and saves hardware expenses.

[0072] In a feasible implementation manner, the step of performing analog-to-digital conversion on the input signal according to the preset low-frequency clock frequency to obtain a digital signal corresponding to the input signal in step S22 may include steps A221-A222: Step A221, using the preset system clock frequency as the preset low-frequency clock frequency; It can be understood that since a reliable clock source is required to synchronize and drive subsequent signal processing when the system operating frequency is reduced, performing step A221 can avoid system synchronization and other problems caused by clock frequency mismatch, such as signal processing delays or errors, thereby ensuring that the system can maintain a stable clock reference at different operating frequencies, thereby improving the overall performance and reliability of the system.

[0073] Step A222, determining a third sampling clock frequency of a preset delta-sigma modulator DSM according to the preset low-frequency clock frequency, and performing analog-to-digital conversion on the input signal through the DSM at the third sampling clock frequency to obtain a digital signal corresponding to the input signal.

[0074] It should be noted that the third sampling clock frequency refers to the sampling frequency used to control the DSM to perform analog-to-digital conversion under low-frequency operation. This frequency is usually lower than or equal to the sampling clock frequency under the high-frequency excitation signal, but high enough to maintain the required signal resolution and accuracy.

[0075] It can be understood that, under low-frequency working conditions, the sampling frequency needs to be adjusted to adapt to the lower signal frequency while maintaining the accuracy of signal processing. Therefore, performing step A222 can avoid problems such as resource waste caused by too high a sampling frequency or signal distortion caused by too low a sampling frequency. Therefore, under low-frequency signal conditions, through DSM oversampling based on the system clock frequency, the noise spectral density can be reduced, thereby improving the signal-to-noise ratio of the sine digital signal and the cosine digital signal output by the DSM. At the same time, due to the noise shaping function of the DSM, the signal-to-noise ratio of the sine digital signal and the cosine digital signal output by the DSM can be further improved. In addition, since the DSM output is a 1-bit digital code, the multiplier required for the multiplication operation in the subsequent demodulation process can be a 1-bit by N-bit multiplier. Therefore, the multiplier is simple to implement and the area can be made very small, which greatly saves hardware expenses.

[0076] Exemplarily, according to the already set low-frequency clock frequency, the third sampling clock frequency of the DSM is set by programming or hardware configuration. This frequency may be a multiple value of the low-frequency clock frequency to ensure that the sampling theorem is met and adapt to the characteristics of the low-frequency signal. Next, the DSM performs analog-to-digital conversion on the input signal under the control of the third sampling clock frequency. Specifically, the DSM uses its internal analog comparator and digital accumulator to quantize the amplitude of the input signal in each third sampling clock cycle, and accumulates the quantization results, and finally outputs a digital signal that faithfully reflects the amplitude information of the input signal. This process may also include digital filtering and calibration steps to improve the accuracy and stability of the conversion.

[0077] In this implementation, by performing clock management and analog-to-digital conversion of the DSM, signal processing synchronization problems caused by clock frequency mismatch and signal distortion or aliasing caused by inappropriate sampling frequency under low-frequency working conditions are avoided, and the effect of maintaining high precision and high efficiency of signal processing under different working frequencies is achieved. Specifically, by using the system clock frequency as the low-frequency clock frequency and setting the third sampling clock frequency of the DSM accordingly, it is ensured that under low-frequency signal conditions, the DSM can convert the input signal at the optimal sampling rate, thereby obtaining high-quality digital signal output and improving the overall performance and reliability of the system.

[0078] In another feasible implementation manner, the step of performing analog-to-digital conversion on the input signal according to the preset low-frequency clock frequency to obtain a digital signal corresponding to the input signal in step S22 may further include step B221: Step B221, determining a fourth sampling clock frequency of a preset analog-to-digital converter according to the low-frequency clock frequency, and performing analog-to-digital conversion on the input signal through the analog-to-digital converter at the fourth sampling clock frequency to obtain a digital signal corresponding to the input signal.

[0079] It should be noted that the fourth sampling clock frequency refers to the sampling frequency used to control the ADC in the low-frequency working mode, and the frequency determines the sampling rate of the ADC when converting analog signals into digital signals.

[0080] It can be understood that since it is necessary to ensure that the ADC can operate at an appropriate sampling rate when processing low-frequency signals in order to maintain the accuracy and effectiveness of signal conversion, performing step B221 can avoid problems such as signal distortion, aliasing or quantization error caused by inappropriate sampling frequency, thereby achieving efficient analog-to-digital conversion through simple and fast analog-to-digital conversion under low-frequency signal conditions.

[0081] In this implementation, the only hardware expenses required are the sampling clock selection module and the analog-to-digital conversion module, and the sampling clock frequency of the analog-to-digital conversion module only needs to support the excitation clock frequency at most. It can be seen that the analog-to-digital conversion process does not have high requirements for the sampling clock, is very simple to implement, and saves hardware expenses.

[0082] Based on the first embodiment of the present application, in the second embodiment of the present application, the same or similar contents as those in the above-mentioned embodiment 1 can be referred to the above introduction, and will not be repeated in the following. Figure 3 , step S32 may further include steps S321~S322: Step S321, when the excitation signal is a high-frequency excitation signal, demodulate the digital signal according to the rotation phase signal to obtain an angle error signal; It can be understood that, since in the high-frequency working mode, the excitation phase signal corresponding to the high-frequency excitation signal is equal to a constant phase, such as π / 2, the relevant information of the high-frequency excitation signal will not be included in the final demodulation calculation result. Therefore, performing step S321 can avoid problems such as inaccurate angle measurement or signal distortion caused by improper high-frequency signal processing, thereby accurately obtaining the rotation angle information of the motor shaft under high-frequency working conditions and improving the control accuracy and response speed of the system.

[0083] Exemplarily, when the excitation signal is a high-frequency excitation signal, the digital signal is mixed with a reference orthogonal signal (I / Q signal) generated based on the rotating phase signal, and then the angle error information is extracted through a low-pass filter to finally obtain an accurate angle error signal.

[0084] In a feasible implementation manner, the step of demodulating the digital signal according to the rotation phase signal to obtain the angle error signal in step S321 may include step A01: Step A01, determine the first frequency composite signal and the second frequency composite signal according to the phase information of the rotating phase signal, and calculate the angle error signal based on the product of the first frequency composite signal and the sine digital signal, and the product of the second frequency composite signal and the cosine digital signal.

[0085] It should be noted that the first frequency composite signal refers to a reference frequency signal corresponding to the sinusoidal output signal of the rotary transformer, which is usually a digital signal synchronized with the rotating phase signal and is used to multiply the sinusoidal digital signal to extract information related to the motor shaft position; the second frequency composite signal refers to a reference frequency signal corresponding to the cosine output signal of the rotary transformer, which is also a digital signal synchronized with the rotating phase signal and is used to multiply the cosine digital signal to extract another part of the information related to the motor shaft position.

[0086] It can be understood that in order to generate a reference signal synchronized with the output signal of the rotary transformer through frequency synthesis technology so as to accurately calculate the absolute position of the motor shaft, step A01 is performed. This can avoid the angle calculation error caused by the lack of synchronization between the reference signal and the actual signal, as well as the system instability caused by improper signal processing. The system's measurement accuracy of the motor shaft position is improved, and even in the presence of noise or signal distortion, the angle error signal calculation can be maintained with high reliability, thereby improving the overall performance and robustness of the RDC.

[0087] For example, the excitation phase signal and the rotation phase signal By performing addition and subtraction operations, a first angle signal and a second angle signal can be generated. The first angle signal ANGLE1 and the second angle signal ANGLE2 can be respectively expressed as:

[0088]

[0089] Afterwards, the first angle signal and the second angle signal are sent to the oscillator to generate the first sine signal, the second sine signal, the first cosine signal and the second cosine signal through the oscillator. The first sine signal SIN1, the second sine signal SIN2, the first cosine signal COS1 and the second cosine signal COS2 can be respectively expressed as:

[0090]

[0091]

[0092]

[0093] Among them, the oscillator can be either an analog oscillator or a digital oscillator, and can also be implemented by the LUT lookup table method or the CORDIC method. The full name of LUT is Look-Up Table, that is, the method of looking up the table. The sine value and cosine value of the specific phase can be obtained by mapping; and the CORDIC algorithm is an algorithm that "simplifies the complex", which converts many complex operations into an iterative operation that "only requires shifting and addition". After that, the first sine signal, the second sine signal, the first cosine signal and the second cosine signal are added and subtracted to generate the third frequency composite signal and the fourth frequency composite signal. If the amplitudes of the third frequency composite signal and the fourth frequency composite signal are not normalized, the third frequency composite signal EXC3 and the fourth frequency composite signal EXC4 obtained at this time can be expressed as:

[0094]

[0095]

[0096]

[0097] Among them, the third frequency composite signal and the fourth frequency composite signal can be normalized here; the third frequency composite signal and the fourth frequency composite signal can also be normalized in a later process, such as demodulation; or the third frequency composite signal and the fourth frequency composite signal can not be normalized. If the excitation signal is a high-frequency excitation signal, that is, when it is in high-frequency mode, the excitation phase signal at this time is equal to the constant phase, and the constant phase can be set to π / 2. Therefore, in the high-frequency mode, the generated first frequency composite signal EXC1_HP and the second frequency composite signal EXC2_HP can be expressed as:

[0098]

[0099]

[0100]

[0101] It can be seen that in the high frequency mode, the first frequency synthesis signal EXC1_HP and the second frequency synthesis signal EXC2_HP generated only contain information related to the rotation phase. Then the amplitudes of the sine digital signal SIND and the cosine digital signal COSD are normalized, and the following is obtained:

[0102]

[0103] If it is in high frequency mode, the sine digital signal SIND_HP and cosine digital signal COSD_HP generated by the input signal processing module have realized the operation of down-converting the excitation signal, and the following is obtained:

[0104]

[0105] Then, through multiplication operation, the sine digital signal SIND_HP and the first frequency synthesis signal EXC1_HP can be multiplied to obtain the sine down-conversion signal SINDD_HP, and the cosine digital signal COSD_HP and the second frequency synthesis signal EXC2_HP can be multiplied to obtain the cosine down-conversion signal COSDD_HP. The process can be expressed as:

[0106]

[0107]

[0108]

[0109] After that, the sine down-converted signal and the cosine down-converted signal are subtracted to obtain the angle error signal The process can be expressed as:

[0110]

[0111]

[0112] In this embodiment, by performing demodulation based on frequency synthesis, the problem of inaccurate angle calculation due to signal phase deviation or frequency offset is avoided, and the angle error signal calculation with high precision and high stability is achieved in a complex electromagnetic environment, thereby improving the dynamic response speed and position control accuracy of the RDC.

[0113] In another feasible implementation manner, the step of demodulating the digital signal according to the rotation phase signal to obtain the angle error signal in step S321 may further include steps B01-B02: Step B01, oscillating the rotation phase signal to obtain a rotation sine signal and a rotation cosine signal; For example, the rotation phase signal Generate a rotating sinusoidal signal via an oscillation module and the rotated cosine signal .

[0114] Step B02, calculating an angle error signal based on the product of the rotated cosine signal and the sine digital signal, and the product of the rotated sine signal and the cosine digital signal.

[0115] Exemplarily, a rotated cosine signal is multiplied with a sine digital signal to obtain a sine rotated down-converted signal; a cosine digital signal is multiplied with a rotated sine signal to obtain a cosine rotated down-converted signal. Then, a subtraction operation is performed on the sine rotated down-converted signal and the cosine rotated down-converted signal to obtain an angle error signal.

[0116] In this embodiment, by adapting the RDC architecture to the traditional orthogonal oscillation and demodulation method, the problems of angle calculation error and system instability caused by signal non-orthogonality or phase mismatch are avoided, and the effect of accurately calculating the angle error signal in the RDC is achieved, thereby improving the accuracy of position detection and the system's ability to track the motor shaft position.

[0117] Step S322: when the excitation signal is a low-frequency excitation signal, demodulate the digital signal according to the low-frequency excitation signal and the rotation phase signal to obtain an angle error signal.

[0118] It can be understood that, since under the low-frequency excitation signal, the demodulation process needs to consider the frequency characteristics of the excitation signal and the rotation phase signal at the same time to adapt to the characteristics of the low-frequency signal, so performing step S322 can avoid problems such as demodulation failure, signal noise sensitivity or increased angle error caused by improper low-frequency signal processing. Therefore, under low-frequency working conditions, the accuracy of the angle error signal is guaranteed through precise demodulation, thereby ensuring the stability and reliability of the system in low-speed or low-power consumption mode.

[0119] Exemplarily, the digital signal is processed by a digital demodulation algorithm (such as a demodulation method based on an inverse tangent function). This process involves comparing the digital signal with a reference signal generated by a low-frequency excitation signal, and calculating the angle error through an algorithm, thereby obtaining an accurate angle error signal under low-frequency working conditions.

[0120] In a feasible implementation manner, the step of demodulating the digital signal according to the low-frequency excitation signal and the rotation phase signal to obtain the angle error signal in step S322 may include step A11: Step A11, determine the third frequency composite signal and the fourth frequency composite signal according to the phase information of the low-frequency excitation signal and the rotation phase signal, and calculate the angle error signal based on the product of the third frequency composite signal and the sine digital signal, and the product of the fourth frequency composite signal and the cosine digital signal.

[0121] It should be noted that the third frequency composite signal refers to the cosine form of the phase information of the rotating phase signal, multiplied by the excitation signal; the fourth frequency composite signal refers to the sine form of the phase information of the rotating phase signal, multiplied by the excitation signal.

[0122] Exemplarily, the calculation process of the frequency synthesis signal in the specific embodiment of this step can refer to step A01, which will not be described in detail here. In the low-frequency mode, the sine digital signal SIND and the third frequency synthesis signal EXC3 are multiplied to obtain the sine down-conversion signal SINDD, and the cosine digital signal COSD and the fourth frequency synthesis signal EXC4 are multiplied to obtain the cosine down-conversion signal COSDD. The process can be expressed as:

[0123]

[0124]

[0125]

[0126] After that, the sine down-converted signal and the cosine down-converted signal are subtracted to obtain the angle error signal. The process can be expressed as:

[0127]

[0128]

[0129] Compared with the angle error signal AE_HP in high-frequency mode, the angle error signal AE has more high-frequency components, but the high-frequency components can be suppressed by the subsequent Type-II tracking loop. Therefore, whether in high-frequency mode or low-frequency mode, if the input shaft angle θ is the same, the final decoded angular position and rotation speed are the same.

[0130] In this embodiment, by performing demodulation based on frequency synthesis, the problem of inaccurate angle calculation due to signal phase deviation or frequency offset is avoided, and the angle error signal calculation with high precision and high stability is achieved in a complex electromagnetic environment, thereby improving the dynamic response speed and position control accuracy of the RDC.

[0131] In another feasible implementation manner, the step of demodulating the digital signal according to the low-frequency excitation signal and the rotation phase signal to obtain the angle error signal in step S322 may further include steps B11 to B13: Step B11, oscillating the rotation phase signal to obtain a rotation sine signal and a rotation cosine signal; Step B12, calculating an initial angle error signal based on the product of the rotated cosine signal and the sine digital signal, and the product of the rotated sine signal and the cosine digital signal; Exemplarily, the rotated cosine signal is multiplied with the sine digital signal to obtain a sine rotated down-converted signal; the cosine digital signal is multiplied with the rotated sine signal to obtain a cosine rotated down-converted signal. Then, the sine rotated down-converted signal is subtracted from the cosine rotated down-converted signal to obtain an initial angle error signal.

[0132] Step B13, multiplying the low-frequency excitation signal by the initial angle error signal to obtain an angle error signal.

[0133] It can be understood that, since it is necessary to modulate the initial angle error signal through multiplication operation under the condition of low-frequency excitation signal in order to extract the angle information corresponding to the actual position of the motor shaft, performing step B13 can avoid problems such as signal distortion, noise interference or phase deviation that may arise from directly processing the initial angle error signal, thereby ensuring the accuracy and stability of the angle error signal in a low-frequency working environment.

[0134] In this implementation, under the condition of a low-frequency excitation signal, the rotating phase signal is accurately demodulated, the initial angle error signal is calculated, and the initial angle error signal is multiplied with the low-frequency excitation signal to finally obtain an accurate angle error signal, thereby achieving the effect of improving the angle measurement accuracy and system stability in a low-frequency working environment, and ensuring that the RDC can still maintain high-precision position control under low-frequency working conditions.

[0135] In this embodiment, by adaptively demodulating the excitation signal frequency, problems such as phase offset, signal distortion and slow system response that may occur during signal demodulation at different excitation frequencies are avoided. When the excitation signal frequency changes, whether it is high frequency or low frequency, the digital signal can be accurately demodulated to obtain a reliable angle error signal, thereby ensuring stable operation and efficient decoding of the RDC over a wide frequency range.

[0136] For example, in order to help understand the implementation process of the rotary transformer decoding method obtained by combining the above-mentioned embodiment 1 and embodiment 2, please refer to Figure 4 , Figure 4 A system architecture diagram of a resolver decoding method is provided, specifically: Figure 4 The basic architecture of this application is mainly composed of five parts, namely, input signal processing module 1, excitation phase selection module 2, frequency synthesis module 3, demodulation module 4 and Type-II tracking loop 5.

[0137] Among them, the input signal processing module 1 is used to convert the two electromagnetic induction differential output signals of the resolver, that is, the sine input signal and the cosine input signal of the RDC architecture of the present invention, from analog signals to digital signals. The excitation phase selection module 2 is used to select the corresponding excitation phase in high frequency or low frequency mode. The frequency synthesis module 3 is based on the input excitation phase signal and the rotation phase signal, and after a series of operations, finally obtains the first frequency synthesis signal and the second frequency synthesis signal (the frequency synthesis signal is the frequency synthesis signal). The demodulation module 4 multiplies the sine digital signal and the cosine digital signal output by the input signal processing module with the first frequency synthesis signal and the second frequency synthesis signal output by the frequency synthesis module, respectively, so that the sine digital signal and the cosine digital signal realize excitation down-conversion and rotation down-conversion, and obtain the sine down-conversion signal and the cosine down-conversion signal. The sine down-conversion signal and the cosine down-conversion signal are subtracted to obtain the angle error signal. The Type-II tracking loop 5 converts the angle error signal into an angular position and a rotation speed, that is, a rotation phase signal and a rotation speed signal.

[0138] For further information, please refer to Figure 5 and Figure 6 , Figure 5 The first embodiment of the input signal processing module 1 is shown in FIG. Figure 6 This is a second embodiment of the input signal processing module 1 . Figure 5It mainly consists of two parts, a sampling clock selection module 11 and a first analog-to-digital conversion module 12. Among them, the sampling clock selection module 11 is used to select the sampling clock signal corresponding to the first analog-to-digital conversion module in high-frequency or low-frequency mode. The sampling clock selection module 11 controls the gating of its switch through high- and low-frequency mode signals. When in high-frequency mode, the sampling clock signal is equal to the excitation clock. At this time, the purpose of excitation down-conversion can be achieved through spectrum shifting of the sampling operation. At this time, the sine digital signal and cosine digital signal obtained have achieved excitation down-conversion, so the remaining useful information components are mainly rotor information; when in low-frequency mode, the sampling clock signal is equal to the low-frequency clock. Since the excitation signal frequency of the low-frequency mode is low, the frequency of the sine input signal and the cosine input signal is low, so the sampling clock frequency is still a low-frequency clock even if it is several times the excitation signal frequency. The sampling clock frequency at this time can meet the Nyquist frequency. That is, the sampling operation in the low-frequency mode does not achieve excitation down-conversion, so the sine digital signal and cosine digital signal obtained at this time still contain excitation information components and rotor information components. The first analog-to-digital conversion module 12 is used to convert analog signals into digital signals, that is, to convert the sine input signal and cosine input signal in the form of analog signals into sine digital signals and cosine digital signals in the form of digital signals. The first analog-to-digital conversion module can be implemented by an ADC with Nyquist sampling characteristics, such as a SAR (Successive Approximation Register) ADC, which converts analog signals into digital signals by a successive approximation method. It is worth noting that in high-frequency mode, the sampling clock frequency of the SAR ADC needs to be equal to the excitation signal frequency; in low-frequency mode, the sampling clock frequency of the SAR ADC is greater than or equal to the Nyquist frequency, and the Nyquist frequency at this time is twice the excitation signal frequency.

[0139] Figure 6 It is mainly composed of three parts, an envelope extraction module 13, an input signal selection module 14 and a second analog-to-digital conversion module 15. The envelope extraction module 13 is mainly used to extract the rotor envelope information of the high-frequency sine input signal and the cosine input signal in the high-frequency mode, which is equivalent to realizing the excitation down-conversion function. It can be realized by an operational amplifier with a chopping function. As long as the chopping clock frequency is set to the excitation clock frequency, the excitation down-conversion function can be realized to extract the rotor envelope information. At this time, the frequency of the rotor envelope information obtained is the low-frequency rotor frequency.

[0140] The input signal selection module 14 is used to select the input signal of the second analog-to-digital conversion module, and the input signal selection module controls the gating of its switch through the high- and low-frequency mode signals. When in high-frequency mode, the sine analog signal input by the second analog-to-digital conversion module is equal to the sine envelope signal, and the cosine analog signal is equal to the cosine envelope signal; when in low-frequency mode, the envelope extraction module 13 can be turned off, at which time the sine analog signal input by the second analog-to-digital conversion module is equal to the sine input signal, and the cosine analog signal is equal to the cosine input signal. It can be seen that, regardless of whether it is a high-frequency mode or a low-frequency mode, the input signal of the second analog-to-digital conversion module is a signal with a lower frequency.

[0141] The second analog-to-digital conversion module 15 is used to convert the analog signal into a digital signal, that is, to convert the sine analog signal and the cosine analog signal in the form of analog signals into the sine digital signal and the cosine digital signal in the form of digital signals. The second analog-to-digital conversion module can be implemented by DSM, and the sampling clock of the second analog-to-digital conversion module can be equal to the system clock. Since the input signal frequency of the second analog-to-digital conversion module is low, and the system clock frequency is high, its sampling process is oversampling, which can reduce the noise spectrum density and improve the signal-to-noise ratio of the sine digital signal and the cosine digital signal output by the DSM. If the second analog-to-digital conversion module is implemented by DSM, the signal-to-noise ratio of the sine digital signal and the cosine digital signal output by the DSM can be further improved due to the noise shaping function of the DSM. In addition, since the DSM output is a 1-bit digital code, the multiplier required for the multiplication operation of the subsequent demodulation module can be a 1-bit multiplier by N-bits, so the multiplier is simple to implement, the area can be made very small, and the hardware cost is very saved.

[0142] For further information, please refer to Figure 7 and Figure 8 , Figure 7 The system architecture diagram for the frequency integration method is as follows: Figure 8 Schematic diagram of the system architecture adapted to the traditional demodulation method. Figure 7 The sampling clock selection module 11 in the input signal processing module 1 is mainly used to select the sampling clock signal corresponding to the first analog-to-digital conversion module 12 in the high frequency or low frequency mode. The sampling clock selection module 11 controls the gating of its switch through the high and low frequency mode signals. When in the high frequency mode, the sampling clock signal is equal to the excitation clock; when in the low frequency mode, the sampling clock signal is equal to the low frequency clock. The sine input signal and cosine input signal in the form of analog signals generated by the resolver are used as input signals of the input signal processing module 1, wherein the sine input signal is converted into a sine digital signal in the form of a digital signal by the first analog-to-digital converter 121; the cosine input signal is converted into a cosine digital signal in the form of a digital signal by the second analog-to-digital converter 122.

[0143] In addition, the excitation phase selection module 2 controls the selection of its switch through high and low frequency mode signals. When in low frequency mode, the excitation phase signal is equal to the excitation input phase; when in high frequency mode, the excitation phase signal is equal to a constant phase. The constant phase at this time can be set to π / 2, that is, the excitation phase signal at this time is equal to 90 degrees.

[0144] The excitation phase signal generated by the excitation phase selection module 2 and the rotation phase signal φ generated by the Type-II tracking loop 5 are used as input signals of the 3 frequency synthesis module. For the frequency synthesis module 3, the excitation phase signal and the rotation phase signal are added by the first adder 311 through the first adding module 31 to obtain a first angle signal; the excitation phase signal and the rotation phase signal are subtracted by the second adder 312 to obtain a second angle signal. Afterwards, the first sine signal and the first cosine signal are generated by the first angle signal through the first oscillation module 32; the second sine signal and the second cosine signal are generated by the second angle signal. Afterwards, the first sine signal and the second sine signal are added by the third adder 331 through the second adding module 33 to obtain a first frequency synthesis signal; the first cosine signal and the second cosine signal are added by the fourth adder 332 to obtain a second frequency synthesis signal.

[0145] Afterwards, the first frequency synthesis signal and the second frequency synthesis signal generated by the frequency synthesis module 3, as well as the sine digital signal and the cosine digital signal generated by the input signal processing module 1, are used as input signals of the demodulation module 4. Through the first multiplication module 41, the sine digital signal and the first frequency synthesis signal are multiplied by the first multiplier 411 to obtain a sine down-converted signal; the cosine digital signal and the second frequency synthesis signal are multiplied by the second multiplier 412 to obtain a cosine down-converted signal. Afterwards, through the third addition module 42, the sine down-converted signal and the cosine down-converted signal are subtracted by the fifth adder 421 to obtain an angle error signal. The angle error signal passes through the Type-II tracking loop 5 to decode the rotation phase signal φ and the rotation speed signal.

[0146] for Figure 8 The conventional demodulation method of the RDC architecture of the embodiment generates a rotating sinusoidal signal through the second oscillating module 6 from the rotating phase signal and the rotated cosine signal ; The excitation input phase generates an excitation input signal through the third oscillation module 7 In addition, the excitation signal selection module 8 controls the gating of its switch through the high and low frequency mode signals. When in the low frequency mode, the excitation signal is equal to the excitation input signal; when in the high frequency mode, the excitation signal is equal to a constant value, and the constant value at this time can be set to 1. For the input signal of the traditional demodulation module 9, the second multiplication module 91 multiplies the sine digital signal and the rotated cosine signal by the third multiplier 911 to obtain a sine rotation down-conversion signal; the cosine digital signal and the rotated sine signal are multiplied by the fourth multiplier 912 to obtain a cosine rotation down-conversion signal. After that, the fourth addition module 92 subtracts the sine rotation down-conversion signal and the cosine rotation down-conversion signal by the sixth adder 921 to obtain an initial angle error signal. Then, the third multiplication module 93 multiplies the initial angle error signal and the excitation signal by the fifth multiplier 931 to obtain an angle error signal. The angle error signal passes through the Type-II tracking loop 5 to decode the rotation phase signal φ and the rotation speed signal.

[0147] The angle error initial signal AES in the low-frequency mode and the angle error initial signal AES_HP in the high-frequency mode can be expressed as:

[0148]

[0149] The angle error signal AEC in the low-frequency mode and the angle error signal AEC_HP in the high-frequency mode can be expressed as:

[0150]

[0151]

[0152]

[0153]

[0154]

[0155] It can be seen from the above formula that the angle error signal in the RDC architecture of the traditional resolver demodulation method and the angle error information obtained by the frequency synthesis method only differ in signal amplitude, but their essence is the same. In addition, since the excitation signal is equal to 1 in the high-frequency mode, the operation of the fifth multiplier 931 to multiply the initial angle error signal by the excitation signal can be equivalent to the operation of directly transparently transmitting the initial angle error signal, that is, the angle error signal in the high-frequency mode is equal to the initial angle error signal.

[0156] It can be seen that the RDC architecture of the present application is not only suitable for the RDC architecture of the frequency synthesis method, but also suitable for the RDC architecture of the traditional demodulation method. Both have the advantages of simple architecture, low hardware expenditure, low clock frequency requirement, power saving, and high signal-to-noise ratio.

[0157] In addition, it should be noted that the two implementation modes of the input signal processing module in this embodiment correspond to steps (A211~A212, A221~A222) and steps (B211, B221), respectively, and the two system architectures applicable to the frequency synthesis method and the traditional demodulation method in this embodiment correspond to steps (A01, A11) and steps (B01~B02, B11~B13), respectively, which can be combined with each other to obtain technical solutions under four combinations, namely combination 1 (A211~A212, A221~A222, A01, A11), combination 2 (A211~A212, A221~A222, B01~B02, B11~B13), combination 3 (B211, B221, A01, A11), and combination 4 (B211, B221, B01~B02, B11~B13). In this embodiment, Figure 7 Corresponding combination 3, Figure 8 Corresponding to combination 2, the implementation process of the other two combinations can refer to the specific implementation process in this application, which will not be repeated here.

[0158] The present application provides a rotational digital converter, which includes: at least one processor; and a memory connected to the at least one processor in communication; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the rotary transformer decoding method in the above-mentioned embodiment 1.

[0159] Reference below Fig. 9 , which shows a schematic diagram of the structure of a rotation digitizer suitable for implementing the embodiment of the present application. Fig. 9As shown, the rotary digitizer may include a processing device 1001 (e.g., a central processing unit, a graphics processor, etc.), which may perform various appropriate actions and processes according to a program stored in a read-only memory 1002 or a program loaded from a storage device 1003 to a random access memory 1004. Various programs and data required for the operation of the rotary digitizer are also stored in the random access memory 1004. The processing device 1001, the read-only memory 1002, and the random access memory 1004 are connected to each other via a bus 1005. An input / output interface 1006 is also connected to the bus. Generally, the following systems may be connected to the input / output interface 1006: an input device 1007 including, for example, a touch screen, a touch pad, a keyboard, a mouse, an image sensor, a microphone, an accelerometer, a gyroscope, etc.; an output device 1008 including, for example, a liquid crystal display (LCD: Liquid Crystal Display), a speaker, a vibrator, etc.; a storage device 1003 including, for example, a magnetic tape, a hard disk, etc.; and a communication device 1009. The communication device 1009 may allow the rotation digitizer to communicate with other devices wirelessly or by wire to exchange data.

[0160] In particular, according to the embodiments disclosed in the present application, the process described above with reference to the flowchart can be implemented as a computer software program. In such an embodiment, the computer program can be downloaded and installed from a network through a communication device, or installed from a storage device 1003, or installed from a read-only memory 1002. When the computer program is executed by the processing device 1001, the above functions defined in the method of the embodiments disclosed in the present application are executed.

[0161] The rotary digital converter provided by the present application adopts the rotary transformer decoding method in the above embodiment, which can solve the technical problem of how the rotary digital converter can simultaneously support the decoding of the resolver of the high-frequency excitation signal and the resolver of the low-frequency excitation signal. Compared with the prior art, the beneficial effects of the rotary digital converter provided by the present application are the same as the beneficial effects of the rotary transformer decoding method provided by the above embodiment, and the other technical features in the rotary digital converter are the same as the features disclosed in the method of the previous embodiment, which will not be repeated here.

[0162] The present application provides a computer-readable storage medium having computer-readable program instructions (ie, computer programs) stored thereon, and the computer-readable program instructions are used to execute the resolver decoding method in the above-mentioned embodiment.

[0163] The computer-readable storage medium provided in the present application may be, for example, a USB flash drive, but is not limited to electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems or devices, or any combination of the above.

[0164] The computer-readable storage medium carries one or more programs. When the one or more programs are executed by the rotary digital converter, the rotary digital converter: receives an input signal sent by a rotary transformer, wherein the input signal is generated based on an excitation signal of the rotary transformer; performs analog-to-digital conversion on the input signal according to the excitation signal to obtain a digital signal corresponding to the input signal; demodulates the digital signal according to the excitation signal to obtain an angle error signal, and decodes the angle error signal.

[0165] The readable storage medium provided by the present application is a computer-readable storage medium, which stores computer-readable program instructions (i.e., computer programs) for executing the above-mentioned resolver decoding method, and can solve the technical problem of how the rotary digital converter can simultaneously support the decoding of resolvers with high-frequency excitation signals and resolvers with low-frequency excitation signals. Compared with the prior art, the beneficial effects of the computer-readable storage medium provided by the present application are the same as the beneficial effects of the resolver decoding method provided by the above-mentioned embodiment, and will not be repeated here.

Claims

1. A rotary transformer decoding method, characterized in that: The method includes: Receiving an input signal sent by a rotary transformer, wherein the input signal is generated based on an excitation signal of the rotary transformer; Performing analog-to-digital conversion on the input signal according to the excitation signal to obtain a digital signal corresponding to the input signal; The digital signal is demodulated according to the excitation signal to obtain an angle error signal, and the angle error signal is decoded.

2. The rotary transformer decoding method according to claim 1, characterized in that: The step of performing analog-to-digital conversion on the input signal according to the excitation signal to obtain a digital signal corresponding to the input signal comprises: In the case where the excitation signal is a high-frequency excitation signal, performing analog-to-digital conversion on the input signal according to the excitation clock frequency of the high-frequency excitation signal to obtain a digital signal corresponding to the input signal; In the case where the excitation signal is a low-frequency excitation signal, the input signal is converted into a digital form according to a preset low-frequency clock frequency to obtain a digital signal corresponding to the input signal, wherein the excitation clock frequency of the high-frequency excitation signal and the excitation clock frequency of the low-frequency excitation signal constitute a value range of the preset low-frequency clock frequency.

3. The rotary transformer decoding method according to claim 2, characterized in that: The step of performing analog-to-digital conversion on the input signal according to the excitation clock frequency of the high-frequency excitation signal to obtain a digital signal corresponding to the input signal comprises: Determine a chopping clock frequency of a preset operational amplifier according to the excitation clock frequency of the high-frequency excitation signal, and down-convert the input signal through the preset operational amplifier at the chopping clock frequency to obtain an envelope signal corresponding to the input signal; determine a first sampling clock frequency of a preset delta-sigma modulator DSM according to a preset system clock frequency, and perform analog-to-digital conversion on the envelope signal through the DSM at the first sampling clock frequency to obtain a digital signal corresponding to the input signal; or The second sampling clock frequency of the preset analog-to-digital converter is determined according to the excitation clock frequency of the high-frequency excitation signal, and the input signal is analog-to-digital converted by the analog-to-digital converter at the second sampling clock frequency to obtain a digital signal corresponding to the input signal.

4. The rotary transformer decoding method according to claim 2, characterized in that: The step of performing analog-to-digital conversion on the input signal according to the preset low-frequency clock frequency to obtain a digital signal corresponding to the input signal comprises: Using a preset system clock frequency as a preset low-frequency clock frequency; determining a third sampling clock frequency of a preset delta-sigma modulator DSM according to the preset low-frequency clock frequency, and performing analog-to-digital conversion on the input signal through the DSM at the third sampling clock frequency to obtain a digital signal corresponding to the input signal; or A fourth sampling clock frequency of a preset analog-to-digital converter is determined according to the low-frequency clock frequency, and the input signal is analog-to-digital converted by the analog-to-digital converter at the fourth sampling clock frequency to obtain a digital signal corresponding to the input signal.

5. The rotary transformer decoding method according to claim 1, characterized in that: The decoding process of the angle error signal is performed in a tracking loop, and the step of demodulating the digital signal according to the excitation signal to obtain the angle error signal includes: Acquire the rotation phase signal decoded by the tracking loop at the last moment; The digital signal is demodulated according to the rotation phase signal and the excitation signal to obtain an angle error signal.

6. The rotary transformer decoding method according to claim 5, characterized in that: The step of demodulating the digital signal according to the rotation phase signal and the excitation signal to obtain the angle error signal comprises: In the case where the excitation signal is a high-frequency excitation signal, the digital signal is demodulated according to the rotation phase signal to obtain an angle error signal; In the case where the excitation signal is a low-frequency excitation signal, the digital signal is demodulated according to the low-frequency excitation signal and the rotation phase signal to obtain an angle error signal.

7. The rotary transformer decoding method according to claim 6, characterized in that: The digital signal includes a sine digital signal and a cosine digital signal, and the step of demodulating the digital signal according to the rotation phase signal to obtain an angle error signal includes: Determine a first frequency composite signal and a second frequency composite signal according to the phase information of the rotation phase signal, and calculate an angle error signal based on the product of the first frequency composite signal and the sine digital signal, and the product of the second frequency composite signal and the cosine digital signal; or The rotation phase signal is oscillated to obtain a rotation sine signal and a rotation cosine signal; an angle error signal is calculated based on the product of the rotation cosine signal and the sine digital signal, and the product of the rotation sine signal and the cosine digital signal.

8. The rotary transformer decoding method according to claim 6, characterized in that: The digital signal includes a sine digital signal and a cosine digital signal, and the step of demodulating the digital signal according to the low-frequency excitation signal and the rotation phase signal to obtain an angle error signal includes: Determine a third frequency composite signal and a fourth frequency composite signal according to phase information of the low-frequency excitation signal and the rotation phase signal, and calculate an angle error signal based on a product of the third frequency composite signal and the sine digital signal, and a product of the fourth frequency composite signal and the cosine digital signal; or The rotating phase signal is oscillated to obtain a rotating sine signal and a rotating cosine signal; an initial angle error signal is calculated based on the product of the rotating cosine signal and the sine digital signal, and the product of the rotating sine signal and the cosine digital signal; and the low-frequency excitation signal is multiplied by the initial angle error signal to obtain an angle error signal.

9. A rotation digitizer, characterized in that: The rotary digital converter comprises: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the computer program is configured to implement the steps of the rotary transformer decoding method according to any one of claims 1 to 8.

10. A storage medium, characterized in that: The storage medium is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by a processor, the steps of the resolver decoding method according to any one of claims 1 to 8 are implemented.

Images