Phase-locked loop control method, equipment, medium and product

Abstract

The invention discloses a phase-locked loop control method and device, a medium and a product, and relates to the field of electronic circuits, and the method comprises the steps: detecting the change of a power angle, determining the power angle to be stable when the fluctuation of a power angle derivative in a first set time does not exceed a first set value, locking the d-axis voltage of a common connection point as a first basic value, and executing feedback control according to the first basic value; the power angle is detected, when fluctuation of the power angle derivative exceeds a second set value within second set time, it is judged that a fault occurs, and the first base value continues to be kept; detecting a power angle, switching to a traditional phase-locked loop form when the power angle passes through a primary wave peak and a primary wave trough, and releasing feedback control; and when the voltage is stable again, locking the common connection point d-axis voltage containing feedback as a second base value, and executing feedback control again according to the second base value. According to the invention, whether the fault occurs is identified by monitoring the power angle change in real time, and the phase-locked loop control parameters are adjusted and recovered according to the working condition change, so that the steady-state stability and the transient synchronization stability can be enhanced.

Description

Technical Field

[0001] The present application relates to the field of electronic circuits, and in particular to a phase-locked loop control method, device, medium and product. Background Art

[0002] The research hotspots of wind power generation technology are mainly focused on improving the maximum wind energy capture capability of the system and the quality of grid-connected power. Wind power generation equipment needs to rely on converters to achieve connection and power interaction with the grid. Wind turbines use voltage source converters (VSC) to achieve variable speed constant frequency power generation. The machine-side converter controls the speed of the unit to achieve maximum power tracking power generation control, while the grid-side converter converts the power into power that meets the requirements of the grid and injects it into the grid. VSC synchronization control methods can be divided into two categories: grid-following (GFL) synchronization control and grid-forming (GFM) synchronization control. Most wind power energy interfaces with the grid at the point of common coupling (PCC) through a grid-following grid-connected converter. The converter usually uses a phase-locked loop (PLL) to synchronize with the grid and inject the allocated power or current into the grid. With the increasing penetration of renewable energy sources based on power converters into the grid, the stability of grid-connected converters has attracted more and more attention. Generally speaking, stability problems can be divided into two categories: small signal stability and large signal stability. Small signal stability analysis is based on the stable equilibrium point, and then the nonlinear part of the control structure is linearized. The premise of small signal stability analysis is that there is a steady-state equilibrium point. However, under large signal interference in the power grid, the equilibrium point at the time of the fault may not exist or cannot be achieved. This stability problem is defined as large signal stability. Large signal stability involves the stability of the system when it is subjected to large amplitude signal changes (that is, large disturbances). The "large signal" here means that the amplitude of the change of the system state variables is large, which will make the nonlinear characteristics of the system significantly manifested. Large signal stability mainly includes large interference angle / synchronization stability and voltage stability. For grid-following inverters, the remote grid is usually relatively stable. Although there may be voltage stability problems at the PCC point, the main challenge at present is the angle / synchronization stability problem. In the case of weak grids and severe faults (such as grid voltage drops, grid impedance mutations, etc.), grid-connected inverters may lose synchronization with the grid (loss of synchronization, LOS) and cause power oscillations. Summary of the invention

[0003] The purpose of this application is to provide a phase-locked loop control method, device, medium and product, which can enhance steady-state stability and transient synchronization stability.

[0004] To achieve the above objectives, this application provides the following solutions.

[0005] In a first aspect, the present application provides a phase-locked loop control method, the phase-locked loop control method is applied to a phase-locked loop circuit, and the phase-locked loop control method includes:

[0006] Detecting the change of the power angle, determining that the power angle derivative is stable when the fluctuation does not exceed the first set value within the first set time, locking the d-axis voltage of the common connection point as the first base value, and performing feedback control according to the first base value;

[0007] Detecting the power angle, when the power angle derivative fluctuates beyond the second set value within the second set time, it is determined that a fault has occurred and the first base value is continued to be maintained;

[0008] Detect the power angle. When the power angle experiences a peak and a trough, switch to the traditional phase-locked loop mode and release the feedback control.

[0009] When it becomes stable again, the d-axis voltage of the common connection point containing feedback is locked as the second base value, and feedback control is re-executed according to the second base value.

[0010] Optionally, the phase-locked loop circuit includes:

[0011] A common connection point voltage enhancement link, connected to the common connection point, for enhancing the common connection point voltage by using an enhancement coefficient;

[0012] A coordinate system conversion link, connected to the common connection point voltage enhancement link, is used to convert the common connection point voltage from a three-phase stationary coordinate system to a two-phase rotating coordinate system to obtain a common connection point d-axis voltage and a common connection point q-axis voltage;

[0013] The common connection point d-axis voltage tracking base value link is connected to the coordinate system conversion link and the common connection point voltage enhancement link respectively, and is used to make a difference between the common connection point d-axis voltage and the base value to obtain an error, and obtain an enhancement coefficient after integration and addition of 1;

[0014] The traditional phase-locked link is connected to the coordinate system conversion link, and is used to input the q-axis voltage of the common connection point into the proportional integral link, obtain the difference between the phase-locked loop and the grid angular frequency, and add it to the grid angular frequency to obtain the phase-locked loop angular frequency, and obtain the phase angle of the phase-locked loop after integration;

[0015] The power angle detection link is connected to the traditional phase-locked link and the common connection point d-axis voltage tracking base value link respectively, and is used to detect the phase angle of the phase-locked loop to determine whether a fault occurs, thereby controlling the integral parameter of the common connection point d-axis voltage tracking base value link; wherein, the power angle is the difference between the estimated phase angle of the phase-locked loop and the actual phase angle of the phase-locked loop.

[0016] Optionally, the common connection point voltage enhancement link is a multiplier.

[0017] Optionally, the coordinate system conversion link uses CLARK transformation to convert the common connection point voltage from a three-phase stationary coordinate system to a two-phase rotating coordinate system.

[0018] Optionally, the common connection point d-axis voltage tracking base value link includes:

[0019] A subtractor, connected to the coordinate system conversion link, is used to subtract the d-axis voltage of the common connection point from the base value to obtain an error;

[0020] An integrator is connected to the subtractor and the power angle detection link respectively, and is used to integrate the error to obtain an integral value;

[0021] The adder is connected to the integrator and the common connection point voltage enhancement link respectively, and is used for adding 1 to the integral value to obtain the enhancement coefficient.

[0022] Optionally, the first set time is 1s, and the second set time is 5ms.

[0023] Optionally, the first set value is 0.05pu, and the second set value is 0.5pu.

[0024] In a second aspect, the present application provides a computer device, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the above-mentioned phase-locked loop control method.

[0025] In a third aspect, the present application provides a computer-readable storage medium having a computer program stored thereon, which implements the above-mentioned phase-locked loop control method when executed by a processor.

[0026] In a fourth aspect, the present application provides a computer program product, including a computer program, which implements the above-mentioned phase-locked loop control method when executed by a processor.

[0027] According to the specific embodiments provided in this application, this application discloses the following technical effects:

[0028] The present application provides a phase-locked loop control method, equipment, medium and product, which monitors the power angle changes in real time to identify whether a fault has occurred, and can adjust and restore the phase-locked loop control parameters according to the changes in working conditions. Among them, adding feedback in steady state can significantly reduce the voltage and power angle fluctuations and enhance the steady-state stability. Introducing feedback during the first swing of a fault, which is extremely prone to instability, can increase the damping of the phase-locked loop and enhance the transient synchronization stability. In addition, after the first swing, the feedback control is released, and after providing power angle tracking support (increasing damping), the phase-locked loop can have time to re-establish voltage connection. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0030] Figure 1 Schematic diagram of the grid-following converter provided in this application connected to a weak power grid.

[0031] Figure 2 Schematic diagram of the VSC equivalent model provided in this application considering the coupling effect between the SRF-PLL and the current loop.

[0032] Figure 3 Schematic diagram of the SRF-PLL small signal model provided in this application.

[0033] Figure 4 Schematic diagram of the improved normalized phase-locked loop provided in this application.

[0034] Figure 5 Schematic diagram of the control strategy provided for this application.

[0035] Figure 6 This is a flow chart of the phase-locked loop control method provided in this application.

[0036] Figure 7 The voltage provided in this application drops to 40V, and the power angle change comparison chart before and after the phase-locked loop is improved.

[0037] Figure 8 The voltage provided in this application drops to 22V, and the power angle change comparison chart before and after the phase-locked loop is improved under the reactive power priority condition after a fault. DETAILED DESCRIPTION

[0038] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0039] During a grid fault, the PLL damping is significantly reduced because the damping ratio of the PLL is strongly dependent on the magnitude of the input PCC voltage. Therefore, in order to maintain the designed damping ratio and improve transient stability during a grid fault, the present application introduces an improved voltage normalization control in the PLL. This technical solution introduces additional d-axis voltage control, which can maintain a unified PLL structure under normal or grid fault conditions, and does not require detection of the grid voltage amplitude or frequency.

[0040] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, the present application is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0041] Figure 1 The synchronous reference frame phase-locked loop (SRF-PLL) is used to detect the phase of the PCC point and calculate the PLL estimated angular frequency ω. pll .U pcc ,I pcc are the voltage at PCC and the current injected into the grid by the converter, U dc is the DC side voltage, U c is the terminal voltage, U g is the grid voltage, Z g is the grid impedance, L f is the filter inductance, δ pll The grid-connected converter for stable current control can be regarded as a controlled current source directed by the PLL. The purpose of the grid-side converter is to generate U cd * , U cq * Change terminal voltage U cd , U cq To control the output current I d ,I q Track its given value I dref ,I qref .

[0042] In order to more intuitively describe and express the influence of current loop and PLL on VSC transient synchronization process, Figure 1 The configuration in is equivalent to Figure 2 The Thevenin circuit in the paper is given in detail, and the structure diagram of the current control loop and PLL is given in detail. The controlled current source is composed of I pcc And the synchronization angle δ is composed of: I pcc Determined by the current control loop, the synchronization angle δ is generated by the phase-locked loop.

[0043] Current control loop: After the dq axis current reference value is subtracted from the actual dq axis current, the error is input into the proportional integral (PI) link of the current loop, and then the difference is made with the dq axis component of the grid voltage. After the integral link with a coefficient of 1 / L, the output current can be obtained.

[0044] Phase-locked loop: grid voltage plus line voltage drop (I pcc ×Z g ) and then the PCC point voltage is obtained. After coordinate transformation, the q-axis component is input into the PI link to obtain the estimated angular frequency of the PLL based on the grid angular frequency. At this time, the grid angular frequency is added to obtain the PCC point angular frequency estimated by the PLL.

[0045] Equivalent VSC structure: The grid-connected converter that realizes stable current control can be regarded as a controlled current source directed by PLL. The controlled current source is composed of I dq And synchronous angle PLL. dq Determined by the current control loop, the synchronization angle PLL is generated by the phase-locked loop.

[0046] K cp , K ci is the proportional and integral coefficient of the current loop PI link; the comprehensive inductance L = L f +L g , where L f Represents the filter inductance of the grid-side converter, L g is the grid impedance. δ, are the power angle and angular frequency respectively, ω n is the grid angular frequency. It can be seen that the phase-locked loop passes U pccq Calculate the output frequency and phase angle to keep the frequency of the grid-connected converter consistent with the grid frequency and ensure the power angle is stable. In order to obtain stable current control during steady-state operation, U pccq Should be equal to zero. And when U pccq =0 phase-locked, the active and reactive currents of the converter are decoupled.

[0047] ω g =ω n is the grid angular frequency, K p , K i are the proportional and integral parameters of the phase-locked loop PI link, θ pll ,θ pcc They are the phase angle calculated by the phase-locked loop and the actual phase angle of the PCC point. Figure 3 The SRF-PLL small signal model can be used to derive the transfer function G of the traditional PLL. PLL (s) is expressed as:

[0048]

[0049] in, is the damping ratio, is the undamped natural frequency of the system, and s represents the phase modulation frequency. It can be seen that the main problem causing synchronization instability is the voltage amplitude. Therefore, the stability can be improved by increasing the amplitude of the PCC voltage. However, due to the limitations of the physical circuit, it is difficult to increase the actual voltage at the PCC point. However, the voltage amplitude inside the PLL module can be increased by controlling the d-axis voltage feedback, which can also be called voltage normalization control.

[0050] In an exemplary embodiment, the present application provides a phase-locked loop control method, which is applied to a phase-locked loop circuit, that is, Figure 4 The improved normalized phase-locked loop is shown.

[0051] The improved normalized phase-locked loop consists of a common connection point voltage enhancement link, a coordinate system conversion link, a common connection point d-axis voltage tracking base value link, a traditional phase-locked link, and a power angle detection link. The common connection point voltage enhancement link is connected to the common connection point, and is used to enhance the common connection point voltage by using an enhancement coefficient; the coordinate system conversion link is connected to the common connection point voltage enhancement link, and is used to convert the common connection point voltage from a three-phase stationary coordinate system to a two-phase rotating coordinate system to obtain the common connection point d-axis voltage and the common connection point q-axis voltage; the common connection point d-axis voltage tracking base value link is respectively connected to the coordinate system conversion link and the common connection point voltage enhancement link, and is used to make a difference between the common connection point d-axis voltage and the base value to obtain an error, which is then enhanced after integration and addition. coefficient; the traditional phase-locked link is connected with the coordinate system conversion link, which is used to input the q-axis voltage of the common connection point into the proportional integral link, obtain the difference between the angular frequency of the phase-locked loop and the grid and add it to the angular frequency of the grid to obtain the angular frequency of the phase-locked loop, and obtain the phase angle of the phase-locked loop after integration; the power angle detection link is respectively connected with the traditional phase-locked link and the common connection point d-axis voltage tracking base value link, which is used to detect the phase angle of the phase-locked loop to determine whether a fault occurs, thereby controlling the integral parameter of the common connection point d-axis voltage tracking base value link; wherein, the power angle is the difference between the estimated phase angle of the phase-locked loop and the actual phase angle of the phase-locked loop.

[0052] Among them, the common connection point voltage enhancement link is a multiplier. The coordinate system conversion link uses CLARK transformation to convert the common connection point voltage from a three-phase stationary coordinate system to a two-phase rotating coordinate system. The common connection point d-axis voltage tracking base value link includes: a subtractor, an integrator and an adder; the subtractor is connected to the coordinate system conversion link, and is used to subtract the common connection point d-axis voltage from the base value to obtain an error; the integrator is respectively connected to the subtractor and the power angle detection link, and is used to integrate the error to obtain an integral value; the adder is respectively connected to the integrator and the common connection point voltage enhancement link, and is used to add 1 to the integral value to obtain an enhancement coefficient.

[0053] The specific implementation of the above improved normalized phase-locked loop is: PCC point voltage U pcc After the three-phase stationary coordinate system is transformed into a two-phase rotating coordinate system, the d-axis voltage U at the PCC point is obtained dpcc With PCC point q axis voltage U qpcc . PCC point d-axis voltage U dpcc With base value U m The error is obtained by subtracting and inputting it into the coefficient K m The integrator of the pcc Enhancement coefficient γ. This coefficient can achieve the purpose of increasing the PCC point voltage after multiplying it with the PCC point voltage. qpcc After this voltage component is input into the PI link, the difference between the phase-locked loop and the grid angular frequency ω is obtained, and then the grid angular frequency ω is added g Get the phase-locked loop angular frequency ω pll , after integration, it is the phase angle θ of the phase-locked loop pll In addition, real-time detection of θ pll To determine whether a fault has occurred, and thus control K m .

[0054] The obvious difference from the traditional SRF-PLL is that the d-axis voltage is also passed through the integrator (the integration parameter is K m ) and the enhancement factor γ to control it to the base value U m Different from ordinary voltage normalization control, this solution monitors the power angle change in real time to identify whether a fault has occurred, and can adjust and restore the phase-locked loop control parameters according to changes in operating conditions.

[0055] In the embodiments of the present application, Figure 5 and Figure 6 As shown, the phase-locked loop control method includes the following steps 1 to 4.

[0056] Step 1: Detect the power angle change, and determine that it is stable when the power angle derivative does not fluctuate more than the first set value within the first set time, lock the d-axis voltage of the common connection point as the first base value, and perform feedback control according to the first base value. Preferably, the first set time is 1s and the first set value is 0.05pu.

[0057] Step 2: Detect the power angle. When the power angle derivative fluctuates beyond the second set value within the second set time, it is determined that a fault has occurred and the first base value is maintained. Preferably, the second set time is 5ms and the second set value is 0.5pu.

[0058] Step 3: Detect the power angle. When the power angle experiences a peak and a trough, switch to the traditional phase-locked loop mode and release the feedback control.

[0059] Step 4: When the system becomes stable again, the d-axis voltage of the common connection point containing feedback is locked as the second base value, and feedback control is re-executed according to the second base value.

[0060] To sum up, the specific control scheme is:

[0061] 1. Detect the power angle change. When the power angle derivative does not fluctuate more than 0.05pu within 1s, it is considered stable. At this time, the d-axis voltage U at the PCC point is locked. dpcc As U m1 .

[0062] 2. Detect the power angle. When the power angle derivative fluctuates more than 0.5pu within 5ms, the fault is identified and judged as a large disturbance. Continue to maintain U m1 .

[0063] 3. Detect the power angle, identify when the power angle experiences a peak and a trough (i.e. the first swing), and switch to the traditional PLL mode.

[0064] 4. When it is stable (the power angle derivative does not fluctuate more than 0.05pu within 1s), lock the new U dpcc As U m2 , re-enter feedback.

[0065] In order to verify the effectiveness of the strategy proposed in this application, a simulation platform is built in MATLAB / Simulink. Figure 1 The simplified model of the wind turbine grid-connected system is shown in FIG. 1 , and the parameters used in the model are shown in Table 1.

[0066] Table 1 Simplified model parameters of wind turbine grid-connected system

[0067]

[0068] The voltage drops to 40V. See the comparison chart of power angle change before and after the phase-locked loop is improved. Figure 7 , the voltage drops to 22V, and the power angle change comparison diagram before and after the phase-locked loop is improved under the reactive power priority condition after the fault is adopted is shown in Figure 8 .

[0069] Depend on Figure 7 and Figure 8 It can be seen that the advantages of this improved voltage normalization phase-locked loop are:

[0070] 1. Enhance steady-state stability: Adding feedback in steady state can significantly reduce voltage and power angle fluctuations.

[0071] 2. Enhance transient synchronization stability: It is very easy to become unstable during the first swing of a fault, and feedback is introduced to increase the damping of the phase-locked loop.

[0072] 3. The power angle and voltage are connected to the grid: After the first swing, the feedback control is released, and after providing power angle tracking support (increasing damping), the phase-locked loop is given time to re-establish the voltage connection.

[0073] In an exemplary embodiment, the present application further provides a computer device, including a memory and a processor, wherein a computer program is stored in the memory, and the processor implements the steps in the above-mentioned method embodiments when executing the computer program.

[0074] In an exemplary embodiment, the present application further provides a computer-readable storage medium storing a computer program, which implements the steps in the above-mentioned method embodiments when executed by a processor.

[0075] In an exemplary embodiment, the present application further provides a computer program product, including a computer program, which implements the steps in the above-mentioned method embodiments when executed by a processor.

[0076] In this application, all actions to obtain signals, information or data are carried out in compliance with the relevant data protection laws and policies of the country where the application is located, and with the authorization of the corresponding device owner. It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with relevant legal provisions.

[0077] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM may be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM).

[0078] The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. The non-relational database may include a distributed database based on blockchain, etc., but is not limited thereto. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, etc., but is not limited thereto.

[0079] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0080] This article uses specific examples to illustrate the principles and implementation methods of this application. The description of the above embodiments is only used to help understand the method and core ideas of this application. At the same time, for those skilled in the art, according to the ideas of this application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting this application.

Claims

1. A phase-locked loop control method, characterized in that: The phase-locked loop control method is applied to a phase-locked loop circuit, and the phase-locked loop control method includes: Detecting the change of the power angle, determining that the power angle derivative is stable when the fluctuation does not exceed the first set value within the first set time, locking the d-axis voltage of the common connection point as the first base value, and performing feedback control according to the first base value; Detecting the power angle, when the power angle derivative fluctuates beyond the second set value within the second set time, it is determined that a fault has occurred and the first base value is continued to be maintained; Detect the power angle. When the power angle experiences a peak and a trough, switch to the traditional phase-locked loop mode and release the feedback control. When it becomes stable again, the d-axis voltage of the common connection point containing feedback is locked as the second base value, and feedback control is re-executed according to the second base value.

2. The phase-locked loop control method according to claim 1, characterized in that: The phase-locked loop circuit comprises: A common connection point voltage enhancement link, connected to the common connection point, for enhancing the common connection point voltage by using an enhancement coefficient; A coordinate system conversion link, connected to the common connection point voltage enhancement link, is used to convert the common connection point voltage from a three-phase stationary coordinate system to a two-phase rotating coordinate system to obtain a common connection point d-axis voltage and a common connection point q-axis voltage; The common connection point d-axis voltage tracking base value link is connected to the coordinate system conversion link and the common connection point voltage enhancement link respectively, and is used to make a difference between the common connection point d-axis voltage and the base value to obtain an error, and obtain an enhancement coefficient after integration and addition of 1; The traditional phase-locked link is connected to the coordinate system conversion link, and is used to input the q-axis voltage of the common connection point into the proportional integral link, obtain the difference between the phase-locked loop and the grid angular frequency, and add it to the grid angular frequency to obtain the phase-locked loop angular frequency, and obtain the phase angle of the phase-locked loop after integration; The power angle detection link is connected to the traditional phase-locked link and the common connection point d-axis voltage tracking base value link respectively, and is used to detect the phase angle of the phase-locked loop to determine whether a fault occurs, thereby controlling the integral parameter of the common connection point d-axis voltage tracking base value link; wherein, the power angle is the difference between the estimated phase angle of the phase-locked loop and the actual phase angle of the phase-locked loop.

3. The phase-locked loop control method according to claim 2, characterized in that: The common connection point voltage enhancement link is a multiplier.

4. The phase-locked loop control method according to claim 2, characterized in that: The coordinate system conversion link uses CLARK transformation to convert the common connection point voltage from a three-phase stationary coordinate system to a two-phase rotating coordinate system.

5. The phase-locked loop control method according to claim 2, characterized in that: The common connection point d-axis voltage tracking base value link includes: A subtractor, connected to the coordinate system conversion link, is used to subtract the d-axis voltage of the common connection point from the base value to obtain an error; An integrator is connected to the subtractor and the power angle detection link respectively, and is used to integrate the error to obtain an integral value; The adder is connected to the integrator and the common connection point voltage enhancement link respectively, and is used for adding 1 to the integral value to obtain the enhancement coefficient.

6. The phase-locked loop control method according to claim 1, characterized in that: The first setting time is 1s, and the second setting time is 5ms.

7. The phase-locked loop control method according to claim 1, characterized in that: The first set value is 0.05 pu, and the second set value is 0.5 pu.

8. A computer device comprising: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the phase-locked loop control method according to any one of claims 1 to 7.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the phase-locked loop control method according to any one of claims 1 to 7 is implemented.

10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the phase-locked loop control method according to any one of claims 1 to 7 is implemented.

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