Waveguide type optical switching matrix and photoelectric hybrid switching system

Abstract

The invention relates to the technical field of photoelectric switching, and particularly discloses a waveguide type optical switching matrix and a photoelectric hybrid switching system. According to the technical scheme, the waveguide type optical switching matrix is provided. The waveguide type optical switching matrix comprises an input optical chip, a middle optical chip and an output optical chip. The input optical chip comprises an N / P single-input 2M-output 1 * 2M optical switch array (M is equal to 2m, N is equal to 2n, and m, n and P are positive integers); the middle optical chip comprises a P * P optical switch array of 2MN / P sheet P input and P output; the output optical chip comprises an N / P sheet 2M input and single output 2M * 1 optical switch array; all the optical switch arrays of the input optical chip, the middle optical chip and the output optical chip are in P rows. Therefore, the whole matrix is strictly free of blocking, and the technical problems that a large-scale monolithic waveguide type optical switch matrix is difficult to produce in batches and use with high reliability and is difficult to maintain and replace are solved.

Description

Technical Field

[0001] The present application relates to the field of optoelectronic switching, and in particular to a waveguide optical switching matrix and an optoelectronic hybrid switching system. Background Art

[0002] At present, there are three main types of strictly non-blocking waveguide optical switching matrices: PILOSS, binary tree BTN and double-stacked DLN. PILOSS has gradually faded out of people's view because of too many levels and too large insertion loss of large-scale matrices. BTN is a network with binary tree structure for both input and output, which can reduce the number of 2x2 optical switch basic unit levels to 2*Log2N levels, effectively reducing the number of basic unit levels in series, thereby reducing insertion loss. However, its disadvantages are that the input and output levels are too large and there are too many connections between the input and output levels. The traditional stacked optical switch network has gone to the other extreme. The input and output levels are just N 1×2 and 2×1 basic units, and the middle level is four strictly non-blocking (N-1)×(N-1) switching matrices in parallel. The problem with this is that when the matrix is ​​very large, it needs to be expanded multiple times in this way, and the network is complex and cannot be divided into small-scale matrices for cascading. The basic unit of the DLN network optical switch is lower and has the least number of levels, 2*Log2N-1, but the current process level can only produce a scale below 16×16. The area of ​​a larger optical chip increases dramatically, making mass production, high-reliability use, and maintenance and replacement more difficult. Summary of the invention

[0003] The main purpose of the present application is to provide a waveguide optical switching matrix and an optoelectronic hybrid switching system, aiming to solve the technical problem that large-scale waveguide optical switching matrices in the prior art are difficult to achieve.

[0004] To achieve the above-mentioned object, the present application provides a waveguide type optical switching matrix, the waveguide type optical switching matrix comprising: an input optical chip, an intermediate optical chip and an output optical chip;

[0005] The input optical chip includes: N / P chip single input, 2M output 1×2M optical switch array (M=2 m ,N=2 n , m, n, and P are all positive integers);

[0006] The intermediate optical chip includes: a 2MN / P chip P×P optical switch array with P input and P output;

[0007] The output optical chip includes: N / P chip 2M input, single output 2M×1 optical switch array;

[0008] All the optical switch arrays of the input optical chip, the intermediate optical chip and the output optical chip have P rows;

[0009] The input optical chip has a total of N / P*P=N input ports and N / P*P*2M=2MN output ports;

[0010] The intermediate optical chip has 2MN / P*P=2MN input ports and output ports;

[0011] The output optical chip has a total of N / P*P=N output ports and N / P*P*2M=2MN input ports;

[0012] The input optical chip and the intermediate optical chip are interconnected by 2MN optical fibers, and the intermediate optical chip and the output optical chip are interconnected by 2MN optical fibers.

[0013] Optionally, 2M output ports of each row (P rows in total) of each optical switch array (N / P chips in total) of the input optical chip are respectively interconnected with one input port (each optical switch array of the intermediate optical chip has P input ports) of each optical switch array (2MN / P chips in total) of the intermediate optical chip;

[0014] All optical switch arrays of the intermediate optical chip (a total of 2MN / P chips) are divided into upper and lower halves (the upper and lower halves have MN / P optical switch arrays, respectively, and each optical switch array has P output ports);

[0015] All optical switch arrays of the output optical chip are also divided into upper and lower halves (the upper and lower halves have N / 2P optical switch arrays, respectively, each optical switch array has P rows, and each row has 2M input ports);

[0016] The upper and lower halves of the intermediate optical chip are respectively interconnected with the upper and lower halves of the output optical chip, and are respectively interconnected by MN optical fibers;

[0017] The 2M output ports of each row (P rows in total) of each optical switch array (N / 2P chips in total) in the upper and lower halves of the output optical chip are respectively interconnected with one port (P ports in total) of each optical switch array (MN / P chips in total) of the intermediate optical chip in the same half.

[0018] Optionally, the waveguide optical switching matrix is ​​also used for large-scale optical chips required for optical computing.

[0019] In addition, to achieve the above-mentioned purpose, the present invention also provides an optoelectronic hybrid switching system, which includes: an electrical switching chip with an OBS control output, a sealed cable module, an optical module, a waveguide optical switching matrix as described above, and a field programmable gate array;

[0020] The electrical exchange chip is connected to the sealed cable module;

[0021] The sealed cable module is connected to the optical module via an optical fiber;

[0022] The optical module is connected to the waveguide optical switching matrix;

[0023] The field programmable gate array is connected to the waveguide type optical switching matrix;

[0024] The electrical exchange chip is used to send data plane electrical signals to the sealed cable module;

[0025] The optical module is used to receive the data plane electrical signal sent by the electrical switching chip, convert the data plane electrical signal into a data plane optical signal, and input the optical signal into the waveguide type optical switching matrix;

[0026] The waveguide type optical switching matrix is ​​used to switch the data plane optical signal;

[0027] The field programmable gate array is used to control the basic units of all waveguide optical switching matrices after decoding the control plane signal output by the electrical switching chip.

[0028] Optionally, the sealed cable module further comprises: a transmission chip;

[0029] The transmission chip is used to relay, regenerate and reduce the speed of the electrical signal data received by the sealed cable module.

[0030] Optionally, the optoelectronic hybrid switching system further includes: a semiconductor optical amplifier;

[0031] The semiconductor optical amplifier is connected to the waveguide type optical switching matrix;

[0032] The semiconductor optical amplifier is used to amplify optical signal data.

[0033] Optionally, the optoelectronic hybrid switching system further includes: an optical line switching controller;

[0034] The optical line switching controller is connected to the waveguide type optical switching matrix;

[0035] The optical line switching controller is used to control the switching of the optical signal data in the waveguide type optical switching matrix.

[0036] The technical solution of this application proposes a waveguide optical switching matrix and an optoelectronic hybrid switching system. The waveguide optical switching matrix includes: an input optical chip, an intermediate optical chip, and an output optical chip; the input optical chip includes: a 1×2M optical switch array (M=2 m ,N=2 n, m, n, P are all positive integers); the intermediate optical chip includes: a P×P optical switch array with 2MN / P chips and P inputs and P outputs; the output optical chip includes: a 2M×1 optical switch array with N / P chips and 2M inputs and a single output; all the optical switch arrays of the input optical chip, the intermediate optical chip and the output optical chip are in P rows; the input optical chip has a total of N / P*P=N input ports and N / P*P*2M=2MN output ports; the intermediate optical chip has 2MN / P*P=2MN input ports and output ports; the output optical chip has a total of N / P*P=N output ports and N / P*P*2M=2MN input ports; the input optical chip and the intermediate optical chip are interconnected by 2MN optical fibers, and the intermediate optical chip and the output optical chip are interconnected by 2MN optical fibers. Through specific connection relationships, the entire matrix is ​​strictly non-blocking and can be divided relatively evenly into 2 (M + 2) * N / P small array optical chips, which are then cascaded with optical fibers, avoiding the technical problems of large-scale waveguide-type monolithic optical switch matrices that are difficult to mass produce and use with high reliability, as well as difficult to repair and replace. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 A common structural diagram of the first embodiment of the waveguide optical switching matrix of the present application;

[0038] Figure 2 This is a schematic diagram of the first structure of the first embodiment of the waveguide optical switching matrix of the present application;

[0039] Figure 3 This is a second structural schematic diagram of the first embodiment of the waveguide optical switching matrix of the present application;

[0040] Figure 4 This is a schematic diagram of the third structure of the first embodiment of the waveguide optical switching matrix of the present application;

[0041] Figure 5 This is a schematic diagram of the fourth structure of the first embodiment of the waveguide optical switching matrix of the present application;

[0042] Figure 6 This is a first structural schematic diagram of the second embodiment of the optoelectronic hybrid switching system of the present application;

[0043] Figure 7 A second structural schematic diagram of the second embodiment of the optoelectronic hybrid switching system of the present application;

[0044] Figure 8 A third structural schematic diagram of the second embodiment of the optoelectronic hybrid switching system of the present application;

[0045] Fig. 9 This is a schematic structural diagram of the third embodiment of the optoelectronic hybrid switching system of the present application.

[0046] The realization of the purpose, functional features and advantages of this application will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0047] It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0048] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0049] It should be noted that all directional indications in the embodiments of the present application (such as up, down, left, right, front, back, etc.) are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0050] In addition, the descriptions of "first", "second", etc. in this application are only for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in this field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by this application.

[0051] Reference Figure 1 , Figure 1 This is a common structural diagram of the first embodiment of the waveguide optical switching matrix of the present application.

[0052] In this embodiment, the waveguide optical switching matrix includes: an input optical chip, an intermediate optical chip and an output optical chip. The input optical chip includes: a 1×2M optical switch array with N / P single input and 2M output (where M=2 m ,N=2 n, m, n, and P are all positive integers); the intermediate optical chip includes: a P×P optical switch array with 2MN / P chips and P input and P output; the output optical chip includes: a 2M×1 optical switch array with N / P chips and 2M input and single output, and the waveguide optical switching matrix is ​​an N×N waveguide optical switching matrix. It can be set that all the optical switch arrays of the input optical chip, the intermediate optical chip, and the output optical chip are P rows. In this way, the size scale is similar and the process difficulty is similar, so setting them all to P rows is an optimized cutting solution, but it is not the only solution.

[0053] It should be noted that the input optical chip has a total of N / P*P=N input ports and N / P*P*2M=2MN output ports; the intermediate optical chip has 2MN / P*P=2MN input ports and output ports; the output optical chip has a total of N / P*P=N output ports and N / P*P*2M=2MN input ports; the input optical chip and the intermediate optical chip are interconnected by 2MN optical fibers, and the intermediate optical chip and the output optical chip are interconnected by 2MN optical fibers. Optimally, polarization-maintaining optical fibers can be used to reduce the requirements for polarization insensitivity of optical switch array chips. The waveguide optical switching matrix can also be used for large-scale optical chips required for optical computing.

[0054] It should be understood that the connection relationship between the chips of the waveguide optical switching matrix includes: the 2M output ports of each row (P rows in total) of each input optical chip (N / P chips in total) are respectively interconnected with one port (P ports in total for each intermediate optical chip) of each intermediate optical chip (2MN / P chips in total); the intermediate optical chip (2MN / P chips in total) is divided into upper and lower halves (MN / P chips in total, each chip has P output ports), respectively interconnected with the output optical chips of the upper and lower halves (N / 2P chips in total, each chip has P rows, and each row has 2M inputs), and interconnected with MN optical fibers respectively. The 2M output ports of each row (P rows in total) of each output optical chip (N / 2P chips in total) in the upper and lower halves are respectively interconnected with one port (P ports in total for each intermediate optical chip) of each intermediate optical chip (MN / P chips in total) in the same half. Among them, the above connection relationship can also be completely mirrored.

[0055] Figure 2 This is a schematic diagram of the first structure of the optoelectronic switching matrix of this application. The three-level optical switching arrays of 4*1×4, 4*4 and 4*4×1 form a 16×16 strictly non-blocking matrix, with a total of 4+16+4=24 optical switching arrays, which are cascaded using 64+64=128 optical fibers.

[0056] It should be understood that there are many suboptimal solutions for large matrices, but refer to Figures 2 to 5It is the optimal solution because: the maximum span of the relationship between all optical chips is only the road address of 1 / 2+1 / 8=5 / 8 area, and there is no situation where the road address changes with a larger span. The suboptimal solution can also keep the low-order address unchanged when the high-order address changes, but there may be problems such as the low-order address being disrupted and the number of rows being inconsistent.

[0057] Figure 3 This is a second structural diagram of the optoelectronic switching matrix of this application. The three-level optical switching arrays of 8*1×4, 8*8 and 8*4×1 form a 32×32 strictly non-blocking matrix, with a total of 4+16+4=24 optical switching arrays, which are cascaded using 128+128=256 optical fibers.

[0058] Figure 4 This is the third structural diagram of the optoelectronic switching matrix of this application. The three-level optical switching arrays of 4*1×8, 4*4 and 4*8×1 form a 32×32 strictly non-blocking matrix, with a total of 8+64+8=80 optical switching arrays, which are cascaded using 256+256=512 optical fibers.

[0059] Figure 5 This is the fourth structural diagram of the optoelectronic switching matrix of this application. The three-level optical switching arrays of 8*1×8, 8×8 and 8*8×1 form a 64×64 strictly non-blocking matrix, with a total of 8+64+8=80 optical switching arrays, which are cascaded using 512+512=1024 optical fibers.

[0060] Due to the inherent protocol transparency of optical switching, this technology can be used not only for large-capacity Ethernet, but also for various other switching protocols: InfiniBand, NVLink, UALink, PCIe, CML, etc. The optical switching chips used for various protocols are the same, and switching matrices of various scale requirements are possible.

[0061] The waveguide optical switching matrix in the present application includes: an input optical chip, an intermediate optical chip and an output optical chip; the input optical chip includes: a 1×2M optical switch array (M=2 m ,N=2 n, m, n, P are all positive integers); the intermediate optical chip includes: a P×P optical switch array with 2MN / P chips and P inputs and P outputs; the output optical chip includes: a 2M×1 optical switch array with N / P chips and 2M inputs and a single output; all the optical switch arrays of the input optical chip, the intermediate optical chip and the output optical chip are in P rows; the input optical chip has a total of N / P*P=N input ports and N / P*P*2M=2MN output ports; the intermediate optical chip has 2MN / P*P=2MN input ports and output ports; the output optical chip has a total of N / P*P=N output ports and N / P*P*2M=2MN input ports; the input optical chip and the intermediate optical chip are interconnected by 2MN optical fibers, and the intermediate optical chip and the output optical chip are interconnected by 2MN optical fibers. Through a specific connection relationship, the entire matrix is ​​strictly non-blocking and can be evenly divided into 2 (M + 2) * N / P small array optical chips, which are then cascaded with optical fibers, avoiding the technical problems of large-scale waveguide monolithic optical switch matrices being difficult to mass produce and use with high reliability, as well as difficult to repair and replace. Combining the characteristics of BTN and DLN, the input and output levels are similar to the BTN network and can be divided into P rows of binary tree network input and output chips. When m = 0, it degenerates into a DLN network, and when P = 1, it degenerates into a BTN network.

[0062] In addition, in order to achieve the above purpose, the embodiment of the present invention also proposes a photoelectric hybrid switching system, referring to Figure 6 , Figure 6 This is a first structural diagram of the first embodiment of the optoelectronic hybrid switching system of the present application. Figure 6 As shown, in this embodiment, the optoelectronic hybrid switching system includes: an electrical switching chip with optical burst switching (OBS) control output, a sealed cable module, an optical module, the waveguide optical switching matrix as described above, and a field programmable gate array.

[0063] It should be noted that the electrical switching chip is connected to the sealed cable module; the sealed cable module is connected to the optical module through an optical fiber; the optical module is connected to the waveguide optical switching matrix; and the field programmable gate array is connected to the waveguide optical switching matrix.

[0064] Among them, the electrical switching chip can be used to send data plane electrical signals to the sealed cable module; the optical module can be used to receive the data plane electrical signals sent by the electrical switching chip, and convert the data plane electrical signals into data plane optical signals, and input the optical signals into the waveguide optical switching matrix; the waveguide optical switching matrix can be used to switch the data plane optical signals; the field programmable gate array can be used to decode the control plane signals output by the electrical switching chip and control all basic units of the waveguide optical switching matrix. Each optical burst exchange is to switch the optical routes of the optical ports of two pairs of QSFP56 ER1 optical modules in the self-transmitting and self-receiving idle state to each other. The electrical switching chip and FPGA provide corresponding high-speed control plane signals to control all related optical switch basic units to complete the Cross / Bar state switching. After the packet signal transmission is completed, it is switched back, and the two pairs of optical modules resume the self-transmitting and self-receiving idle state, maintain the connectivity of the optical link, and wait for the next packet and the optical burst exchange between other optical modules. Because the optical output signal rates of the two pairs of optical modules are strictly consistent, the output optical power is also similar, and the optical insertion loss of the waveguide optical switching matrix is ​​independent of the path, so the received optical power is also similar. Only the nanosecond optical routing switching and the change of the optical signal phase cannot destroy its optical connection and signal quality. There is no process of optical module link breaking and link establishment before and after optical burst switching, and the series of problems it brings.

[0065] It should be understood that the waveguide optical switching matrix involved in the optoelectronic hybrid switching system is a relatively large-scale 512×512, which can be formed by cascading five levels of small-scale 4×4 array optical chips, but the number of optical chips is too large and the integration is too low, so the preferred solution is to use three-level optical chip cascading. Figure 6 , 16*1×32, 16*16 and 16*32×1 three-level optical switching chips can form a 512×512 strictly non-blocking matrix, 256 sets of this waveguide optical switching matrix, 512*4 25.6T electrical switching chips and 16 CPC modules around each electrical switching chip, 131072 QSFP56 ER1 optical modules, etc. form a two-level full-bandwidth non-convergent optoelectronic hybrid optical burst switching (OBS) system.

[0066] It should be noted that, considering the large number of basic units of large-scale waveguide optical switching matrix and the large size of optical chips, the total optical insertion loss often exceeds the link budget of general ER optical modules, so it is necessary to introduce semiconductor optical amplifiers (Semi-conductor Optical Amplifier, SOA), refer to Figure 7 , Figure 7This is the second structural diagram of the first embodiment of the optoelectronic hybrid switching system of the present application. All or part of the 2×1 basic units at the last few stages of the output optical switch array chip are converted into a Y-shaped optical combiner, and then the output is amplified by the SOA to offset the total insertion loss of the previous optical switch array chips. Regardless of whether these optical switch basic units (i.e., optical switch array chips) are switched before or after, the last few 2×1 stages always have and only one path in the light state, and the other paths are all in the light-free state, and the optical signals therein are also in a continuous mode, so the final SOA can be in a stable working state, and the optical power will not fluctuate greatly.

[0067] The sealed cable module may also include: a transmission chip. Since traditional sealed cables are generally passive, or only have a retimer, that is, the 32 pairs of high-speed transceiver signals at the switch end are consistent with the 32 transceiver signal rates in the cable. This is of course no problem for short-distance high-speed signal transmission between the switching chip and the sealed cable, but it is difficult to support higher-speed transmission to distant optical modules through longer-distance cables. The active sealed cable can relay, regenerate and reduce the speed of the 32-way high-speed transceiver signals at the local end through the internal transmission Gearbox chip, and increase the total bandwidth by doubling the number of channels instead of increasing the signal rate in the cable, so as to achieve the purpose of larger switching particles B and further expand the capacity of the switching system (B*N*M / 2).

[0068] Reference Figure 8 , Figure 8 This is the third structural diagram of the first embodiment of the optoelectronic hybrid switching system of this application. The 32 pairs of transceiver signals at the switch central end are input through the interface 21 defined by the CPO standard, sent to the transmission gearbox chip 1 through the step circuit board 2, and converted into lower-rate transceiver signals. After that, they are welded together with the high-speed transceiver cable 3 through the front and back pads 22 of the step circuit board. The appearance size, mechanical / electrical / heat dissipation and other specifications of the entire sealed cable module 4 meet the CPO standard. The significance of this is that the rate of higher-rate signals can be reduced and transmitted to distant optical modules with double the number of cable pairs. For example, 32*100G can be converted to 64*50G; 32*200G can be converted to 64*100G, 16*400G can be converted to 64*100G, 32*400G can be converted to 128*100G, and so on.

[0069] It should be noted that, considering the large number of peripheral components such as power supply of the power switching chip, the chip itself occupies a large space, plus factors such as heat dissipation and fan-out of high-speed signals, generally only 1 to 2 large-capacity switching chips can be placed on a circuit board, and more, such as 4 parallel large-channel switching ASIC chips, are difficult to place on the same circuit board. The physical distance between them may even be far, but Figure 6The network architecture requires each chip to fan out one path separately, and then aggregate into a single particle and enter the same optical module. The electrical insertion loss of the circuit board and its high-speed connectors is too large to support such long-distance high-speed signal transmission. Fortunately, the 32 pairs of cables of the sealed cable can transmit high-speed signals to a longer distance. Each electrical switching chip can transmit the signal to the same optical module on the same circuit board through the sealed cable, becoming a switching particle and entering a pair of optical fibers for the next optical switching. Similarly, the downstream optical module or electrical module also synthesizes 200G switching particles to connect to the large-bandwidth computing chip. In this way, the two dimensions of switching particles and the number of channels reach or even exceed the traditional two-layer Leaf-Spine electrical switching system. Not only can it achieve a larger system switching capacity with a relatively backward process, but it can also inherit other advantages of optical switching: low latency, low cost, low power consumption, transparent protocol upgrade friendliness, etc.

[0070] It should be understood that although waveguide optical switch chips have high reliability, considering the large scale of the switching matrix and the many optical coupling links, it is still necessary to consider the response plan for channel failure. In addition, the failure rate of the 200G QSFP56 ER1 optical module with high optical output and high sensitivity may also be higher than that of ordinary short-distance optical modules or electrical modules. Reserving sufficient redundant channels is one of the necessary measures to maintain the long-term normal operation of the system. Figure 8As shown in the figure, after considering the 1 / 32 redundancy backup for the downstream, the maximum number of ports M / 2 of the L1 layer electrical switching ASIC chip is reduced to 248; the maximum number of ports N of the L2 layer waveguide optical switching matrix is ​​512; the switching granularity of the two-layer hybrid system is 200Gbps, so it can support low-latency full-bandwidth non-blocking interconnection of N*M / 2=126976 high-computing power (GPU) cards. The downstream network of the L1 layer electrical switching chip is the same as that of traditional data centers, which are all highly reliable short-distance optical modules. The uplink port is filled with 131072pcs optical modules with high link budget (200G ER1QSFP56 example in the figure); the three optical chips, 16*1×32 input optical switch array chip, 16×16 intermediate optical chip, and 16*32×1 output optical chip, each have 16 independent packet / stream address inputs, so they can be packaged in the OSFP-XD optical switching module. Using its gold finger 16x high-speed parallel signal I / O interface, the optical switching module is integrated with FPGA to compile these 16 packet / stream addresses into the route addresses of all optical switch basic units inside the module and control them. All these pluggable standard package optical switching modules and optical transmission modules can be hot-swapped and replaced. More importantly, when an optical module fails and there is no time to replace the hardware temporarily, the routing of the optical switch can be controlled by software, so that the transmitting optical fiber of the optical module always returns to its receiving optical fiber without affecting other ports. Of course, the spare ports and optical modules can also be operated in this way, keeping their links normal at all times. When a failed optical module appears, you can switch to this spare port and optical module to replace the failed route. This is essentially the same as switching to an idle optical module. When there is a failed optical switch unit in the waveguide optical switching matrix, similar operations can also be performed without the need for immediate human intervention.

[0071] Further, refer to Fig. 9 , Fig. 9 This is the fourth structural diagram of the first embodiment of the optoelectronic hybrid switching system of the present application. The optoelectronic hybrid switching system also includes: an optical line switching controller; the optical line switching controller is connected to the waveguide optical switching matrix; the optical line switching controller is used to control the switching of the optical signal data in the waveguide optical switching matrix. In order to meet the different requirements of the current scale-up network with full bandwidth, non-convergence and low latency between computing power chips, and the scale-out network with large-scale east-west interconnection, two technologies, optical burst switching (OBS) with high switching speed and optical line switching (OCS) with low switching speed, are introduced to meet the requirements of these two networks, because the optical switch matrix with low switching speed can introduce thermal optics, micromechanics and other solutions to increase design flexibility and improve cost performance. In particular, a simple optical line switching OCS controller is introduced to replace the high-speed FPGA / ASIC to control the switching of each optical switching basic unit of the relevant part of the optical line switching OCS. Fig. 9All the basic units in the upper half of the 64×64 matrix and the first input level can be optical switch basic units with low switching speed.

[0072] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or system including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or system. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or system including the element.

[0073] The above are only preferred embodiments of the present application, and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A waveguide optical switching matrix, characterized in that: The waveguide optical switching matrix comprises: an input optical chip, an intermediate optical chip and an output optical chip; The input optical chip includes: N / P chip single input, 2M output 1×2M optical switch array (M=2 m ,N=2 n , m, n, and P are all positive integers); The intermediate optical chip includes: a 2MN / P chip P×P optical switch array with P input and P output; The output optical chip includes: N / P chip 2M input, single output 2M×1 optical switch array; All the optical switch arrays of the input optical chip, the intermediate optical chip and the output optical chip have P rows; The input optical chip has a total of N / P*P=N input ports and N / P*P*2M=2MN output ports; The intermediate optical chip has 2MN / P*P=2MN input ports and output ports; The output optical chip has a total of N / P*P=N output ports and N / P*P*2M=2MN input ports; The input optical chip and the intermediate optical chip are interconnected by 2MN optical fibers, and the intermediate optical chip and the output optical chip are interconnected by 2MN optical fibers.

2. The waveguide optical switching matrix according to claim 1, characterized in that: The 2M output ports of each row (P rows in total) of each optical switch array (N / P chips in total) of the input optical chip are respectively interconnected with one input port (each optical switch array of the intermediate optical chip has P input ports) of each optical switch array (2MN / P chips in total) of the intermediate optical chip; All optical switch arrays of the intermediate optical chip (a total of 2MN / P chips) are divided into upper and lower halves (the upper and lower halves have MN / P optical switch arrays, respectively, and each optical switch array has P output ports); All optical switch arrays of the output optical chip are also divided into upper and lower halves (the upper and lower halves have N / 2P optical switch arrays, respectively, each optical switch array has P rows, and each row has 2M input ports); The upper and lower halves of the intermediate optical chip are respectively interconnected with the upper and lower halves of the output optical chip, and are respectively interconnected by MN optical fibers; The 2M output ports of each row (P rows in total) of each optical switch array (N / 2P chips in total) in the upper and lower halves of the output optical chip are respectively interconnected with one port (P ports in total) of each optical switch array (MN / P chips in total) of the intermediate optical chip in the same half.

3. The waveguide optical switching matrix according to claim 2, characterized in that: The waveguide type optical switching matrix is ​​also used for large-scale optical chips required for optical computing.

4. A photoelectric hybrid switching system, characterized in that: The optoelectronic hybrid switching system comprises: an electrical switching chip with OBS control output, a sealed cable module, an optical module, a waveguide optical switching matrix and a field programmable gate array as described in any one of claims 1 to 3; The electrical exchange chip is connected to the sealed cable module; The sealed cable module is connected to the optical module via an optical fiber; The optical module is connected to the waveguide optical switching matrix; The field programmable gate array is connected to the waveguide type optical switching matrix; The electrical exchange chip is used to send data plane electrical signals to the sealed cable module; The optical module is used to receive the data plane electrical signal sent by the electrical switching chip, convert the data plane electrical signal into a data plane optical signal, and input the optical signal into the waveguide type optical switching matrix; The waveguide type optical switching matrix is ​​used to switch the data plane optical signal; The field programmable gate array is used to control the basic units of all waveguide optical switching matrices after decoding the control plane signal output by the electrical switching chip.

5. The optoelectronic hybrid switching system according to claim 4, characterized in that: The sealed cable module further includes: a transmission chip; The transmission chip is used to relay, regenerate and reduce the speed of the electrical signal data received by the sealed cable module.

6. The optoelectronic hybrid switching system according to claim 5, characterized in that: The optoelectronic hybrid switching system further comprises: a semiconductor optical amplifier; The semiconductor optical amplifier is connected to the waveguide type optical switching matrix; The semiconductor optical amplifier is used to amplify optical signal data.

7. The optoelectronic hybrid switching system according to claim 6, characterized in that: The optoelectronic hybrid switching system further includes: an optical line switching controller; The optical line switching controller is connected to the waveguide type optical switching matrix; The optical line switching controller is used to control the switching of the optical signal data in the waveguide type optical switching matrix.

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