A storage device and its control method

By introducing a combination of flash memory chips, instruction scheduling modules, acceleration modules and optimization modules into embedded storage devices, dynamically allocating tasks, solving the problem of multi-core processor overload, achieving efficient and stable utilization of storage resources, and improving the performance of storage devices.

CN120010790BActive Publication Date: 2025-07-29合肥康芯威存储技术有限公司
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Patent Information

Application Number
CN202510473021.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-04-16
Publication Date
2025-07-29
Estimated Expiration
2045-04-16

AI Technical Summary

Technical Problem

In embedded storage products, multi-core processors have a large number of tasks, resulting in a decrease in system efficiency, making it difficult to maximize the call to storage resources, affecting the performance of storage products.

Method used

The combination of flash memory chip, instruction scheduling module, acceleration module and optimization module is adopted to dynamically allocate work tasks based on task information and task process information of the execution unit. The acceleration module is used to execute preset types of work tasks when the processing unit is busy, ensuring reasonable allocation of tasks and resource utilization.

Benefits of technology

It realizes efficient task processing of storage devices, avoids overloading of instruction scheduling modules, ensures priority execution of critical tasks, improves task processing efficiency and system stability, and improves equipment life.

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Abstract

The present invention provides a storage device and a control method therefor. The storage device includes: a flash memory chip; an instruction scheduling module electrically connected to a host and the flash memory chip, the instruction scheduling module including a plurality of processing units, the processing units establishing work tasks according to host instructions and internal maintenance conditions of the storage device, wherein the work tasks are divided into multiple levels according to priorities; at least one acceleration module electrically connected to the instruction scheduling module, when all the processing units are busy, the acceleration module is enabled and allowed to execute work tasks of a preset type; and an optimization module electrically connected to the instruction scheduling module and the acceleration module, the optimization module allocating an execution unit for a work task according to task information of the work task, task progress information of the execution unit, and task types previously executed by the execution unit, wherein the execution unit is a processing unit or the acceleration module. The present invention can maximize the invocation of storage resources and improve the performance of the storage device.
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Description

Technical Field

[0001] The present invention relates to the field of storage technology, and particularly relates to a storage device and a control method thereof. Background Art

[0002] In the application scenario of embedded storage products, the central processing unit (CPU) inside the storage particle is responsible for performing system operations such as arithmetic and logical processing. However, due to the large variety and quantity of tasks, the multi-core processor may still be overloaded, resulting in a decline in system efficiency. And the task management inside the storage product is difficult, so even a multi-core processor is still very difficult to maximize the utilization of storage resources, thereby affecting the performance of the storage product. Summary of the Invention

[0003] An object of the present invention is to provide a storage device and a control method thereof, which can maximize the utilization of storage resources and improve the performance of the storage device.

[0004] To solve the above technical problems, the present invention is realized through the following technical solutions:

[0005] The present invention provides a storage device, including:

[0006] A flash memory chip;

[0007] An instruction scheduling module, electrically connected to the host and the flash memory chip, the instruction scheduling module includes a plurality of processing units, and the processing units establish work tasks according to host instructions and internal maintenance conditions of the storage device, wherein the work tasks are divided into multiple levels according to priorities;

[0008] At least one acceleration module, electrically connected to the instruction scheduling module, when all the processing units are busy, the acceleration module is enabled, and the acceleration module is allowed to execute the work tasks of a preset type; and

[0009] An optimization module, electrically connected to the instruction scheduling module and the acceleration module, the optimization module allocates the execution units of the work tasks according to the task information of the work tasks, the task progress information of the execution units, and the task types previously executed by the execution units, wherein the execution units are the processing units or the acceleration module.

[0010] In an embodiment of the present invention, the optimization module includes:

[0011] A collection unit, electrically connected to the instruction scheduling module, and the task information obtained by the collection unit includes task number, task type, task priority, task status, task parameters, and task results; and

[0012] A supervision unit, electrically connected to the collection unit, and obtains the task progress information of the execution unit, where the task progress information includes monitoring the task progress status, module status, device idle resources, and maximum task bearing information.

[0013] In an embodiment of the present invention, a plurality of preset ratio ranges are stored in the optimization module, where the preset ratio range is the limit value of the number of times the execution unit continuously executes tasks of the same level, or the preset ratio range is the ratio limit value of the number of tasks of adjacent levels.

[0014] In an embodiment of the present invention, the optimization module includes an allocation unit, the allocation unit is electrically connected to the collection unit and the supervision unit, and the allocation unit at least includes:

[0015] A first conditional branch, triggered when the work task is in a waiting state and at least one available execution unit is in a standby state;

[0016] A second conditional branch, triggered when the number of tasks of the level to which the work task belongs executed by the execution unit is within the preset ratio range; and

[0017] A third conditional branch, triggered when the number of tasks of any level is cleared to zero;

[0018] When the task information and the task progress information satisfy the first conditional branch, and satisfy the second conditional branch or the third conditional branch, the allocation unit associates the work task and the execution unit.

[0019] In an embodiment of the present invention, an additional trigger statement is stored in the allocation unit, and the additional trigger statement is enabled when the work task and the execution unit do not trigger the second conditional branch and the third conditional branch, and the allocation priority of the low-priority work task is higher than that of the high-priority work task. When the additional trigger statement is enabled, the execution unit preferentially executes the high-priority work task.

[0020] In an embodiment of the present invention, the optimization module includes a priority adjustment unit, the priority adjustment unit is electrically connected to the instruction scheduling module and the allocation unit. When the additional trigger statement is enabled, the priority adjustment unit corrects the level ratio range until the enabled state of the additional trigger statement ends.

[0021] In an embodiment of the present invention, the optimization module includes a reset unit, the reset unit is electrically connected to the priority adjustment unit. When the off duration of the additional trigger statement reaches a preset duration, the reset unit outputs a reset signal to the priority adjustment unit, and the priority adjustment unit resets the level ratio range to the initial value.

[0022] In one embodiment of the present invention, the storage device includes a cache component, the cache component is electrically connected to the flash memory chip, and the cache component temporarily stores the data of the storage device. When the acceleration module is enabled, the acceleration module is allowed to call the cache component and the flash memory chip.

[0023] In one embodiment of the present invention, the flash memory chip, the instruction scheduling module, the acceleration module, and the optimization module are integrated in the same package, and the instruction scheduling module, the acceleration module, and the optimization module are integrated into the main controller of the storage device.

[0024] The present invention provides a control method for a storage device. Based on the above-mentioned storage device, the method includes the following steps:

[0025] In the powered-on state, initialize the instruction scheduling module, the acceleration module, and the optimization module, wherein the processing unit establishes a work task according to the host instruction and the internal maintenance conditions of the storage device;

[0026] Collect multiple work tasks in the task queue of the instruction scheduling module and distinguish the priorities of the work tasks;

[0027] Monitor the execution unit and the task queue. When all the processing units are busy, enable the acceleration module; and

[0028] Allocate the execution unit of the work task according to the task information of the work task, the task progress information of the execution unit, and the task types previously executed by the execution unit, wherein the execution unit is the processing unit or the acceleration module.

[0029] As described above, the present invention provides a storage device and its control method, which dynamically allocate tasks to the acceleration module or the processing unit, not only avoiding the overload of the instruction scheduling module, but also efficiently processing specific tasks, improving the task processing efficiency. And the present invention monitors the task progress information and task information in real time, which can ensure the reasonable allocation of tasks, avoid resource idleness or overload. At the same time, the present invention can ensure the priority execution of critical tasks while taking into account the processing of medium and low priority tasks. The dynamic task allocation of the present invention is not only efficient, but also has a high fault tolerance rate, high dynamicity, high stability, and optimizes while ensuring the stability of the system itself. It is not only highly flexible, but also conducive to extending the device life.

[0030] Of course, it is not necessary for any product implementing the present invention to achieve all the above-mentioned advantages simultaneously. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] To more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0032] Figure 1 It is a schematic structural diagram of a storage device in an embodiment of the present invention.

[0033] Figure 2 It is a schematic structural diagram of an instruction scheduling module in an embodiment of the present invention.

[0034] Figure 3 It is a schematic structural diagram of an optimization module in an embodiment of the present invention.

[0035] Figure 4 It is a schematic diagram of the task allocation in an embodiment of the present invention.

[0036] Figure 5 It is a schematic structural diagram of an allocation unit in an embodiment of the present invention.

[0037] Figure 6 It is a flowchart of the control method of the storage device in an embodiment of the present invention.

[0038] Figure 7 It is a flowchart of step S40 in an embodiment of the present invention.

[0039] In the figure: A, main controller; B, flash memory chip; W, work task; 100, instruction scheduling module; 200, optimization module; 201, collection unit; 202, supervision unit; 203, allocation unit; 2031, first conditional branch; 2032, second conditional branch; 2033, third conditional branch; 204, execution unit; 205, status generation unit; 206, feedback unit; 207, coordination unit; 208, abort unit; 300, acceleration module; 400, power supply module; 510, buffer module; 520, read buffer; 530, write buffer; 610, data input module; 620, data output module; 630, logic processing module; 710, log output module; 720, first storage module; 730, second storage module. Detailed implementation manners

[0040] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts belong to the scope of protection of the present invention.

[0041] The storage device provided by the present invention is an embedded memory, and specifically may be an eMMC chip (eMMC Embedded Multi Media Card). The storage device includes a main controller A and a flash chip B, and the main controller A and the flash chip B are encapsulated as a whole. In this embodiment, the main controller A includes an instruction scheduling module 100, an optimization module 200, an acceleration module 300, a data transmission component, a read / write component, and an auxiliary component. Among them, the instruction scheduling module 100 includes a plurality of processing units, and the processing unit may be a Reduced Instruction System Computer (RISC), specifically an ARM processor. The acceleration module 300 may be a Hardware Accelerator (HA), and the instruction scheduling module 100 and the acceleration module 300 are electrically connected, and can send data and instructions to the acceleration module 300. Among them, the acceleration module 300 can assist the processor in processing tasks, thereby reducing the load on the processor and enabling the processor to focus on core logic operations and system management. In this embodiment, the optimization module 200 is electrically connected to the instruction scheduling module 100 and the acceleration module 300, and bidirectional data transmission exists between the optimization module 200 and the instruction scheduling module 100, and between the optimization module 200 and the acceleration module 300. The data transmission component is used to process the hardware logic timing and is used for data input and output. The read / write component is used to cache read / write data. The auxiliary component includes a power supply module 400, a log output module 710, and a plurality of storage modules, and the auxiliary component is used to improve the usage effect of the storage device. In this embodiment, the storage device includes a power supply module 400, and the power supply module 400 is electrically connected to and supplies power to each component in the storage device. After power-on, the storage device is initialized.

[0042] Please refer to Figure 1 and Figure 2 As shown, in an embodiment of the present invention, the instruction scheduling module 100 includes a task queue and a plurality of processing units. The plurality of processing units are parallel processors and can work simultaneously when sufficient hardware resources are available. As Figure 2A quad-core processor is shown, which has four processing units. In other embodiments of the present invention, the number of processing units can also be 1, 2, 8, etc. In this embodiment, after the instruction scheduling module 100 is powered on and initialized, the instruction scheduling module 100 establishes a task queue. Whenever the host sends an instruction or the internal storage device reaches the maintenance condition, the instruction scheduling module 100 adds the corresponding task information to the task queue. In this embodiment, the task queue can be a linked list, an array, or a priority queue, and the task information is stored in the task queue in data form. The processing unit can read the task information in the task queue and execute the operations corresponding to the task information.

[0043] Please refer to Figure 1 and Figure 2 As shown, in an embodiment of the present invention, the task information includes a task number, a task type, a task priority, a task status, task parameters, and a task result. Among them, the task number is a unique number. The task type is the operation content corresponding to the task, such as writing data, calculation, etc. The task priority represents the urgency of the task and is determined by the optimization module 200. Different priority marks can be set for tasks according to different priorities. The task status is the current progress of the task, such as waiting, in execution, completed, etc. For completed tasks, the corresponding tasks can be deleted from the task queue. The task parameters are the input data or configuration information required for task execution. The task result is the output data after task execution.

[0044] Please refer to Figure 1As shown, in one embodiment of the present invention, the read / write component includes a buffer module 510, a read buffer 520, and a write buffer 530. The buffer module 510 is electrically connected to the output of the instruction scheduling module 100 and the output of the acceleration module 300, and receives address mapping information of the data. The address mapping information includes the correspondence between the physical address and the logical address of the data. The buffer module 510 is electrically connected to the flash memory chip B and can store the address mapping information in the flash memory chip B. In this embodiment, the buffer module 510 is, for example, a static random access memory (SRAM). The read buffer 520 is electrically connected to the instruction scheduling module 100, the acceleration module 300, and the flash memory chip B. It can receive data read instructions and obtain and temporarily store cache information of the data to be read from the flash memory chip B, such as the address mapping information of the data to be read. The write buffer 530 is electrically connected to the output of the read buffer 520, the instruction scheduling module 100, the acceleration module 300, and the flash memory chip B. The write buffer 530 and the read buffer 520 are both temporary storage areas. The write buffer 530 is used to cache data received from the host and subsequently write the data to the flash memory chip B according to a time sequence. In this embodiment, the data in the write buffer 530 can be written to the flash memory chip B via direct memory access, thereby reducing the burden on the instruction scheduling module 100.

[0045] See also Figure 1 As shown, in one embodiment of the present invention, the data transmission component includes a logic processing module 630, a data input module 610 and a data output module 620. The data input module 610 is electrically connected to the instruction scheduling module 100, the acceleration module 300 and the logic processing module 630. The logic processing module 630 is electrically connected to the instruction scheduling module 100, the optimization module 200 and the host, and the logic processing module 630 can parse and execute the eMMC JEDEC protocol to ensure communication and data transmission between the host and the storage device. In this embodiment, the data input module 610 is used to store data input from the host to the storage device. Specifically, when the host initiates a write request, the data is first parsed by the logic processing module 630, then transmitted to the data input module 610 for temporary storage, and then written into the flash memory chip B according to the priority sequence of the task when the processing unit or the acceleration module 300 is free according to the control method of the storage device provided by the present invention. In this embodiment, the data output module 620 is connected to the instruction scheduling module 100, the acceleration module 300, the logic processing module 630, and the data input module 610, and is used to store data output from the storage device to the host. Specifically, when the host initiates a read request, the storage device reads the data from the flash memory chip B to the data output module 620, and then transmits the data to the host via the logic processing module 630.

[0046] Please refer to Figure 1 As shown, in an embodiment of the present invention, the auxiliary component includes a log output module 710, a first storage module 720, and a second storage module 730. In this embodiment, the log output module 710 is electrically connected to the instruction scheduling module 100 and is used to store and output the working log of the storage device. In this embodiment, the first storage module 720 is electrically connected to the instruction scheduling module 100 and the acceleration module 300 and is used to store the storage firmware. The storage firmware may be a pre-recorded running program. In the present invention, the control method of the storage device provided by the present invention is also stored in the first storage module 720 in the form of firmware. After power-on, the storage device is initialized, and the storage firmware can be read out from the first storage module 720 and run. In this embodiment, the first storage module 720 is a read-only memory (ROM). In this embodiment, the second storage module 730 is electrically connected to the instruction scheduling module 100 and the acceleration module 300 and is used to provide a storage space for program running and can be used to store variables. In the present invention, according to different set working modes, the first storage module 720 and the second storage module 730 can be set to be only callable by the instruction scheduling module 100, or can be set to be callable by both the instruction scheduling module 100 and the acceleration module 300.

[0047] Please refer to Figure 1 and Figure 3 As shown, in an embodiment of the present invention, the optimization module 200 is electrically connected to the instruction scheduling module 100. The optimization module 200 can receive information from the instruction scheduling module 100 and can also send information to the instruction scheduling module 100. In this embodiment, the optimization module 200 includes a collection unit 201, a supervision unit 202, an execution unit 204, an allocation unit 203, a feedback unit 206, a coordination unit 207, an abort unit 208, and a status generation unit 205. Among them, the collection unit 201 is electrically connected to the instruction scheduling module 100 and the acceleration module 300 and can read out the task queue from the instruction scheduling module 100 and obtain task information. Specifically, the collection unit 201 obtains the type, quantity, and task priority of the task. In this embodiment, the data collected by the collection unit 201 is temporarily stored in the buffer module 510 or the second storage module 730.

[0048] Please refer to Figure 1 and Figure 3As shown in the figure, in an embodiment of the present invention, the supervision unit 202 is electrically connected to the collection unit 201, and obtains the task process information of the instruction scheduling module 100 and the acceleration module 300. Specifically, the task process information includes monitoring the task process status, module status, device idle resources, and maximum task load information. Among them, the task process status is the current status of the tasks in the task queue, and the current status of the task can specifically be a waiting status, an execution status, or a completion status. The module status is the real-time status of the instruction scheduling module 100 and the acceleration module 300, and the real-time status can specifically be a busy status, an idle status, and a ready status. Among them, being in preparation means that the task has been received and is ready to start execution, or is already ready to immediately receive tasks. Being in operation means that the operations corresponding to the tasks are already being executed. The idle status means that the tasks have been completed and no new tasks have been received. The device idle resources are the number of processing units and acceleration modules 300 that are in the idle state at this time, to determine whether the system has sufficient resources to execute new tasks. The maximum task load information is the maximum number of tasks that each processing unit and acceleration module 300 can take over and execute, to ensure that the task allocation does not exceed the module processing capacity.

[0049] It should be noted that in an embodiment of the present invention, there is 1 acceleration module 300, as Figure 1 shown in an acceleration module 300. In other embodiments of the present invention, the number of acceleration modules 300 can be multiple, and each acceleration module 300 has a corresponding number to distinguish different acceleration modules 300. And the work contents of the multiple acceleration modules 300 can be different. For example, in one embodiment, 4 acceleration modules 300 are set, and are respectively numbered HW_1, HW_2, HW_3, and HW_4. Among them, the acceleration module 300 HW_1 can be used for data filling. Data filling refers to, in order to ensure the stable data storage in the storage area, when the data has not filled a storage unit, filling the unfilled storage page with supplementary data to fill the storage unit. Among them, the storage unit is, for example, a storage page (page). The acceleration module 300 HW_2 can be used for data searching. The acceleration module 300 HW_3 can be used for data transfer. The acceleration module 300 HW_4 can be used for completing complex calculation tasks. Another example is that in another embodiment, 4 acceleration modules 300 are set, and are respectively numbered HW_1, HW_2, HW_3, and HW_4. The work contents of each acceleration module 300 are not limited. Each acceleration module 300 can be used to implement data filling, data transfer, data searching, and complex calculations. However, each time a task is executed, the acceleration module 300 only executes one type of work task W. For example, when performing data searching, the current acceleration module 300 no longer receives other types of tasks. And when the task ends, the acceleration module 300 resumes to the state where it can receive various types of tasks.

[0050] Please refer to Figure 1 , Figure 3 and Figure 4 As shown, in an embodiment of the present invention, the allocation unit 203 is electrically connected to the output end of the acquisition unit and the output end of the execution unit 204, and is used to allocate the task with the corresponding number to the execution unit 204 according to the task process information and task information. Wherein the execution unit 204 is a processing unit or an acceleration module 300. In this embodiment, the work task W is divided into first-level tasks, second-level tasks, and third-level tasks. Among them, the priority of the first-level tasks is higher than that of the second-level tasks, and the priority of the second-level tasks is higher than that of the third-level tasks. As Figure 4 shown, H represents the first-level task, M represents the second-level task, and L represents the third-level task. There are, for example, 3 priorities in this embodiment. In other embodiments of the present invention, the number of priorities can also be adjusted to achieve more refined management or faster management.

[0051] Please refer to Figures 1 to 4 As shown, in an embodiment of the present invention, the task types in the storage device can be preset, specifically set according to the functions of the storage device. For example, for the basic functions of the storage device, the task types may include data read / write tasks, data management tasks, error handling tasks, system management tasks, performance optimization tasks, security-related tasks, monitoring and logging tasks, and testing and diagnostic tasks. According to the different firmware contents set in different storage devices, the types of the work task W may also include, for example, temperature management tasks and user demand tasks, etc. In this embodiment, the task types of the storage device also include hardware acceleration tasks. Among them, the hardware acceleration task is a task type that can be executed by the acceleration module 300. The task types of the hardware acceleration tasks can be set by the designers themselves.

[0052] Please refer to Figures 1 to 4As shown, in an embodiment of the present invention, priorities of different tasks are set according to the task type. When the instruction scheduling module 100 establishes a task queue, the priority of the work task W type is directly marked according to the task type. For example, data read / write tasks, error handling tasks, security-related tasks, and hardware acceleration tasks are set to the first priority, that is, set to the first-level tasks. Data management tasks, performance optimization tasks, and system management tasks are set to the second priority, that is, set to the second-level tasks. Monitoring and logging tasks and testing and diagnostic tasks are set to the third priority, that is, set to the third-level tasks. More specifically, priorities can be set according to the specific tasks corresponding to each task type. For example, in data read / write tasks, there can be read tasks, write tasks, and data caching tasks. The read tasks and write tasks can be set as the first-level tasks, and the data caching tasks can be set as the second-level tasks. In data management tasks, there can be garbage collection tasks, and the garbage collection tasks can be decomposed into data migration tasks, data erasure tasks, data analysis tasks, etc. Then, the data migration tasks can be set as the first-level tasks, the data analysis tasks can be set as the third-level tasks, and the data erasure tasks can be set as the second-level tasks, etc.

[0053] Please refer to Figures 1 to 4As shown, in an embodiment of the present invention, the allocation unit 203 stores multiple preset ratio ranges, and the preset ratio range represents the ratio of the number of work tasks W of adjacent levels executed by the execution unit 204. For example, the first preset ratio range is set to 4:2 to 6:2, indicating that the ratio of the number of first-level tasks to second-level tasks is greater than or equal to 4:2 and less than or equal to 6:2. For example, the second preset ratio range is set to 4:2 to 6:2, indicating that the ratio of the number of second-level tasks to third-level tasks is greater than or equal to 4:2 and less than or equal to 6:2. In this embodiment, in the step of the allocation unit 203 allocating the work task W, the preset ratio range can be used as an auxiliary limiting condition in the conditional branch. In another embodiment of the present invention, the preset ratio range can also be expressed as the upper limit of the number ratio of the execution unit 204 continuously executing tasks of the same level. For example, the first preset ratio range is set to 0 to 50%, indicating that the number of first-level tasks that the execution unit 204 can continuously execute is less than or equal to 50% of the total number of currently executed tasks. For another example, the first preset ratio range is set to 40% to 50%, indicating that the number of first-level tasks that the execution unit 204 continuously executes is less than or equal to 50% of the total number of currently executed tasks and greater than or equal to 40% of the total number of currently executed tasks. For example, the limit value of the second-level ratio is set to 0 to 25%, indicating that the number of second-level tasks that the execution unit 204 continuously executes is less than or equal to 25% of the total number of currently executed tasks. For another example, the limit value of the second-level ratio is set to 20% to 25%, indicating that the number of second-level tasks that the execution unit 204 continuously executes is less than or equal to 25% of the total number of currently executed tasks and greater than or equal to 20% of the total number of currently executed tasks. For example, the limit value of the third-level ratio is set to 0 to 15%, indicating that the number of third-level tasks that the execution unit 204 continuously executes is less than or equal to 15% of the total number of currently executed tasks. For another example, the limit value of the third-level ratio is set to 10% to 15%, indicating that the number of third-level tasks that the execution unit 204 continuously executes is less than or equal to 15% of the total number of currently executed tasks and greater than or equal to 10% of the total number of currently executed tasks. To balance the utilization of each processing unit and the acceleration module 300 as much as possible, in the present invention, range limits are set to balance the utilization rate of the storage device for each execution unit 204.

[0054] Please refer to Figure 1 and Figure 4As shown, it should be noted that during the system power-on phase, the data values obtained according to the preset ratio range may not be integers, and in this case, the obtained data is rounded. For example, if the total number of tasks is 5, the number of consecutive executions of the first-level tasks can be 3, the number of consecutive executions of the second-level tasks can be 1, and the number of consecutive executions of the third-level tasks can be 1. It should also be noted that the task types inside the storage device are not completely predictable, and in this case, although the requirements of the preset ratio range cannot be met, there may be no executable task types inside the storage device. In an embodiment of the present invention, the execution unit 204 can enter the idle state or the ready state, and hand over the corresponding tasks to the eligible execution unit 204 for execution. In another embodiment of the present invention, in the case where all conditions are not met, and when the second-level tasks need to be executed before all the first-level tasks are completed, additional trigger conditions can also be set. When the requirements of the preset ratio range are not met, the preset ratio range is temporarily corrected to ensure that the execution unit 204 executes the first-level tasks prior to the second-level tasks. Similarly, the second-level tasks are prior to the third-level tasks for execution, and so on. That is, in this embodiment, the tasks with higher priorities are executed first as the most preferred allocation strategy. And multiple conditional branches are the second preferred allocation strategy. The additional trigger conditions are the third preferred allocation strategy.

[0055] Please refer to Figure 1 and Figure 4 As shown, it should be noted that the task priorities set in this embodiment can be entered into the firmware internally during the factory stage. When the user uses the storage device or during the test stage, the task priorities are determined according to the settings at the time of entry. In another embodiment of the present invention, a priority adjustment unit can be set in the optimization module 200, and the priority adjustment unit is electrically connected to the collection unit 201. When a specific task required by the user appears in the storage device or there is task content not agreed upon in the firmware, the task priority of the newly emerged work task W is set through the priority adjustment unit. In this embodiment, when the system meets the additional trigger conditions, the priority adjustment unit can also be enabled, and the level ratio range is adjusted. In an embodiment of the present invention, a reset unit can also be set. When the system does not meet the additional trigger conditions for a preset duration, a reset signal is sent to let the priority adjustment unit reset the level ratio range to the initial value.

[0056] Please refer to Figure 1 、 Figure 4 and Figure 5 As shown, in the present invention, the allocation unit 203 can be enabled when all the processing units are in the busy state and closed when the idle duration of the processing unit reaches the preset duration. The allocation unit 203 can also be closed when the number of first-level tasks is less than the number of processing units. The allocation unit 203 can also be closed when the total number of tasks / task increment is less than or equal to the threshold.

[0057] Please refer to Figures 1 to 5 As shown, in an embodiment of the present invention, the distribution unit 203 includes a plurality of conditional branches. For example, the distribution unit 203 includes a first conditional branch 2031, a second conditional branch 2032, and a third conditional branch 2033. In this embodiment, the first conditional branch 2031 is that the work task W is in a waiting state and at least one available execution unit 204 is in a standby state. The available execution unit 204 refers to an execution unit 204 that can process the corresponding work task W. In this embodiment, the processing unit is the available execution unit 204 for all work tasks W. The acceleration module 300 is the available execution unit 204 for work tasks W of a preset type. The standby state includes the idle state and the ready state of the execution unit 204. When the first conditional branch 2031 is triggered, continue to determine whether the second branch condition or the third branch condition is triggered. In this embodiment, the second branch condition is that the execution quantity of the tasks at the level to which the work task W belongs by the execution unit 204 is less than or equal to the corresponding preset ratio range. If the second branch condition is not satisfied, determine whether the third branch condition is satisfied. In this embodiment, the third branch condition is that the task quantity at any level is cleared. When the first conditional branch 2031 is satisfied and the second conditional branch 2032 or the third conditional branch 2033 is satisfied, the distribution unit 203 distributes the work task W that meets the conditions to the execution unit 204 that meets the conditions. In this embodiment, the distribution unit 203 can send the distribution information to the execution unit 204 in the form of sending a trigger signal or sending a matching linked list.

[0058] Please refer to Figures 1 to 4 As shown, in an embodiment of the present invention, the execution unit 204 is electrically connected to the output end of the supervision unit 202 and the output end of the distribution unit 203. When the task and resources are both ready, the execution unit 204 triggers the execution of the corresponding work task W according to the distribution information sent by the distribution unit 203. Specifically, the work task W in the distribution information is sent to the corresponding execution unit 204, and an execution signal is triggered. After receiving the execution signal and the work task W, the execution unit 204 starts to execute the corresponding work task W. In the present invention, as long as the task is in the execution state, even if it is a new high-priority task later, the currently executing low-priority task is preferentially executed, so as to ensure that the task can clearly obtain the task result. And the distribution system provided by the present invention can still ensure that high-priority tasks can be completed as soon as possible. Therefore, the present invention not only has high task execution efficiency, but also can improve the stability and accuracy of the system for processing tasks.

[0059] Please refer to Figure 1 and Figure 3As shown, in an embodiment of the present invention, the status generation unit 205 is electrically connected to the output end of the supervision unit 202 and the output end of the execution unit 204, and is used to modify the status of each task. Specifically, for the work task W that has been assigned to the execution unit 204, the task status can be updated from the waiting status to the execution status. In addition, for the previous task executed on the execution unit 204, the task status can be modified to the completed status. The instruction scheduling module 100 can clear the work task W with the completed status from the task queue according to the firmware settings of the storage device.

[0060] Please refer to Figure 1 and Figure 3 As shown, in the present invention, the feedback unit 206 is electrically connected to the output end of the execution unit 204 and the input end of the coordination unit 207. In this embodiment, the feedback unit 206 is used to feedback the status information of task execution to the coordination unit 207 through hardware interruption or software processing. In this embodiment, when the task is completed or an exception occurs, the execution unit 204 will trigger an interruption, and the feedback module generates feedback information and sends the feedback information to the coordination unit 207. In this embodiment, the feedback information includes the task number and the task status. The coordination unit 207 updates the task status and sends the updated task status to the allocation unit 203, so that the allocation unit 203 can dynamically and accurately complete the allocation of the work task W according to the latest information. In another embodiment of the present invention, the feedback unit 206 obtains the task execution status from the execution unit 204 in a polling or event-driven manner and sends the feedback information to the coordination unit 207.

[0061] Please refer to Figure 1 and Figure 6 As shown, the present invention provides a control method for a storage device, and the method includes steps S10 to S40.

[0062] Step S10: In the powered-on state, initialize the instruction scheduling module 100, the acceleration module 300, and the optimization module 200, wherein the processing unit establishes a work task W according to the host instruction and the internal maintenance conditions of the storage device.

[0063] Step S20: Collect multiple work tasks W in the task queue of the instruction scheduling module 100 and distinguish the priorities of the work tasks W.

[0064] Step S30: Monitor the execution unit 204 and the task queue. When all processing units are busy, enable the acceleration module 300.

[0065] Step S40: Allocate the execution unit 204 for the work task W according to the task information of the work task W, the task progress information of the execution unit 204, and the types of tasks previously executed by the execution unit 204, where the execution unit 204 is a processing unit or an acceleration module 300.

[0066] Please refer to Figure 1 and Figure 6 As shown in and, in an embodiment of the present invention, the power supply module 400 supplies power to the storage device, and the storage device starts to work and executes step S10. In step S10, the initialization steps include hardware initialization, firmware loading steps, resource configuration, and task configuration, etc. After power-on, multiple processing units and storage resources of the instruction scheduling module 100 are detected and configured. The storage resources include a flash chip B, a first storage module 720, a second storage module 730, a buffer module 510, a read buffer 520, and a write buffer 530. In this embodiment, in step S10, the basic parameters of the main controller A are set, such as the working mode, clock frequency, data transfer protocol, etc. In step S10, after power-on, the physical state of the flash chip B is detected, and the working parameters of the flash chip B are initialized, such as page size, block size, number of erasure and write cycles, etc. In this embodiment, in the firmware loading step, the instruction scheduling module 100 reads the stored firmware from the first storage module 720 and runs the stored firmware, thereby implementing various control methods of the storage device to realize various functions of the storage device. In this embodiment, the control method of the storage device provided by the present invention is a part of the stored firmware and is stored in the first storage module 720. Among them, in the initialization step, the functions corresponding to the stored firmware are configured, such as error correction (ECC), bad block management, read and write caching, etc. The data input channel and data output channel of the storage device are initialized. In an embodiment of the present invention, in step S10, a task queue is established in the instruction scheduling module 100, and multiple work tasks W can be stored in the task queue.

[0067] Please refer to Figure 1 and Figure 6As shown, in an embodiment of the present invention, in step S10, after power-on, necessary hardware resources, such as storage resources, are allocated to the acceleration module 300 to ensure that the acceleration module 300 can operate normally after power-on. In step S10, the buffer module 510, the read buffer 520, and the write buffer 530 are configured in a mode accessible to both the acceleration module 300 and the instruction scheduling module 100 to support collaborative work. In the step of initializing the buffer module 510, the access rights of the mapping table are configured, and the mapping table in the stored information is set in a mode accessible to both the acceleration module 300 and the instruction scheduling module 100 to support efficient task allocation. In the step of initializing the data transmission component, the data input channel and the data output channel are set in a mode accessible to both the acceleration module 300 and the instruction scheduling module 100 to support collaborative data processing. The access rights of the flash chip B are configured, and the flash chip B is set in a mode accessible to both the acceleration module 300 and the instruction scheduling module 100 to support efficient task processing.

[0068] Please refer to Figure 1 and Figure 6 As shown, in an embodiment of the present invention, in step S10, after power-on, the working mode of the acceleration module 300 is configured. The acceleration module 300 can execute one or more types of preset tasks, so as to share the pressure for the processing unit before the processing unit is overloaded and avoid system overload. Regarding the working mode of the acceleration module 300, for example, the acceleration module 300 can quickly fill data of any type and any range, which is suitable for scenarios that require a large amount of data writing. For example, the acceleration module 300 can be used to query and statistics by arbitrarily setting a specified string or different digital graphics, so as to efficiently search data, which is suitable for data retrieval tasks. For example, the acceleration module 300 can be used to move data from various specified cache locations, which is suitable for data migration or replication tasks. For example, the acceleration module 300 can be used for computing tasks, including arithmetic addition, subtraction, multiplication, division, logical operations AND, OR, NOT, and combinational logic operations, which is suitable for scenarios that require high-performance computing. The acceleration module 300 can process one or more of these tasks. The acceleration module 300 can dynamically select the best working mode according to the task requirements and efficiently process specific tasks, thereby improving the overall performance of the system.

[0069] Please refer to Figure 1 and Figure 6As shown, in an embodiment of the present invention, in step S10, whenever the instruction scheduling module 100 receives a host instruction or meets the task generation condition of the stored firmware design, a new task is created in the task queue. In step S20, according to the preset task type, the priority of the work task W is distinguished. The optimization module 200 regularly checks the work task W in the task queue and classifies the work task W according to the priority of the work task W, so as to mark the new task as a first-level task, a second-level task, or a third-level task. In other embodiments of the present invention, more or fewer priorities can also be set.

[0070] Please refer to Figure 1 and Figure 6 As shown, in an embodiment of the present invention, in step S30, the supervision unit 202 obtains task process information and task information. When all processing units are busy, the acceleration module 300 is enabled, and task allocation is implemented according to the allocation unit 203 and the allocation method provided by the present invention.

[0071] Please refer to Figure 1 and Figure 4 、 Figure 6 and Figure 7 As shown, in an embodiment of the present invention, in step S40, the corresponding execution unit 204 is allocated to the work task W in the task queue. Wherein step S40 includes steps S41 to S48.

[0072] Step S41: Obtain the work task W in the task queue in sequence according to the task priority and the task creation time.

[0073] Step S42: Determine whether the work task W and the execution unit 204 meet the first conditional branch 2031. If they do not meet the first conditional branch 2031, return to step S41.

[0074] Step S43: If the work task W and the execution unit 204 meet the first conditional branch 2031, continue to determine whether the work task W and the execution unit 204 meet the second conditional branch 2032. If they meet the second conditional branch 2032, jump to step S47.

[0075] Step S44: When the work task W and the execution unit 204 do not meet the second conditional branch 2032, determine whether the work task W and the execution unit 204 meet the third conditional branch 2033. If they meet the third conditional branch 2033, jump to step S47.

[0076] Step S45: If the work task W and the execution unit 204 do not meet the third conditional branch 2033, determine whether the system meets the additional trigger condition at this moment.

[0077] Step S46: If the additional trigger condition is met, temporarily correct the level ratio range, and execute Step S47.

[0078] Step S47: Allocate the work task W to the corresponding execution unit 204, and trigger an execution signal.

[0079] Step S48: Monitor and update the task status, and return to Step S41 until the allocation unit 203 is closed.

[0080] Please refer to Figure 1 、 Figures 4 to 7 As shown in [relevant figure(s)], in an embodiment of the present invention, in combination with multiple conditional branches, when there are multiple work tasks W in the task queue that need to be allocated. In Step S41, the work tasks W are obtained in the order from the highest to the lowest task priority, and for the same priority, in the order from the earliest to the latest task creation time. When the allocation unit 203 is enabled, the collection unit 201 continuously collects the task queue, the feedback unit 206 and the coordination unit 207 continuously update the task information, and the allocation unit 203 continuously loops through the task information of the work tasks W and the task progress information of the execution unit 204 until the allocation unit 203 is closed. In Step S42, when the work task W is in the ready state, continue to make a judgment. When the work task W is in the execution state or the completed state, skip the current work task W and sequentially continue to obtain the next work task W. And at this time, if the work task W is in the ready state, but there is no available execution unit 204 at this time, return to Step S41 and continue to obtain the task information of the next work task W. For this situation, it may be that the processing unit is fully occupied, and there is a vacancy in the acceleration module 300, but the work task W itself does not belong to the task type that the acceleration module 300 can process, so continue to obtain the task information of the next work task W.

[0081] Please refer to Figure 1 、 Figures 4 to 7As shown, in an embodiment of the present invention, in steps S43 and S44, steps S43 and S44 can be executed simultaneously or in sequence. In this embodiment, the execution in sequence is shown. If either the second conditional branch 2032 or the third conditional branch 2033 is satisfied, steps S45 and S46 can be skipped and step S47 can be directly executed. In step S45, when neither the second conditional branch 2032 nor the third conditional branch 2033 is satisfied, if the additional trigger condition is satisfied at this time, specifically, when the enabling condition of the additional trigger statement is reached, the corresponding task can also be executed. The additional trigger statement is a program statement and is enabled when the work task W and the execution unit 204 do not trigger the second conditional branch 2032 and the third conditional branch 2033, and the allocation priority of the low-priority work task W is higher than that of the high-priority work task W. During the allocation process, if the next work task W meets the allocation conditional branch, and the priority of the next work task W is lower than that of the previous work task W, or within the preset quantity, for the work tasks W established in the same batch, if a low-priority task is allocated before a high-priority task, the additional trigger statement is enabled. The tasks established in the same batch are bounded by the collection period of the collection unit 201, and specifically can be represented by all the task contents in the task queue within the current allocation period. If within the preset quantity, for example, among 4 work tasks W, no additional trigger condition is met, and the low-priority task is allocated first until the fifth one, the additional trigger statement may not be enabled. Each execution unit 204 can be divided into multiple rounds according to the number of tasks it executes. For example, the first task executed is the first-round task, the second task is the second-round task, and so on. As Figure 4 shown, for the processing unit numbered C3, if four first-level tasks are continuously executed at this time, then when allocating the fifth-round task, under the condition of meeting the allocation strategy, the low-level task, that is, the second-level task numbered M9, is preferentially allocated to C3 for execution.

[0082] Please refer to Figure 1 、 Figures 4 to 7 shown, in an embodiment of the present invention, in step S46, when the additional trigger statement is enabled, the priority adjustment unit corrects the level ratio range until the enabling state of the additional trigger statement ends. The correction of the level ratio range can be multiple and continuous, for example, 1% each time, until the enabling condition of the additional trigger statement is no longer met, then the correction stops. When the closing duration of the additional trigger statement reaches the preset duration, the level ratio range can be reset by the reset unit, that is, restored to the preset initial value.

[0083] The embodiments of the present invention disclosed above are only used to help illustrate the present invention. The embodiments do not describe all the details in detail, nor do they limit the invention to the specific embodiments described. Obviously, many modifications and variations can be made according to the content of this specification. These embodiments are selected and specifically described in this specification to better explain the principles and practical applications of the present invention, so that those skilled in the art can well understand and utilize the present invention. The present invention is only limited by the claims and their full scope and equivalents.

Claims

1. A storage device, characterized in that, Comprising: A flash memory chip; An instruction scheduling module, electrically connected to a host and the flash memory chip, the instruction scheduling module including a plurality of processing units, the processing units establishing work tasks according to host instructions and internal maintenance conditions of the storage device, wherein the work tasks are divided into multiple levels according to priorities; At least one acceleration module, electrically connected to the instruction scheduling module, when all the processing units are busy, the acceleration module is enabled, and the acceleration module is allowed to execute the work tasks of a preset type; And An optimization module, electrically connected to the instruction scheduling module and the acceleration module, the optimization module allocating an execution unit of the work task according to task information of the work task, task progress information of the execution unit, and task types previously executed by the execution unit, wherein the execution unit is the processing unit or the acceleration module.

2. The storage device according to claim 1, characterized in that, The optimization module includes: A collection unit, electrically connected to the instruction scheduling module, and the task information obtained by the collection unit includes a task number, a task type, a task priority, a task status, task parameters, and a task result; and A supervision unit, electrically connected to the collection unit, and obtaining the task progress information of the execution unit, wherein the task progress information includes a monitoring task progress status, a module status, device idle resources, and maximum task bearing information.

3. The storage device according to claim 2, wherein A plurality of preset ratio ranges are stored in the optimization module, the preset ratio range being a limit value of the number of tasks of the same level continuously executed by the execution unit, or the preset ratio range being a ratio limit value of the number of tasks of adjacent levels.

4. A storage device according to claim 3, characterized in that, The optimization module includes an allocation unit, the allocation unit being electrically connected to the collection unit and the supervision unit, the allocation unit at least including: A first conditional branch, triggered when the work task is in a waiting state and at least one available execution unit is in a standby state; A second conditional branch, triggered when the number of tasks of the level to which the work task belongs executed by the execution unit is within the preset ratio range; and A third conditional branch, triggered when the number of tasks of any level is cleared; When the task information and the task progress information meet the first conditional branch and meet the second conditional branch or the third conditional branch, the allocation unit associates the work task and the execution unit.

5. A storage device according to claim 4, characterized in that, An additional trigger statement is stored in the allocation unit, the additional trigger statement being enabled when the work task and the execution unit do not trigger the second conditional branch and the third conditional branch, and the allocation priority of the low-priority work task is higher than that of the high-priority work task. When the additional trigger statement is enabled, the execution unit preferentially executes the high-priority work task.

6. The storage device according to claim 5, characterized in that, The optimization module includes a priority adjustment unit, the priority adjustment unit being electrically connected to the instruction scheduling module and the allocation unit. When the additional trigger statement is enabled, the priority adjustment unit corrects the preset ratio range until the enabled state of the additional trigger statement ends.

7. A storage device according to claim 6, characterized in that, The optimization module includes a reset unit, the reset unit is electrically connected to the priority adjustment unit, when the closing duration of the additional trigger statement reaches a preset duration, the reset unit outputs a reset signal to the priority adjustment unit, and the priority adjustment unit resets the preset ratio range to an initial value.

8. A storage device according to claim 1, wherein, The storage device includes a cache component, the cache component is electrically connected to the flash chip, and the data of the storage device is temporarily stored in the cache component. When the acceleration module is enabled, the acceleration module is allowed to call the cache component and the flash chip.

9. A storage device according to claim 1, characterized in that, The flash chip, the instruction scheduling module, the acceleration module, and the optimization module are integrated in the same package, and the instruction scheduling module, the acceleration module, and the optimization module are integrated into the main controller of the storage device.

10. A control method for a storage device, based on a storage device as described in claim 1, characterized in that, The method includes the following steps: In the powered-on state, initialize the instruction scheduling module, the acceleration module, and the optimization module, wherein the processing unit establishes a work task according to the host instruction and the internal maintenance conditions of the storage device; Collect a plurality of the work tasks in the task queue of the instruction scheduling module and distinguish the priorities of the work tasks; Monitor the execution unit and the task queue, and enable the acceleration module when all the processing units are busy; And Allocate the execution unit of the work task according to the task information of the work task, the task progress information of the execution unit, and the task types previously executed by the execution unit, wherein the execution unit is the processing unit or the acceleration module.

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