Method for punching through hole, computer equipment, program product and storage medium

Abstract

The invention provides a method for punching a through hole, computer equipment, a program product and a storage medium. The method comprises the following steps: acquiring layout mode information of a metal wire level in a power ground network of an integrated circuit; sequentially determining at least one first physical area which is crossed with each other between every two adjacent metal wire layers which need to realize the through hole layers, and punching first through holes in the first physical areas; recording through hole information of the first through hole, and establishing a mapping relation between the through hole hierarchy and the through hole information; according to the layout mode information, sequentially calculating all second physical areas between adjacent metal wire layers needing to realize through hole layers; according to the absolute position of the second physical area and the mapping relation, the through hole types and absolute coordinate information of all the through holes needing to be punched are determined and recorded in a preset file, so that direct reading is facilitated, and through hole punching operation is carried out. According to the scheme, the through hole realization problem between the power supply and the ground metal wire can be solved with extremely short operation time and relatively low server resource requirements.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a method for drilling a through hole, a computer device, a program product and a storage medium. Background Art

[0002] In digital integrated circuits, in order to power functional devices, the power needs to be passed down from the top metal wire layer by layer in a perpendicular direction to the bottom metal wire, and each two layers are connected by vias at a certain interval. With the continuous development of digital integrated circuits, the functions of the entire chip are becoming more and more complex, the area is getting larger and larger, and the probability of a single module being cut into a large area is also increasing. Therefore, more and more power and ground metal wires are needed, and the number of vias in a single module to achieve the connection between the power and ground metal wires must increase.

[0003] The existing solution for drilling through holes usually follows normal EDA commands, and the metal lines of the power and ground of the entire module are drilled layer by layer to drill through holes between the metal lines of adjacent metal layers that cross each other. The EDA automatic tool will automatically divide the area of ​​the entire module into multiple blocks, and use multi-threading to process multiple blocks in parallel to speed up the speed of drilling through holes. However, due to the large number of power and ground metal lines, there are also many through holes that need to be drilled. On the basis of the large memory required, parallel processing of multiple areas will result in the need to check the constraints of physical rules in multiple places in parallel, which requires more memory and easily causes the computer to crash; and a large number of adjacent metal layers that cross each other need to check physical rules to realize the action of drilling through holes, which requires a lot of running time, affecting the overall efficiency. Therefore, there is an urgent need for a solution that uses less computer resources and running time to solve the problem of physical implementation of through holes between power and ground metal lines in large-area, high-performance modules under advanced processes. Summary of the invention

[0004] The purpose of the present invention is to provide a method for drilling through holes, a computer device, a program product and a storage medium, which can solve the problem of realizing through holes between power and ground metal lines of large-area, high-frequency modules under advanced processes with extremely short running time and lower server resource requirements.

[0005] The technical solution provided by the present invention is as follows: In a first aspect, the present application provides a method for drilling a through hole, which is applied to EDA design of an integrated circuit, comprising the steps of: Acquire layout pattern information of metal line levels in a power ground network of an integrated circuit, wherein the layout pattern information includes the width of the metal line and the spacing between adjacent metal lines of the same type; Determine at least one mutually intersecting first physical region between each adjacent metal line level that needs to realize a through-hole level, and automatically punch a first through-hole in the first physical region through an EDA tool; Recording the through-hole information of the first through-hole, and establishing a mapping relationship between the through-hole hierarchy and the through-hole information, wherein the through-hole information includes the through-hole type of the first through-hole and the offset information of the first through-hole in the first physical area; Calculate all second physical areas between each adjacent metal line level that needs to implement the through-hole level in sequence according to the layout mode information; Determine the through hole types and absolute coordinate information of all through holes that need to be punched according to the absolute position of the second physical area and the mapping relationship, and record them in a preset file; During the EDA design process of the integrated circuit, the preset file is directly read, and the through-hole drilling operation is automatically performed through the EDA tool according to the through-hole types and absolute coordinate information of all through-holes that need to be drilled recorded in the preset file.

[0006] In some implementations, when there is only one type of layout pattern information of the metal line level in the power ground network of the integrated circuit, a mutually intersecting first physical area is determined in turn for each adjacent metal line level that needs to implement a through-hole level, and a mapping relationship is established.

[0007] In some implementations, when the layout pattern information of the metal line level in the power ground network of the integrated circuit includes multiple types, a first through hole is punched in turn for each type of mutually intersecting first physical area corresponding to the layout pattern information, and the corresponding mapping relationships are established respectively.

[0008] In some implementations, when the layout pattern information of the metal line level in the power ground network of the integrated circuit includes multiple types, all the second physical areas between each adjacent metal line level required to implement the via level are calculated by AND.

[0009] In some embodiments, the offset information includes an offset of the first through hole in a horizontal direction and an offset in a vertical direction relative to a reference point in the first physical region.

[0010] In some implementations, the layout of the metal line levels in the power ground network of the integrated circuit is a regular layout, and the width of the metal line and the interval between adjacent metal lines of the same type are both fixed values.

[0011] In some implementations, the preset file is a DEF file.

[0012] In a second aspect, the present application provides a computer device, including a memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the steps of the method for drilling a through hole described in the first aspect.

[0013] In a third aspect, the present application provides a computer storage medium having a computer program or instructions stored thereon, wherein the computer program or instructions, when executed by a processor, implements the steps of the method for drilling a through hole described in the first aspect.

[0014] In a fourth aspect, the present application provides a computer program product, including a computer program or instructions, which, when executed by a processor, implement the steps of the method for drilling a through hole described in the first aspect.

[0015] A method for drilling a through hole, a computer device, a program product and a storage medium provided by the present invention can realize the operation of drilling a through hole between power and ground metal lines in the power network of a large-area, high-frequency module under advanced technology with extremely short running time and low server resource requirements. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The preferred implementation scheme will be described below in a clear and understandable manner with reference to the accompanying drawings to further illustrate the above-mentioned characteristics, technical features, advantages and implementation methods of the present solution.

[0017] Figure 1 It is a physical schematic diagram of the through-hole connections of a chip power network; Figure 2 It is a schematic diagram of a fixed layout pattern of metal wires in a chip power network; Figure 3 is a flow chart of an embodiment of the present invention; Figure 4 is a schematic diagram of a first physical region according to an embodiment of the present invention; Figure 5 Schematic diagram of a first through hole according to an embodiment of the present invention. DETAILED DESCRIPTION

[0018] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the specific implementation methods of the present invention will be described below with reference to the accompanying drawings. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings and other implementation methods can be obtained based on these drawings without creative work.

[0019] In order to simplify the drawings, only the parts related to the present invention are schematically shown in each figure, and they do not represent the actual structure of the product. In addition, in order to simplify the drawings and facilitate understanding, in some figures, only one of the parts with the same structure or function is schematically drawn or marked. In this article, "one" not only means "only one", but also means "more than one".

[0020] In digital integrated circuits, in order to power functional devices, such as Figure 1 As shown, the metal wires from the top layer (such as M15) need to be passed down layer by layer in a perpendicular direction to the metal wires of the bottom layer (such as M1), and each two layers are connected by vias at a certain interval. From M15 to M1, each layer often needs metal wires for power and ground, and each layer is laid down alternately horizontally and vertically, and each layer of metal wires is laid down according to a fixed layout pattern. For example, Figure 2 In a fixed layout mode shown, the vertical (or horizontal) metal lines that stagger the power supply (VDD) and the ground (VSS) are all implemented by using a metal line width of 0.5um and a spacing of 2um for the same type of metal lines.

[0021] With the continuous development of digital integrated circuits, the functions implemented by the entire chip are becoming more and more complex, the area is getting larger and larger, and the probability of a single module being divided into a large area is also increasing. Therefore, more and more metal wires for power and ground are needed, and the number of through holes in a single module to achieve the connection between the power and ground metal wires will increase. At the same time, because the operating frequency of the chip is getting higher and higher, the power consumption per unit area is increasing, resulting in the overall layout mode of the metal wires required to change from a coarse and sparse mode with large width and large spacing to a fine and dense mode with small width and small spacing, so the number of through holes required to achieve the connection between the power and ground metal wires is further increased. In addition, under advanced processes, such a fine and dense mode is more complicated to check the physical rules, resulting in more constraints on the through holes used to connect the metal wires, more checks are required during physical implementation, and more computer resources (mainly referring to the computer's memory) and running time are required.

[0022] The existing solution for drilling through holes is usually to drill through holes between the metal wires of adjacent metal layers that cross each other in turn according to normal EDA commands for the metal wires of the power and ground of the entire module layer by layer, and the EDA automatic tool will automatically divide the area of ​​the entire module into multiple blocks, and use multi-threading to process multiple blocks in parallel to speed up the speed of drilling through holes. However, since there are many power and ground metal wires, there are also many through holes that need to be drilled. On the basis of the large memory required, parallel processing of multiple areas will result in the need to check the constraints of physical rules in multiple places in parallel, which requires more memory and easily causes the computer to crash; and a large number of adjacent metal layers that cross each other need to check physical rules to realize the action of drilling through holes, which requires a lot of running time, affecting the overall efficiency. Therefore, there is an urgent need for a solution that uses less computer resources and running time to solve the problem of physical realization of through holes between power and ground metal wires in large-area, high-performance modules under advanced processes.

[0023] This solution takes into account that the metal line levels in the power and ground networks are generally very regular, and the power and ground metal lines are repeated at a fixed width and interval in each layer. Moreover, when the power and ground metal lines and vias are placed, the layout and routing have not yet been carried out, and the nearby winding resources are available, so the power and ground vias have priority for implementation. Moreover, when EDA uses general commands to implement vias, it is completely irregular to individually check the physical rules of each place where adjacent layers of metal intersect, and then perform the physical implementation of the vias, so it will take a long time to run. Therefore, this solution only uses EDA tools to complete the through-hole implementation at one place where adjacent layers of metal intersect. In this way, the EDA tool will select the best through-hole for such a metal line intersection scenario (meeting DRC requirements and maximizing the contact area between two adjacent metal layers), and then use the information of this through-hole, including the type of through-hole and the relative offset position of the through-hole at the intersection, to apply it to other intersections using DEF to complete the through-hole implementation of the entire power ground network. This can achieve the through-hole operation between the power and ground metal lines in the power network of large-area, high-frequency modules under advanced processes with very little running time and low server resource requirements. The following will describe this solution in detail with the accompanying drawings: In one embodiment, the reference specification Figure 3 The present application provides a method for drilling a through hole, which is applied to EDA design of an integrated circuit, comprising the steps of: S100, obtaining layout pattern information of metal line levels in a power ground network of an integrated circuit, wherein the layout pattern information includes the width of the metal line and the interval between adjacent metal lines of the same type.

[0024] Specifically, the layout of the metal line level in the power ground network of the integrated circuit is generally a regular layout, and the width of the metal line and the interval between adjacent metal lines of the same type are fixed values. This application is based on this rule to achieve the mapping of the through-hole level monomer to the whole, and will not use more computer resources. In other embodiments, this solution can also be applied to the layout of the metal line level in an irregular or partially irregular power ground network, but it takes more resources to determine the intersection positions of all adjacent metal lines.

[0025] S200, sequentially determining at least one mutually intersecting first physical region between each adjacent metal line level that needs to implement a through-hole level, and automatically drilling a first through-hole in the first physical region through an EDA tool.

[0026] Before the large-area through-hole drilling operation of the chip is carried out, the scheme first finds a mutually intersecting physical area for each adjacent metal layer that needs to realize the through-hole level as a demonstration of each through-hole level, such as Figure 4 and Figure 5 As shown, a through hole is automatically punched using an EDA tool, and because the EDA tool is used for automatic punching, the type and offset position of the punching can be considered to be the best choice made by the EDA based on the actual situation. At the same time, since this solution only punches a through hole at the intersection, it is fast and requires very little computer resources.

[0027] S300, recording the through-hole information of the first through-hole, and establishing a mapping relationship between the through-hole hierarchy and the through-hole information, wherein the through-hole information includes the through-hole type of the first through-hole and the offset information of the first through-hole in the first physical region.

[0028] like Figure 5 As shown, the offset information includes the offset Offset_X of the first through hole in the horizontal direction relative to the reference point in the first physical area and the offset Offset_Y in the vertical direction. As mentioned above, the type and offset position of the punching generated by the EDA tool for automatic punching can be considered as the optimal choice made by the EDA based on the actual situation. Due to the regular layout of the metal line hierarchy in the power ground network, the type of the first through hole and the offset position at the intersection of the metal line can also be applied to other metal line intersections. Therefore, by establishing a mapping relationship between the through hole hierarchy and the through hole information, the punching method of the first through hole can be applied to other intersections.

[0029] S400 , sequentially calculating all second physical areas between each adjacent metal line level that needs to implement a through-hole level according to the layout mode information.

[0030] Based on the layout pattern information of the metal line level of the fixed power ground network, the intersection positions between each adjacent metal level that needs to realize the through-hole level can be calculated in sequence. And because the layout pattern information is fixed, it is very simple to simply calculate the coordinate information of such intersection positions. At the same time, simple mathematical calculations are fast for modern computers and require less computer resources.

[0031] S500: Determine the through hole types and absolute coordinate information of all through holes that need to be punched according to the absolute position and mapping relationship of the second physical area, and record them in a preset file.

[0032] Based on the absolute position and mapping relationship of the second physical area between each adjacent metal line level that needs to realize the through-hole level, the through-hole type and absolute coordinate information of all through-holes that need to be punched in the entire design can be calculated and stored, and can be directly applied in the subsequent EDA design process. And this step is also a simple mathematical calculation, which is fast for modern computers and requires less computer resources.

[0033] In this application, the preset file is a DEF file, and all the through hole types and absolute coordinate information that need to be punched are written into a specific power_via.out.def file according to the standard format of DEF, and EDA can read it directly. In other embodiments, it can be stored in other files according to requirements, and this application does not limit it.

[0034] S600. In the EDA design process of the integrated circuit, the preset file is directly read, and the through-hole punching operation is automatically performed through the EDA tool according to the through-hole types and absolute coordinate information of all through-holes required to be punched recorded in the preset file.

[0035] In the EDA design process of integrated circuits, the power_via.out.def file can be directly read to determine the through-hole type and absolute coordinate information of all through-holes that need to be punched, and the punching operation is performed accordingly, which saves the time required for calculating the through-hole type and position at each intersection. And this step is just to read in the design physical information, avoiding the need to perform design rule checks at each location, and avoiding the steps of selecting through-hole types and physical realization coordinates, making the overall running time shorter and requiring less memory.

[0036] This solution is based on the fact that the metal lines of the power ground network have certain fixed layout patterns. It changes the traditional process of using universal EDA commands to complete the physical implementation of all through-holes. Instead, it uses the best optimization selection made by EDA tools for a limited number of sample scenarios, and applies such optimal selection to all points that need to be implemented in the form of DEF, greatly optimizing the operational implementation and computer resource requirements of the through-hole implementation in the entire power network.

[0037] In addition, the present application is not limited to the scenario where each layer has only one type of layout mode for the power ground network, and can also be applied when some layers have a limited number of types of layout modes.

[0038] In one embodiment, based on the above-mentioned embodiment, when there is only one type of layout pattern information of the metal line level in the power ground network of the integrated circuit, a mutually intersecting first physical area is determined for each adjacent metal line level that needs to implement a via level, and a mapping relationship is established; and when the layout pattern information of the metal line level in the power ground network of the integrated circuit includes multiple types, a first via is punched for each mutually intersecting first physical area corresponding to each type of layout pattern information, and corresponding mapping relationships are established respectively. And when the layout pattern information of the metal line level in the power ground network of the integrated circuit includes multiple types, the second physical area between each adjacent metal line level that needs to implement a via level can be calculated by ANDing.

[0039] In one embodiment, the present application provides a computer device, including a memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the steps of the method for drilling a through hole in the aforementioned embodiment.

[0040] In one embodiment, the present application provides a computer storage medium on which a computer program or instruction is stored. When the computer program or instruction is executed by a processor, the steps of the method for drilling a through hole in the above embodiment are implemented.

[0041] In one embodiment, the present application provides a computer program product, including a computer program or instructions, which implements the steps of the method for drilling a through hole in the above embodiment when the computer program or instructions are executed by a processor.

[0042] A method of punching a through hole in the present application can be implemented by using program codes executable by a computing device, so that they can be stored in a storage device and executed by the computing device, or they can be made into individual integrated circuit modules, or multiple modules or steps therein can be made into a single integrated circuit module for implementation. Thus, the present invention is not limited to any specific combination of hardware and software.

[0043] It should be noted that the above embodiments can be freely combined as needed. The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be considered as the protection scope of the present invention.

Claims

1. A method for drilling a through hole, applied to EDA design of an integrated circuit, characterized in that: Includes steps: Acquire layout pattern information of metal line levels in a power ground network of an integrated circuit, wherein the layout pattern information includes the width of the metal line and the spacing between adjacent metal lines of the same type; Determine at least one mutually intersecting first physical region between each adjacent metal line level that needs to realize a through-hole level, and automatically punch a first through-hole in the first physical region through an EDA tool; Recording the through-hole information of the first through-hole, and establishing a mapping relationship between the through-hole hierarchy and the through-hole information, wherein the through-hole information includes the through-hole type of the first through-hole and the offset information of the first through-hole in the first physical area; Calculate all second physical areas between each adjacent metal line level that needs to implement the through-hole level in sequence according to the layout mode information; Determine the through hole types and absolute coordinate information of all through holes that need to be punched according to the absolute position of the second physical area and the mapping relationship, and record them in a preset file; During the EDA design process of the integrated circuit, the preset file is directly read, and the through-hole drilling operation is automatically performed through the EDA tool according to the through-hole types and absolute coordinate information of all through-holes that need to be drilled recorded in the preset file.

2. A method for punching a through hole according to claim 1, characterized in that: When the layout pattern information of the metal line level in the power ground network of the integrated circuit has only one type, a mutually intersecting first physical area is determined for each adjacent metal line level that needs to implement a through-hole level, and a mapping relationship is established.

3. A method for punching a through hole according to claim 1, characterized in that: When the layout pattern information of the metal line level in the power ground network of the integrated circuit includes multiple types, a first through hole is punched in turn for each type of mutually intersecting first physical area corresponding to the layout pattern information, and the corresponding mapping relationships are established respectively.

4. A method for punching a through hole according to claim 3, characterized in that: When the layout pattern information of the metal line level in the power ground network of the integrated circuit includes multiple types, all the second physical areas between each adjacent metal line level required to implement the via level are calculated by AND.

5. A method for punching a through hole according to claim 1, characterized in that: The offset information includes an offset amount of the first through hole in a horizontal direction and a vertical direction relative to a reference point in the first physical region.

6. A method for punching a through hole according to claim 1, characterized in that: The layout of the metal line levels in the power ground network of the integrated circuit is a regular layout, and the width of the metal line and the interval between adjacent metal lines of the same type are both fixed values.

7. A method for punching a through hole according to claim 1, characterized in that: The preset file is a DEF file.

8. A computer device comprising a memory, a processor and a computer program stored in the memory, characterized in that: The processor executes the computer program to implement the steps of the method for drilling a through hole according to any one of claims 1 to 7.

9. A computer storage medium having a computer program or instruction stored thereon, characterized in that: When the computer program or instruction is executed by a processor, the steps of the method for drilling a through hole according to any one of claims 1 to 7 are implemented.

10. A computer program product comprising a computer program or instructions, characterized in that When the computer program or instruction is executed by a processor, the steps of the method for drilling a through hole according to any one of claims 1 to 7 are implemented.

Images