Ex-situ coating of chamber components for semiconductor processing

Abstract

Formation of a protective coating in an ex-situ atomic layer deposition process to coat one or more chamber components that are subsequently mounted into a reaction chamber provides numerous advantages over conventional coating methods such as in-situ deposition of a base coating. In some cases, the protective coating may have a specific composition, such as an oxide of aluminum, a fluoride of aluminum, a nitride of aluminum, an oxide of yttrium, and / or a fluoride of yttrium. The protective coating may help reduce contamination on a wafer processed with the coated chamber component. In addition, the protective coating may function to stabilize processing conditions within the reaction chamber, thereby achieving very stable / uniform processing results during the process of processing many batches of wafers, and minimizing free radical loss. A number of techniques are also described that can be used to restore the protective coating after the coated chamber component is used to process a semiconductor wafer.

Description

This application is a divisional application of application No. 201880089300.8, application date December 5, 2018, and invention name “Non-in-situ coating of chamber components for semiconductor processing”. CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of priority to U.S. Patent Application No. 15 / 954,454, filed on April 16, 2018, entitled “EX SITU COATING OF CHAMBER COMPONENTS FOR SEMICONDUCTOR PROCESSING APPARATUS,” which claims the benefit of priority under 35 U.S.C. §119(e) to U.S. Provisional Application No. 62 / 599,618, filed on December 15, 2017, entitled “EX-SITU COATING OF CHAMBER COMPONENTS FOR SEMICONDUCTOR PROCESSING APPARATUS,” each of which is incorporated by reference in its entirety and for all purposes. Technical Field

[0002] Various embodiments herein relate to methods and apparatus for making chamber components for use in semiconductor processing equipment. Background Art

[0003] As the semiconductor industry advances, device dimensions continue to shrink. These ever-smaller features require extremely uniform and repeatable deposition processes because the presence of film impurities or other non-uniformities can cause semiconductor device failures.

[0004] The background description provided here is for the purpose of generally presenting the context of the present disclosure. Work by the presently designated inventors to the extent described in this background section and in aspects of the description that could not be determined as prior art at the time of filing the application is neither explicitly nor implicitly admitted to be prior art against the present disclosure. Summary of the invention

[0005] Certain embodiments herein relate to a method for preparing a chamber component for a reaction chamber for processing a semiconductor substrate. In various embodiments, the method involves providing a chamber component to a first reaction chamber and coating the chamber component with a protective coating using atomic layer deposition. After forming the protective coating, the chamber component is removed from the first reaction chamber and installed in a second reaction chamber. When the second reaction chamber is used to process a semiconductor wafer, the chamber component has its desired use in the second reaction chamber (e.g., as a showerhead, as a lift pin, as a lift pin holder, as a substrate support pedestal, etc.). In many cases, the second reaction chamber is a vapor deposition apparatus, such as an atomic layer deposition apparatus and / or a chemical vapor deposition apparatus.

[0006] In another aspect of the disclosed embodiment, a coated chamber component is provided. A protective coating may be deposited ex situ to the chamber component via atomic layer deposition as described herein. In another aspect of the disclosed embodiment, a reaction chamber is provided. The reaction chamber may have one or more chamber components having a protective coating deposited ex situ via atomic layer deposition as described herein.

[0007] In one aspect of the disclosed embodiment, a method for coating a chamber component for use in a second reaction chamber is provided, the method comprising: (a) receiving the chamber component as a substrate in a first reaction chamber; (b) providing a first reactant to the first reaction chamber and allowing the first reactant to adsorb onto a surface of the chamber component; (c) providing a second reactant to the first reaction chamber and allowing the first reactant and the second reactant to react with each other in an atomic layer deposition reaction to form a protective coating on the surface of the chamber component; (d) repeating (b) and (c) until the protective coating reaches a final thickness; and (e) removing the chamber component from the first reaction chamber.

[0008] In some embodiments, the protective coating comprises a metal oxide, a metal nitride, or a metal fluoride. For example, the metal in the metal oxide, metal nitride, or metal fluoride can be a transition metal. In some cases, the protective coating comprises an oxide of aluminum, a fluoride of aluminum, or a nitride of aluminum. In some cases, the protective coating comprises an oxide of yttrium or a fluoride of yttrium.

[0009] The method may also include installing the chamber components into the second reaction chamber after (e). In some such cases, the method may also include processing a semiconductor wafer in the second reaction chamber after installing the chamber components into the second reaction chamber. Processing the semiconductor wafer may include depositing a film on the semiconductor wafer. In some cases the film may be deposited via atomic layer deposition or chemical vapor deposition. In some embodiments, the method may also include establishing an elevated temperature in the second reaction chamber when depositing the film onto the semiconductor wafer, the elevated temperature being between about 40-200°C.

[0010] In some embodiments, the method may further include exposing the second reaction chamber to a recovery plasma when the chamber component is installed in the second reaction chamber, wherein: (a) the protective coating comprises a metal oxide and the recovery plasma comprises an oxidizing plasma, (b) the protective coating comprises a metal nitride and the recovery plasma comprises nitrogen, or (c) the protective coating comprises a metal fluoride and the recovery plasma comprises fluorine. The recovery plasma may also comprise a metal that is the same as the metal contained in the protective coating.

[0011] In some cases, the method may further include: after depositing the film onto the semiconductor wafer in the second reaction chamber, removing the semiconductor wafer from the second reaction chamber, and exposing the second reaction chamber to a first plasma containing oxygen, followed by exposing the second reaction chamber to a second plasma containing nitrogen. In these or other embodiments, the method may further include cleaning the second reaction chamber by exposing the second reaction chamber to a fluorine-containing plasma, followed by removing fluorine from the second reaction chamber by exposing the second reaction chamber to a reducing plasma.

[0012] In some cases, the protective coating can be formed without exposing the chamber component to plasma. In other cases, the protective coating is formed by exposure to plasma. In some embodiments, a plurality of chamber components are provided to the reaction chamber at the same time to form a protective coating on the plurality of chamber components at the same time, and the plurality of chamber components include the chamber component. In some such embodiments, the plurality of chamber components have uniform size and shape. Then, the plurality of chamber components processed simultaneously can be installed one by one in the second reaction chamber according to the loss or degradation over time. In other cases, the plurality of chamber components processed simultaneously can be transported to a plurality of different second reaction chambers. In some embodiments, the plurality of chamber components have uniform size and shape. In other embodiments, the plurality of chamber components do not have uniform size and / or shape. In a specific embodiment, the plurality of chamber components do not have uniform size and / or shape and include a first chamber component and a second chamber component, and the method further includes installing the first chamber component and the second chamber component into the second reaction chamber so that the first chamber component and the second chamber component are present in the second reaction chamber at the same time.

[0013] In some embodiments, the method may also include removing the unnecessary first reactant after (b) and before (c). Similarly, the method may also include removing the unnecessary second reactant from the first reaction chamber after (c) and before the next repetition of (b). The final thickness of the protective coating may be between about 1nm and 10mm. In some cases, the final thickness is between about 100-800nm ​​or between about 100-500nm. In these or other cases, the method may also include processing a plurality of semiconductor wafers in the second reaction chamber after the chamber components are installed in the second reaction chamber, and the plurality of semiconductor wafers are processed at different times.

[0014] In some embodiments, the method may further include shielding a portion of the chamber component prior to (b) to prevent the protective coating from forming on the shielded portion of the chamber component. In these or other embodiments, the method may further include positioning the chamber component on a substrate support within the first reaction chamber such that one or more surfaces of the chamber component where the protective coating is desired are substantially exposed. The method may further include repositioning the chamber component within the first reaction chamber from a first position to a second position, wherein the protective coating is formed over a first set of features of the chamber component when the chamber component is positioned at the first position and the protective coating is formed over a second set of features of the chamber component when the chamber component is positioned at the second position.

[0015] In various embodiments, the chamber component may be a showerhead. In some cases, the method may be repeated with a second chamber component, the second chamber component being a nozzle, and the method may further include attaching the nozzle to the showerhead after coating both the showerhead and the nozzle with the protective coating. The showerhead may include a first set of holes extending through the thickness of the showerhead. The protective coating may conformally coat the first set of holes. The showerhead may include a second set of holes connected to one or more internal channels within the showerhead. The protective coating may conformally coat the first set of holes, the second set of holes, and the internal channels. In some implementations, the chamber component is a substrate support pedestal. In some implementations, the chamber component is a lift pin, a lift pin holder, or a gas line delivery component. In some cases, the protective coating may be formed at a temperature between about 20°C-650°C.

[0016] In another aspect of the disclosed embodiment, a method for operating a reaction chamber to deposit a film on a semiconductor wafer and achieve a particular degree of process non-uniformity is provided, the method comprising: (a) depositing the film on each semiconductor wafer in a batch, each of the films having an average film thickness, wherein the batch comprises all semiconductor wafers processed in the reaction chamber between subsequent cleaning cycles, and at least a portion of the semiconductor wafers in the batch are processed sequentially; and (b) repeating (a) for each semiconductor wafer in at least an additional 9 batches out of a total of at least 10 batches to deposit the film on each semiconductor wafer, wherein the reaction chamber comprises at least one chamber component having a protective coating formed thereon, wherein the protective coating is formed by an atomic layer deposition reaction conducted outside the reaction chamber, wherein the variation in the on-wafer non-uniformity of the film when comparing the deposited films on semiconductor wafers from a first batch and a last batch of the at least 10 batches does not exceed about 3% of the average film thickness.

[0017] In some embodiments, the batch contains at least about 50 semiconductor wafers. For example, the batch may contain at least about 200 semiconductor wafers. The average film thickness may be at least about For example, the average film thickness may be at least about thick.

[0018] In some embodiments, (b) may include repeating (a) for each of the semiconductor wafers in at least 19 additional batches of at least 20 batches in total to deposit the film on each of the semiconductor wafers, wherein the variation in the uniformity of the film on the wafer does not exceed about 1% of the average film thickness when comparing the deposited films on the semiconductor wafers from the first batch and the last batch of the at least 20 batches. In these or other embodiments, the batches may include at least about 50 semiconductor wafers and (b) may include repeating (a) for each of the semiconductor wafers in at least 19 additional batches of at least 20 batches in total to deposit the film on each of the semiconductor wafers, wherein the variation in the uniformity of the film on the wafer does not exceed about 0.05% of the average film thickness when comparing the deposited films on the semiconductor wafers from the first batch and the last batch of the at least 20 batches.

[0019] These and other features will be described below with reference to the associated drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1A is a flow chart illustrating a method of forming a protective coating over a chamber component, wherein the protective coating is formed ex-situ via atomic layer deposition.

[0021] Figure 1Bis a flow chart illustrating a method of preparing a reaction chamber and processing a semiconductor wafer in the processing chamber, wherein the preparation involves forming a protective coating on chamber components using an ex-situ atomic layer deposition method.

[0022] Figure 2A and 2B Illustrated is a spray head to which a protective coating may be applied using the techniques described herein.

[0023] Figure 2C A close-up cross-sectional view showing a hole in a showerhead according to certain embodiments.

[0024] Figure 2D-2G Shown is a spray head to which a protective coating may be applied using the techniques described herein.

[0025] Figure 3A and 3B Shown is a spray head to which a protective coating may be applied using the techniques described herein.

[0026] Figure 4 Illustrated Figure 3A and 3B Side view of the spray head shown in .

[0027] Figures 5A-5C Illustrated is a substrate support pedestal to which a protective coating may be applied using the techniques described herein.

[0028] Figure 6 Depicted is a lift pin support to which a protective coating may be applied using the techniques described herein.

[0029] Figure 7 Illustrated is a chamber component, such as a showerhead, being coated with an ex situ protective coating according to certain embodiments.

[0030] Fig. 8A and 8B The batch-to-batch variation of non-uniformity across the wafers achieved in the following cases is compared: Fig. 8A ) and the intra-batch variation ( Figure 8B ) of relevant chamber components coated with a protective coating according to embodiments herein and relevant chamber components that are not coated.

[0031] Fig. 9 Graphs depict the number of particles observed on certain semiconductor substrates processed in a reaction chamber having a showerhead coated with a protective coating according to certain embodiments.

[0032] Fig. 10A and 10B A high fill parameter state and a low fill parameter state of a reaction chamber according to certain embodiments are illustrated.

[0033] Fig.11A and 11B A graph illustrating the drift of the filling parameter time during the processing of hundreds of semiconductor wafers in the following case: nitrogen plasma is provided to the reaction chamber after processing each semiconductor wafer ( Fig.11A ), and supplying oxygen plasma to the reaction chamber after processing each semiconductor wafer, and then supplying nitrogen plasma to the reaction chamber ( Fig. 11B ).

[0034] Fig. 12A Non-uniform deposition parameters are shown for various wafers processed over time in a reaction chamber having a cooled showerhead therein.

[0035] Figures 12B-12H Far more uniform deposition parameters are shown as various wafers are processed over time in a reaction chamber having a heated showerhead therein. DETAILED DESCRIPTION

[0036] In this application, "semiconductor wafer", "wafer", "substrate", "wafer substrate", and "partially manufactured integrated circuit" are sometimes used interchangeably. However, it should be understood that the term "substrate" can refer to a semiconductor wafer, or it can refer to a chamber component used in different reaction chambers. The term "wafer" is generally understood to mean only a semiconductor wafer. It should be understood by those skilled in the art that a "partially manufactured integrated circuit" can refer to a silicon wafer during any of the many stages of manufacturing an integrated circuit on a silicon wafer. Wafers or substrates used in the semiconductor device industry typically have a diameter of 200 mm, 300 mm, or 450 mm. The following detailed description assumes that some of the embodiments are implemented on a wafer. However, the embodiments of the present invention are not limited to this. The workpiece can have various shapes, various sizes, and various materials. In various embodiments, the workpiece is a chamber component as described below. The chamber component can be included in a different reaction chamber after being processed as a substrate / workpiece in a first reaction chamber. In addition to semiconductor wafers, other workpieces that can utilize the disclosed embodiments include various items such as printed circuit boards, magnetic recording media, magnetic recording sensors, mirrors, optical components, micromechanical devices, etc. (and any chamber components of the reaction chamber used to manufacture such objects).

[0037] When manufacturing semiconductor devices, it is advantageous to have accurate and repeatable manufacturing processes. This accuracy and repeatability can reduce manufacturing costs by minimizing the number of devices that do not meet the desired specifications. Unfortunately, when semiconductor manufacturing equipment processes additional wafers over time, the processing conditions in the equipment change. These changing conditions can affect the wafers processed in the equipment. For example, when a reaction chamber is used to deposit a film on a series of wafers over time, the byproducts of the film accumulate on the inner surface of the reaction chamber. After a period of time, the reaction chamber is cleaned to remove the film byproducts. In many cases, the cleaning process involves exposing the reaction chamber to a remotely generated plasma (such as a fluorine-containing plasma, such as a fluorine-nitrogen plasma) to thereby remove the film byproducts. Unfortunately, the cleaning process can change the surface conditions of the reaction chamber components below. For example, a showerhead and / or a substrate support base of aluminum can be attacked by fluorine free radicals to form porous aluminum fluorides. The reaction greatly increases the surface area of ​​the showerhead / base by changing the surface characteristics of these reactor components. The surface conditions of the chamber components are further changed each time the reaction chamber is cleaned. These changing surface conditions can result in changing deposition (or other processing) results over time on wafers being processed in the reaction chamber. Fig. 8A and 8B Experimental results illustrating these effects are discussed. Note that these changes can occur even if the showerhead is coated with an in-situ formed primer layer, as discussed further below.

[0038] Certain processes are particularly sensitive to the surface conditions of chamber components such as showerheads and susceptors. For example, silicon carbide (SiC x ) and its derivatives (e.g., which may include elements other than silicon and carbon) may be sensitive to these conditions. In various embodiments, the process involves exposing the wafer to hydrogen radicals, which may or may not be generated remotely from the reaction chamber. Without being limited by theory or mechanism of action, it is believed that the generation and distribution of hydrogen radicals to the semiconductor wafer is affected by the surface conditions of chamber components (e.g., showerheads and susceptors). As additional chamber cleaning is performed over time, the surface conditions of these components change (e.g., become more susceptible to attack by fluorine radicals, thereby providing more surface area) and the deposition results drift over time.

[0039] The wafers processed in a particular reaction chamber between subsequent chamber cleaning operations are referred to as batches. The wafers in a batch are processed sequentially. In other words, the batch processing described herein is different from the batch processing in which the substrates in the batch are all processed simultaneously. In the batch processing used herein, at least part of the substrates in the batch are processed at different times. However, it should be understood that some reaction chambers are configured to process multiple substrates simultaneously and in this case some substrates in the batch can be processed simultaneously. In one embodiment, a film is deposited on one wafer at a time using a freshly cleaned reaction chamber, and the reaction chamber is cleaned after processing 200 wafers. In this embodiment, the batch includes 200 wafers processed between subsequent chamber cleanings. In another embodiment, a film is deposited on two wafers at a time using a freshly cleaned reaction chamber, and the reaction chamber is cleaned after processing 400 wafers. In this embodiment, the batch includes 400 wafers processed between successive chamber cleanings.

[0040] In some cases, a batch of wafers includes at least about 25 wafers, at least about 50 wafers, at least about 100 wafers, or at least about 200 wafers. In these or other cases, a batch of wafers may include up to about 400 wafers, or up to about 200 wafers. In various embodiments, a batch of wafers may include between about 200-400 wafers, but many batch sizes may be used. The ideal batch size may depend on many factors, including but not limited to the composition of the film being deposited (or the composition of the film being processed in other ways), the thickness of the film being deposited (or the thickness of the film being processed in other ways), etc.

[0041] Another problem that may occur during the manufacture of semiconductor devices is the generation of particles that can contaminate portions of the manufactured semiconductor devices. Sometimes the particles are metal particles that originate from the interior surfaces within the reaction chamber itself. For example, particles may originate from the interior chamber walls, top plates, showerheads, substrate supports, lift pins, gas lines, nozzles, etc. In a particular embodiment, the reaction chamber and / or components therein are formed of aluminum, such as aluminum 6061-T6 (which may include aluminum with small amounts of other materials such as chromium, copper, iron, magnesium, silicon, titanium, zinc, etc.). In many cases, particles are generated when the reaction chamber is exposed to plasma or other harsh processing conditions. Particles may land on the surface of the substrate during processing, thereby causing undesirable film impurities and increasing the possibility of device failure.

[0042] A technique to counteract the generation of such particles is to coat the surface of the reaction chamber with an undercoat. The undercoat is a material layer formed in situ on the inner chamber surface to minimize metal contamination from the exposed chamber surface. Typically, the undercoat is deposited when there is no substrate in the reaction chamber. The undercoat is formed on the inner chamber surface exposed to both the energy of (a) reactants forming the undercoat and (b) the reaction between the driving reactants. The undercoat is described in U.S. Patent Application No. 14 / 089,653, filed on November 25, 2013, entitled "CHAMBER UNDERCOAT PREPAREATION METHOD FOR LOW TEMPERATURE ALD FILMS", all of which are incorporated herein by reference.

[0043] Although the primer layer can be used to reduce particle generation and related pollution, the primer layer also brings certain challenges. For example, as mentioned above, the primer layer is only formed on the chamber surface that is exposed to both the reactant and the energy for driving the appropriate reaction. As a result, the primer layer usually provides incomplete coverage on the relevant surface. As used herein, the surface of the chamber component is "the relevant surface" when the expected / expected coating is formed on the surface. Unless otherwise specified, the surface that is deliberately shielded to avoid deposition thereon is excluded from the meaning of "the relevant surface". The surface / component that usually receives incomplete primer coating coverage from the primer layer deposited in situ includes but is not limited to (1) the inner surface of the nozzle hole, (2) the back surface of the nozzle, (3) the rod of the nozzle, (4) the inner surface of the gas and / or plasma delivery line, nozzle, valve, etc., (5) lift pins, (6) lift pin holders / holders, (7) aluminum or other metal bases on which the wafer is placed, etc.

[0044] It may be difficult or impossible to expose many of these surfaces to the in-situ energy in the relevant reactants and reaction chamber, for example, due to the geometric features of the reaction chamber and / or the position of the components in the reaction chamber. Some surfaces may not be exposed to all relevant reactants, such as the gas delivery line and the nozzle hole configured to only deliver a single reactant may never be exposed to the second reactant required for forming the film. Similarly, these or other surfaces may not be exposed to the energy that can drive the reaction of forming the bottom coating. For example, in the case where the bottom coating is formed due to exposure to thermal energy, some of the surfaces listed may not be heated to a suitable temperature. In the case where the bottom coating is formed due to exposure to plasma energy, some of the surfaces listed may not be exposed to plasma. In some cases, plasma may not penetrate into a small space (such as nozzle hole and gas delivery line) because of plasma-specific considerations (such as the thickness of the plasma sheath). Traditional coating technology has been unable to coat the inside of the nozzle hole. For example, physical vapor deposition, thermal spraying, and other line-of-sight coating technologies often cannot coat nozzle holes with a depth-to-width ratio higher than about 10. These uncoated pores are particularly exposed to reducing plasmas (such as ammonia plasma, H 2 plasma, etc.), fluorine-containing plasma (such as NF 3 plasma), and / or oxidizing plasma (such as N 2 O plasma, O 2 Plasma, CO 2 Such attack may change the pore size, surface finish, or other characteristics of the pore that may cause the gas flow and / or plasma to behave differently over time as the pore is attacked and altered. Fig. 8A As discussed further above, changes to the showerhead orifice can affect the uniformity of the gas flow and plasma, thereby negatively affecting the film non-uniformity on the wafers placed in the chamber and processed. Such changes have a significant impact on the useful life of the showerhead.

[0045] In addition, in-situ deposited primers (as well as other chamber component coating processes that may be performed in-situ or ex-situ, such as anodization, sputtering, physical vapor deposition, and plasma spraying) result in microporous materials deposited on chamber surfaces. The microporous structure of the material results in substantial free radical loss when it is exposed to the plasma. Such free radical loss prevents semiconductor wafers from being properly processed because the free radicals are effectively lost before they can reach the wafers that need them. Another problem with conventional coating techniques is that they typically form relatively thick coatings (e.g., greater than 500 nm) and tend to undesirably flake off the chamber components and land on the semiconductor wafer.

[0046] The technology described herein provides advantages arising from coated chamber surfaces while overcoming several challenges associated with in-situ deposition of undercoatings. Generally speaking, the technology described herein involves forming a protective coating on one or more components placed in a first reaction chamber that are later installed in a second reaction chamber. The first reaction chamber is used to prepare / coat the relevant chamber components, which are then removed and installed in a second reaction chamber for processing semiconductor substrates. This ex-situ deposition of the protective coating ensures that all relevant surfaces of the chamber components are properly coated, thereby minimizing particle generation and substrate contamination.

[0047] As used herein, the protective coating deposited on the chamber components is considered to be deposited "ex situ", where the protective coating is deposited on the chamber components in the first reaction chamber, then removed from the first reaction chamber and installed in the second reaction chamber. Generally speaking, the chamber components are installed in the second reaction chamber and form part of the second reaction chamber. In other words, the chamber components have their desired purpose (e.g., as a showerhead, lift pin, etc.) when they are installed in the second reaction chamber. On the contrary, the chamber components are merely substrates that are coated when they are in the first reaction chamber. Because the chamber components are substrates only in the first reaction chamber, they can be positioned and manipulated as needed during the deposition of the protective coating. This enables the protective coating to be formed on all relevant surfaces, which is not possible with the in situ deposition of the primer layer.

[0048] In terms of maximizing output and reducing costs, the non-original chamber component coating process described herein is also advantageous. In many cases, the protective coating is formed via atomic layer deposition (ALD) processing, and the atomic layer deposition process accumulates the film thickness cyclically in a layer-by-layer manner. Although this technology forms a high-quality, high-conformal protective coating, it requires a large amount of time to form a coating with a desired thickness (such as between 1nm-10mm, in some cases between about 100-500nm). In various cases, it takes about one day to several days to form a protective coating. If the protective coating is formed in situ on a reactor for processing semiconductor wafers in the form of an undercoat, this makes it impossible to use the reactor to process semiconductor wafers during the entire period of time to form the protective coating. This idle period can reduce output and increase costs.

[0049] In contrast, when chamber components are coated in an ex-situ manner, the reactor can still be used to process semiconductor substrates because the chamber components are coated in a different reactor. Chamber components that are typically coated using the techniques described herein are components that are worn out after a period of use. These consumable components are installed in a reaction chamber and used for a period of time before being replaced. In this way, a reaction chamber for processing semiconductor wafers can continue to use a first showerhead while a second showerhead is applied with a protective coating in a different reaction chamber. It should be understood that these processes may or may not occur simultaneously. After the second showerhead is applied, the first showerhead is removed and replaced with the second showerhead. The process of removing and reinstalling the showerhead (at least when the protective coating is deposited to the thickness described herein via atomic layer deposition) is much faster than the process of forming the protective coating. In addition, since the ex-situ coating process forms a more complete protective coating on the relevant surface of the chamber component, the protective coating formed by the ex-situ coating process can provide superior protection and last longer than the in-situ deposited primer. This means that chamber components do not need to be replaced frequently, thereby minimizing the cost of owning and operating processing equipment. Coating treatment

[0050] In various embodiments, the protective coating is deposited via atomic layer deposition. In some cases, plasma-assisted atomic layer deposition may be used. Unless otherwise indicated, "atomic layer deposition" as used herein is intended to include plasma-assisted atomic layer deposition. When applied to atomic layer deposition processes, the term "thermal" refers to reactions driven by thermal energy rather than by plasma energy.

[0051] Protective coatings formed ex situ via atomic layer deposition methods as described herein tend to be denser than coatings formed via the conventional methods described above. These dense coatings do not have a porous microstructure and therefore promote substantially lower free radical recombination rates, thereby ensuring that a much higher proportion of free radicals can reach the semiconductor wafer where the free radicals are needed. The issues associated with free radical recombination in the context of coated chamber components are further described in U.S. Patent Application No. 14 / 712,167, entitled "MINIMIZING RADICAL RECOMBINATION USING ALD SILICON OXIDE SURFACECOATING WITH INTERMITTENT RESTORATION PLASMA," filed on March 26, 2015, all of which are incorporated herein by reference. Compared to the embodiments in the referenced application, it is expected that the coatings described herein form denser materials with better microstructures.

[0052] Figure 1A1 is a flow chart illustrating a method 100 for forming a protective coating on a chamber component according to various embodiments. The method 100 begins at operation 101, where a chamber component is provided into a first reaction chamber as a substrate. The chamber component is placed into the first reaction chamber but is not installed therein as a component of the first reactor. In other words, if the chamber component is a showerhead, it does not function as a showerhead when the showerhead is located in the first reaction chamber. The showerhead itself can be provided without being connected to a gas line or other components. The chamber component can be placed on a substrate support. The substrate support can be used to expose all relevant surfaces of the chamber component on which the protective coating is to be formed. In some cases, the chamber component can be moved / replaced into the first reaction chamber during the deposition of the protective coating to ensure that all relevant surfaces are coated. In some cases, the chamber component can be removed or otherwise opened to expose additional surfaces to be coated.

[0053] Shielding can be provided as needed to shield surfaces that do not require protective coating. Such shielding is needed to prevent ALD coating from being deposited on areas where electrical contacts or other electrical properties associated with the metal are required. Shielding can also be provided at the gas entry or exit holes to prevent coating deposition inside certain channels of the showerhead where water or other fluids can be cooled. Such multi-cavity showerheads increase the use of advanced deposition chambers. The proposed technology can selectively coat specific areas of such complex components to maximize the advantages of improving component life and meeting wafer requirements.

[0054] In various embodiments, the chamber component may be the only substrate in the first reaction chamber. In other embodiments, multiple chamber components may be provided to the first reaction chamber at the same time, each chamber component being only a substrate to be coated in the first reaction chamber. In some cases, the chamber components that are coated simultaneously in the first reaction chamber may all be installed together in the same second reaction chamber. For example, any chamber component listed in this article may be coated simultaneously in the first reaction chamber and then installed together in the same second reaction chamber. In a specific embodiment, the nozzle and the lifting pin are coated simultaneously in the first reaction chamber and then installed in the same second reaction chamber. This simultaneous coating on different types of chamber components can ensure that different chamber components have a uniform protective coating. In certain other embodiments, multiple chamber components are coated simultaneously in the first reaction chamber, wherein the multiple chamber components include a single type of component (such as a nozzle, or a lifting pin, or a gas delivery line, etc.). In one embodiment, multiple similar or identical nozzles are coated simultaneously in the first reaction chamber. This simultaneous coating on similar or identical types of chamber components can help minimize the difference between the coating from one chamber component and the coating from the next chamber component in a specific type of chamber component. This may help reduce non-uniformities that may occur when replacing old chamber components with new ones.

[0055] At operation 103, the first reactant is introduced into the first reaction chamber. The first reactant is adsorbed on all exposed surfaces of the chamber components. An exemplary batching time of the first reactant may be between about 1 and 3 seconds. At operation 105, any redundant first reactant is scavenged from the first reaction chamber. This type of scavenging may be achieved by evacuating the first reaction chamber and / or excluding the first reaction chamber with another gas (such as an inert gas in many cases). Scavenging the first reactant from the first reaction chamber can minimize the risk of undesired gas phase reactions between the first reactant and the second reactant. This type of scavenging may not be needed (and therefore may be omitted) in certain cases where the reaction is driven by plasma.

[0056] At operation 107, the second reactant is introduced into the first reaction chamber. The second reactant can be adsorbed on the exposed surface of the chamber component. The exemplary batching time of the second reactant can be between about 1 and 30 seconds. At operation 109, the reaction between the first reactant and the second reactant is driven to form a protective film on the chamber component. In many cases, the reaction between the first reactant and the second reactant is a heat-driven atomic layer deposition reaction. In such cases, operation 109 may involve ensuring that the first reaction chamber (or the components therein, such as substrate support) reaches or maintains a target temperature. The target temperature may depend on the reactants provided to the reaction chamber, the desired composition of the protective coating, and the final use of the coated chamber components (such as deposition can be carried out at a processing temperature close to a typical or maximum processing temperature (when the chamber components are installed in the reaction chamber for processing semiconductor wafers, the chamber components are exposed to the typical or maximum processing temperature)). In certain embodiments, the target temperature may be between about 150-400°C or between about 300-700°F. In other cases, the reaction between the first reactant and the second reactant is a plasma-assisted atomic layer deposition reaction. In this case, operation 109 may involve generating a plasma and exposing the chamber components to the plasma. The plasma may be any type of plasma, including inductively coupled plasma, capacitively coupled plasma, microwave coupled plasma, transformer coupled plasma, remote plasma, in-situ plasma, etc. An exemplary plasma exposure period may be between about 0.5 seconds and 20 minutes. An exemplary RF power level for generating the plasma may be between about 0.5-3kW. An exemplary frequency for generating the plasma may include 400kHz, 2MHz, 13.6MHz, and 60MHz.

[0057] Without being limited by theory or mechanism of action, it is generally believed that thermally driven ALD reactions (relative to plasma assisted ALD reactions) are better at forming high quality, highly conformal protective films in small protected areas such as the interior of showerhead orifices and the interior of gas delivery lines. As discussed above, the plasma cannot penetrate into such small protected areas, so the small protected areas are not coated. Thermally driven reactions can better coat these areas because thermally driven reactions can more easily deliver the required thermal energy to all relevant surfaces.

[0058] Operations 103, 105, 107, and 109 together illustrate one atomic layer deposition cycle. Each cycle accumulates a monolayer film thickness, each monolayer having a thickness between about The thickness of each monolayer depends on many factors, including, for example, the exposure time of each reactant batching step, the viscosity coefficient of the reactants, etc. Optionally, after operation 107 and before operation 109 and / or after operation 109 and before the next repetition of operation 103, the first reaction chamber can be purged. Such purging can help reduce undesirable gas phase reactions and can help remove byproducts or other contaminants from the first reaction chamber.

[0059] At operation 111, it is determined whether the protective coating has reached the desired final thickness. In many embodiments herein, the desired final thickness is between about 1nm and about 10mm. In some cases, the final thickness is about 1nm or thicker, about 10nm or thicker, about 100nm or thicker, about 200nm or thicker, about 500nm or thicker, about 1 μm or thicker, about 10 μm or thicker, about 100 μm or thicker, about 500 μm or thicker, or about 1mm or thicker. In these or other cases, the final thickness can be about 10mm or thinner, about 1mm or thinner, about 500 μm or thinner, about 100 μm or thinner, about 10 μm or thinner, about 1 μm or thinner, about 500nm or thinner, about 200nm or thinner, about 100nm or thinner, or about 10nm or thinner. A protective coating in this thickness range can (1) reduce contamination from underlying chamber surfaces; and (2) last for a long time, even under harsh processing conditions. This thickness enables chamber components to be repeatedly exposed to harsh plasmas (e.g., cleaning plasmas, deposition plasmas, processing plasmas, etc.) multiple times with minimal degradation. In some embodiments, at a thickness above about 500 nm, the protective coating may flake off more easily. In some embodiments, at a thickness below about 100 nm, the protective coating may not provide substantial or durable protection against contamination.

[0060] In the event that the protective coating has not been deposited to the desired final thickness, the method proceeds to operation 103 and another ALD cycle is started. In the event that the protective coating has reached the desired final thickness, the method proceeds to operation 113 and the coated chamber components are removed from the first reaction chamber. At this point, the coated chamber components are ready to be installed in the second reaction chamber, where they are used for their intended purpose. Because each ALD cycle deposits such a thin monolayer, hundreds or thousands of cycles are typically required to completely coat the chamber components to the final thickness. This typically takes about 1-3 days.

[0061] Figure 1B A flow chart of a method 120 for preparing a second reaction chamber and processing a semiconductor wafer therein is shown. The method 120 begins at operation 121 by applying a protective film to chamber components in a first reaction chamber using atomic layer deposition. Operation 121 may be performed, for example, using Figure 1A Operations 101-111 are completed. For the purpose of brevity, the description thereof is not repeated. Next, in operation 113, the coated chamber components are removed from the first reaction chamber. Figure 1B Operation 113 in Figure 1A The process is the same as operation 113 in the first reaction chamber. After removing the coated chamber components from the first reaction chamber, the coated chamber components are installed in the second reaction chamber in operation 123. Next, at operation 125, the semiconductor wafer is processed in the second reaction chamber while the coated chamber components are installed in the second reaction chamber. The processing may involve depositing a film layer on the wafer, for example, by atomic layer deposition, chemical vapor deposition, or another deposition method. In other cases, the processing may involve etching material from the wafer, exposing the wafer to a plasma treatment, or other types of processing.

[0062] After a period of use, the coated chamber components (or coatings thereon) may begin to degrade due to, for example, exposure to a plasma (such as a fluorine-containing cleaning plasma). Generally, the reaction chamber is periodically cleaned to remove material that has accumulated on the interior chamber surfaces due to deposition of material on semiconductor wafers. As an example of using the reaction chamber for ALD, the reaction chamber may be cleaned after processing about 50 semiconductor wafers. In a similar case, the reaction chamber may be cleaned after processing about 100 semiconductor wafers or after processing about 200 semiconductor wafers. The frequency of cleaning depends, for example, on the composition and thickness of the film being deposited on the semiconductor wafer. Generally, thicker films require more frequent chamber cleanings.

[0063] The protective coating can be designed to withstand cleaning treatment. In many cases, the protective coating is designed to withstand repeated exposure to cleaning plasma. This helps ensure that the coated chamber components can be used in the reaction chamber for a relatively long time before the coated chamber components need to be replaced. In various embodiments, the cleaning plasma is a fluorine-nitrogen plasma. The fluorine-nitrogen plasma contains fluorine radicals that can react with materials (such as silicon-based materials, dielectric materials, and various other materials) that accumulate on the inner chamber surface in an undesirable manner. Other fluorine-containing plasmas have similar effects. Similarly, the protective coating can be designed to withstand exposure to ammonia plasma. Ammonia plasma can be used during deposition on semiconductor wafers, for example, to provide ammonia as a reactant. Ammonia plasma can also be used for surface treatment on semiconductor wafers.

[0064] Without being limited by theory or mechanism of action, it is believed that the aluminum oxide (Al 2 O 3 ), aluminum nitride (A1N), aluminum fluoride (A1F 3 ), aluminum nitride oxide (A1ON), yttrium oxide (Y 2 O 3 ) and yttrium fluoride (YF 3 ) can withstand typical fluorine radical-based cleaning processes, such as exposure to fluorine-nitrogen plasma and exposure to ammonia plasma. It is believed that these materials can show significantly improved resistance to fluorine-nitrogen plasma and ammonia plasma compared to, for example, silicon oxides that are commonly used as basecoat materials.

[0065] In some embodiments, two or more protective coatings of different compositions may be provided together. For example, the protective coating may comprise a double layer or a triple layer, which may comprise two or three sublayers, respectively, and each sublayer has the composition listed herein. In some cases, four or more such sublayers may be provided. Each sublayer may have a thickness described herein relative to the entire protective film. In other cases, the entire protective film may have a thickness described herein and the thickness may be dispersed in different sublayers. In some cases, multiple sublayers may have the same thickness. In other cases, multiple sublayers may have different thicknesses. In a specific embodiment, the protective film is a double layer, which comprises a stack of aluminum oxide and yttrium oxide. Many other combinations are also possible.

[0066] The ability of the protective coating to withstand degradation due to exposure to plasma may be enhanced by forming the protective coating at an elevated temperature, such as between about 75-700° C., in some cases between about 100-700° C., or between about 200-700° C., or between about 200-400° C., or between about 200-300° C., or between about 100-250° C., or between about 75-400° C., or between about 400-700° C. In some cases, the protective coating formed on aluminum (or predominantly aluminum) chamber components may be deposited at a temperature between about 75-400° C., or between about 100-250° C., or between about 200-400° C. In certain other cases, the protective coating formed on ceramic (or predominantly ceramic) chamber components may be deposited at a temperature between about 400-700° C. Since ceramic components can withstand higher processing temperatures after installation than aluminum components, higher deposition temperatures can be used to coat ceramic components. In any case, the protective coating can be formed at an elevated temperature that falls within about 25°C or within about 50°C of the maximum temperature to which the chamber components will be exposed after being coated and installed in a reaction chamber for processing semiconductor wafers. In some cases, the deposition temperature can be as low as about room temperature (e.g., about 20°C). In a specific embodiment, the protective coating can be formed at a temperature between about 20-650°C.

[0067] In the range of the rising temperature, any holes and grooves present on the surface of the chamber components expand. This enables the protective coating to be formed in the expanded holes and grooves, forming a conformal and complete protective coating. In contrast, if the chamber components are coated at a lower temperature, the holes or grooves are not expanded, so the protective coating may not be properly formed in such areas. The chamber components are often exposed to the rising temperature when they are installed in the second reaction chamber and used to process semiconductor wafers. At this time, any holes / grooves will expand, and the areas that are not completely coated in the holes / grooves will have problems with particle generation. For these reasons, it is expected to coat the chamber components at the rising temperature. However, in various embodiments, it is expected to ensure that the deposition temperature for forming the protective coating is not too high. For example, in some cases, the protective coating formed at higher temperatures (such as 400°C, 500°C and higher temperatures) exhibits poor particle performance when it is installed in a reaction chamber for processing semiconductor wafers. Therefore, in some cases, the deposition temperature for forming the protective coating can be maintained below about 250°C, or below about 300°C, or below about 400°C. In many such cases, the deposition temperature may be maintained at a minimum temperature above about 100°C or 150°C.

[0068] Depending on the desired coating, various reactants can be used to form the protective coating. In many cases the protective coating is a metal oxide, a metal nitride, a metal fluoride, or a combination thereof. In various embodiments the metal in the protective coating may be a transition metal. Some exemplary reactants are listed below, but they are not limiting.

[0069] In the case where the protective coating comprises aluminum (e.g., aluminum oxide, aluminum nitride, and / or aluminum fluoride), an aluminum-containing reactant may be used. Exemplary aluminum-containing reactants include, but are not limited to, tris(2,2,6,6-tetramethyl-3,5-heptanedione)aluminum (Al(OCC(CH 3 ) 3 CHCOC(CH 3 ) 3 ) 3 ); triisobutylaluminum ([(CH 3 ) 2 CHCH 2 ] 3 Al); trimethylaluminum ((CH 3 ) 3 Al; tris(dimethylamino)aluminum(III)(Al(N(CH 3 ) 2 ) 3 ); and mixtures thereof.

[0070] In the case where the protective coating comprises yttrium (e.g., yttrium oxide, yttrium nitride, and / or yttrium fluoride), a yttrium-containing reactant may be used. Exemplary yttrium-containing reactants include, but are not limited to, tris[N,N-bis(trimethylsilyl)amide]yttrium ([[(CH 3 ) 3 Si] 2 N] 3 Y); tri(butylcyclopentadienyl)yttrium(III)(Y(C 5 H 4 CH 2 (CH 2 ) 2 CH 3 ) 3 ); tri(cyclopentadienyl)yttrium(III) (Y(C 5 H 5 ) 3 ); such as a solution of yttrium 2-methoxyethoxide in 2-methoxyethanol (C 9 H 21 O 6 Y); Yttrium(III)tri(isopropoxide)(C 9 H 21 O 3 Y); Yttrium(III)tris(2,2,6,6-tetramethyl-3,5-heptanedione)(Y(OCC(CH3 ) 3 CHCOC(CH 3 ) 3 ) 3 ); and mixtures thereof.

[0071] In the case where the protective coating comprises titanium (e.g., titanium oxide, titanium nitride, and / or titanium fluoride), a titanium-containing reactant may be used. Exemplary titanium-containing reactants include, but are not limited to, tetrakis(diacetamido)titanium(IV) ([(C 2 H 5 ) 2 N] 4 Ti; Tetrakis(diacetylamino)titanium(IV)([(CH 3 ) 2 N] 4 Ti; Tetrakis(ethylmethylamido)titanium(IV)([(CH 3 C 2 H 5 )N] 4 Ti; diisopropoxybis(2,2,6,6-tetramethyl-3,5-heptanedione)titanium(IV)(Ti[OCC(CH 3 ) 3 CHCOC(CH 3 ) 3 ] 2 (OC 3 H 7 ) 2 ); titanium(IV)isopropoxide (Ti[OCH(CH 3 ) 2 ] 4 ); Titanium tetrachloride (TiCl 4 ); and mixtures thereof.

[0072] When the protective coating comprises other metals, suitable precursors of the other metals may be provided as generally understood in the art.

[0073] In the case where the protective coating contains oxygen, an oxygen-containing reactant may be used. Exemplary oxygen-containing reactants include, but are not limited to, oxygen (O 2 ), ozone (O 3 ), nitrous oxide (N 2 O), nitric oxide (NO), nitrogen dioxide (NO 2 ), carbon monoxide (CO), carbon dioxide (CO 2 ), sulfur monoxide (SO), sulfur dioxide (SO 2 ), oxygen-containing hydrocarbons (C x H y O z ), water (H 2 O), mixtures thereof, etc.

[0074] In the case where the protective coating comprises nitrogen, a nitrogen-containing reactant may be used. The nitrogen-containing reactant comprises at least one nitrogen, such as ammonia (NH 3 ), hydrazine, amines (such as carbon-containing amines), such as methylamine, dimethylamine, ethylamine, isopropylamine, tert-butylamine, di-tert-butylamine, cyclopropylamine, sec-butylamine, cyclobutylamine, isopentylamine, 2-methylbutyl-2-amine, trimethylamine, diisopropylamine, diethylisopropylamine, di-tert-butylhydrazine and aromatic amines, such as aniline, pyridine and benzylamine. The amine can be a primary amine, a secondary amine, a tertiary amine or a quaternary amine (such as a tetraalkylammonium compound). The nitrogen-containing reactant can contain non-nitrogen heteroatoms, such as hydroxylamine, tert-butyloxycarbonylamine and N-tert-butylhydroxylamine are nitrogen-containing reactants.

[0075] In the case where the protective coating comprises fluorine, a fluorine-containing reactant may be used. Exemplary fluorine-containing reactants include, but are not limited to, fluoride (HF) and metal fluorides such as titanium tetrafluoride (TiF 4 ); Niobium (V) fluoride (NbF 5 ); Tantalum pentafluoride (TaF 5 ); tungsten hexafluoride (WF 6 ); Molybdenum fluoride (MoF x ); Vanadium fluoride (VF X ) and their combinations.

[0076] In a specific embodiment where the protective coating is an oxide of aluminum, the first reactant is trimethylaluminum and the second reactant is water. These reactants can react with each other due to exposure to thermal energy (e.g., without requiring plasma exposure). Therefore, these reactants are particularly useful for forming a highly conformal protective coating on any uncovered surface of chamber components, including recessed surfaces or other difficult-to-reach surfaces, such as the interior of showerhead holes, internal plenum cavities, etc. Coatable Chamber Components

[0077] The protective coating may be applied to any and all chamber components. Such components may include, but are not limited to, showerheads, gas delivery lines, lift pins, lift pin holders / holders, chamber walls, chamber ceilings, substrate supports, pedestals, substrate carriers, etc. It may be particularly useful to provide a protective coating on chamber components that need to be replaced due to degradation over time.

[0078] Figure 2A and 2B Alternative views (top view and bottom view, respectively) of a spray head 200 that can be coated with a protective coating using the techniques described herein are shown. Figure 2A and 2BShown head 200 can be mounted in a reactor for chemical vapor deposition and / or atomic layer deposition. In some embodiments, the reactor is a deposition reactor or an inhibition reactor. Shown head 200 includes a plate 201 having a plurality of holes 205 formed therein. In some cases, about 2,000 holes 205 can be provided. Edge region 203 includes spaces and openings that can be used to mount showerhead 200 in a reactor chamber for processing semiconductor wafers. Although Figure 2A and 2B The area of ​​the edge 203 inside the display panel 201 is not provided with holes 205, but this is not always the case. In some embodiments, the holes 205 can be arranged all the way to the edge area 203. In this example, the holes 205 are arranged along concentric circles, but other hole patterns can also be used.

[0079] Figure 2C Shows the Figure 2A and 2B 205. The hole 205 has a width labeled "w" (sometimes referred to as its diameter or critical dimension) and a height labeled "h". The height of the hole 205 in this example is the same as the thickness of the plate 201 in which the hole 205 is formed. In various embodiments, the showerhead may have one or more holes extending through the thickness of the plate, the hole (holes) having a width between about 0.5-4 mm and / or a height between about 1-20 mm. In some cases, the showerhead may include a stack of multiple plates with non-aligned holes to improve gas mixing in, for example, multiple plenums.

[0080] The aspect ratio of a hole is the ratio of the height of the hole to the width of the hole (h:w). The aspect ratio is numerically calculated as the height of the hole divided by the width of the hole (h / w). In certain embodiments herein, the nozzle hole may have an aspect ratio of at least about 5, or at least about 10, or at least about 50, or at least about 100, or at least about 500. In some cases, the nozzle hole may have an aspect ratio of up to about 2000. This extremely high aspect ratio makes it difficult to coat the hole when the nozzle is installed in situ in the reaction chamber, for example, because it is difficult to deliver all necessary reactants to all relevant surfaces and / or it is difficult to expose all relevant surfaces to the plasma (for example, when the coating is formed by exposure to the plasma). By using thermally driven ALD reactions to coat the nozzles ex-situ in different reaction chambers, the necessary reactants can be delivered to all relevant surfaces as needed and the energy necessary to drive the reaction can be applied in a uniform manner. As a result, a highly conformal protective coating can be formed even on difficult-to-reach surfaces (such as surfaces within the nozzle hole and on the back side of the nozzle). Although in Figure 2A and 2B Explained in the context of Figure 2C , but it should be understood that any showerhead described herein may include holes having the described characteristics (eg, dimensions).

[0081] Figure 2D-2G An alternative view of a spray head is shown to which a protective coating may be applied using the techniques described herein. In various embodiments, Figure 2D-2G The sprinkler shown in is a powered sprinkler. In many cases, such sprinkler heads are referred to as chandelier sprinkler heads. In these or other embodiments, Figure 2D-2G The nozzle shown in can be a grounded nozzle. In some embodiments, Figure 2D-2G The showerhead shown in FIG. 1 can be installed in a reaction chamber for chemical vapor deposition or plasma enhanced chemical vapor deposition, such as from Lam Research Corporation (Fremont, CA). Reactors for the product range.

[0082] Figure 3A and 3B Alternative views of a spray head are shown (top view and bottom view, respectively) to which a protective coating may be applied using the techniques described herein. In some cases, Figure 3A and 3B The showerhead 300 shown in the figure can be installed in a reaction chamber for atomic layer deposition. The showerhead 300 includes a plate 301, which has a plurality of first holes 305a and second holes 305b. The first hole 305a extends all the way through the plate 301, but the second hole 305b is only open on the bottom side (sometimes also referred to as the back side) of the showerhead 300. The showerhead 300 includes an internal channel (not shown) that provides reactants to the second hole 305b. When the reactant leaves the second hole 305b, it will pass through the nozzle 306. The nozzle 306 can be referred to as a second gas injector. The internal channel can be fed by a dedicated reactant delivery line (not shown), which can be connected to the showerhead 300 at a gas inlet port (not shown). In some cases, additional separated internal channels can be provided in the plate 301 to provide additional reactants that will not mix with each other until leaving the showerhead 300. When using non-in-situ atomic layer deposition to form a protective coating, even these internal channels can be coated with a protective coating. Additional gas inlet ports (not shown) may be provided as needed for the delivery of additional process gases. Depending on the reactant delivery system and the processing requirements, a single gas inlet port may be used to provide a single reactant or multiple reactants. Liquid may be provided to the showerhead 300 and / or removed from the showerhead 300 by thermal fluid connectors 309 and 311. The thermal fluid may be a heat exchange fluid for heating and / or cooling the showerhead 300. In some embodiments, the thermal fluid connectors 309 and 311 may be covered before the protective coating is deposited. In some cases, the bottom side and the upper side of the showerhead may be reversed so that the hole 305b is open at the upper side of the showerhead. The showerhead may be used in any orientation. Various hole patterns may be used.

[0083] In various embodiments, when the nozzle 306 is not connected to the showerhead 300, the protective coating may be formed on the nozzle 306 and the remaining showerhead 300. After the coating is formed on the nozzle 306 and the remaining showerhead 300, the nozzle 306 may be connected to the second hole 305b to complete the manufacture of the showerhead 300. In another embodiment, the entire showerhead 300 is coated with the protective coating when the nozzle 306 is connected. An O-ring (not shown) may be provided between the nozzle 306 and the plate 301 to ensure an airtight connection.

[0084] Figure 4 Shows Figure 3A and 3B . As described above, the first hole 305a extends all the way through the thickness of the nozzle 300. The nozzle 306 is adapted to the second hole 305b. The nozzle 306 and the second hole 305b deliver gaseous reactants from one or more gas plenums 350 formed in the body of the nozzle 300. The gas plenum 350 receives gas from a gas inlet (not shown). The nozzle 306 includes a gas delivery channel 352. The body of the nozzle 300 also includes one or more cooling plenums 340 through which a heat exchange fluid can flow.

[0085] Figures 5A-5C An alternative view of a substrate support pedestal 500 is illustrated to which a protective coating may be applied using the techniques described herein. In some cases, Figures 5A-5C The substrate support base 500 shown in can be installed in a reaction chamber for atomic layer deposition. The substrate support base 500 includes a main body 501 having a surface 502, and the semiconductor wafer is supported on the surface 502 during processing. The surface 502 includes a plurality of openings, some of which are lift pin openings. Lift pins (not shown) can be configured in the lift pin openings. The lift pins can be operated to lift and lower the semiconductor wafer to facilitate the transfer of the wafer into and out of the reaction chamber. Similarly, lift pin supports (not shown) can be configured in the lift pin openings. If desired, the lift pins can extend through the lift pin supports. An exemplary lift pin support is shown in Figure 6. The lift pins and lift pin supports (and any other detachable parts of the substrate support base 500) can be coated together with the rest of the substrate support base 500, or they can be coated separately. In the case where these parts are coated separately, the substrate support base 500 can be assembled after all necessary parts are coated. The assembled support base is then installed in the reaction chamber. The body 501 of the substrate support base 500 is connected to the rod 503 and supported by the rod 503. Certain areas can be masked before forming the protective coating. For example, any area where electrical contacts will be formed can be masked to ensure that the contacts remain accessible and conductive. Compared to the case where the bottom coating is formed in situ, it is easier to mask the electrical contact area (and any other masked area) when the protective coating is formed in an ex-situ manner. For example, because the chamber components are not installed as an integral chamber component, the relevant chamber components to be coated can be easily handled / manipulated (or even disassembled) to coat all relevant surfaces.

[0086] Figure 6 A lift pin support 600 is shown to which a protective coating may be applied using the techniques described herein. In some cases, Figure 6 The lift pin support 600 shown in FIG. 1 can be provided in a reaction chamber for atomic layer deposition. Lift pins (not shown) can extend through a central opening of the lift pin support 600 to engage with a semiconductor wafer. Figure 5A , the lift pin support 600 may be disposed into the body 502 of the substrate support pedestal 500 .

[0087] Although the various figures are described with reference to specific types of processes and specific reaction chambers, it should be understood that the components shown in these figures can be arranged in other types of reaction chambers and can be used for various types of processes on semiconductor substrates. Examples of additional equipment that can benefit from the described embodiments include, but are not limited to, Any equipment from the product line (chemical vapor deposition and atomic layer deposition), Any equipment from the product line (Plasma Enhanced Chemical Vapor Deposition), Any equipment from the product line (Atomic Layer Deposition) and Any equipment in the Lam Research ELECTRONICS® product line (High Density Plasma Chemical Vapor Deposition), etc. Each of the above product lines is available from Lam Research Corporation (Fremont, CA). Characteristics of protective coatings

[0088] In some embodiments, the protective coating may have specific properties. For example, the protective coating may have a specific composition, density, elastic modulus, hardness, adhesion to underlying layers, stress, crystalline structure, purity, and / or thickness. The desired properties may depend on the type of reaction chamber in which the chamber components are used and the type of processing that occurs in the reaction chamber. Exemplary properties are provided herein, but they are not limiting.

[0089] As mentioned above, the protective coating can use a variety of different compositions. In many embodiments, the protective coating can be an oxide of aluminum (Al x O y ), aluminum nitride (Al x N y ), aluminum fluoride (Al x F y ), aluminum nitride (Al x O y N z ), yttrium oxide (Y x O y ), yttrium fluoride (YxFy), or a combination thereof. These materials are generally considered to be resistant to fluorine radical-based plasmas (such as NF 3 Clean plasma), ammonia plasma and other plasmas (such as Ar+N 2 Plasma, Ar+N 2 +_O 2 Plasma, and Ar+O 2 These types of plasmas can exhibit severe detrimental effects when used with uncoated chamber components, which can result in substantial metal contamination on semiconductor wafers.

[0090] In some embodiments, the protective coating may have an elastic modulus between about 100-400 GPa at all temperatures between about 150-300 ° C. In these or other cases, the protective coating may have a hardness between about 6-18 GPa at all temperatures between about 150-300 ° C. The protective coating may have an adhesion of at least about 200 mN to the underlying material in these or other cases, at least about 1 N or at least about 5 N in some cases. Adhesion can be measured based on the ASTM D7187 scratch adhesion test. In these or other cases, the protective coating may have a maximum stress (compressive stress) of about 500 MPa at all temperatures above about 150 ° C. In these or other cases, the protective coating may have an amorphous (determined by x-ray diffraction) crystalline structure. In these or other cases, the protective coating may have a purity between about 99.9-99.999%. In these or other cases, as discussed elsewhere herein, the protective coating may have a thickness between about 100-500 nm. In these or other cases, the protective coating may have a thickness variation of less than about 3% across all surfaces on which it is deposited. Processing stability

[0091] In various embodiments herein, a reaction chamber having one or more chamber components (e.g., showerhead, susceptor, etc.) is prepared to include a protective coating, and the reaction chamber is operated as described herein to achieve a certain degree of process stability during the process of processing a plurality of semiconductor wafers. Fig. 8A and 8B Further discussion deals with stability issues.

[0092] In some cases, process stability can be analyzed by tracking the non-uniformity across the wafer of a film deposited in a reaction chamber over time. The non-uniformity across the wafer is calculated as the difference in thickness between the thickest and thinnest regions of the film. For example, a film with a thickness range between Between and the average thickness is The first film has In many cases, the differences in non-uniformity across a wafer are analyzed with reference to the average thickness of the film. For example, the thickness ranges between Between and the average thickness is The second film has The variation of the non-uniformity on the wafer between the first film and the second film is 1 Average film thickness Comparison, this means the difference is

[0093] When comparing films from different batches, the same wafer number from different batches should be considered to reduce any differences that may arise from differences / trends between batches. The wafer number is the order in which the wafers are processed within the batch. Thus, when comparing the first batch to the third batch, the first wafer in the first batch should be measured and compared to the first wafer in the third batch. In a similar embodiment, the fifth wafer in the first batch can be measured to the fifth wafer in the third batch.

[0094] The difference in non-uniformity across the wafer during a batch process may be no greater than about 5%, or no greater than about 3%, or no greater than about 2%, or no greater than about 1%, or no greater than about 0.05% of the average film thickness. In many embodiments, this very low difference can be maintained during a process of at least about 10, or at least about 20 batches. The film deposited on the wafer can have any composition, and in a specific embodiment the film is silicon carbide or a derivative of silicon carbide. Reference Fig. 8A In the embodiment described in , the coated showerhead enabled the reaction chamber to achieve a difference in wafer non-uniformity of only about 0.05% of the average film thickness during the process of depositing silicon carbide films on semiconductor wafers in 20 batches (each batch containing 200 wafers). This degree of stability could not be achieved in a similar process using an uncoated showerhead.

[0095] The batch size to achieve the described degree of process stability may be within the ranges described herein. The film deposited on each wafer may be at least about Thick, at least about Thick, at least about Thick, at least about Thick or thicker. In-situ restoration of coated chamber components

[0096] As described above, repeated exposure to processing gases and plasmas can affect the surface of chamber components. In various embodiments, although the non-in-situ coating using ALD can substantially improve the resistance of such chamber components to such exposure, these conditions may eventually change the surface of the coated chamber components. For example, aluminum oxide coatings of showerheads, susceptors, or other chamber components that are repeatedly exposed to nitrogen-containing plasmas may eventually form AlN or AlON bonds. These bonds effectively become surface contaminants, so it may be desirable to remove these bonds. Similarly, aluminum nitride coatings of showerheads, susceptors, or other chamber components that are repeatedly exposed to oxygen-containing plasmas may eventually form AlO or AlNO bonds. These bonds become surface contaminants. Many other embodiments are possible. These changes in surface conditions / contaminants may adversely affect the processing results on the wafer. For example, when the surface of the chamber components becomes more contaminated, more free radicals in the reaction chamber are lost to the contaminated surface, and thus the free radicals that can process the substrate become less. In some embodiments, this can cause a significant trend in performance (such as thickness, uniformity, etc.) on the wafer over time. Such a trend is undesirable because a high degree of uniformity is desired between different substrates processed at different times and any trend in the results across the wafer will reduce such uniformity.

[0097] Removing surface contaminants and restoring the condition of coated chamber components can be done in many ways. Several embodiments are discussed herein. Generally, these embodiments relate to situations where coated chamber components are conditioned in situ in the reaction chamber in which they are installed (e.g., a reaction chamber used to process semiconductor wafers rather than a reaction chamber originally used to coat chamber components ex situ). These embodiments can be combined as desired for a particular application. Example 1: Restoring plasma

[0098] A reaction chamber for processing semiconductor wafers can be conditioned by exposing the reaction chamber to a recovery plasma. The recovery plasma has the function of removing contaminants from the surfaces of the coated chamber components and restoring the surfaces of the coated chamber components to their desired composition (and in some cases, to the desired structure).

[0099] The recovery plasma is generated from a recovery plasma generating gas. The recovery plasma generating gas typically contains at least one component that can be found in a coating on a chamber component. For example, a showerhead (or other chamber component) coated with a metal oxide ex situ can be exposed to a gas containing O 2 Similarly, a showerhead (or another chamber component) coated with a metal nitride ex situ may be exposed to a recovery plasma generated by a recovery plasma generating gas containing N 2The recovery plasma may be generated by a recovery plasma generating gas of a nitrogen-containing substance or another nitrogen-containing substance. The showerhead (or other chamber components) coated with metal fluoride ex situ may be exposed to a self-contained F 2 or another nitrogen-containing substance. In any case, the recovery plasma generating gas may also include one or more inert gases, such as rare gases (such as Ar, He, Ne, etc.). In various embodiments, the recovery plasma generating gas may have no or substantially no (e.g., only trace amounts of) metals and / or silicon.

[0100] Recovery plasma can be directly generated in the reaction chamber for processing semiconductor wafers or it can be remotely generated and then transported to the reaction chamber. In some embodiments, the reaction chamber can be exposed to recovery plasma for a period between about 1 minute and 24 hours. In some cases, the duration is between about 1-60 minutes, between about 1-20 minutes, between about 1-15 minutes, between about 1-2 minutes, or between about 1-24 hours. In some cases, the duration is at least about 1 minute, at least about 2 minutes, at least about 5 minutes, or at least about 10 minutes. In these or other cases, the duration can be about 24 hours or shorter, about 1 hour or shorter, about 20 minutes or shorter, about 15 minutes or shorter, about 10 minutes or shorter, or about 2 minutes or shorter.

[0101] In many cases, the recovery plasma is provided continuously during the duration, but the recovery plasma may be provided periodically or intermittently during the duration (e.g., 30 minutes of plasma on, followed by 30 minutes of plasma off). Intermittent plasma may be used to avoid excessive heating of the plasma on chamber components. The pressure in the reaction chamber during the adjustment step may be between about 0.01-100 mTorr, or between about 0.2-5 Torr, or between about 0.5-5 Torr, or between about 5-40 Torr. In these or other cases, the pressure may be at least about 0.01 mTorr, at least about 0.2 Torr, or at least about 0.5 Torr. In these or other cases, the pressure may be about 40 Torr or less, about 5 Torr or less, or about 1 Torr or less. In some cases, the temperature of one or more chamber components may be controlled during the adjustment step. For example, in some such cases, one or more chamber components (e.g., showerheads, susceptors, etc.) and / or the chamber itself (e.g., chamber walls, floor, ceiling, etc.) may be maintained at a temperature between about 70-400° C., in some cases between about 70-200° C., or between about 70-100° C., or between about 80-160° C., or between about 150-400° C. In some such cases, the temperature may be at least about 70° C., at least about 100° C., or at least about 150° C. In these or other cases, the temperature may be about 400° C. or less, about 200° C. or less, about 160° C. or less, or about 100° C. or less. The recovery plasma can be generated, for example, at a power level ranging from about 1000-10,000 Watts per 300 mm substrate (e.g., about 1000-3000 Watts per 300 mm substrate) and a plasma frequency ranging from about 50 kHz to 2.45 GHz (e.g., 50-700 kHz, 300-500 kHz, or 1.8 MHz-2.45 GHz, or 10-20 MHz, or 50-70 MHz).

[0102] The recovery plasma (or other conditioning technique) may be provided at a particular frequency. In some cases, conditioning is performed after each wafer is processed in the chamber. In other cases, conditioning is performed after n wafers are processed in the chamber, where n is 2, 3, 4, 5, 10, 20, 50, 75, 100, 200, 300, 400, or 500. The optimal frequency of conditioning depends on factors including the processes performed on the wafer, the materials provided to the chamber, timing, etc. In general, cleaning more frequently minimizes the trend of results on the wafer. However, cleaning too frequently may begin to affect yield.

[0103] In some cases, a recovery plasma may be provided to a reaction chamber having coated chamber components therein even before the coated chamber components are used to process any substrates. In this case, the function of the recovery plasma is not to restore the surfaces of the coated chamber components (because the surfaces are still new) but to condition the coated chamber components to prepare these surfaces for the chemicals that will be used during processing. In such embodiments, the recovery plasma may be referred to as an in-situ conditioning plasma. This in-situ conditioning may be repeated any number of times, and in many cases is performed immediately prior to using the coated chamber components, such as when installing new coated chamber components and / or when introducing new processing chemicals. Typically, the in-situ conditioning plasma is a plasma that is formed by a process that conditions the surface of the chamber components and / or processes the chamber components. 2 The plasma and chamber components are coated with aluminum oxide or other oxides, although other compositions / materials may be used in various cases. In-situ conditioning of the plasma is further discussed in U.S. Patent Application No. 14 / 712,167, filed on March 26, 2015, entitled “MINIMIZING RADICAL RECOMBINATION USING ALD SILICON OXIDE SURFACE COATING WITH INTERMITTENT RESTORATION PLASMA,” which is incorporated herein by reference.

[0104] In many cases, no wafer is present in the reaction chamber when conditioning is performed. In certain other cases, a wafer or a dummy wafer (eg, a sacrificial wafer not used for manufacturing) may be present in the reaction chamber when conditioning is performed.

[0105] Reference below Fig. 10A and 10B The experimental results discussed show that the use of a recovery plasma can substantially reduce the time required to restore a reaction chamber (or a coated chamber component therein) to a usable state for processing semiconductor substrates. In addition, the recovery plasma can be used in various situations to restore a coating on a coated chamber component that might otherwise have reached the end of its useful life (e.g., to restore a coated chamber component that could not be restored via other techniques such as waiting for an extended period of time). Example 2: Recovery Plasma with Additional Reactants

[0106] In Example 1, the recovery plasma generating gas includes a single type of reactive species (e.g., reactive oxygen species for recovering oxide-based coatings, reactive nitrogen species for recovering nitride-based coatings, reactive fluoride species for recovering fluoride-based coatings). In contrast, in Example 2, the recovery plasma generating gas includes two or more species that can react with each other. The two species can react to form a desired composition for a coating on a chamber component. For example, a showerhead (or other chamber component) coated with an oxide of aluminum can be exposed to a gas containing both an aluminum-containing reactant and an oxygen-containing reactant (e.g., O 2 A showerhead (or other chamber components) coated with aluminum nitride may be exposed to a recovery plasma generated by a recovery plasma generating gas containing both an aluminum-containing reactant and a nitrogen-containing reactant (e.g., N 2 A showerhead (or other chamber components) coated with aluminum fluoride may be exposed to a recovery plasma generated by a recovery plasma generating gas containing both an aluminum-containing reactant and a fluorine-containing reactant (such as F 2 Although the foregoing embodiments relate to an aluminum-containing coating, it should be understood that neither the coating nor the reactants are limited thereto. In the case where the coating comprises a non-aluminum metal or material, at least one of the reactants may be selected to provide the relevant metal or material.

[0107] Two or more reactants may be provided together at the same time, or they may be provided at different times (e.g., to allow the composition of the recovery plasma generation gas to vary over time). In a particular embodiment, the reactants are staggered to recover and reform the coating on the chamber components by a self-limiting surface reaction.

[0108] In some embodiments, the recovery plasma is provided continuously and both reactants are used in plasma form. In certain other embodiments, the recovery plasma may be provided cyclically or intermittently. In certain such cases, one or more of the reactants (such as metal-containing reactants in some cases) may be provided in the form of a gas to the reaction chamber in the absence of a plasma.

[0109] Any details provided for Example 1 may also apply to Example 2. Example 3: O with phases 2 、N 2 Plasma recovery

[0110] In this embodiment, a reaction chamber used to process semiconductor wafers is exposed to different plasmas at different times to recondition and reform the coating on the relevant chamber components. First, the reaction chamber is exposed to an oxygen plasma (e.g., from an oxygen-containing species such as O 2After this first plasma exposure, the reaction chamber is exposed to a nitrogen plasma (e.g., from a nitrogen-containing species such as N 2 The reaction chamber may be exposed to oxygen plasma for a period of about 30 seconds to 2 minutes and then exposed to nitrogen plasma for a period of about 1 second to 30 seconds. In many cases, there may be a specific ratio between the period of exposure to oxygen plasma and the period of exposure to nitrogen plasma. In some such embodiments, the duration of the reaction chamber being exposed to oxygen plasma may be at least about 5 times longer, at least about 10 times longer, or at least about 15 times longer than the duration of the reaction chamber being exposed to nitrogen plasma. The exposure period may be selected to achieve a specific yield level and processing uniformity, and a longer exposure period generally results in lower yield and higher processing uniformity.

[0111] In some embodiments, the oxygen plasma may have a composition of between about 10-50% oxygen, or between about 10-20% oxygen, with the remainder being inert gases. In these or other embodiments, the nitrogen plasma may have a composition of between about 0.1-5% nitrogen, or between about 0.5-2% nitrogen, with the remainder being inert gases. In some embodiments, the nitrogen plasma may have a higher inert gas composition than the oxygen plasma. In other cases, the reverse may be true.

[0112] In some cases, different plasma generation conditions may be applied when the reaction chamber is exposed to the oxygen plasma and when it is exposed to the nitrogen plasma. For example, in one embodiment, the oxygen plasma is a continuous wave plasma, while the nitrogen plasma is pulsed, such as having a duty cycle of less than 50%. The power (such as RF power in many cases) used to generate the different plasmas may also be different. In one embodiment, the power used to generate the oxygen plasma may be greater than the power used to generate the nitrogen plasma (in some cases, at least twice as much). Exemplary power levels for generating the plasma include, but are not limited to, between about 500-2500 W per 300 mm substrate.

[0113] The following will further refer to Fig.11A and 11B Experimental results are discussed, which show that this staged adjustment technique can significantly reduce or even eliminate the trends observed in the on-wafer process results described above, thereby obtaining a far more uniform product. This increases the reliability of the reaction chamber, thereby maximizing value.

[0114] Any details provided for Embodiments 1 and 2 may also be applied to Embodiment 3. Example 4: Thorough Chamber Cleaning Using Wet or Dry Chemicals

[0115] In some cases, a more thorough cleaning process may be required to restore the surfaces of the coated chamber components. This is particularly true when the chamber components are coated with particularly thick films formed by byproducts of processing on semiconductor wafers. In one embodiment, chamber components that were coated ex situ with aluminum oxide (or other coating material) become covered with silicon oxide (or another byproduct material) after being used in an associated reaction chamber to process semiconductor wafers. The chamber components may be cleaned using wet or dry chemistries (with or without plasma) to remove the byproduct material. In one embodiment, the reaction chamber is exposed to a film of aluminum oxide (or other coating material) from the F 2 NF 3 , or a plasma generated (directly or remotely) by at least one of a plurality of fluorine-containing cleaning reactants. In another embodiment, the reaction chamber (or associated coated chamber components) may be exposed to a wet chemical to remove byproduct materials. Exemplary wet chemicals include, but are not limited to, various acids and bases, alcohols, water, deionized water, acetone, and the like. Certain specific embodiments include ammonium hydroxide (NH 4 OH), hydrogen peroxide (H 2 O 2 ), hydrochloric acid (HC1), hydrofluoric acid (HF), nitric acid (HNO 3 ), isopropyl alcohol (C 3 H 8 O) etc.

[0116] Although certain embodiments of Example 1 and Example 4 each involve exposing a reaction chamber to a plasma to thereby condition a coated chamber component, there are certain important differences between the two embodiments. In Example 1, the recovery plasma generation gas typically contains at least one component present in the coating of the coated chamber component (e.g., oxygen in an oxide coating, nitrogen in a nitride coating, etc.). In contrast, in Example 4, the chemical is typically a cleaning chemical (e.g., a fluorine-containing chemical in many cases). In many cases, the cleaning chemical does not contain a component present in the coating of the coated chamber component. For example, where the coating on the chamber component is an oxide of aluminum, according to Example 4, F 2 or NF 3 Plasma may be particularly suitable for use in clean room components because F 2 Neither NF3 nor aluminum contains oxygen. Relatedly, if chamber components coated with aluminum fluoride are exposed to F 2 The plasma would be considered the recovery plasma in Example 1 because both the coating and the plasma contain fluorine.

[0117] When using wet or dry chemical techniques, the coated chamber components may be exposed to the wet chemical or dry chemical (such as plasma) for a period of between about 0.5 seconds and 24 hours, depending on the technique used. In some cases, the period may be between about 0.5 seconds and 2 minutes, or between about 1-30 seconds, or between about 1-15 minutes, or between about 1-60 minutes, or between about 1-24 hours. In some cases, the period may be at least about 0.5 seconds, at least about 1 second, at least about 10 seconds, at least about 30 seconds, at least about 1 minute, at least about 10 minutes, at least about 30 minutes, or at least about 1 hour. In these or other cases, the period is about 24 hours or less, about 1 hour or less, about 30 minutes or less, about 10 minutes or less, about 1 minute or less, about 30 seconds or less, or about 10 seconds or less.

[0118] The cleaning operation may leave some fluorine on the surfaces of the coated chamber components. This fluorine may be removed using a recovery plasma as described in Reference Example 1, or may be removed using a reducing plasma such as H 2 Plasma removal. 2 In the case of plasma, any fluorine left on the coated chamber components can be removed / extracted in the form of HF and then pumped out of the reaction chamber. The cleaning technique described in Example 4 can advantageously reduce particle formation on semiconductor wafers. The cleaning operation can be performed intermittently or cyclically as needed. Example 5: After a thorough chamber clean, recovery plasma is used

[0119] This example is a specific implementation using both Examples 1 and 4. After cleaning the chamber or chamber components with a wet or dry chemical as described in Example 4, the chamber is exposed to a restoration plasma as described with reference to Example 1. This technique can be used to restore the coated chamber components to a near-new condition so that the surfaces of the coated chamber components are substantially "like new" (having the same or very similar properties as the coated chamber components after first being coated ex situ and installed in a chamber for processing semiconductor wafers). The details provided for Examples 1 and 4 can also be applied to Example 5. Embodiment 6: any other combination of Embodiment 1-5

[0120] Examples 1-5 may be combined as needed for a particular application. Similarly, these embodiments may be combined with any other techniques described herein, including but not limited to delaying the change in the surface composition of the coated chamber components by controlling temperature as will be further described below. These techniques can work together to provide better results and uniformity. Delaying changes in the surface composition of coated parts

[0121] In some embodiments, certain steps may be taken to delay changes in the surface composition of chamber components coated in the manner described herein. Such steps may include heating the coated chamber components and / or heating the reaction chamber to an elevated temperature (e.g., a temperature above standard room temperature, in some cases a temperature above that used to process semiconductor wafers).

[0122] In many applications, the elevated temperature may be between about 40-100° C. In certain specific applications, the elevated temperature may be at least about 40° C., at least about 50° C., at least about 60° C., at least about 70° C., at least about 80° C., or at least about 90° C. In these or other applications, the elevated temperature may be about 120° C. or less, about 100° C. or less, about 90° C. or less, about 80° C. or less, about 70° C. or less, or about 60° C. or less. The ideal temperature may depend on the specific application under consideration, including the composition of the coating on the coated chamber component, the composition of the reactants / byproducts used in the reaction chamber, and the heating characteristics of the various chamber components.

[0123] In some embodiments, the coated chamber components and / or the reaction chamber may be raised to the elevated temperature intermittently or periodically while the reaction chamber is being used to process semiconductor wafers. For example, the coated chamber components and / or the reaction chamber may be raised to the elevated temperature between processing subsequent semiconductor wafers (e.g., after processing each semiconductor wafer, or after processing a particular number of semiconductor wafers). The semiconductor wafer may or may not be present in the reaction chamber when the elevated temperature is provided. In another embodiment, the coated chamber components and / or the reaction chamber may be raised to the elevated temperature during one or more processing steps when processing the semiconductor wafer. In certain other embodiments, the elevated temperature may be provided in a continuous manner (e.g., while processing a semiconductor wafer, and between processing subsequent semiconductor wafers) while the temperature of the component(s) does not fall below a minimum threshold when the reaction chamber is in use.

[0124] Where the elevated temperature is provided intermittently or periodically, the duration of providing the elevated temperature may be between about 30 minutes and 3 hours, and in some cases may be between about 30-60 minutes, or between about 2-3 hours.

[0125] Reference below Figures 12A-12H Experimental results discussed further illustrate that heating the showerhead as described herein significantly reduces characteristic drift observed during processing of additional batches of semiconductor wafers. equipment

[0126] The methods described herein may be implemented with any suitable equipment. Suitable equipment includes hardware for performing processing operations and a system controller having instructions for controlling processing operations according to embodiments of the present invention. For example, in some embodiments, the hardware may include one or more processing stations included in a processing device.

[0127] Various embodiments herein relate to methods for preparing chamber components for installation into a reaction chamber. A chamber component is prepared using a first reaction chamber by depositing a protective coating on the chamber component. The chamber component is then removed from the first reaction chamber and installed in a second reaction chamber, wherein the chamber component can be used for its intended purpose when the second reaction chamber is used to process semiconductor wafers. The first reaction chamber can be any reaction chamber that meets the following conditions: (1) is configured to perform atomic layer deposition; and (2) has a chamber large enough to adequately accommodate the chamber component to be coated. The second reaction chamber can be any reaction chamber used to process semiconductor wafers. In many cases, the second reaction chamber is a reaction chamber used for atomic layer deposition and / or chemical vapor deposition.

[0128] Figure 7 Schematically illustrates an embodiment of a processing station 700 that can be used to deposit a protective coating on a chamber component as described herein. It should be understood that Figure 7 The processing station 700 can also be used to deposit films on semiconductor substrates (e.g., via atomic layer deposition and / or chemical vapor deposition), and any of the components in the processing station 700 can be coated using the techniques described herein. For simplicity, the processing station 700 is shown as a stand-alone processing station having a processing chamber body 702 for maintaining a low pressure environment. However, it should be understood that in some embodiments, multiple processing stations 700 can be included in a common processing equipment environment. It should also be understood that in some embodiments, one or more hardware parameters of the processing station 700 (including the parameters discussed in detail herein) can be adjusted programmatically by one or more computer controllers.

[0129] The processing station 700 is in fluid communication with a reactant delivery system 701 for delivering process gases to a distribution showerhead 706. The reactant delivery system 701 includes a mixing vessel 704 for mixing and / or conditioning process gases to be delivered to the showerhead 706. One or more mixing vessel inlet valves 720 can control the introduction of process gases to the mixing vessel 704. Similarly, a showerhead inlet valve 705 can control the introduction of process gases to the showerhead 706.

[0130] Certain reactants, such as BTBAS, may be stored in liquid form before being evaporated and subsequently transported to a processing station. Figure 7Embodiments include an evaporation point 703 for evaporating liquid reactants to be supplied to a mixing vessel 704. In the case where the reactants are all gases, the evaporation point 703 can be omitted. In some embodiments, the evaporation point 703 can be a heated evaporator. The reactant vapor produced from such an evaporator will condense in the downstream transport line. Incompatible gases exposed to the condensed reactants may produce small particles. These small particles can block pipelines, hinder valve operation, contaminate substrates, etc. Some methods to solve these problems involve sweeping and / or emptying the transport line to remove remaining reactants. However, sweeping the transport line will increase the processing station cycle time and reduce the output of the processing station. Therefore, in some embodiments, the transport line downstream of the evaporation point 703 can be heat traced. In certain embodiments, the mixing vessel 704 can also be heat traced. In a non-limiting embodiment, the pipeline downstream of the evaporation point 703 has a higher temperature distribution, which extends from about 100°C to about 150°C at the mixing vessel 704.

[0131] In some embodiments, the evaporation point 703 can be a heated liquid injector. For example, the liquid injector can inject the pulse of the liquid reactant into the carrier gas flow upstream of the mixing container. In one case, the liquid injector can evaporate the reactant by changing the liquid from a higher pressure to a lower pressure in an instant. In another case, the liquid injector can atomize the liquid into dispersed droplets, which then evaporate in a heated delivery line. It should be understood that smaller droplets evaporate faster than larger droplets, so the delay between liquid injection and completion of evaporation can be reduced. Faster evaporation can reduce the length of the pipeline downstream of the evaporation point 703. In one case, the liquid injector can be directly installed to the mixing container 704. In another case, the liquid injector can be directly installed on the spray head 706.

[0132] In some embodiments, a liquid flow controller upstream of the evaporation point 703 may be provided to control the mass flow rate of the liquid evaporated and delivered to the processing station 700. For example, the liquid flow controller (LFC) may include a thermal mass flow meter (MFM) located downstream of the LFC. The plunger valve of the LFC can then be adjusted in response to the feedback control signal provided by a proportional-integral-differential (PID) controller that is in electrical communication with the MFM. However, it may take one second or more to stabilize the liquid flow using feedback control. This may extend the dosing time of the liquid reactant. Therefore, in some embodiments, the LFC can dynamically switch between a feedback control mode and a direct control mode. In some embodiments, the LFC can dynamically switch from a feedback control mode to a direct control mode by deactivating the sensing tube of the LFC and the PID controller.

[0133] The showerhead 706 distributes the processing gas toward the substrate 712. Figure 7In the illustrated embodiment, substrate 712 is located below showerhead 706 and is shown sitting on lift pins 730 on base 708. Substrate 712 is a chamber component that is being coated. For example, substrate 712 can be Figure 2A-2B , 2D-G, 3A-3B, or any of the showerheads shown in 4. Substrate 712 may also be a lift pin, a lift pin support, a substrate support pedestal, a reactant delivery line, or any other chamber component to be coated with a protective coating. Figure 7 Only a single substrate 712 is shown in the reaction chamber, but it should be understood that in some embodiments multiple substrates can be coated simultaneously in a single reaction chamber. The pedestal 708, lift pins 730, and related hardware can be modified as needed to support specific chamber components during deposition to ensure that all relevant surfaces of the chamber components are coated. In some cases, the pedestal 708 can support the chamber components at their periphery so that both the upper surface and the lower surface of the chamber components are substantially exposed.

[0134] It should be understood that showerhead 706 may have any suitable shape and may have any suitable number and configuration of ports to distribute process gases to substrate 712. Any of the showerheads shown herein may be used in some cases.

[0135] In some embodiments, microvolume 707 is located below showerhead 706. Performing ALD and / or CVD processing in a microvolume in a processing station can reduce reactant exposure and sweep time, reduce the time required to switch processing conditions (such as pressure, temperature, etc.), limit the exposure of the processing station robot to processing gases, etc., compared to performing ALD and / or CVD processing in the entire volume. Examples of microvolume sizes may include, but are not limited to, volumes between 0.1 liters and 2 liters. Larger microvolumes may be required to accommodate relatively large chamber components. The microvolume can also affect production yields. Although the deposition rate per cycle is reduced, the cycle time is also reduced. In some cases, the latter effect is large enough to improve the overall yield of a module for a specific target film thickness.

[0136] In some embodiments, the pedestal 708 can be raised or lowered to expose the substrate 712 to the microvolume 707 and / or to change the volume of the microvolume 707. For example, during a substrate transfer phase, the pedestal 708 can be lowered to enable the substrate 712 to be loaded onto the pedestal 708. During a deposition process phase, the pedestal 708 can be raised to place the substrate 712 in the microvolume 707. In some embodiments, the microvolume 707 can completely surround the substrate 712 as well as a portion of the pedestal 708 to create a high flow impedance region during the deposition process.

[0137] Optionally, the pedestal 708 may be lowered and / or raised during portions of the deposition process to adjust process pressure, reactant concentrations, etc. within the microvolume 707. Lowering the pedestal 708 may allow the microvolume 707 to be evacuated while the process chamber body 702 is maintained at a base pressure during deposition. Exemplary ratios of the volume of the microvolume to the volume of the process chamber may include, but are not limited to, ratios between 1:700 and 1:10. It should be appreciated that in some embodiments, the pedestal height may be programmatically adjusted by a suitable computer controller.

[0138] In another case, adjusting the height of pedestal 708 can change the plasma density during plasma activation and / or during a process cycle involved in a deposition process. Upon completion of a deposition process phase, pedestal 708 can be lowered to remove substrate 712 from pedestal 708 during another substrate transfer phase.

[0139] Although the exemplary microvolume changes described herein refer to a height-adjustable pedestal, it should be understood that in some embodiments, the position of the showerhead 706 relative to the pedestal 708 can be adjusted to change the volume of the microvolume 707. In addition, it should be understood that the vertical position of the pedestal 708 and / or showerhead 706 can be changed by any suitable mechanism within the scope of the present invention. In some embodiments, the pedestal 708 can include a rotation axis for rotating the orientation of the substrate 712. It should be understood that in some embodiments, one or more of these exemplary adjustments can be performed programmatically by one or more suitable computer controllers.

[0140] Back to Figure 7 In the embodiment shown, the showerhead 706 and the base 708 are electrically connected to the RF power supply 714 and the matching network 716 for supplying energy to the plasma. In some embodiments, the plasma energy can be controlled by controlling one or more of the processing station pressure, gas concentration, RF source power, RF source frequency, and plasma power pulse timing. For example, the RF power supply 714 and the matching network 716 can be operated at any appropriate power to produce a plasma with a desired free radical species composition. Examples of appropriate power are included in the above paragraphs. Similarly, the RF power supply 714 can provide RF power with any appropriate frequency. In some embodiments, the RF power supply 714 can be used to control high-frequency and low-frequency RF power sources independently of each other. Examples of low-frequency RF frequencies may include, but are not limited to, frequencies between 50kHz and 700kHz. Examples of high-frequency RF frequencies may include, but are not limited to, frequencies between 1.8MHz and 2.45GHz. It should be understood that any appropriate parameter can be adjusted discretely or continuously to provide plasma energy for surface reactions. In one non-limiting example, the plasma power may be intermittently pulsed to reduce ion bombardment of the substrate surface relative to a continuously powered plasma.

[0141] In some embodiments, the plasma may be monitored in situ by one or more plasma monitors. In one case, the plasma power may be monitored by one or more voltage and current sensors (such as VI probes). In another case, the plasma density and / or the concentration of the process gas may be measured by one or more optical emission spectroscopy (OES) sensors. In some embodiments, one or more plasma parameters may be programmatically adjusted based on the measurements from such in situ monitors. For example, an OES sensor may be used in a feedback loop that provides programmed control of the plasma power. It should be understood that in some embodiments, other monitors may be used to monitor plasma and other process characteristics. Such monitors may include, but are not limited to, infrared (IR) monitors, acoustic monitors, and pressure sensors.

[0142] In some embodiments, the plasma may be controlled by an input / output control (IOC) sequence instruction. In one embodiment, instructions for setting plasma conditions for a plasma treatment phase may be included in a corresponding plasma activation recipe phase of a deposition process recipe. In some cases, the process recipe phases may be configured in sequence so that all instructions for a deposition process phase are executed synchronously with the process phase. In some embodiments, instructions for setting one or more plasma parameters may be included in a recipe phase prior to the plasma treatment phase. For example, a first recipe phase may include instructions for setting the flow rate of an inert gas and / or a reactant gas, instructions for setting a plasma generator to a power set point, and time delay instructions for the first recipe phase. A subsequent second recipe phase may include instructions for enabling a plasma generator and time delay instructions for a second recipe phase. A third recipe phase may include instructions for deactivating a plasma generator and time delay instructions for a third recipe phase. It should be understood that these recipe phases may be further subdivided and / or repeated in any suitable manner within the scope of the present invention.

[0143] In some deposition processes, the plasma excitation lasts for a time on the order of seconds or longer. In some embodiments, shorter plasma excitations may be applied. These plasma excitations may last for a time on the order of 10 milliseconds to 1 second, about 20 to 80 milliseconds, with 50 milliseconds being a specific exemplary time. This extremely short RF plasma excitation requires extremely fast stabilization of the plasma. To achieve this goal, the plasma generator may be configured so that the impedance match is set to a preset voltage while allowing the frequency to float. Traditionally, high frequency plasmas are generated at an RF frequency of about 13.56 MHz. In various embodiments described herein, the frequency is allowed to float to a value different from this standard value. By allowing the frequency to float but fixing the impedance match at a predetermined voltage, the plasma can be stabilized more quickly, a result that may be important when using extremely short plasma excitations associated with certain deposition cycle types.

[0144] In some cases where the protective film is formed via a thermally driven reaction rather than a plasma driven reaction, the RF power source 714 and matching network 716 may be omitted. However, the RF power source 714 and matching network 716 may be used for non-deposition related processes such as chamber cleaning and / or film processing.

[0145] In some embodiments, the temperature of the pedestal 708 can be controlled by a heater 710. Additionally, in some embodiments, pressure control of the deposition processing station 700 can be provided by a butterfly valve 718. Figure 7 In the embodiment shown in FIG. 1 , the butterfly valve can adjust the vacuum of a downstream vacuum pump (not shown). However, in some embodiments, the pressure control of the process station 700 can be adjusted by changing the flow rate of one or more gases introduced into the process station 700. System Controller

[0146] In some implementations, the controller is part of a system, which can be part of the above examples. Such a system can include a semiconductor processing device, which includes one or more processing tools, one or more chambers, one or more platforms for processing, and / or specific processing components (wafer pedestals, gas flow systems, etc.). These systems can be integrated with electronic devices for controlling their operations before, during, and after the processing of semiconductor wafers or substrates. The electronic device can be referred to as a "controller", which can control various components or subcomponents of one or more systems. Depending on the processing requirements and / or system type, the controller can be programmed to control any of the processes disclosed herein, including the delivery of process gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, position and operation settings, wafer transfer in and out of tools and other transfer tools and / or load locks connected to or connected to a specific system through an interface.

[0147] In general, a controller can be defined as an electronic device having various integrated circuits, logic, memory, and / or software that receive instructions, issue instructions, control operations, enable cleaning operations, enable endpoint measurements, etc. The integrated circuits can include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and / or one or more microprocessors, or microcontrollers that execute program instructions (e.g., software). The program instructions can be instructions sent to the controller in the form of various individual settings (or program files) that define operating parameters for performing specific processing on or for a semiconductor wafer or system. In some embodiments, the operating parameters can be part of a recipe defined by a process engineer to complete one or more processing steps during the manufacture of one or more (kinds of) layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies of a wafer.

[0148] In some implementations, the controller may be part of or coupled to a computer that is integrated with the system, coupled to the system, otherwise networked to the system, or a combination thereof. For example, the controller may be in the "cloud" or may be all or part of a wafer fab host system that may allow remote access to wafer processing. The computer may enable remote access to the system to monitor the current progress of a manufacturing operation, check the history of past manufacturing operations, check trends or performance criteria for multiple manufacturing operations, change parameters of a current process, set processing steps to follow the current process, or start a new process. In some examples, a remote computer (e.g., a server) may provide a processing recipe to the system via a network (which may include a local network or the Internet). The remote computer may include a user interface that enables input or programming of parameters and / or settings, which are then sent from the remote computer to the system. In some examples, the controller receives instructions in the form of data that specify parameters for each processing step to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process to be performed and the type of tool that the controller is configured to interface with or control. Thus, as described above, the controller may be distributed, for example, by including one or more discrete controllers networked together and working toward a common purpose (e.g., processing and control as described herein). An example of a distributed controller for such a purpose is one or more integrated circuits on a chamber that communicate with one or more integrated circuits remotely (e.g., at a platform level or as part of a remote computer), which combine to control processing on the chamber.

[0149] Example systems may include, but are not limited to, plasma etch chambers or modules, deposition chambers or modules, spin rinse chambers or modules, metal plating chambers or modules, cleaning chambers or modules, chamfer edge etch chambers or modules, physical vapor deposition (PVD) chambers or modules, chemical vapor deposition (CVD) chambers or modules, atomic layer deposition (ALD) chambers or modules, atomic layer etch (ALE) chambers or modules, ion implantation chambers or modules, track chambers or modules, and any other semiconductor processing system that may be associated with or used in the manufacture and / or preparation of semiconductor wafers.

[0150] As described above, depending on one or more processing steps to be performed by the tool, the controller can communicate with one or more other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout the factory, a host computer, another controller, or tools used in material transport to transport wafer containers to and from tool locations and / or load ports in a semiconductor manufacturing facility.

[0151] The various hardware and method embodiments described above may be used with lithography patterning tools or processes, such as for manufacturing or producing semiconductor devices, displays, LEDs, photovoltaic panels, etc. Typically, although not necessarily, these tools / processes are used or performed together in a common manufacturing facility.

[0152] The photolithographic patterning of the film generally includes some or all of the following steps, each of which can be accomplished by a number of possible tools: (1) applying a photoresist to a workpiece, such as a substrate having a silicon nitride film formed thereon, using a spin coating or spray coating tool; (2) curing the photoresist using a hot plate, oven, or other suitable curing tool; (3) exposing the photoresist to visible or UV light or X-rays using a tool such as a wafer stepper: (4) developing the resist using a tool such as a wet tank or spray developing device to selectively remove the resist, thereby patterning it; (5) transferring the resist pattern to an underlying film or workpiece using a dry or plasma assisted etching tool; and (6) removing the photoresist using a tool such as an RF or microwave plasma resist stripping device. In some embodiments, an ashing hard mask layer such as an amorphous carbon layer and another suitable hard mask such as an antireflective layer may be deposited prior to applying the photoresist.

[0153] It should be understood that the configuration and / or method described herein are exemplary in nature, and these specific embodiments or examples should not be considered as restrictive, and many variations are feasible. The specific routine work or method described herein can represent one or more of any number of processing strategies. Therefore, the various steps described can be performed in the described order, other orders, parallel order, or in some cases omitted. Similarly, the order of the above-mentioned processing can be changed. Certain references have been included here as a reference. It should be understood that any statement made in such references is abandoned or denied and will not necessarily apply to the embodiments described herein. Similarly, any necessary features described in such references can be omitted in the embodiments herein.

[0154] The subject matter of the present invention includes all novel and nonobvious combinations and subcombinations of the various processes, systems, configurations, other features, functions, acts, and / or properties described herein, and all equivalents thereof. test

[0155] Fig. 8A Depicted is the deposition of 20 batches of A graph of the percent change in across-wafer non-uniformity experienced by a film thickness during a process of depositing a silicon carbide film of 1000 Å thick on a semiconductor wafer. The graph includes results for: (1) a reaction chamber including a showerhead and a substrate support pedestal having an oxide of aluminum coated using an ex situ atomic layer deposition process as described herein; and (2) a reaction chamber including an uncoated showerhead and support pedestal. Because the first batch was used as a basis for calculating the change in across-wafer non-uniformity, the first batch in each case exhibited a 0% change in across-wafer non-uniformity.

[0156] Each batch contains about 50 wafers, and the wafers are processed sequentially within the batch. The non-uniformity on the wafer is measured for the first wafer of each batch. This value is used as a benchmark to track the change in non-uniformity on all remaining batches of wafers. During the process of each batch, unwanted materials (byproducts of film deposition on the wafers) accumulate on the internal chamber surfaces. After all wafers in a batch are processed, the reaction chamber used to process the wafers is subjected to a cleaning cycle by exposing it to a fluorine gas plasma. The fluorine radicals in the plasma act to remove materials accumulated on the chamber surfaces during the process of depositing the film on the wafer, thereby cleaning the reaction chamber.

[0157] Fig. 8A The y-axis in represents the change in non-uniformity across the wafer (compared to Batch 1) expressed as a percentage of the average film thickness. As mentioned above, the non-uniformity across the wafer is measured for the first wafer in each batch. It is generally expected that the non-uniformity across the wafer is stable during the course of a batch and between different batches. Fig. 8A It is expected that the variation of non-uniformity across the wafer during the process of different batches is maintained at about 0.

[0158] Fig. 8A The lower line in corresponds to the case where the showerhead and substrate support base are not coated. The non-uniformity on the wafer has changed substantially over time compared to Batch 1 (which is expressed as a percentage of the average film thickness, for example, a decrease of about 5%). This trend shows that when the showerhead and substrate support base are not coated, the non-uniformity on the wafer is extremely unstable. This instability is not expected. Without being limited by theory and mechanism of action, it is believed that the instability is caused by the conversion of the aluminum 6061-T6 showerhead surface to aluminum fluoride (to some extent) each time the showerhead is exposed to the nitrogen fluoride cleaning plasma. This phenomenon is one of the reasons why conventional showerheads need to be replaced periodically. It is believed that the use of showerheads (and optionally other chamber components) coated with protective coatings ex situ as described herein can substantially improve the resistance of the showerhead to nitrogen fluoride cleaning plasma (and ammonia plasma), which means that each showerhead can be used for a longer time and more stable processing results can be achieved. This can significantly reduce the cost of semiconductor manufacturing over time.

[0159] Fig. 8A The upper line in corresponds to the case where the showerhead and substrate support pedestal are coated with aluminum oxide using the techniques described herein. In this case, the non-uniformity across the wafers is substantially more stable from batch to batch, showing only minimal differences between batch 1 and batch 20. In fact, across the 20 batches, the difference in non-uniformity across the wafers is only about 0.05% of the average film thickness of the substrates tested. This stability represents a significant improvement, indicating that the protective coating is adequately protecting the chamber components from degradation due to plasma exposure. By the end of the 20 batches, the difference in non-uniformity across the wafers with uncoated chamber components is about 20 times greater than the difference in non-uniformity across the wafers with coated chamber components.

[0160] Figure 8B The graph shows the variation of the intra-batch non-uniformity (expressed as a percentage of the average film thickness) across wafers for each of the 20 batches. The intra-batch variation of the intra-batch non-uniformity for each batch is calculated as follows: the intra-batch non-uniformity of the last wafer in the batch minus the intra-batch non-uniformity of the first wafer in the batch. Figure 8B The value is expressed as a percentage of the average film thickness. In other words, Figure 8BThe y-axis in represents the trend of how much non-uniformity there is on the wafer during each individual batch out of a total of 20 batches. It is expected that this value is not only low but also stable over time. The graph includes the results of both: (1) a reaction chamber including a showerhead and a substrate support pedestal having an aluminum oxide coated using the ex-situ atomic layer deposition process described herein; and (2) a reaction chamber including an uncoated showerhead and support pedestal. For the reaction chamber with the uncoated showerhead and pedestal, the non-uniformity on the wafer within the batch increases during the course of the 20 batches. As Fig. 8A In contrast, reaction chambers with coated showerheads and susceptors exhibit more stable intra-batch across-wafer non-uniformities during batch processing. In addition, the intra-batch variation in across-wafer non-uniformities is generally lower when the chamber components are coated than when the chamber components are uncoated, indicating a less pronounced trend in across-wafer non-uniformities within each batch when the coated chamber components are used. Fig. 8A and 8B The results in show that the coated chamber components provide substantial improvements in repeatability and uniform process results.

[0161] Additional experimental results show that the ex situ deposited protective coatings described herein are resistant to fluorine-containing plasmas such as NF 3 Plasma and reducing plasmas such as ammonia plasma are highly resistant. For example, when a showerhead-mounted reaction chamber was used to deposit films on approximately 5,000 semiconductor substrates, a showerhead having a protective coating of 500 nm thick aluminum oxide deposited via an ex situ thermally driven atomic layer deposition process was repeatedly exposed to NH 3 plasma or ammonia plasma. Even after repeated exposure to NH 3 After the plasma, nitrogen could only penetrate to a depth of about 30 nm above the showerhead, reaching a maximum concentration of about 5% atomic nitrogen. 3 After the plasma, the fluorine can only penetrate to a depth of about 40 nm into the coating on the showerhead, reaching a maximum concentration of about 10% atomic fluorine.

[0162] Together, these results show that the ex-situ ALD coating techniques described herein can be used to form high quality protective coatings on chamber components, wherein the protective coatings provide substantial resistance to fluorine-nitrogen plasmas and ammonia plasmas. Since these plasmas are commonly used to clean reaction chambers, it is important that the protective coatings withstand exposure to these plasmas during repeated cleaning cycles. This resistance ensures that the coated chamber components can have a long useful life once installed in a reaction chamber, operating to avoid or otherwise minimize contamination that would result if the chamber components were not coated.

[0163] Fig. 9The graph of illustrates the effectiveness of a protective coating of aluminum oxide for minimizing the generation of unwanted particles. The protective coating of aluminum oxide was deposited on a showerhead ex situ via atomic layer deposition. The showerhead was installed in a reaction chamber for processing semiconductor substrates and was subjected to a cycle equivalent to approximately 10,000 wafers. In other words, the gas entering the chamber deposited a CVD film on 10,000 wafers. Some of the wafers were analyzed to assess the number of particles observed on the wafer surface. Fig. 9 As shown in , this analysis on semiconductor wafers occurred after about 2000 wafer equivalent cycles, after about 7000 wafer equivalent cycles, after about 9000 wafer equivalent cycles, after about 10,000 wafer equivalent cycles, and after about 13,000 wafer equivalent cycles. Five or fewer particle additions (>0.045 pm) were observed per semiconductor wafer until 10,000 wafer equivalent cycles were experienced on the showerhead.

[0164] Additional experimental results showed that protective aluminum oxide coatings can be formed in a highly conformal manner on a variety of surface geometries and defects.

[0165] Fig. 10A and 10B The experimental results provided show that a recovery plasma can be used to restore a reaction chamber (and the coated components therein) to a desired state in an extremely rapid manner. Fig. 10A The filling parameters are shown for: (1) a reaction chamber in a high filling parameter state; and (2) a reaction chamber in a low filling parameter state. The filling parameters reflect the filling performance on the semiconductor wafer being processed in the reaction chamber.

[0166] In general, it is desirable that the fill parameters be uniform over time as additional semiconductor wafers are processed in the reaction chamber. Such uniformity in the reaction chamber results in greater uniformity of processing results across the semiconductor wafers. The desired fill parameters for this particular embodiment are shown between the two horizontal dashed lines. In other applications, the desired fill parameters may exceed these values. Fig. 10A and 10B In embodiments, it is desirable to operate the reaction chamber at a high fill parameter state (e.g. Fig. 10A The high fill parameter state shown on the left shows a fill parameter that falls within the horizontal dashed line).

[0167] However, various processing operations may change the conditions within the reaction chamber, changing the reaction chamber from a high fill parameter state to a low fill parameter state. Fig. 10A and 10BIn some embodiments, the low fill parameter state represents a fill parameter that is well below a desired range. Operations that may reduce the fill parameter may include, but are not limited to, various events, such as pump problems, abatement problems, problems with the chamber generator, improperly stopping chamber operations, etc. In addition, events that may affect the properties of the coating on the coated chamber components (such as causing fluorination or nitridation of the oxide coating) may significantly affect the fill parameter. Furthermore, even processes that operate the reaction chamber or leave the reaction chamber idle may change the state of the reaction chamber. Thus, the reaction chamber may change / drift from a high fill parameter state to a low fill parameter state during the process of processing one or more semiconductor wafers in the reaction chamber or during an idle process. In various cases, the reaction chamber may change from a high fill parameter state to a low fill parameter state after continuous operation in which a batch of semiconductor wafers are processed.

[0168] During a batch process, wafers are processed sequentially at different times, but in some cases, the equipment can be configured to process multiple wafers simultaneously, for example at different stations. Each batch of wafers contains all of the wafers processed between full chamber cleaning operations (which typically involve substantially removing any byproducts accumulated on chamber surfaces). In some cases, a batch can contain tens of semiconductor wafers. In other cases, the batch is larger and can contain, for example, hundreds of semiconductor wafers.

[0169] Because it is desirable to operate the reaction chamber at a uniform chamber state over time (e.g., to keep the fill parameter uniform over time) and because normal processing operations may tend to reduce the fill parameter, it is sometimes desirable to increase the fill parameter of the reaction chamber. Increasing the fill parameter can restore the reaction chamber to a high fill parameter state to process semiconductor wafers at the same state as previously processed.

[0170] A method that can be used to change the reaction chamber from a low fill parameter state to a high fill parameter state is to wait for a longer period of time (e.g., several hours, typically longer than 10 hours). In the case where the fill parameter decreases during the processing process due to nitrogen attack on the coated chamber components (e.g., due to exposure of the coated chamber components to a nitrogen-containing plasma), the fill parameter will slowly increase during this longer waiting period due to the detachment of nitrogen radicals from the coated chamber components. Other unwanted materials present on the coated chamber components may undergo similar detachment. However, this waiting technique is not always successful in recovering the reaction chamber and re-establishing the high fill parameter state. Previously, in the case of unsuccessful waiting, the coated chamber components were typically scrapped and new coated chamber components were provided to the reaction chamber. Over time, such replacements can be expensive, not only in terms of the cost of the replacement components themselves, but also in terms of the downtime / lost production capacity associated with waiting and replacing the components.

[0171] Another technique for restoring a reaction chamber to a high fill parameter state is to expose the reaction chamber to a recovery plasma as described above. The recovery plasma can quickly restore the chamber from a low fill parameter state to a high fill parameter state without having to wait hours for nitrogen (or other unwanted materials) to escape from the coated chamber components. This substantially reduces the time that the reaction chamber is unavailable for processing semiconductor substrates, thereby increasing throughput and maximizing value.

[0172] Fig. 10B The filling parameters of the reaction chamber before and after the recovery plasma is applied are illustrated. Before the reaction chamber is exposed to the recovery plasma, the reaction chamber is in a low filling parameter state. The reaction chamber is then continuously exposed to the recovery plasma from 0 2 The recovery plasma generated by the mixture with Ar was exposed to the recovery plasma for about 20 minutes. After exposure to the recovery plasma, the fill parameter increased significantly, bringing the reaction chamber back to the high fill parameter state. These results show that the recovery plasma can be used to quickly restore the reaction chamber to the desired state, thereby achieving very uniform results on the wafer.

[0173] Fig.11A and 11B The fill parameters of a reaction chamber are illustrated when the reaction chamber is used to process hundreds of semiconductor wafers over time. In these examples, the showerhead is coated with an oxide of aluminum deposited ex situ via atomic layer deposition as described herein. Fig.11A After each semiconductor wafer is processed in the reaction chamber, the reaction chamber is continuously exposed to N 2 The plasma generated by the mixture of N / Ar lasts for about 1 second. 2 The Ar / Ar plasma is operated as a wafer-free condition (e.g., recovery plasma), meaning that no semiconductor wafer is present in the reaction chamber during plasma exposure. Fig. 11B The reaction chamber is exposed to an atmosphere involving exposure to O 2 The chamber was exposed to N / Ar plasma for about 1 minute. 2 / Ar plasma for about 1 second. Fig.11A In the case of , each wafer fill parameter drifted downward by about 0.009 (about 4.5 units over the course of 500 wafers). In contrast, using staged waferless conditioning (such as staged recovery plasma) and O 2 With N 2 Plasma, the fill parameter drifts downward by a much smaller amount, only about 0.0007 per wafer (about 0.49 units over the course of 700 wafers). This represents a substantial improvement. 2 With N 2When the plasma is adjusted in stages, the drift of the filling parameters for each wafer is reduced by an order of magnitude.

[0174] Fig. 12A The relationship between deposition parameters and wafer number is illustrated as additional semiconductor wafers are processed over time in a chemical vapor deposition chamber where the showerhead is cooled to a temperature of approximately 25°C during processing. Fig. 10A , 10B , the filling parameters described in 11A and 11B, Figures 12A-12H The deposition parameters reflect the deposition performance on the semiconductor wafer being processed in the reaction chamber. For the same reasons that it is desirable for the filling parameters to remain constant, it is desirable for the deposition parameters to remain constant over time.

[0175] In this case, there is a substantial downward trend in the deposition parameters during the course of processing 60 semiconductor wafers. This trend is not desirable. Figures 12B-12H Deposition parameters versus wafer number are illustrated as additional semiconductor wafers are processed over time in a chemical vapor deposition chamber where the showerhead is heated to a temperature of approximately 70° C. during processing. Fig. 12B Displays chip numbers 1-20, Fig. 12C Display chip number 100-120, Fig.12D Displays wafer numbers 200-220, Fig.12E Displays wafer numbers 215-235, Fig.12F Wafer numbers 320-335 are shown. Figure 12G Wafer numbers 420-435 are shown, and Fig.12H Wafer numbers 520-545 are shown. Figures 12A-12H In each of the Figures, the showerhead is coated with aluminum oxide deposited ex situ via atomic layer deposition as described herein.

[0176] like Figures 12B-12H As shown in , the use of heated showerheads substantially increases the uniformity of deposition parameters. The x-axis in each figure represents the wafer number, where the earlier processed wafers have smaller wafer numbers and the later processed wafers have larger wafer numbers. The y-axis in each figure represents the deposition parameters. It is expected that the data points in these figures are flat / horizontal, which represents the uniformity of different wafers over time. In general, the highest quality processing results are observed when the coated showerhead is maintained at a temperature of at least about 70°C. In some cases, the showerhead can be heated to a temperature between about 70-200°C during processing. In other cases, the showerhead can be heated to a temperature between about 40-200°C.

[0177] exist Figures 12B-12H There are several noteworthy events. Fig.12EThere is an idle time of 12 hours between two wafers in the plurality of wafers (as indicated by the dashed vertical line, such as about 12 hours between the two wafers numbered 220 and 221). After the 12 hours of idle time, the first wafer processed shows a deposition parameter that is significantly higher than the previous deposition parameter. After this, the deposition parameter decreases, eventually returning to a stable value. The immediate increase in the deposition parameter after the idle period is not desirable. Fig.12H In the embodiment shown in FIG. 1 , a second idle period is implemented as shown by the dashed vertical line. In this case, the idle time is longer, about 36 hours. After the idle period but before processing the next wafer, the reaction chamber is exposed to the temperature from 0 to 100 °C. 2 The recovery plasma generated by Ar eliminates the Fig.12E The deposition parameters observed in Figure 2 increase after 12 hours of idleness. The deposition parameters are maintained at a uniform level compared to before idleness, rather than rising sharply after idleness. It is highly desirable that this uniform level can be maintained even after a long idle period.

[0178] In the above description, specific details are set forth to provide a comprehensive understanding of the embodiments. Embodiments of the present invention may be implemented without some or all of these specific details. In other cases, well-known processing operations are not described in detail so as not to unnecessarily obscure the embodiments of the present invention. Although the embodiments will be described in conjunction with specific embodiments, it should be understood that they are not intended to limit the disclosed embodiments. Unless otherwise defined for a particular parameter, the words "about" and "approximately" used herein mean ±10% difference from the relevant value.

Claims

1. A method of operating a reaction chamber to deposit a film on a semiconductor wafer and achieve a specified degree of process non-uniformity, the method comprising: (a) depositing the film on each semiconductor wafer in a batch, each film having an average film thickness, wherein the batch includes all semiconductor wafers processed in the reaction chamber between subsequent cleaning cycles, and wherein at least some of the semiconductor wafers in the batch are processed sequentially; and (b) repeating (a) for each semiconductor wafer in at least an additional 9 batches out of a total of at least 10 batches to deposit the film on each semiconductor wafer, wherein the reaction chamber comprises at least one chamber component having a protective coating formed thereon, wherein the protective coating is formed via an atomic layer deposition reaction performed outside the reaction chamber, Wherein when comparing films deposited on semiconductor wafers from a first batch and a last batch of the at least ten batches, the variation in the across-wafer non-uniformity of the films does not exceed about 3% of the average film thickness.

2. The method of claim 1, wherein the batch comprises at least about 50 semiconductor wafers.

3. The method of claim 1, wherein the average film thickness is at least about thick. The method of claim 1 , wherein the protective coating is amorphous.

5. The method of claim 1, wherein the protective coating comprises a metal oxide, a metal nitride, or a metal fluoride. 6 . The method according to claim 5 , wherein the metal in the metal oxide, the metal nitride or the metal fluoride is a transition metal.

7. The method of claim 5, wherein the protective coating comprises aluminum oxide, aluminum fluoride, or aluminum nitride.

8. The method of claim 5, wherein the protective coating comprises yttrium oxide or yttrium fluoride.

9. The method according to claim 1, further comprising: (c) exposing the reaction chamber to a recovery plasma while the at least one chamber component is in the reaction chamber to reform the protective coating on the at least one chamber component.

10. A method comprising: (a) exposing a chamber component of a processing chamber having the metal nitride film deposited thereon using atomic layer deposition to a conditioning process including a nitrogen-containing plasma to form a conditioned metal nitride film; as well as (b) depositing a film on a plurality of wafers within the processing chamber. The method according to claim 10 , wherein the adjusted metal nitride film has a maximum compressive stress of up to 500 MPa.

12. The method of claim 10, wherein (a) is performed without a wafer in the process chamber.

13. The method of claim 10, wherein the chamber component is a consumable chamber component. The method of claim 10 , wherein the nitrogen-containing plasma comprises hydrogen species.

15. The method of claim 10, wherein the film deposited in (b) is deposited by atomic layer deposition.

16. The method of claim 10, wherein the nitrogen-containing plasma is generated from nitrogen, ammonia, or hydrazine.

17. The method of claim 10, wherein the nitrogen-containing plasma is generated from a process gas comprising a nitrogen-containing compound and an inert gas.

18. The method of claim 10, wherein the nitrogen-containing plasma has a frequency of 10-20 MHz.

19. The method of claim 10, wherein the duration of the nitrogen-containing plasma is less than 10 minutes.

20. The method of claim 10, wherein the chamber component is a showerhead.

21. The method of claim 10, wherein the chamber component is a lift pin or a lift pin support.

22. The method of claim 10, wherein the chamber component is a substrate support.

23. A method comprising: (a) exposing a chamber component of a processing chamber to a plasma including a reactive nitrogen species to form a conditioned metal nitride film, the chamber component having the metal nitride film deposited thereon by atomic layer deposition; as well as (b) After (a), depositing a film on a plurality of wafers within the processing chamber.

24. The method of claim 23, wherein the adjusted metal nitride film has a maximum compressive stress of up to 500 MPa.

25. The method of claim 23, wherein the plasma in (a) is generated from a process gas comprising a hydrogen-containing compound.

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