Protection circuit, electronic equipment and protection method

Abstract

The invention provides a protection circuit, electronic equipment and a protection method, and relates to the technical field of electronic devices.The current use state of an interface is obtained through a control module, and under the condition that the current use state of the interface is enabled, a first energy discharge module is controlled to be in a turn-off state, so that normal use of the interface is guaranteed; the control module is used for controlling the first energy discharge module to be in a conducting state when the current use state of the interface is not enabled, and then the first energy discharge module is used for discharging abnormal energy appearing in the to-be-protected pin interface in the conducting state, so that the situation that the abnormal energy damages the interface of the electronic equipment is avoided, and the service life of the electronic equipment is prolonged. Therefore, the normal use of the electronic equipment is ensured.

Description

Technical Field

[0001] The present application relates to the technical field of electronic circuits, and in particular to a protection circuit, electronic equipment, and a protection method. Background Art

[0002] In modern electronic devices such as mobile phones, tablets, laptops, and other portable and desktop devices, interfaces (such as charging ports, USB ports, and SIM card ports) are the primary channels for charging, transmitting data, and connecting to external devices. However, these interfaces are also the parts of electronic devices most vulnerable to external electrical threats, especially abnormal energies such as high voltage, surges, and electrostatic discharge (ESD). In some cases, these abnormal energies can be generated by electronic device interfaces, potentially damaging the interfaces and affecting the use of the electronic device.

[0003] Therefore, in the related art, there is a problem that abnormal energy damages the interface of the electronic device, affecting the use of the electronic device. Summary of the Invention

[0004] In order to solve the above problems, the embodiments of the present application provide a protection circuit, an electronic device and a protection method. The protection circuit can prevent abnormal energy from damaging the interface of the electronic device, thereby ensuring the normal use of the electronic device.

[0005] In a first aspect, an embodiment of the present application provides a protection circuit, comprising an interface, a control module, a power supply module, and N first energy discharge modules; wherein N is a positive integer;

[0006] The control module is connected to each of the first energy discharge modules and the interface respectively, and the control module is used to obtain the current usage status of the interface. Each of the first energy discharge modules is connected to the interface.

[0007] When the current usage state of the interface is enabled, controlling the first energy discharge module to be in an off state;

[0008] When the current usage state of the interface is not enabled, controlling the first energy discharge module to be in a conducting state;

[0009] The first energy discharge module is used to discharge abnormal energy occurring at the interface in a conducting state.

[0010] Optionally, the interface includes N pins, and any one of the pins corresponds to a first energy discharge module; the first end of the first energy discharge module is connected to the corresponding pin of the first energy discharge module, the second end of the first energy discharge module is grounded, and the control end of the first energy discharge module is connected to the control module; the control module is specifically used to: when the current use state of the pin is enabled, control the first energy discharge module corresponding to the pin to be in the off state, and when the current use state of the pin is not enabled, control the first energy discharge module to be in the on state.

[0011] Optionally, the first energy discharge module includes a switch tube; a first end of the switch tube is connected to a corresponding pin of the first energy discharge module, a second end of the switch tube is grounded, and a control end of the switch tube is connected to the control module.

[0012] Optionally, the protection circuit further includes N second energy discharge modules; any one of the pins corresponds to a second energy discharge module; the first end of the second energy discharge module is connected to the pin corresponding to the second energy discharge module, the second end of the second energy discharge module is grounded, and the second energy discharge module is used to discharge abnormal energy appearing on the pin corresponding to the second energy discharge module.

[0013] Optionally, the second energy discharge module includes a clamping diode; a cathode of the clamping diode is connected to a corresponding pin of the second energy discharge module, and an anode of the clamping diode is grounded.

[0014] Optionally, the protection circuit further includes a power supply module and a pull-up module; the power supply module is respectively connected to the pull-up modules; the pull-up modules are respectively connected to the interface and each first energy discharge module; the control module is connected to the pull-up module; wherein the control module is further used to obtain the voltage of the pull-up module, and when the voltage deviates from a preset range, control the first energy discharge module to be in a conductive state.

[0015] Optionally, the pull-up module includes a first pull-up sub-module and N second pull-up sub-modules; the second pull-up sub-module corresponds to the first energy discharge module; the first end of the first pull-up sub-module is connected to the power supply module, and the second end of the first pull-up sub-module is respectively connected to the control module and the first end of each second pull-up sub-module; the first end of the second pull-up sub-module is connected to the control module, and the second end of the second pull-up sub-module is respectively connected to the interface and the first end of the first energy discharge module corresponding to the second pull-up sub-module; the second end of the first energy discharge module is grounded.

[0016] Optionally, the first pull-up sub-module includes a first resistor and a first capacitor; the first end of the first resistor is connected to the power supply module, the second end of the first resistor is connected to the first end of the first capacitor, and the second end of the first capacitor is respectively connected to the control module and the first end of each of the second pull-up sub-modules.

[0017] Optionally, the second pull-up sub-module includes a second resistor and a second capacitor; the first end of the second capacitor is respectively connected to the control module and the second end of the first pull-up sub-module, the second end of the second capacitor is connected to the first end of the second resistor, and the second end of the second resistor is respectively connected to the interface and the first end of the first energy discharge module corresponding to the second pull-up sub-module.

[0018] In a second aspect, an embodiment of the present application further provides an electronic device, comprising the protection circuit as described in the first aspect.

[0019] In a third aspect, an embodiment of the present application further provides a protection method, the method comprising:

[0020] Obtaining the current usage status of the interface; the interface is connected to N first energy discharge modules, where N is a positive integer;

[0021] When the current use state of the interface is enabled, controlling the first energy discharge module to be in an off state; and when the current use state of the interface is not enabled, controlling the first energy discharge module to be in an on state;

[0022] Wherein, the first energy discharge module discharges abnormal energy occurring at the interface when in the on state.

[0023] Based on the above scheme, the current usage status of the interface is obtained through the control module. When the current usage status of the interface is enabled, the first energy discharge module is controlled to be in the off state to ensure the normal use of the interface. When the current usage status of the interface is not enabled, the first energy discharge module is controlled to be in the on state through the control module. Then, the first energy discharge module is used to discharge abnormal energy appearing in the pin interface to be protected in the on state to avoid damage to the interface of the electronic device caused by the abnormal energy, thereby ensuring the normal use of the electronic device. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 A schematic diagram of the structure of a protection circuit provided in an embodiment of the present application;

[0025] Figure 2 A schematic diagram of the structure of another protection circuit provided in an embodiment of the present application;

[0026] Figure 3A pin diagram of a SIM card provided in an embodiment of the present application;

[0027] Figure 4 A schematic diagram of the structure of another protection circuit provided in an embodiment of the present application;

[0028] Figure 5-Figure 8 Schematic diagram of several protection modes of protection circuits provided in the embodiments of the present application;

[0029] Figure 9 A signal timing block diagram provided in an embodiment of the present application;

[0030] Figure 10 This is a logic block diagram of the operation of a protection circuit provided in an embodiment of the present application;

[0031] Figure 11 A flowchart of the steps of a protection method provided in an embodiment of the present application. DETAILED DESCRIPTION

[0032] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0033] The term "and / or" in this article is merely a description of the association relationship between associated objects, indicating that three relationships may exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone.

[0034] In the description and claims of the embodiments of this application, the terms "first" and "second" are used to distinguish different objects, rather than to describe a specific order of objects. For example, the terms "first target object" and "second target object" are used to distinguish different objects, rather than to describe a specific order of objects.

[0035] In the embodiments of this application, words such as "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of this application should not be interpreted as being preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0036] In the description of the embodiments of this application, unless otherwise specified, "multiple" means two or more. For example, "multiple processing units" means two or more processing units; "multiple systems" means two or more systems.

[0037] The term "connection" involved in the embodiments of the present application should be understood in a broad sense. For example, it can refer to a physical direct connection, or it can refer to an indirect connection achieved through electronic devices, such as a connection achieved through resistors, inductors, capacitors or other electronic devices.

[0038] First, some concepts involved in the embodiments of this application are introduced.

[0039] A surge is a momentary peak voltage exceeding the normal operating voltage. It includes both surge voltage and surge current. A surge, also known as a surge surge, is a momentary overvoltage exceeding the normal operating voltage. Essentially, a surge is a violent pulse occurring within a few millionths of a second. It can be caused by lightning strikes, power grid fluctuations, power switching operations, or other power system events. When this transient high voltage propagates through power or signal lines to electronic equipment, it can cause severe damage to sensitive internal circuitry.

[0040] Electrostatic discharge (ESD) refers to the rapid transfer of charge that occurs when two objects with different electrostatic charges come into contact. In everyday life, the "electric shock" sensation experienced when static electricity accumulates on the human body and then touches a metal object is a common ESD phenomenon. In electronic devices, even a minor ESD event can have a fatal impact on semiconductor devices. Because these components typically operate at very low voltage and current levels, any charge flow beyond their tolerance can cause permanent damage.

[0041] The interfaces of electronic devices, such as mobile phones and computers, are becoming increasingly miniaturized and integrated, making them more vulnerable to external electrical interference. Sustained high voltage, surges, or abnormal energy such as ESD can damage components in the interface circuits, causing the interface to fail to function properly, such as data transmission, and affecting the normal operation of the electronic device.

[0042] For example, mobile phones require a SIM (Subscriber Identity Module) card for making calls and accessing the internet via mobile data networks. A SIM card is a smart chip inside a mobile phone that stores the user's identification information. A SIM card circuit malfunction can cause the phone to fail to recognize the card, severely impacting normal use.

[0043] A certain percentage of mobile phones currently on the market experience SIM card recognition issues. Analysis has determined that this issue is caused by anomalies in the phone's SIM card circuitry. Specific anomalies include: burnout of the series resistor in the signal line; burnout of a component in the signal line path; or burnout of the CPU at the source of the direct signal line. There are many reasons for this anomaly, including: ESD energy during SIM card removal; high-voltage backflow from an externally connected active SIM card driver; and the intentional use of external high-voltage pulses to discharge the high-voltage power supply to the interface in order to replace the phone after it fails. These actions, whether normal or abnormal, can damage the phone's hardware.

[0044] To prevent the SIM card interface from being damaged by abnormal energy such as high voltage, surge, or electrostatic discharge, currently common measures include simply adding a transient voltage suppressor (TVS) to the SIM card interface to protect against static electricity and surges, or simply adding a small-package zero-resistor (0R) resistor to the SIM card circuit interface. These methods can reduce the failure or severity of SIM card circuit failures to a certain extent, but they still cannot prevent failures caused by human factors. For example, if a user uses a continuous external high-voltage pulse to discharge the SIM card interface, the protective device may fail due to the long duration of abnormal energy due to the abnormal energy. In other words, the current protection methods for the interface are single and inflexible, and cannot effectively protect the interface.

[0045] Therefore, in order to improve the effectiveness of interface protection, an embodiment of the present application provides a protection circuit.

[0046] like Figure 1 As shown, a protection circuit is provided for an embodiment of the present application, including an interface 100, a control module 101, a power module 102 and N first energy discharge modules 105; wherein N is a positive integer; the control module 101 is connected to each first energy discharge module 105 and the interface 100 respectively, and the control module 101 is used to obtain the current usage status of the interface 100, and each first energy discharge module 105 is connected to the interface 100. When the current usage status of the interface 100 is enabled, the first energy discharge module 105 is controlled to be in an off state; when the current usage status of the interface 100 is not enabled, the first energy discharge module 105 is controlled to be in an on state; the first energy discharge module 105 is used to discharge abnormal energy appearing in the interface 100 in the on state.

[0047] Specifically, such as Figure 2As shown, the control module 101 can be a central processing unit (CPU), and the power module 102 can be a power management chip (Power Management Integrated Circuits, PMIC). Of course, it is not limited to this. As long as other chips can realize control functions or power functions, they can be applied to the protection circuit provided in the embodiment of the present application.

[0048] The current usage status of the interface is obtained through the control module. When the current usage status of the interface is enabled, the first energy discharge module is controlled to be in the off state to ensure normal use of the interface. When the current usage status of the interface is not enabled, the first energy discharge module is controlled to be in the on state through the control module. Then, the first energy discharge module is used to discharge abnormal energy appearing in the pin interface to be protected in the on state to prevent the abnormal energy from damaging the interface of the electronic device, thereby ensuring normal use of the electronic device.

[0049] In some embodiments, the interface 100 includes N pins, any one of the pins corresponds to a first energy discharge module 105; the first end of the first energy discharge module 105 is connected to the corresponding pin of the first energy discharge module 105, the second end of the first energy discharge module 105 is grounded, and the control end of the first energy discharge module 105 is connected to the control module 101; the control module 101 is specifically used to: when the current use state of the pin is enabled, control the first energy discharge module 105 corresponding to the pin to be in the off state, and when the current use state of the pin is not enabled, control the first energy discharge module 105 to be in the on state.

[0050] Based on the above circuit connection mode, the first energy discharge module 105 can be turned on or off under the control of the control module 101. When the first energy discharge module 105 is turned on under the control of the control module 101, the first energy discharge module 105 can discharge abnormal energy occurring at the corresponding pin in the interface 100 to the ground terminal.

[0051] The protection circuit provided in the embodiment of the present application can protect any pin in the interface 100 that needs to be protected. Specifically, different protection circuits can be used for protection according to the current usage status of the pin and / or the voltage at the second end of the first capacitor C1.

[0052] In some embodiments, the first energy discharge module 105 includes a switch tube Q; a first end of the switch tube Q is connected to a corresponding pin of the first energy discharge module 105 , a second end of the switch tube Q is grounded, and a control end of the switch tube Q is connected to the control module 101 .

[0053] It is worth noting that any switching device that can achieve the abnormal energy discharge function can be used. For example, the switch tube Q can be a transistor. When the switch tube Q is a transistor, the base of the transistor can serve as the control terminal of the switch tube Q, the collector of the transistor can serve as the first terminal of the switch tube Q, and the emitter of the transistor can serve as the second terminal of the switch tube Q. Transistors can be further divided into NPN transistors and PNP transistors. In the following, the embodiments of this application will use the PNP transistor as an example to illustrate the solution. For a PNP transistor, when the base of the transistor receives a low-level signal sent by the CPU, the path between the collector and emitter of the transistor is connected, that is, the transistor is in the on state at this time, and the transistor can discharge the abnormal energy appearing at the corresponding pin in the interface to the ground terminal; when the base of the transistor receives a high-level signal sent by the CPU, the path between the collector and emitter of the transistor cannot be connected, that is, the transistor is in the off state at this time, and the transistor cannot discharge the abnormal energy appearing at the corresponding pin in the interface to the ground terminal. At this time, the branch where the transistor is located is equivalent to a break circuit and will not affect other parts of the circuit.

[0054] In some embodiments, the protection circuit further includes N second energy discharge modules 106; any one of the pins corresponds to a second energy discharge module 106; the first end of the second energy discharge module 106 is connected to the pin corresponding to the second energy discharge module 106, and the second end of the second energy discharge module 106 is grounded, and the second energy discharge module 106 is used to discharge abnormal energy that appears at the pin corresponding to the second energy discharge module 106.

[0055] When the first energy discharge module 105 is turned off under the control of the control module 101, the first energy discharge module 105 is in the off state, which is equivalent to an open circuit and will not affect other parts of the protection circuit. At this time, only the second energy discharge module 106 is required to provide protection, and the abnormal energy appearing on the pin corresponding to the second energy discharge module 106 is discharged through the second energy discharge module 106.

[0056] In some embodiments, the second energy dissipation module 106 includes a clamping diode D; a cathode of the clamping diode D is connected to a corresponding pin of the second energy dissipation module 106 , and an anode of the clamping diode D is grounded.

[0057] It is worth noting that as long as the clamping function can be achieved, any device that can discharge abnormal energy can be used, for example, the clamping diode D can specifically be a TVS tube. When abnormal energy appears on the corresponding pin in the interface, for example, an abnormal high voltage appears on the pin, and the high voltage exceeds the reverse breakdown voltage of the clamping diode D, the clamping diode D is turned on, so that the voltage across the clamping diode D is clamped to a fixed voltage value, and part of the abnormal energy can be released. The second energy discharge module 106 here is different from the first energy discharge module 105. The second energy discharge module 106 itself exists in the circuit as a fixed protective device, and there is no control module 101 to control its conduction or shutdown. When abnormal energy appears on the corresponding pin in the interface, the second energy discharge module 106 can play a corresponding role in releasing abnormal energy to the ground terminal.

[0058] In some embodiments, the protection circuit further includes a power supply module 102 and a pull-up module; the power supply module 102 is respectively connected to the pull-up modules; the pull-up modules are respectively connected to the interface 100 and each first energy discharge module 105; the control module 101 is connected to the pull-up module; wherein, the control module 101 is also used to obtain the voltage of the pull-up module, and when the voltage deviates from a preset range, control the first energy discharge module 105 to be in an on state.

[0059] The voltage of the pull-up module is obtained through the control module 101, and then when the voltage deviates from the preset range, the first energy discharge module 105 is controlled to be in the on state, so as to discharge the abnormal energy appearing on the corresponding pin in the interface 100 to the ground end through the first energy discharge module 105.

[0060] In some embodiments, the pull-up module includes a first pull-up sub-module 103 and N second pull-up sub-modules 104; the second pull-up sub-module 104 corresponds to the first energy discharge module 105; the first end of the first pull-up sub-module 103 is connected to the power module 102, and the second end of the first pull-up sub-module 103 is respectively connected to the control module 101 and the first end of each second pull-up sub-module 104; the first end of the second pull-up sub-module 104 is connected to the control module 101, and the second end of the second pull-up sub-module 104 is respectively connected to the interface 100 and the first end of the first energy discharge module 105 corresponding to the second pull-up sub-module 104; the second end of the first energy discharge module 105 is grounded.

[0061] The PMIC pulls up the voltage of the pins of the interface through the first pull-up submodule 103 and the second pull-up submodule 104 to provide power to the pins of the interface.

[0062] In some embodiments, the first pull-up submodule 103 includes a first resistor R1 and a first capacitor C1; the first end of the first resistor R1 is connected to the power module 102, the second end of the first resistor R1 is connected to the first end of the first capacitor C1, and the second end of the first capacitor C1 is respectively connected to the control module 101 and the first end of each of the second pull-up submodules 104.

[0063] Specifically, both the first pull-up submodule 103 and the second pull-up submodule 104 can be RC circuits. Each pin in the interface corresponds to a corresponding second pull-up submodule 104, while each pin shares a first pull-up submodule 103. This reduces circuit design costs and eases design difficulty. The control module 101 detects the voltage at the second terminal B of the first capacitor C1 and can control the conduction or shutdown of the first energy discharge module 105 based on the voltage.

[0064] In some embodiments, the second pull-up submodule 104 includes a second resistor R2 and a second capacitor C2; a first end of the second capacitor C2 is connected to the control module 101 and the second end of the first pull-up submodule 103, respectively, a second end of the second capacitor C2 is connected to the first end of the second resistor R2, and a second end of the second resistor R2 is connected to the interface 100 and the first end of the first energy discharge module 105 corresponding to the second pull-up submodule 104, respectively.

[0065] The PMIC pulls up the voltage of the pins of the interface through the first resistor R1 , the first capacitor C1 , the second resistor R2 and the second capacitor C2 to provide power to the pins of the interface.

[0066] In some embodiments, when the control module 101 determines that the current usage status of the pin is enabled, it controls the first energy discharge module 105 to be in the off state; continuously detects the voltage of the second end B of the first capacitor C1; and when it is determined that the voltage deviates from the preset range, it controls the first energy discharge module 105 to be in the on state.

[0067] The control module 101 can control the on and off of the first energy discharge module 105 according to the current usage status of the pin. When the interface is normally connected to the external device, the pins inside the interface are in an enabled state. For example, when the charging interface is inserted into the charging socket for charging, the pins in the charging interface are in an enabled state; again, when the SIM card is inserted into the SIM card holder, the pins in the SIM card interface are in an enabled state. When the control module 101 determines that the current usage status of the pin is enabled, it controls the first energy discharge module 105 to be in an off state. Since the pin is in an enabled state, in order to avoid the first energy discharge module 105 affecting the normal use of the interface, the first energy discharge module 105 needs to be turned off at this time. Next, the control module 101 detects that the voltage at the second end B of the first capacitor C1 deviates from the preset range, indicating that abnormal energy has appeared at the pin position corresponding to the interface position. At this time, in order to avoid the abnormal energy damaging the interface, it is necessary to control the first energy discharge module 105 to be in an on state to discharge the abnormal energy as soon as possible.

[0068] In some embodiments, after determining that the voltage deviates from the preset range, the control module 101, before controlling the first energy discharge module 105 to be in the on state, is further used to: send a review waveform to the pin, and the review waveform is used to confirm whether the voltage can be restored to the preset range; if the voltage cannot be restored to the preset range, the first energy discharge module 105 is controlled to be in the on state; if the voltage can be restored to the preset range, there is no need to control the first energy discharge module 105 to be turned on.

[0069] Here, the main focus is on flexibly controlling the activation of corresponding protection circuits based on the duration of abnormal energy. When the interface is in normal operation, meaning that the pins on the interface are enabled, the first energy discharge module 105 is not required; in other words, it can be simply turned off. This is because when the interface is in normal operation, if the first energy discharge module 105 is turned on, it will affect signal transmission within the interface, hindering normal operation of the interface. However, when the interface is in normal operation, if abnormal energy is detected on one or more pins, the second energy discharge module 106 will immediately respond to release the abnormal energy. If the abnormal energy is only momentary, or if the abnormal energy lasts for a short period of time, the second energy discharge module 106 is sufficient to release the abnormal energy, eliminating the need to activate the first energy discharge module 105. However, if the abnormal energy persists for a long time, the second energy discharge module 106 may fail due to the impact of the persistent abnormal energy and may not be able to release all the abnormal energy, so the first energy discharge module 105 needs to be activated.

[0070] Based on this, the control module 101 can send a review waveform to the pin, such as a high-level signal. After sending the high-level signal, the voltage at the second end B of the first capacitor C1 recovers to within the preset range, indicating that the duration of the abnormal energy is short, and there is no need to control the first energy discharge module 105 to turn on; the voltage at the second end B of the first capacitor C1 cannot recover to within the preset range, indicating that the duration of the abnormal energy is long, and it is necessary to control the first energy discharge module 105 to turn on, so as to jointly discharge the remaining abnormal energy with the second energy discharge module 106.

[0071] In some embodiments, when the control module 101 determines that the current usage status of the pin is not enabled, the control module 101 controls the first energy discharge module 105 to be in the on state.

[0072] Because the pin is not enabled, there's no need to worry about the first energy discharge module 105 affecting signal transmission within the interface. Therefore, the first energy discharge module 105 can be directly turned on. This way, when abnormal energy is present on the pin of the interface, the first energy discharge module 105 can directly discharge the energy, thereby protecting the interface.

[0073] To facilitate understanding, the following describes the solution using a SIM card interface as an example.

[0074] like Figure 3 Figure 1 shows an exemplary pinout for a SIM card. VCC represents the power supply input, RST represents the card reset signal, CLK represents the card clock signal, GND represents the power ground, VPP represents the programming power supply (which can be used for NFC functionality), and DATA represents data input and output. Depending on the function of the SIM card interface, the circuit design used in the mobile phone also varies, and the voltage withstand capabilities of each pin in the SIM card interface also vary. The voltage withstand capability (ability to withstand electrical shock) is distributed as follows: GND > VCC > CLK / DAT / RST / VPP. That is, among these six pins, the GND pin has the strongest voltage withstand capability, the CLK / DAT / RST / VPP pins have the weakest voltage withstand capability, and the VCC pin has an intermediate voltage withstand capability. Taking DC as an example, a normal high voltage input to GND generally does not cause circuit damage unless the energy is so high that it burns the wiring. VCC has a high voltage withstand capability of <7V, and the CLK / DAT / RST / VPP pins have a voltage withstand capability of <5V.

[0075] like Figure 4As shown, it is a schematic diagram of another protection circuit provided in an embodiment of the present application. The interface is a SIM card interface, including a SIM card holder and a SIM card. Among them, the CPU and the SIM card holder are connected through signal lines such as CLK, DATA and RST, and the PMIC and the SIM card holder are connected through power lines such as VCC and GND. The CPU is connected to the SIM card holder through the DET signal line to detect whether the SIM card is in the SIM card holder. The CPU is connected to the second end of the first capacitor C1 through the SIM_INT signal line to detect the voltage at the second end of the first capacitor C1. The CPU is connected to the control end of each transistor through the SIM_CTRL signal line to control the conduction or shutdown of each transistor. Among them, no protection is done for the GND pin. For the CLK, DATA, RST, and VCC pins, there is a first energy discharge module, a second energy discharge module, and a second pull-up submodule. For example, CLK corresponds to a first energy discharge module (Q1), a second energy discharge module (D1), and a second pull-up submodule (C5, R5); DATA corresponds to a first energy discharge module (Q2), a second energy discharge module (D2), and a second pull-up submodule (C4, R4); RST corresponds to a first energy discharge module (Q3), a second energy discharge module (D3), and a second pull-up submodule (C3, R3); VCC corresponds to a first energy discharge module (Q4), a second energy discharge module (D4), and a second pull-up submodule (C2, R2).

[0076] In some embodiments, as Figure 5 As shown in the figure, when the CPU detects through DET that the SIM card is not inserted into the SIM card holder, it inputs a low-level signal to each transistor through SIM_CTRL, turning each transistor on. In the event of abnormal energy on the CLK pin, Q1 can directly discharge the abnormal energy.

[0077] In some embodiments, as Figure 6 As shown in the figure, when the CPU detects that a SIM card is inserted into the SIM card holder through DET, it inputs a high-level signal to each transistor through SIM_CTRL, so that each transistor is in the cut-off (off) state. In the event of abnormal energy on the CLK pin, the CPU can decide whether to turn on Q1 based on the duration of the abnormal energy.

[0078] In one case, if Figure 7As shown in the figure, when the CPU detects through SIM_INT that the voltage at point B has dropped to a certain threshold (for example, 0.4V), the CPU determines that abnormal energy has occurred on the SIM interface. At this time, the CPU can send a high-level signal to the CLK pin, or use the PMIC to send a high-level signal to each pin through R1 and C1. After that, the voltage at point B recovers to above 0.4V, indicating that D1 alone has discharged the abnormal energy, and there is no need to re-control the conduction of transistor Q1.

[0079] In another case, if Figure 8 As shown in the figure, when the CPU detects through SIM_INT that the voltage at point B drops to a certain threshold (for example, 0.4V), the CPU determines that abnormal energy has occurred on the SIM interface. At this time, the CPU can send a high-level signal to the CLK pin, or use the PMIC to send a high-level signal to each pin through R1 and C1. If the voltage at point B fails to recover to above 0.4V, the CPU will control the transistor Q1 to turn on again.

[0080] It is worth noting that the above is only explained using the abnormal energy on the CLK pin as an example, and the same applies to other pins. The CPU can control each transistor separately, that is, the level signal sent to the control end of each transistor is not the same level signal. At this time, the CPU only needs to be able to identify which pin has abnormal energy, so that separate control can be achieved. In addition, the CPU can also control each transistor based on the same control signal, that is, the level signal sent to the control end of each transistor is the same level signal, and each transistor can be synchronously controlled to be turned on or off. This control method is simpler, and the CPU does not need to identify which pin has abnormal energy. It only needs to identify that abnormal energy has appeared on the SIM interface.

[0081] The principle of detecting the voltage at the second end of the first capacitor C1 is described below. Figures 4 to 8Take any circuit diagram in the figure. Taking the CLK pin as an example, during normal operation, the PMIC is connected to the CLK of the SIM card through R1 / C1 / C5 / R5, which is equivalent to providing a weak pull-up and does not affect the normal communication function of the SIM card. At this time, UA=UB=UM4 is obtained, where UA is the voltage at the first terminal A of the first capacitor C1, UB is the voltage at the second terminal B of the first capacitor C1, and UM4 is the voltage at the second terminal M4 of the capacitor C5. When the CLK pin of the SIM card receives an abnormal energy (such as an abnormal DC high level), this level exceeds the reverse breakdown voltage UBR of D1, and the diode D1 is turned on, at which time UM4 is pulled low. Since the voltage across capacitor C5 cannot change suddenly, R5 and C5 form an RC differential discharge circuit; UB slowly decreases following UM4. UM4 will slowly decrease to 0V; and UB will be divided according to the capacitance ratio of C5 and C1, specifically UB=UA*(C5 / (C1+C5)). The CPU detects level changes through SIM_INT and senses a low level, indicating that abnormal high voltage is input to the SIM card interface. The PMIC can then send a high-level pulse to each pin to confirm whether SIM_INT can recover to a high level. If it cannot recover, it is determined that abnormal energy persists on the interface, turning on the transistor to prevent the clamping diode from failing due to overpower.

[0082] like Figure 9 As shown, it is a signal timing block diagram provided in an embodiment of the present application.

[0083] 301: The PMIC pulls the voltage level high, R1 / C1 starts charging other capacitors, and the CPU continues to detect the voltage at the second end of the first capacitor C1;

[0084] 302: Abnormal energy at the interface activates clamping diode D1, and UM4 begins to discharge to a low level;

[0085] 303: UB also starts to decrease, and the decreasing level is the voltage-divided level UB=UA*(C5 / (C1+C5));

[0086] 304: When UB drops below a preset range (for example, below 0.4V is considered to be outside the preset range), it indicates that abnormal energy has entered the port, and the CPU pulls down SIM_CTRL to start the interface protection circuit;

[0087] 305: Re-plug the SIM card or wait for a while. The CPU system attempts to resume the card recognition process, pulls up SIM_CTRL, and restarts 301.

[0088] The following describes the selection of device parameters in the protection circuit provided in the embodiment of the present application. In order to ensure that the normal communication of the SIM card does not affect the SIM_INT monitoring, it is necessary to adjust the discharge time of the capacitor. The SIM card communication is 5M, and the low level holding time is about 200ns, so the discharge cycle is selected at the ms level. According to the charging formula of the capacitor voltage, it can be seen that: time constant τ=R×C=1Mohm×4.7nF=4.7ms, when the charged voltage Vs=1.8V and the initial voltage Vo=0.4V, the charging time t=-Ln(Vo / Vs)×RC=-Ln(0.4 / 1.8)×τ=1.5×4.7ms=7.05ms. When C1 = 100nF, UM1 = UM2 = UM3 = UM4 = 0.08V. According to the capacitor series formula, UM1 = Vs × (C2 / (C1 + C2)). From Vs = 1.8V, C1 = 100nF, and UM1 = 0.08V, we can obtain C2 = 4.7nF, where UM1 is the voltage at the second end M1 of capacitor C2, UM2 is the voltage at the second end M2 of capacitor C3, UM3 is the voltage at the second end M3 of capacitor C4, and UM4 is the voltage at the second end M4 of capacitor C5.

[0089] Therefore, select R2=R3=R4=R5=1Mohm, C2=C3=C4=C5=4.7nF, and C1=100nF.

[0090] The following summarizes the operating logic of the protection circuit provided by the embodiment of the present application. Figure 10 As shown, it is an operating logic block diagram of a protection circuit provided in an embodiment of the present application.

[0091] 1001. The CPU checks whether the SIM card is in place; if so, execute 1004; otherwise, execute 1002.

[0092] 1002. The CPU turns on the first energy discharge module.

[0093] 1003. The CPU detects whether a card is inserted; if so, it executes 1001; otherwise, it maintains the current state.

[0094] 1004. The CPU detects the voltage at the second end of the first capacitor.

[0095] 1005. The CPU determines whether the voltage deviates from a preset range; if so, execute 1006; otherwise, execute 1004.

[0096] 1006. The CPU sends a verification waveform, or the CPU sends a verification waveform through the DMIC.

[0097] 1007. The CPU determines whether the voltage has recovered to the preset range; if so, execute 1004; otherwise, execute 1008.

[0098] 1008. The CPU issues a risk warning and then executes 1002.

[0099] It is worth noting that the above description only uses the SIM interface as an example, but the embodiments of this application are not intended to limit the specific type of interface and can be applied to any peripheral interface requirements, such as multi-SIM / USB / HDMI / headphone designs. In addition, the protection circuit provided in the embodiments of this application can be built using discrete circuits or an integrated approach to reduce layout area and design complexity.

[0100] Based on the same concept, an embodiment of the present application further provides an electronic device, including the protection circuit as described above.

[0101] like Figure 11 As shown, the embodiment of the present application also provides a protection method, which includes:

[0102] Step X1: Get the current usage status of the interface.

[0103] The interface is connected to N first energy discharge modules, where N is a positive integer.

[0104] The implementation of this step is similar to the above-mentioned implementation process and will not be repeated here.

[0105] Step X2: When the current use state of the interface is enabled, controlling the first energy discharge module to be in an off state; and when the current use state of the interface is not enabled, controlling the first energy discharge module to be in an on state;

[0106] Wherein, the first energy discharge module discharges abnormal energy occurring at the interface when in the on state.

[0107] The implementation of this step is similar to the above-mentioned implementation process and will not be repeated here.

[0108] In some embodiments, the interface includes N pins, any one of the pins corresponds to a first energy discharge module; the first energy discharge module is connected to the pin corresponding to the first energy discharge module; when the current use state of the interface is enabled, controlling the first energy discharge module to be in an off state includes:

[0109] Sub-step X21: When the current usage state of the pin is enabled, control the first energy discharge module corresponding to the pin to be in the off state.

[0110] The implementation of this step is similar to the above-mentioned implementation process and will not be repeated here.

[0111] When the current usage state of the interface is not enabled, controlling the first energy discharge module to be in a conducting state includes:

[0112] Sub-step X22: When the current usage status of the pin is not enabled, control the first energy discharge module corresponding to the pin to be in the on state.

[0113] The implementation of this step is similar to the above-mentioned implementation process and will not be repeated here.

[0114] In some embodiments, the interface is connected to a pull-up module, and the method further comprises:

[0115] Step X3: Obtain the voltage of the pull-up module.

[0116] The implementation of this step is similar to the above-mentioned implementation process and will not be repeated here.

[0117] Step X4: When the voltage deviates from a preset range, control the first energy discharge module to be in an on state.

[0118] The implementation of this step is similar to the above-mentioned implementation process and will not be repeated here.

[0119] In some embodiments, step X4 includes:

[0120] Sub-step X41: When the voltage deviates from a preset range, a verification waveform is sent to the interface.

[0121] The implementation of this step is similar to the above-mentioned implementation process and will not be repeated here.

[0122] Sub-step X42: Obtain a new voltage of the pull-up module.

[0123] The implementation of this step is similar to the above-mentioned implementation process and will not be repeated here.

[0124] Sub-step X43: When the new voltage deviates from the preset range, control the first energy discharge module to be in an on state.

[0125] The implementation of this step is similar to the above-mentioned implementation process and will not be repeated here.

[0126] To sum up, the current usage status of the interface is obtained through the control module. When the current usage status of the interface is enabled, the first energy discharge module is controlled to be in the off state to ensure the normal use of the interface. When the current usage status of the interface is not enabled, the first energy discharge module is controlled to be in the on state through the control module. Then, the first energy discharge module is used to discharge the abnormal energy appearing in the pin interface to be protected in the on state to avoid damage to the interface of the electronic device caused by the abnormal energy, thereby ensuring the normal use of the electronic device.

[0127] Through the description of the above implementation methods, technical personnel in the relevant field can understand that for the convenience and simplicity of description, only the division of the above-mentioned functional modules is used as an example. In actual applications, the above-mentioned functions can be distributed and completed by different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0128] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of modules or units is only a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0129] As described above, the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A protection circuit, characterized in that: It includes an interface, a control module, a power module and N first energy discharge modules; wherein N is a positive integer; The control module is connected to each of the first energy discharge modules and the interface respectively, and the control module is used to obtain the current use status of the interface, and each of the first energy discharge modules is connected to the interface. When the current use state of the interface is enabled, controlling the first energy discharge module to be in an off state; When the current use state of the interface is not enabled, controlling the first energy discharge module to be in a conducting state; The first energy discharge module is used to discharge abnormal energy occurring at the interface in a conducting state.

2. The protection circuit according to claim 1, characterized in that: The interface includes N pins, and any one of the pins corresponds to a first energy discharge module; The first end of the first energy discharge module is connected to the corresponding pin of the first energy discharge module, the second end of the first energy discharge module is grounded, and the control end of the first energy discharge module is connected to the control module; The control module is specifically used to: when the current use state of the pin is enabled, control the first energy discharge module corresponding to the pin to be in an off state; and when the current use state of the pin is not enabled, control the first energy discharge module to be in an on state.

3. The protection circuit according to claim 2, characterized in that: The first energy discharge module includes a switch tube; The first end of the switch tube is connected to the corresponding pin of the first energy discharge module, the second end of the switch tube is grounded, and the control end of the switch tube is connected to the control module.

4. The protection circuit according to claim 2, characterized in that: The protection circuit also includes N second energy discharge modules; any one of the pins corresponds to a second energy discharge module; The first end of the second energy discharge module is connected to the pin corresponding to the second energy discharge module, the second end of the second energy discharge module is grounded, and the second energy discharge module is used to discharge abnormal energy appearing at the pin corresponding to the second energy discharge module.

5. The protection circuit according to claim 4, characterized in that: The second energy discharge module includes a clamping diode; The cathode of the clamping diode is connected to the pin corresponding to the second energy discharge module, and the anode of the clamping diode is grounded.

6. The protection circuit according to claim 1, characterized in that: The protection circuit also includes a power module and a pull-up module; The power supply modules are respectively connected to the pull-up modules; The pull-up module is respectively connected to the interface and each of the first energy discharge modules; The control module is connected to the pull-up module; The control module is further configured to obtain the voltage of the pull-up module, and control the first energy discharge module to be in an on state when the voltage deviates from a preset range.

7. The protection circuit according to claim 6, characterized in that: The pull-up module includes a first pull-up submodule and N second pull-up submodules; the second pull-up submodule corresponds to the first energy discharge module; The first end of the first pull-up submodule is connected to the power module, and the second end of the first pull-up submodule is respectively connected to the control module and the first end of each of the second pull-up submodules; The first end of the second pull-up submodule is connected to the control module, and the second end of the second pull-up submodule is respectively connected to the interface and the first end of the first energy discharge module corresponding to the second pull-up submodule; The second end of the first energy discharge module is grounded.

8. The protection circuit according to claim 7, characterized in that: The first pull-up submodule includes a first resistor and a first capacitor; The first end of the first resistor is connected to the power module, the second end of the first resistor is connected to the first end of the first capacitor, and the second end of the first capacitor is respectively connected to the control module and the first end of each of the second pull-up submodules.

9. The protection circuit according to claim 7, characterized in that: The second pull-up submodule includes a second resistor and a second capacitor; The first end of the second capacitor is connected to the control module and the second end of the first pull-up submodule respectively, the second end of the second capacitor is connected to the first end of the second resistor, and the second end of the second resistor is connected to the interface and the first end of the first energy discharge module corresponding to the second pull-up submodule respectively.

10. An electronic device, characterized in that: The invention comprises a protection circuit as claimed in any one of claims 1 to 9.

11. A protection method, characterized in that: The method comprises: Obtaining the current usage status of the interface; the interface is connected to N first energy discharge modules, where N is a positive integer; When the current use state of the interface is enabled, the first energy discharge module is controlled to be in an off state, and when the current use state of the interface is not enabled, the first energy discharge module is controlled to be in an on state; Wherein, the first energy discharge module discharges abnormal energy appearing at the interface when in the on state.

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