Constant current load control circuit capable of controlling peak factor and control method
By designing a constant current load control circuit with controllable peak factor, the combination of digital and analog control is used to achieve dual controllability of the peak factor and effective value of the output current, solving the problem of uncontrollable peak factor in the prior art, and improving the control response speed and stability of the system.
Patent Information
- Application Number
- CN202411382117.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-30
- Publication Date
- 2025-05-16
- Estimated Expiration
- 2044-09-30
AI Technical Summary
The peak factor of existing AC electronic loads is uncontrollable, making it difficult to simulate the input energy impact characteristics of different power consumption equipment, affecting the stability of the power grid and power supply system.
A constant current load control circuit with controllable peak factor is designed, and the peak factor and effective value of the output current are achieved through a combination of digital control and analog control. Specifically, it includes digital control of the peak factor significant value ring and current significant value ring, as well as analog control of PID control and proportional control.
The double controllability of the peak factor and effective value of the output current is achieved, the response speed and stability of the system control is improved, the resonant spike is suppressed and the bandwidth is expanded.
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Figure CN120016791A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of AC electronic loads, and in particular to a constant current load control circuit with controllable peak factor and a control method. Background Art
[0002] The peak factor is an important indicator of AC power supply or equipment. It reflects the characteristics of different electrical equipment to a certain extent. The larger the peak factor, the greater the energy impact of the equipment input, and the greater the harm to the power grid or power supply. On the contrary, the smaller the peak factor, the better the characteristics of the electrical equipment, and the less harm to the power supply system. In order to meet the input energy impact of different electrical equipment, AC power supply equipment needs to have the ability to output a higher current peak factor. Therefore, in order to test the peak factor characteristics of the AC power supply, an AC load with a controllable peak factor is particularly important. By changing the current peak factor to simulate the input impact characteristics of different electrical equipment, however, the peak factor of most AC electronic loads is. , and the crest factor is uncontrollable. Summary of the invention
[0003] The object of the present invention is to provide a constant current load control circuit and control method with controllable peak factor, which can solve the above-mentioned problems and realize dual controllability of effective value and peak factor.
[0004] In order to achieve the above object, the present invention is implemented through the following technical solutions: A constant current load control method with controllable peak factor, including digital control and analog control; Digital control includes the following steps: Crest factor effective value control, calculate the given crest factor and sampling current crest factor The peak factor error of the output current is adjusted to adjust the peak factor of the output current, acting on the current effective value given , output new current effective value given ; Current effective value control, calculate the output current effective value And the new current effective value is given The output current error is calculated, the error signal is converted into digital-to-analog format, and the output analog control is given , control the output current waveform; The simulation control includes the following steps: Output current instantaneous outer loop control, calculate the current instantaneous value of the output current With a given signal The error signal is calculated and then output as the outer loop output signal ; Output current instantaneous inner loop control, calculation of capacitor current sampling signal With the outer loop output signal The actual output current is adjusted according to the error.
[0005] Furthermore, the current peak factor error is calculated through the integral link and then applied to the current effective value given ; The output current error is calculated through the PI link and then converted into digital-to-analog form.
[0006] Furthermore, the output current instantaneous outer loop control adopts PID control, and the output current instantaneous inner loop control adopts proportional link control.
[0007] Furthermore, the peak factor effective value control includes the steps of: Calculate the effective value of output current : Where n represents the number of current discrete points involved in calculating the effective value, Represents the square of the current value at the nth point; Calculate the sampling current peak factor: in, is the peak value of the sampling current, is the effective value of the sampling current; Calculating Crest Factor Error : Calculate the crest factor integral: in, is the peak factor integration coefficient, is the peak error calculated within each cycle, and t is the time.
[0008] Furthermore, the current effective value control includes the steps of: Calculating Output Current Error : Perform proportional-integral PI operation on the output current error: in, is the proportional coefficient of the PI link, is the integral coefficient of the PI link, is the output current error calculated for each cycle, and t is the time.
[0009] Furthermore, the analog output current sampling effective value is converted into a discrete digital value through AD conversion to obtain and .
[0010] A constant current load control circuit with controllable peak factor, comprising a digital control circuit, an analog control circuit and an AD / DA conversion circuit; The digital control circuit is an effective value loop, including a peak factor effective value loop and a current effective value loop, wherein the peak factor effective value loop includes a first subtractor and an integral link, wherein the output of the first subtractor is connected to the input of the integral link; wherein the current effective value loop includes a multiplier, a second subtractor, and a PI link, wherein the input of the multiplier is connected to the output of the integral link, the output of the multiplier is connected to the input of the second subtractor, the other input of the second subtractor is connected to the output current effective value, and the output of the second subtractor is connected to the input of the PI link; The AD / DA conversion circuit includes an AD conversion circuit and a DA conversion circuit. The input end of the DA conversion circuit is connected to the output end of the PI link, and the output end of the DA conversion circuit is connected to the input end of the analog control circuit. The AD converts the analog output current sampling into a discrete digital quantity for calculating the effective value of the sampling current. and sampling current crest factor ; The analog control circuit includes a third subtractor, an instantaneous outer loop circuit, a fourth subtractor and an instantaneous inner loop circuit, wherein the instantaneous outer loop circuit includes a PID circuit, the instantaneous inner loop circuit includes a proportional circuit, one input end of the third subtractor is connected to the output end of the DA conversion circuit, and another input end of the third subtractor is connected to the current instantaneous value point The output end of the third subtractor is connected to the input end of the PID circuit, the output end of the PID circuit is connected to one input end of the fourth subtractor, and the other input end of the fourth subtractor is connected to the capacitor current sampling signal The fourth subtractor output terminal is connected to the proportional circuit input terminal.
[0011] Furthermore, the inputs of the first subtractor are respectively the sampling current peak factor , given crest factor , the output is The two input terminals of the multiplier are the output terminal of the integral link and the current effective value given .
[0012] Furthermore, the instantaneous outer loop circuit includes resistors R1, R2, R3, capacitors C1, C2, C3, C4 and operational amplifier OP1, and the left end of resistor R1 is connected to a given input , capacitor C1 and resistor R1 are connected in parallel, and the left side of resistor R2 is connected to the current instantaneous value point connected, capacitor C2 and resistor R2 are connected in parallel, resistor R1, resistor R2, capacitor C1, and the right side of capacitor C2 are all connected to the inverting input terminal of the operational amplifier OP1, one end of resistor R3 is connected to the non-inverting input terminal of the operational amplifier OP1, the other end of resistor R3 is grounded, the left side of resistor R4 is connected to the inverting input terminal of the operational amplifier OP1, the right end of resistor R4 is connected to the left side of capacitor C3, the right side of capacitor C3 is connected to the output terminal of the operational amplifier OP1, and the series branch of resistor R4 and capacitor C3 is connected in parallel with capacitor C4; The instantaneous inner loop circuit includes resistors R5, R6, R7, R8 and operational amplifier OP2. The left side of resistor R6 is connected to the output end of operational amplifier OP1, the right side of resistor R6 is connected to the inverting input end of operational amplifier OP2, and the left side of resistor R5 is connected to the capacitor current sampling signal The right side of the resistor R5 is connected to the inverting input terminal of the operational amplifier OP2, one end of the resistor R7 is connected to the non-inverting input terminal of the operational amplifier OP2, the other end of the resistor R7 is grounded, the left side of the resistor R8 is connected to the inverting input terminal of the operational amplifier OP2, and the right end of the resistor R8 is connected to the output terminal of the operational amplifier OP2.
[0013] The advantages of the present invention are: The present invention adopts output current peak factor and output current dual effective value loop to realize dual controllability of effective value and peak factor. The outer loop control of analog PID instantaneous value greatly improves the response speed of system control. The inner loop control technology of capacitor current suppresses resonance peak and improves bandwidth at the same time, which is beneficial to the stability of the system.
[0014] The digital-analog hybrid control method makes full use of the calculation of the digital control effective value loop and the response speed of the analog instantaneous value to improve the reliability of system control. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] Figure 1 This is an overall block diagram of a constant current load control circuit with controllable peak factor according to Embodiment 1 of the present invention; Figure 2 This is the analog control circuit diagram of Example 1 of the present invention. DETAILED DESCRIPTION
[0016] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the accompanying drawings in the embodiments of the present invention.
[0017] Example 1 This embodiment discloses a constant current load control circuit with controllable peak factor, including a digital control circuit, an analog control circuit and an AD / DA conversion circuit. Figure 1 .
[0018] The digital control circuit is an effective value loop, including a peak factor effective value loop and a current effective value loop. The peak factor effective value loop includes a first subtractor and an integral link. The inputs of the first subtractor are respectively the sampling current peak factor , given crest factor , the output of the first subtractor is connected to the input of the integral link, and the output is The current effective value loop includes a multiplier, a second subtractor, and a PI link. One input of the multiplier is connected to the output of the integral link, and the other input is connected to the current effective value given The output end of the multiplier is connected to the input end of the second subtractor, the other input end of the second subtractor is connected to the effective value of the output current, and the output end of the second subtractor is connected to the input end of the PI link.
[0019] The AD / DA conversion circuit includes an AD conversion circuit and a DA conversion circuit. The input end of the DA conversion circuit is connected to the output end of the PI link. After DA conversion, the output end is connected to the input end of the analog control circuit. AD converts the analog output current sampling into discrete digital quantities for calculating the effective value of the sampling current. and sampling current crest factor ; The analog control circuit includes a third subtractor, an instantaneous outer loop circuit, a fourth subtractor and an instantaneous inner loop circuit, wherein the instantaneous outer loop circuit includes a proportional-integral-differential circuit (PID link), and the instantaneous inner loop circuit includes a proportional link circuit (P). One input end of the third subtractor is connected to the output end of the DA conversion circuit, and another input end of the third subtractor is connected to the current instantaneous value point. The output end of the third subtractor is connected to the input end of the PID circuit, the output end of the PID circuit is connected to one input end of the fourth subtractor, and the other input end of the fourth subtractor is connected to the capacitor current sampling signal The fourth subtractor output terminal is connected to the proportional circuit input terminal.
[0020] Please refer to Figure 2 The instantaneous outer loop circuit includes resistors R1, R2, R3, capacitors C1, C2, C3, C4 and operational amplifier OP1. The left end of resistor R1 is connected to the given input , capacitor C1 and resistor R1 are connected in parallel, and the left side of resistor R2 is connected to the current instantaneous value point The capacitor C2 and the resistor R2 are connected in parallel, the resistor R1, the resistor R2, the capacitor C1, and the right side of the capacitor C2 are all connected to the inverting input terminal of the operational amplifier OP1, one end of the resistor R3 is connected to the non-inverting input terminal of the operational amplifier OP1, the other end of the resistor R3 is grounded, the left side of the resistor R4 is connected to the inverting input terminal of the operational amplifier OP1, the right end of the resistor R4 is connected to the left side of the capacitor C3, the right side of the capacitor C3 is connected to the output terminal of the operational amplifier OP1, the series branch of the resistor R4 and the capacitor C3 is connected in parallel with the capacitor C4, and the output terminal of the operational amplifier OP1 is the outer loop output , used as a given for the inner loop The instantaneous inner loop circuit includes resistors R5, R6, R7, R8 and operational amplifier OP2. The left side of resistor R6 is connected to the output end of operational amplifier OP1, the right side of resistor R6 is connected to the inverting input end of operational amplifier OP2, and the left side of resistor R5 is connected to the capacitor current sampling signal , the right side of resistor R5 is connected to the inverting input terminal of operational amplifier OP2, one end of resistor R7 is connected to the non-inverting input terminal of operational amplifier OP2, the other end of resistor R7 is grounded, the left side of resistor R8 is connected to the inverting input terminal of operational amplifier OP2, and the right end of resistor R8 is connected to the output terminal of operational amplifier OP2. The output signal of operational amplifier OP2 is , used to control the output waveform.
[0021] Example 2 This embodiment discloses a specific control method for constant current load control with controllable peak factor. For a control block diagram, please refer to Figure 1 , including digital control part, analog control part and AD / DA conversion part. The digital control part is an effective value loop, which consists of two parts: current effective value loop and peak factor effective value loop, which control current accuracy and peak factor accuracy respectively.
[0022] Crest factor effective value control, calculate the given crest factor and sampling current crest factor The peak factor error of the current is accumulated through the integral link and acts on the current effective value given , output new current effective value given , used to adjust the peak factor of the output current.
[0023] The peak factor effective value control includes the following steps: Calculate the effective value of output current : Where n represents the number of current discrete points involved in calculating the effective value, Represents the square of the current value at the nth point; Calculate the sampling current peak factor: in, is the peak value of the sampling current, is the effective value of the sampling current; Calculating Crest Factor Error : Calculate the crest factor integral: in, is the peak factor integration coefficient, is the peak error calculated within each cycle, and t is the time.
[0024] The peak factor control principle is that when the output current peak factor is less than the given peak factor, the given peak factor and crest factor feedback The difference is positive, the integral link accumulates the error positively, and the integral output Increase, used to increase the output peak factor; when the current peak factor is greater than the given peak factor, the given peak factor and crest factor feedback The difference is negative, the integral link accumulates the error negatively, and the integral output Decrease to reduce the output peak factor.
[0025] The current RMS control first outputs the peak factor RMS loop And the current effective value is given Multiply, the multiplier output As the new given value of the output current effective value loop, calculate the output current effective value And the new current effective value is given The output current error is calculated through the PI link and then converted into digital-to-analog format, and the output analog control is given. , used for control of the instantaneous value loop.
[0026] Calculating Output Current Error : Perform proportional-integral PI operation on the output current error: in, is the proportional coefficient of the PI link, is the integral coefficient of the PI link, is the output current error calculated for each cycle, and t is the time.
[0027] The output current effective value loop control principle is that when the output current is less than the given effective value When a given effective value is given and output current feedback effective value The difference is positive, and the proportional integral link accumulates the error positively, and its effective value loop outputs Increases, thereby increasing the output current; when the output current is greater than the given effective value When a given effective value is given and output current feedback effective value The difference is negative, and the proportional integral link accumulates the error negatively, and its effective value loop outputs Reduce, thereby controlling the output current to decrease.
[0028] The AD / DA conversion part is the conversion between analog control and digital control. AD converts the analog output current sampling into discrete digital quantity for current effective value and peak factor calculation. DA conversion converts the digital effective value loop output into analog quantity and uses it as the given of the instantaneous value loop to control the output current waveform.
[0029] The analog control part is an instantaneous value loop, including the output current instantaneous outer loop control and the output current instantaneous inner loop control. The output current outer loop adopts proportional-integral-differential (PID) control, which can improve the response speed and output accuracy, and improve the control stability and dynamics of the output waveform. The inner loop adopts capacitor current with high damping suppression, which can suppress the resonant peak of the controlled object, provide a wider bandwidth for the outer loop, facilitate loop control, and improve the anti-interference performance of the loop.
[0030] The working principle of the output current instantaneous outer loop control is: calculate the current instantaneous value of the output current With a given signal The error signal is calculated by PID and then output as the outer loop output signal. , when the instantaneous value of the output current is Greater than a given signal When the error signal is negative, the PID link adjusts the error signal to make its instantaneous value Reduce, reduce the actual output current; when the current instantaneous value of the output current is Less than a given signal When the error signal is positive, the PID link adjusts the error signal to make its instantaneous value Increase, thereby increasing the actual output current.
[0031] The working principle of the output current instantaneous inner loop control is: calculate the capacitor current sampling signal With the outer loop output signal The actual output current is adjusted according to the error. When the instantaneous value of the capacitor current is Greater than the outer loop output signal When the error signal is negative, the proportional link (P) of the inner loop adjusts the error signal to make the inner loop output Reduce, reduce the actual output current; when the instantaneous value of the capacitor current is Less than the outer loop output signal When the error signal is positive, the proportional link (P) adjusts the error signal to make the inner loop output Increase, thereby increasing the actual output current.
[0032] Finally, it should be noted that the above is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.
Claims
1. A constant current load control method with controllable peak factor, characterized in that: Including digital control and analog control; The digital control comprises the steps of: Crest factor effective value control, calculate the given crest factor and sampling current crest factor The peak factor error of the output current is adjusted to adjust the peak factor of the output current, acting on the current effective value given , output new current effective value given ; Current effective value control, calculate the output current effective value And the new current effective value is given The output current error is calculated, the error signal is converted into digital-to-analog format, and the output analog control is given , control the output current waveform; The simulation control comprises the steps of: Output current instantaneous outer loop control, calculate the current instantaneous value of the output current With a given signal The error signal is calculated and then output as the outer loop output signal ; Output current instantaneous inner loop control, calculation of capacitor current sampling signal With the outer loop output signal The actual output current is adjusted according to the error.
2. The constant current load control method with controllable peak factor according to claim 1, characterized in that: The current peak factor error is calculated through the integral link and then acts on the current effective value given ; The output current error is calculated through the PI link and then converted into digital-to-analog form.
3. The constant current load control method with controllable peak factor according to claim 1, characterized in that: The output current instantaneous outer loop control adopts PID control, and the output current instantaneous inner loop control adopts proportional link control.
4. The constant current load control method with controllable peak factor according to claim 2, characterized in that: The peak factor effective value control comprises the steps of: Calculate the effective value of output current : Where n represents the number of current discrete points involved in calculating the effective value, Represents the square of the current value at the nth point; Calculate the sampling current peak factor: in, is the peak value of the sampling current, is the effective value of the sampling current; Calculating Crest Factor Error : Calculate the crest factor integral: in, is the peak factor integration coefficient, is the peak error calculated within each cycle, and t is the time.
5. The constant current load control method with controllable peak factor according to claim 2, characterized in that: The current effective value control comprises the steps of: Calculating Output Current Error : Perform proportional-integral PI operation on the output current error: in, is the proportional coefficient of the PI link, is the integral coefficient of the PI link, is the output current error calculated for each cycle, and t is the time.
6. The constant current load control method with controllable peak factor according to claim 1, characterized in that: The analog output current sampling effective value is converted into a discrete digital value through AD conversion to obtain and .
7. A constant current load control circuit with controllable peak factor, characterized in that: Including digital control circuit, analog control circuit and AD / DA conversion circuit; The digital control circuit is an effective value loop, including a peak factor effective value loop and a current effective value loop, the peak factor effective value loop includes a first subtractor and an integral link, the output of the first subtractor is connected to the input end of the integral link; the current effective value loop includes a multiplier, a second subtractor, and a PI link, the multiplier input is connected to the output end of the integral link, the multiplier output is connected to the input end of the second subtractor, the other input end of the second subtractor is connected to the output current effective value, and the second subtractor output is connected to the input end of the PI link; The AD / DA conversion circuit includes an AD conversion circuit and a DA conversion circuit. The input end of the DA conversion circuit is connected to the output end of the PI link, and the output end of the DA conversion circuit is connected to the input end of the analog control circuit. The AD converts the analog output current sampling into a discrete digital quantity for calculating the effective value of the sampling current. and sampling current crest factor ; The analog control circuit includes a third subtractor, an instantaneous outer loop circuit, a fourth subtractor and an instantaneous inner loop circuit, wherein the instantaneous outer loop circuit includes a PID circuit, the instantaneous inner loop circuit includes a proportional circuit, one input end of the third subtractor is connected to the output end of the DA conversion circuit, and the other input end of the third subtractor is connected to the current instantaneous value point. The output end of the third subtractor is connected to the input end of the PID circuit, the output end of the PID circuit is connected to one input end of the fourth subtractor, and the other input end of the fourth subtractor is connected to the capacitor current sampling signal The fourth subtractor output terminal is connected to the proportional circuit input terminal.
8. The constant current load control circuit with controllable peak factor according to claim 7, characterized in that: The inputs of the first subtractor are respectively the sampling current peak factor , given crest factor , the output is The two input terminals of the multiplier are the output terminal of the integral link and the current effective value given .
9. The constant current load control circuit with controllable peak factor according to claim 7, characterized in that: The instantaneous outer loop circuit includes resistors R1, R2, R3, capacitors C1, C2, C3, C4 and an operational amplifier OP1. The left end of resistor R1 is connected to a given input , capacitor C1 and resistor R1 are connected in parallel, and the left side of resistor R2 is connected to the current instantaneous value point connected, capacitor C2 and resistor R2 are connected in parallel, resistor R1, resistor R2, capacitor C1, and the right side of capacitor C2 are all connected to the inverting input terminal of the operational amplifier OP1, one end of resistor R3 is connected to the non-inverting input terminal of the operational amplifier OP1, the other end of resistor R3 is grounded, the left side of resistor R4 is connected to the inverting input terminal of the operational amplifier OP1, the right end of resistor R4 is connected to the left side of capacitor C3, the right side of capacitor C3 is connected to the output terminal of the operational amplifier OP1, and the series branch of resistor R4 and capacitor C3 is connected in parallel with capacitor C4; The instantaneous inner loop circuit includes resistors R5, R6, R7, R8 and an operational amplifier OP2. The left side of resistor R6 is connected to the output end of the operational amplifier OP1, the right side of resistor R6 is connected to the inverting input end of the operational amplifier OP2, and the left side of resistor R5 is connected to the capacitor current sampling signal The right side of the resistor R5 is connected to the inverting input terminal of the operational amplifier OP2, one end of the resistor R7 is connected to the non-inverting input terminal of the operational amplifier OP2, the other end of the resistor R7 is grounded, the left side of the resistor R8 is connected to the inverting input terminal of the operational amplifier OP2, and the right end of the resistor R8 is connected to the output terminal of the operational amplifier OP2.
Citation Information
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