Variable-frequency switching power supply system

Abstract

The invention relates to the technical field of switching power supplies, in particular to a variable-frequency switching power supply system. The system comprises a first voltage conversion module used for converting a first AC voltage input by an AC power supply into a first DC voltage, and inputting the first DC voltage into a second voltage conversion module; the digital signal processing module is used for acquiring a first reference frequency and performing closed-loop control on the second voltage conversion module based on the first reference frequency, so that the second voltage conversion module converts the first direct-current voltage into a voltage wave controlled by a bipolar pulse width modulation signal corresponding to the first reference frequency; and the frequency selection filtering module is used for acquiring a second reference frequency, and performing frequency selection filtering on the voltage wave controlled by the bipolar pulse width modulation signal input by the second voltage conversion module based on the second reference frequency to obtain a second AC voltage corresponding to the second reference frequency. By adopting the scheme, the variable-frequency switching power supply system which is simple in structure and high in reliability and flexibility can be provided.

Description

Technical Field

[0001] The present disclosure relates to the technical field of switching power supplies, and in particular to a variable frequency switching power supply system. Background Art

[0002] Frequency conversion is the conversion of alternating current (AC) of one frequency into AC of another frequency, which is AC / AC conversion. This conversion is used to achieve the conversion of the frequency of AC power, and sometimes it is also necessary to change the number of phases (for example, single-phase to three-phase, etc.). Applying frequency conversion technology to switching power supplies can greatly reduce the size of the power supply device and improve power efficiency.

[0003] There are three commonly used methods for implementing variable frequency power supply: one is to generate it completely by analog circuits; the second is to generate it by digital circuits; and the third is to generate it by dedicated integrated chips. However, the analog method has complex circuits, too much hardware, poor anti-interference ability, temperature drift, poor system reliability, and it is difficult to achieve optimal control; the digital method uses a computer to calculate each switching point according to different digital models, stores it in memory, and then generates the required pulse width modulation (PWM) wave through table lookup and necessary calculations. This method is rigid and inflexible; the third method is mostly connected to a microprocessor to complete the peripheral module control function, but it is still complex in system composition. Summary of the invention

[0004] The present disclosure aims to solve one of the technical problems in the related art at least to some extent.

[0005] To this end, the purpose of the present disclosure is to propose a variable frequency switching power supply system to provide a variable frequency switching power supply system with a simple structure, high reliability and flexibility.

[0006] To achieve the above objectives, an embodiment of the present disclosure provides a variable frequency switching power supply system, including:

[0007] A first voltage conversion module, a second voltage conversion module, a digital signal processing module and a frequency selection filter module; wherein,

[0008] The first voltage conversion module is used to convert a first AC voltage input from an AC power source into a first DC voltage, and input the first DC voltage to the second voltage conversion module;

[0009] The digital signal processing module is used to obtain a first reference frequency, and perform closed-loop control on the second voltage conversion module based on the first reference frequency, so that the second voltage conversion module converts the first DC voltage into a voltage wave controlled by a bipolar pulse width modulation signal corresponding to the first reference frequency;

[0010] The frequency selection filtering module is used to obtain a second reference frequency, and perform frequency selection filtering on the voltage wave controlled by the bipolar pulse width modulation signal input by the second voltage conversion module based on the second reference frequency to obtain a second AC voltage corresponding to the second reference frequency.

[0011] Optionally, the first voltage conversion module includes:

[0012] a rectifier module, used for rectifying a first AC voltage input from an AC power source to obtain a second DC voltage, and inputting the second DC voltage to the filter module;

[0013] The filtering module is used to filter the second DC voltage to obtain the first DC voltage, and input the first DC voltage to the second voltage conversion module.

[0014] Optionally, when the AC power supply is a three-phase AC power supply, the rectifier module is a three-phase rectifier module, and the three-phase rectifier module includes a first diode, a second diode, a third diode, a fourth diode, a fifth diode and a sixth diode; wherein,

[0015] A connection point between the anode of the first diode and the cathode of the second diode is connected to the first AC terminal of the AC power supply, a connection point between the anode of the third diode and the cathode of the fourth diode is connected to the second AC terminal of the AC power supply, and a connection point between the anode of the fifth diode and the cathode of the sixth diode is connected to the third AC terminal of the AC power supply;

[0016] The connection points between the cathode of the first diode, the cathode of the third diode, and the cathode of the fifth diode are respectively connected to the first end of the filter module and the positive DC end of the second voltage conversion module, and the connection points between the anode of the second diode, the anode of the fourth diode, and the anode of the sixth diode are respectively connected to the second end of the filter module and the negative DC end of the second voltage conversion module.

[0017] Optionally, the filtering module includes at least one polarized capacitor branch and at least one non-polarized capacitor branch; wherein,

[0018] The polarized capacitor branch includes a first polarized capacitor and a second polarized capacitor connected in series, the positive electrode of the first polarized capacitor is the first end of the polarized capacitor branch, the connection point between the first polarized capacitor and the second polarized capacitor is the midpoint of the polarized capacitor branch, and the negative electrode of the second polarized capacitor is the second end of the polarized capacitor branch;

[0019] The non-polar capacitor branch includes a first non-polar capacitor and a second non-polar capacitor connected in series, and a connection point between the first non-polar capacitor and the second non-polar capacitor is a branch midpoint of the non-polar capacitor branch;

[0020] The midpoint of the polarized capacitor branch is connected to the midpoint of the non-polarized capacitor branch, the connection point between the first end of the polarized capacitor branch and the first end of the non-polarized capacitor branch is respectively connected to the positive DC end of the rectifier module and the positive DC end of the second voltage conversion module, and the connection point between the second end of the polarized capacitor branch and the second end of the non-polarized capacitor branch is respectively connected to the negative DC end of the rectifier module and the negative DC end of the second voltage conversion module.

[0021] Optionally, the second voltage conversion module includes a first half-bridge switch submodule, a second half-bridge switch submodule, a third half-bridge switch submodule and a fourth half-bridge switch submodule; wherein,

[0022] The connection point between the first end of the first half-bridge switch submodule and the first end of the third half-bridge switch submodule is connected to the positive DC end of the first voltage conversion module, the connection point between the second end of the first half-bridge switch submodule and the first end of the second half-bridge switch submodule is connected to the first input end of the frequency selection filter module, the connection point between the second end of the third half-bridge switch submodule and the first end of the fourth half-bridge switch submodule is connected to the second input end of the frequency selection filter module, and the connection point between the second end of the second half-bridge switch submodule and the second end of the fourth half-bridge switch submodule is connected to the negative DC end of the first voltage conversion module;

[0023] In the process that the digital signal processing module performs closed-loop control on the second voltage conversion module based on the first reference frequency, bipolar modulation is performed on the first half-bridge switch submodule, the second half-bridge switch submodule, the third half-bridge switch submodule and the fourth half-bridge switch submodule.

[0024] Optionally, the first half-bridge switch submodule, the second half-bridge switch submodule, the third half-bridge switch submodule and the fourth half-bridge switch submodule all adopt a half-bridge switch circuit, and the half-bridge switch circuit includes an N-type metal oxide semiconductor transistor and a protection unit; wherein,

[0025] The connection point between the source of the N-type metal oxide semiconductor transistor and the first end of the protection unit is the first end of the half-bridge switch circuit, the connection point between the drain of the N-type metal oxide semiconductor transistor and the second end of the protection unit is the second end of the half-bridge switch circuit, and the gate of the N-type metal oxide semiconductor transistor is connected to the digital signal processing module.

[0026] Optionally, the protection unit includes a seventh diode and a resistor-capacitor series branch, wherein the resistor-capacitor series branch includes a resistor and a third non-polar capacitor connected in series; wherein,

[0027] The connection point between the cathode of the seventh diode and the first end of the resistor-capacitor series branch is the first end of the protection unit, and the connection point between the anode of the seventh diode and the second end of the resistor-capacitor series branch is the second end of the protection unit.

[0028] Optionally, the frequency selection filter module includes an isolation transformer and an electromagnetic interference filter module; wherein,

[0029] The first primary end of the isolation transformer is connected to the first AC end of the second voltage conversion module, the second primary end of the isolation transformer is connected to the second AC end of the second voltage conversion module, the first secondary end of the isolation transformer is connected to the first input end of the electromagnetic interference filtering module, the second secondary end of the isolation transformer is connected to the second input end of the electromagnetic interference filtering module, and the first output end and the second output end of the electromagnetic interference filtering module are used to output the second AC voltage.

[0030] Optionally, the digital signal processing module includes:

[0031] A sampling submodule, used for sampling the second AC voltage output by the frequency selection and filtering module to obtain a sampled voltage, and inputting the sampled voltage into the digital signal processing submodule;

[0032] The digital signal processing submodule is used to generate a first pulse width modulation drive signal based on the sampled voltage and the first reference frequency during the closed-loop control of the second voltage conversion module, and input the pulse width modulation drive signal to the switch drive submodule;

[0033] The switch driving submodule is used to convert the first pulse width modulation driving signal into a second pulse width modulation driving signal that meets the driving requirements of the second voltage conversion module, and input the second pulse width modulation driving signal to the control end of the second voltage conversion module to perform closed-loop control on the second AC voltage.

[0034] Optionally, the variable frequency switching power supply system further includes:

[0035] The communication module is used to receive a first reference frequency and a second reference frequency.

[0036] In summary, the variable frequency switching power supply system provided by the present disclosure adopts the AC / Direct Current (DC / AC) method, that is, the AC input of the AC power supply is first converted to DC, and then the DC is converted to the AC of the required frequency. Compared with the variable frequency power supply generated entirely by the analog circuit, it has a simple structure and high reliability; compared with the variable frequency power supply generated by the digital circuit, the frequency of the output second AC voltage can be flexibly adjusted according to the obtained first reference frequency and second reference frequency, and it has high flexibility. Secondly, by adopting a digital signal processing module, compared with a microcontroller, the increase in system frequency, the improvement in ADC conversion accuracy and efficiency are more conducive to the realization of high-precision output signals; and the reliability and programmability of the digital signal processing module can overcome the factors such as aging and matching errors and drifts between components in the hardware solution of the variable frequency power supply generated by the analog circuit.

[0037] Additional aspects and advantages of the present disclosure will be given in part in the following description and in part will be obvious from the following description or learned through practice of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] The above and / or additional aspects and advantages of the present disclosure will become apparent and easily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0039] Figure 1 A schematic diagram of the structure of a variable frequency switching power supply system provided by an embodiment of the present disclosure;

[0040] Figure 2 A schematic structural diagram of a variable frequency switching power supply system provided by another embodiment of the present disclosure;

[0041] Figure 3 A schematic diagram of the structure of a first voltage conversion module provided by an embodiment of the present disclosure;

[0042] Figure 4 A waveform diagram of a square wave sequence provided by an embodiment of the present disclosure;

[0043] Figure 5 A schematic diagram of the structure of a second voltage conversion module provided by an embodiment of the present disclosure;

[0044] Figure 6 A schematic diagram of the structure of an electromagnetic interference filtering module provided by an embodiment of the present disclosure;

[0045] Figure 7 A schematic diagram of the principle of PWM modulation provided by an embodiment of the present disclosure;

[0046] Figure 8A schematic diagram of the structure of a PWM output unit provided in an embodiment of the present disclosure;

[0047] Fig. 9 A waveform diagram of an asymmetric PWM signal provided by an embodiment of the present disclosure;

[0048] Fig.10 A waveform diagram of a symmetrical PWM signal provided by an embodiment of the present disclosure;

[0049] Fig.11 A schematic diagram of a closed-loop control process provided by an embodiment of the present disclosure;

[0050] Fig.12 A schematic diagram of the structure of a driving circuit provided by an embodiment of the present disclosure;

[0051] Fig.13 A schematic diagram of the structure of a communication module provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0052] Embodiments of the present disclosure are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present disclosure, and should not be construed as limiting the present disclosure.

[0053] The power stability of electronic equipment is directly related to the safe and stable performance of the equipment. For example, civil aviation airport control communication equipment is a professional equipment used for communication between ground control and civil aircraft. It is one of the important facilities to ensure the safe and stable operation of civil aviation flights. It has the characteristics of air-to-air radio transmission. The equipment itself has very high requirements for power stability and electromagnetic interference (EMI). A safe and stable power system is one of the important conditions to ensure the safe and stable operation of such equipment.

[0054] At present, the power supply of this type of equipment mainly adopts the field-shaped resonant transformer, which uses the principle of electromagnetic resonance to provide a fixed-frequency sinusoidal AC power supply. However, the field-shaped resonant transformer has many harmonics, large voltage distortion, low efficiency, large materials, backward technology, long startup and switching time, large capacity of the resonant capacitor, short life, and many shortcomings, which affect the safe and stable operation of this type of equipment.

[0055] To address this problem, related technologies have proposed a variable frequency power supply system based on a microcontroller and an integrated block insulated-gate bipolar transistor (IGBT). Although compared with the field-shaped resonant transformer, the output signal accuracy is improved, the volume and weight are reduced, and the output efficiency is significantly improved, the microcontroller chip is mostly a 16-bit chip, and the system frequency is concentrated in the range of 20MHz to 4MHz, the analog to digital converter (ADC) accuracy is only 10 bits, and the conversion time is 5.5us. The microcontroller system has a slow processing speed, and the upper limit of the high-frequency characteristics of the IGBT is poor, and it is difficult to further increase the operating frequency, resulting in poor overload resistance of the system output signal.

[0056] The present disclosure is described in detail below with reference to specific embodiments.

[0057] Figure 1 This is a schematic diagram of the structure of a variable frequency switching power supply system provided by an embodiment of the present disclosure. Figure 1 As shown, the variable frequency switching power supply system includes: a first voltage conversion module, a second voltage conversion module, a digital signal processing module and a frequency selection filter module; wherein,

[0058] A first voltage conversion module, used for converting a first AC voltage inputted from an AC power source into a first DC voltage, and inputting the first DC voltage into a second voltage conversion module;

[0059] A digital signal processing module, used for acquiring a first reference frequency, and performing closed-loop control on the second voltage conversion module based on the first reference frequency, so that the second voltage conversion module converts the first DC voltage into a voltage wave controlled by a bipolar pulse width modulation signal corresponding to the first reference frequency;

[0060] The frequency selection filter module is used to obtain a second reference frequency, and perform frequency selection filtering on the voltage wave controlled by the bipolar pulse width modulation signal input by the second voltage conversion module based on the second reference frequency to obtain a second AC voltage corresponding to the second reference frequency.

[0061] According to some embodiments, the AC power source refers to a power source that requires a variable frequency switching power supply system for frequency conversion. The AC power source includes but is not limited to an industrial power source, a mains network, etc. For example, the AC power source may be a 380V, 50Hz industrial power source.

[0062] In some embodiments, when the first voltage conversion module converts the first AC voltage input from the AC power supply into the first DC voltage, the voltage value of the first DC voltage can be set according to the actual application scenario. For example, a first AC voltage of 380V, 50Hz can be converted into a first DC voltage of 537V.

[0063] According to some embodiments, the first reference frequency is used to indicate the frequency of the bipolar PWM signal to be generated, and when the acquired first reference frequency changes, the generated bipolar PWM signal will also change. The first reference frequency may be, for example, 50kHz, which is beyond the human hearing range, so the noise is very small, and in comparison, the increase in the switching frequency brings about a significant improvement in output accuracy, and the overload resistance of the system output is also greatly improved.

[0064] In some embodiments, the second reference frequency refers to a frequency that the output second AC voltage needs to reach.

[0065] It should be noted that the variable frequency switching power supply system provided in the embodiment of the present disclosure adopts the AC / DC / AC method, that is, the AC input of the AC power supply is first converted into DC, and then the DC is converted into AC of the required frequency. Compared with the variable frequency power supply generated completely by the analog circuit, it has a simple structure and high reliability; compared with the variable frequency power supply generated by the digital circuit, the frequency of the output second AC voltage can be flexibly adjusted according to the obtained first reference frequency and second reference frequency, and it has high flexibility.

[0066] In addition, the Digital Signal Processing (DSP) module refers to a module composed of a DSP chip as the core. The DSP chip is a processor with a special mechanism designed for real-time processing of large amounts of data. The DSP chip uses a Harvard structure in which programs and data are stored separately, has a dedicated hardware multiplier, widely uses pipeline operations, and provides special DSP instructions that can be used to quickly implement various complex digital signal processing algorithms. According to the requirements of digital signal processing, the DSP chip can have the following main features:

[0067] One multiplication and one addition can be completed in one instruction cycle;

[0068] Program and data spaces are stored separately, and instructions and data can be accessed simultaneously;

[0069] The chip has high-speed random access memory (RAM), and usually two blocks can be accessed simultaneously using independent data buses;

[0070] Hardware support for low-overhead or no-overhead loops and jumps;

[0071] Fast interrupt handling and hardware input / output (I / O) support;

[0072] Having multiple hardware address generators operating in a single cycle;

[0073] Multiple operations can be performed in parallel;

[0074] Supports pipeline operation so that operations such as instruction fetch, decoding and execution can be performed in an overlapping manner.

[0075] In other words, DSP can implement many algorithms at high speed. Compared with microprocessors such as single-chip microcomputers, DSP has characteristics that are more suitable for digital signal processing. For example, it adopts an improved Harvard bus structure, has dedicated hardware multipliers and accumulators integrated inside, generally adopts a multi-stage pipeline structure to give it good parallel characteristics, and has a specially designed instruction system suitable for digital signal processing. These characteristics of DSP are of great significance to the field of real-time applications.

[0076] Among them, the Harvard structure is a parallel architecture that is different from the traditional von Neumann structure. The biggest feature of the Harvard structure is that the computer has independent data storage space and program storage space, that is, data and programs are stored in different memories. Each memory is separately addressed and accessed independently, with independent data buses and program buses, which can access data and read and write instructions at the same time, which can improve data throughput and thus improve computing speed.

[0077] Therefore, compared with the variable frequency power supply generated by the dedicated integrated chip, the variable frequency switching power supply system provided by the embodiment of the present disclosure adopts the DSP module, which is more conducive to the realization of high-precision output signals by improving the system frequency and the ADC conversion accuracy and efficiency compared with the microcontroller. In addition, the reliability and programmability of the DSP module can overcome the factors such as aging and matching errors and drifts between components in the hardware solution of the variable frequency power supply generated by the analog circuit.

[0078] Optionally, Figure 2 A schematic structural diagram of a variable frequency switching power supply system provided by another embodiment of the present disclosure.

[0079] like Figure 2 As shown, the first voltage conversion module includes:

[0080] A rectifier module, used for rectifying a first AC voltage input from an AC power source to obtain a second DC voltage, and inputting the second DC voltage to the filter module;

[0081] The filtering module is used for filtering the second DC voltage to obtain the first DC voltage, and inputting the first DC voltage to the second voltage conversion module.

[0082] It should be noted that a stable and reliable first DC voltage can be obtained by rectifying and filtering the first AC voltage in sequence.

[0083] According to some embodiments, Figure 3 Schematic diagram of the structure of a first voltage conversion module provided by an embodiment of the present disclosure. Figure 3 As shown, when the AC power supply is a three-phase AC power supply, the rectifier module is a three-phase rectifier module, and the three-phase rectifier module includes a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, a fifth diode D5 and a sixth diode D6; wherein,

[0084] A connection point between the anode of the first diode D1 and the cathode of the second diode D2 is connected to a first AC terminal of the AC power source, a connection point between the anode of the third diode D3 and the cathode of the fourth diode D4 is connected to a second AC terminal of the AC power source, and a connection point between the anode of the fifth diode D5 and the cathode of the sixth diode D6 is connected to a third AC terminal of the AC power source;

[0085] The connection points between the cathode of the first diode D1, the cathode of the third diode D3, and the cathode of the fifth diode D5 are respectively connected to the first end of the filter module and the positive DC end of the second voltage conversion module, and the connection points between the anode of the second diode D2, the anode of the fourth diode D4, and the anode of the sixth diode D6 are respectively connected to the second end of the filter module and the negative DC end of the second voltage conversion module.

[0086] In some embodiments, by using the unidirectional conductivity of a diode to rectify the first AC voltage, the rectification effect of the first AC voltage can be improved to obtain a stable second DC voltage.

[0087] According to some embodiments, the filtering module includes at least one polarized capacitor branch and at least one non-polarized capacitor branch; wherein,

[0088] The polarized capacitor branch includes a first polarized capacitor and a second polarized capacitor connected in series, the positive electrode of the first polarized capacitor is the first end of the polarized capacitor branch, the connection point between the first polarized capacitor and the second polarized capacitor is the midpoint of the polarized capacitor branch, and the negative electrode of the second polarized capacitor is the second end of the polarized capacitor branch;

[0089] The non-polar capacitor branch includes a first non-polar capacitor and a second non-polar capacitor connected in series, and the connection point between the first non-polar capacitor and the second non-polar capacitor is the branch midpoint of the non-polar capacitor branch;

[0090] The midpoint of the polar capacitor branch is connected to the midpoint of the non-polar capacitor branch, the connection point between the first end of the polar capacitor branch and the first end of the non-polar capacitor branch is respectively connected to the positive DC end of the rectifier module and the positive DC end of the second voltage conversion module, and the connection point between the second end of the polar capacitor branch and the second end of the non-polar capacitor branch is respectively connected to the negative DC end of the rectifier module and the negative DC end of the second voltage conversion module.

[0091] In some embodiments, the high-frequency characteristics of polar capacitors are relatively poor compared to non-polar capacitors, so they are suitable for low-frequency filtering; non-polar capacitors have good high-frequency characteristics and are suitable for high-frequency filtering. By combining polar capacitors and non-polar capacitors to filter the second DC voltage, the flexibility and reliability of the filtering can be improved, and a stable and reliable first DC voltage can be obtained. The number of polar capacitor branches and non-polar capacitor branches can be adjusted according to the actual application scenario. For example, Figure 3 As shown, by setting up three polar capacitor branches and one non-polar capacitor branch for filtering, the unidirectional conductivity of the diode and the non-polar capacitor as the large capacitor voltage can be used to convert the first AC voltage of 380V, 50Hz into a stable and reliable first DC voltage of 537V.

[0092] Alternatively, if Figure 2 As shown, the second voltage conversion module includes a first half-bridge switch submodule, a second half-bridge switch submodule, a third half-bridge switch submodule and a fourth half-bridge switch submodule; wherein,

[0093] The connection point between the first end of the first half-bridge switch submodule and the first end of the third half-bridge switch submodule is connected to the positive DC end of the first voltage conversion module, the connection point between the second end of the first half-bridge switch submodule and the first end of the second half-bridge switch submodule is connected to the first input end of the frequency selection filter module, the connection point between the second end of the third half-bridge switch submodule and the first end of the fourth half-bridge switch submodule is connected to the second input end of the frequency selection filter module, and the connection point between the second end of the second half-bridge switch submodule and the second end of the fourth half-bridge switch submodule is connected to the negative DC end of the first voltage conversion module.

[0094] According to some embodiments, when the digital signal processing module performs closed-loop control on the second voltage conversion module based on the first reference frequency, bipolar modulation is performed on the first half-bridge switch submodule, the second half-bridge switch submodule, the third half-bridge switch submodule and the fourth half-bridge switch submodule.

[0095] In some embodiments, modulation control often has two situations: unipolar and bipolar. Unipolar modulation means that in one cycle of the output, only one of the two conductive arms of the same group is repeatedly turned on and off while the other is always off. Bipolar modulation means that in one cycle of the output, the two conductive arms of the same group are alternately turned on and off complementary to each other, and the same group of bridge arms (such as: the first half-bridge switch submodule and the fourth half-bridge switch submodule form a chopper bridge arm, and the second half-bridge switch submodule and the third half-bridge switch submodule form a chopper bridge arm) are alternately turned on and off, and the current flowing through the load follows the law of voltage, such as Figure 4 shown.

[0096] For example, in the upper half cycle of the voltage wave controlled by the output bipolar pulse width modulation signal, the fourth half-bridge switch submodule is controlled to be in the on state, and the second half-bridge switch submodule and the third half-bridge switch submodule are controlled to be in the off state, then the connection point between the second end of the third half-bridge switch submodule and the first end of the fourth half-bridge switch submodule is at a low level, and at this time, the control signal input to the first half-bridge switch submodule can control the connection point between the second end of the first half-bridge switch submodule and the first end of the second half-bridge switch submodule to be at a high level or a low level. Similarly, in the lower half cycle of the voltage wave controlled by the output bipolar pulse width modulation signal, the second half-bridge switch submodule is controlled to be in the on state, and the first half-bridge switch submodule and the fourth half-bridge switch submodule are controlled to be in the off state, then the connection point between the second end of the first half-bridge switch submodule and the first end of the second half-bridge switch submodule is at a low level, and at this time, the control signal input to the third half-bridge switch submodule can control the connection point between the second end of the third half-bridge switch submodule and the first end of the fourth half-bridge switch submodule to be at a high level or a low level. Finally, the chopping function is realized by alternating on and off cycles.

[0097] According to some embodiments, the first half-bridge switch submodule, the second half-bridge switch submodule, the third half-bridge switch submodule and the fourth half-bridge switch submodule all use a half-bridge switch circuit, and the half-bridge switch circuit includes an N-type metal oxide semiconductor transistor and a protection unit; wherein,

[0098] The connection point between the source of the N-type metal oxide semiconductor transistor and the first end of the protection unit is the first end of the half-bridge switch circuit, the connection point between the drain of the N-type metal oxide semiconductor transistor and the second end of the protection unit is the second end of the half-bridge switch circuit, and the gate of the N-type metal oxide semiconductor transistor is connected to the digital signal processing module.

[0099] In some embodiments, the N-type metal oxide semiconductor transistor (Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET, MOS) has the advantages of fast operating speed, high input impedance, simple driving circuit, and good thermal stability. NMOS is a voltage-controlled power electronic device. When a positive voltage is applied between the gate and source of NMOS, NMOS is in the on state; when the voltage between the gate and source of NMOS is 0, NMOS is in the off state. NMOS has a higher withstand voltage and a larger current capacity. Although its withstand voltage and current capacity are not as good as IGBT, NMOS has a large DC input resistance Rgs. Since NMOS has a P layer, when it is turned on, positive carriers are injected from the P layer and accumulated in the N layer, which accelerates the conductivity modulation effect, which makes NMOS present low impedance when it is turned on, so NMOS is easy to achieve high voltage control. In addition, its switching speed is much faster than that of IGBT tubes, and overcurrent protection can be achieved by controlling the gate voltage of NMOS.

[0100] Taking a scenario as an example, the model of NMOS selected in the half-bridge switch circuit may be, for example, the N-channel enhancement high-speed NMOS tube IRFPG50PBF, which has an integrated overcurrent protection diode to improve the safety and reliability of controlling the second voltage conversion module.

[0101] According to some embodiments, Figure 5 FIG. 1 is a schematic diagram of the structure of a second voltage conversion module provided by an embodiment of the present disclosure. Figure 5 As shown, the protection unit includes a seventh diode and a resistor-capacitor series branch, and the resistor-capacitor series branch includes a resistor and a third non-polar capacitor connected in series; wherein,

[0102] The connection point between the cathode of the seventh diode and the first end of the resistor-capacitor series branch is the first end of the protection unit, and the connection point between the anode of the seventh diode and the second end of the resistor-capacitor series branch is the second end of the protection unit.

[0103] Among them, the NMOS in the first half-bridge switch sub-module is Q1, the seventh diode is D71, the resistor is R1, and the third non-polar capacitor is C1; the NMOS in the second half-bridge switch sub-module is Q2, the seventh diode is D72, the resistor is R2, and the third non-polar capacitor is C2; the NMOS in the third half-bridge switch sub-module is Q3, the seventh diode is D73, the resistor is R3, and the third non-polar capacitor is C3; the NMOS in the fourth half-bridge switch sub-module is Q4, the seventh diode is D74, the resistor is R4, and the third non-polar capacitor is C4.

[0104] In some embodiments, by connecting a safety unit composed of a seventh diode and a resistor-capacitor series circuit in parallel to the source and drain of the NMOS, the safety of the NMOS during operation can be improved.

[0105] Alternatively, if Figure 2 As shown, the frequency selection filter module includes an isolation transformer and an electromagnetic interference filter module; wherein,

[0106] The first primary end of the isolation transformer is connected to the first AC end of the second voltage conversion module, the second primary end of the isolation transformer is connected to the second AC end of the second voltage conversion module, the first secondary end of the isolation transformer is connected to the first input end of the electromagnetic interference filter module, the second secondary end of the isolation transformer is connected to the second input end of the electromagnetic interference filter module, and the first output end and the second output end of the electromagnetic interference filter module are used to output a second AC voltage.

[0107] According to some embodiments, by using an isolation transformer, the voltages at the input end and the output end can be isolated, and noise introduced from the input end can be prevented from interfering with a load connected to the output end.

[0108] In some embodiments, the EMI filter module can suppress high-frequency noise generated by the system to prevent it from entering the AC power supply, such as the mains network, and can improve the electromagnetic compatibility performance of the system.

[0109] According to some embodiments, Figure 6 This is a schematic diagram of the structure of an electromagnetic interference filtering module provided by an embodiment of the present disclosure. Figure 6 As shown, the electromagnetic interference filtering module includes a first inductor L1, a second inductor L2, a third inductor L3, a fourth inductor L4, a third polarized capacitor C5, a fourth polarized capacitor C6, a fifth polarized capacitor C7 and a sixth polarized capacitor C8; wherein,

[0110] The connection point between the positive electrode of the third polarized capacitor C5 and the first end of the first inductor L1 is the first input end of the electromagnetic interference filtering module, the connection point between the negative electrode of the third polarized capacitor C5 and the first end of the third inductor L3 is the second input end of the electromagnetic interference filtering module, the second end of the first inductor L1 is respectively connected to the first end of the second inductor L2 and the positive electrode of the fourth polarized capacitor C6, the second end of the third inductor L3 is respectively connected to the first end of the fourth inductor L4 and the negative electrode of the fourth polarized capacitor C6, the connection point between the second end of the second inductor L2, the positive electrode of the fifth polarized capacitor C7 and the positive electrode of the sixth polarized capacitor C8 is the first output end of the electromagnetic interference filtering module, and the connection point between the second end of the fourth inductor L4, the negative electrode of the fifth polarized capacitor C7 and the negative electrode of the sixth polarized capacitor C8 is the second output end of the electromagnetic interference filtering module.

[0111] In some embodiments, by using an electromagnetic interference filter module composed of an inductor and capacitor network, the impedance of the electromagnetic interference filter module can be mismatched with the impedance of the interference source, so that the interference signal is reflected back along the original direction, reducing the impact of the interference source. Among them, the two inductors present dry impedance to the common-mode interference signal (asymmetric interference current), and present low impedance to the differential-mode signal and the power supply current, so that the attenuation of the power supply can be ensured to be very small, while suppressing the current noise at the same time.

[0112] Alternatively, if Figure 2 As shown, the digital signal processing module includes:

[0113] A sampling submodule, used for sampling the second AC voltage output by the frequency selection and filtering module to obtain a sampled voltage, and inputting the sampled voltage into the digital signal processing submodule;

[0114] a digital signal processing submodule, configured to generate a first pulse width modulation drive signal based on the sampled voltage and the first reference frequency during the closed-loop control of the second voltage conversion module, and input the pulse width modulation drive signal to the switch drive submodule;

[0115] The switch driving submodule is used to convert the first pulse width modulation driving signal into a second pulse width modulation driving signal that meets the driving requirements of the second voltage conversion module, and input the second pulse width modulation driving signal to the control end of the second voltage conversion module to perform closed-loop control on the second AC voltage.

[0116] According to some embodiments, during the process of the sampling submodule sampling the second AC voltage output by the frequency selection filtering module, the second AC voltage output by the frequency selection filtering module can be passed through a step-down transformer, a rectifier-integrator filtering unit, and then introduced into an ADC sampling unit in the digital signal processing submodule.

[0117] According to some embodiments, the digital signal processing submodule refers to a module where a DSP chip is located. The DSP chip used may be, for example, a TMS320F2812 (abbreviated as F2812) chip, whose 32-bit fixed-point DSP core can provide a digital solution for the design of closed-loop control without sacrificing the accuracy and performance of the original system.

[0118] Among them, the F2812 chip integrates a variety of advanced interface modules, which can provide a good platform for the implementation of applications in the field of motor and other motion control. It is mainly composed of three parts: Central Processing Unit (CPU), memory and peripherals; the CPU is embedded with program memory, including Read-Only Memory (ROM) / Flash Memory (FLASH), which can use LP256 hard macro instructions; the system frequency of its DSP core is as high as 150MHZ, the clock cycle is as high as 6.67ns, it has 16×16-bit and 32×32-bit accumulators and 16×16-bit dual-port accumulators, and FLASH is a 128k×16 single-cycle access memory.

[0119] Among them, the F2812 chip also includes an ADC sampling unit, with a built-in sampling and holding 12-bit A / D conversion core, its fast conversion time can reach 80ns once, and can perform "automatic conversion" of up to 16 channels (ADCIN0-ADCIN15). The order of channels to be converted each time can be selected by programming. The ADC can select the channel to be converted through an analog multiplexer. After the conversion is completed, the conversion result of the selected channel can be saved in the corresponding result register (RESULTn). The CONVnn bit in the ADC input channel selection sort control register (CHSELSEQn) can be used to define the order in which the conversion results are saved.

[0120] Among them, the unified I / O, data, and program compilation method used in the F2812 chip can provide flexible address allocation and debugging methods.

[0121] In some embodiments, the digital signal processing submodule can be composed of an F2812 chip, a reset circuit, a 3.3V I / O power supply, a 1.8V DSP core power supply, and an I / O drive circuit. The digital signal processing submodule can lead to multiple groups of PWM drive ports, each group of drive ports consisting of two general I / Os and a pair of PWM signals. The digital signal processing submodule can also lead to two groups of 8-channel AD conversion circuits, ADCA and ADCB, in order to improve the AD conversion accuracy when completing closed-loop control.

[0122] The variable frequency switching power supply system may include a plurality of second voltage conversion modules, each of which corresponds to a group of PWM drive ports, thereby improving the flexibility of the variable frequency switching power supply system when in use.

[0123] Among them, the reset circuit can be composed of a reset chip TPS3838K33DBV, a power chip TPS73HD318 and related peripheral circuits.

[0124] Among them, the I / O driving circuit can be composed of the LVC4245 chip and related peripheral circuits.

[0125] It should be noted that since the pulse width modulation signal is a series of pulse signals with varying pulse widths, the pulses last for a number of fixed cycles, and there is only one high-level pulse in each cycle. This fixed cycle is called a PWM (carrier) cycle. The width of the PWM pulse is determined or modulated by another sequence called a modulation signal. The frequency of the modulation signal is generally much lower than the frequency of the PWM carrier. The signal does not necessarily refer to a sine wave, and can be a pre-distorted signal in digital control technology. For example, when the digital signal processing submodule generates a first pulse width modulation drive signal, the modulation signal of the first pulse width modulation drive signal can select a sine wave signal, and the pulse width of the first pulse width modulation drive signal can vary with the sine wave amplitude of the sine wave signal.

[0126] Take a scenario as an example. Figure 7 The schematic diagram of the principle of PWM modulation provided by the embodiment of the present disclosure is as follows. Figure 7 As shown in the figure, the energy equivalent method is a pulse width modulation method based on the concept that the energy in each specific time interval is equivalent to the energy enclosed by the sine wave. In order to obtain a pulse width modulation waveform close to a sine wave, the sine wave can be divided into N equal parts in one cycle, and the pulse width of each part is 2π / N, so that the area covered by the sine wave in each time interval can be calculated separately. In each specific time interval, a pulse with an area equal to or proportional to the corresponding sine wave can be obtained, but a rectangular voltage pulse with a pulse amplitude equal to A is used to replace the corresponding sine wave part. Such N pulses of unequal widths form a pulse width modulation waveform equivalent to a sine wave. Obviously, as long as N is large enough, such a series of equivalent rectangular pulses will be very close to the waveform of a sine wave.

[0127] That is to say, assuming that the amplitude of the sine wave is U and the amplitude of the equivalent rectangular waveform is A, the width of each equivalent rectangular pulse wave conforms to the following formula:

[0128]

[0129] Among them, β i is the central angle of each time interval segment, that is, the central angle of each equivalent pulse position, which can be calculated using the following formula:

[0130]

[0131] The larger the value of N is, the closer the equivalent pulse width is to the sine value of the central angle of each segment, that is:

[0132]

[0133] As can be seen from the above, PWM is a pulse sequence whose pulse width changes continuously with the baseband signal. These pulses are spread out over several fixed-length cycles to ensure that there is one pulse in each cycle. This fixed cycle is the PWM carrier cycle, and its reciprocal is called the PWM carrier frequency. The width of the PWM pulse is determined or modulated according to a series of predetermined values ​​of the modulation signal.

[0134] In order to generate a PWM signal, a suitable timer can be used to repeatedly generate a timing cycle that is the same as the PWM cycle and a comparison register can be used to store the modulation value. The value of the comparison register is constantly compared with the value of the timer. When the comparison matches, a jump is generated on the corresponding output pin (from low level to high level or from high level to low level). When the second match occurs or the timer cycle ends, another jump is generated on the corresponding output pin (from high level to low level, or from low level to high level). In this way, an output pulse proportional to the switching time and the value of the comparison register can be generated. This process is repeated in each timer cycle, but the modulation value in the comparison register changes each time. Therefore, a PWM signal will be generated on the corresponding output pin.

[0135] According to some embodiments, when the digital signal processing submodule generates a first pulse width modulation drive signal based on the sampled voltage and the first reference frequency, the first pulse width modulation drive signal can be generated based on the above PWM modulation principle by the first event manager EVA and the second event manager EVB in F2812. The two event managers are completely consistent in terms of function and register mapping bit definition.

[0136] In some embodiments, the event manager includes a comparison unit, a PWM output unit, and two general timers.

[0137] The comparison unit includes two associated comparison registers TXCMPR and three comparators, and correspondingly has two comparison output pins TXPWM / TXCMP and three pairs of PWM output pins PWMx and PWMx+1 generated by the comparison unit.

[0138] Among them, the two general timers can provide independent and flexible time bases, such as providing a time base for the comparison unit and the PWM output unit. For each event manager, the PWM output unit associated with the comparison unit can generate 6 channels and 3 pairs of PWM output signals with programmable dead zone and output polarity. The input of the general timer includes the following modules: internal CPU clock or external clock TCLKINA / B (the maximum frequency is 1 / 4 of the CPU clock frequency), direction input signal TDIRA / B that controls the increase / decrease count direction of the general timer, and reset signal RESET. The period register value of the general timer determines the timing period of the timer. When the value in the period register matches the value in the timer counter, the timer resets to 0 or counts down according to the counting mode of the counter.

[0139] For example, in the F2812 chip, the comparison register TXCMPR and the cycle register TXPR of the general timer both have buffer register images. That is to say, at any time in a cycle, a new value can be written to any of the two registers, and of course the new value is written to the corresponding image buffer register. For the comparison register, the content in the image register is loaded into the working register only when a specific timer event specified by the TXCON register occurs. For the cycle register, the working cycle register reloads the value in its image buffer register only when the value of the count register TXCNT is 0. There may be three situations in which the comparison register is reloaded. The one to be used in this design is: when the cycle matches, that is, when the value of the counter is 0 or the value of the counter is equal to the value of the cycle register, the reload operation occurs.

[0140] The value inside the counter in the comparison unit is constantly compared with the value of the comparison register. When the two are equal, a first comparison match event can be generated. The PWM output unit can generate two independent PWM signals by using this first comparison match event. The value inside the counter is compared with the value of the register in the comparison unit. When the two are equal, a second comparison match event is generated. The PWM output unit can generate six fully compared PWM signals by using this second comparison match event.

[0141] In addition, the value of N in the event manager can be determined according to the first reference frequency and the second reference frequency, which also indicates the number of sampling points corresponding to the sampling submodule. For example, the system frequency of F2812 is selected as 120MHz, and the corresponding counter cycle value is set to 120M / 50*2K=1200, so that the frequency required for PWM with a first reference frequency of 50kHz can be obtained by using a general timer, and the number of sampling points of a sine cycle during pulse width modulation is 50K / 25=2000, so a sine wave with a second reference frequency of 25Hz can be obtained.

[0142] In some embodiments, each event manager also has three full comparison units. Each full comparison unit has two associated comparison PWM output pins. The time base of the full comparison unit is provided by one of the general timers, which shares a comparison control register COMCON with the comparison unit. By setting the corresponding bit of COMCON, the operation and output of the full comparator can be enabled / disabled, etc.

[0143] In some embodiments, Figure 8 This is a schematic diagram of the structure of a PWM output unit provided by an embodiment of the present disclosure. Figure 8 As shown, the PWM output unit includes the following functional units: a symmetrical / asymmetrical waveform generator, a space vector state machine, a programmable dead zone unit, and an output logic unit.

[0144] The symmetrical / asymmetrical waveform generator is used to generate an initial pulse width modulation drive signal, and the signal type of the initial pulse width modulation drive signal generated by the generator includes but is not limited to an asymmetrical PWM signal, a symmetrical PWM signal, and the like. Fig. 9 A waveform diagram of an asymmetric PWM signal provided by an embodiment of the present disclosure; Fig. 9 As shown, the characteristic of asymmetric PWM signal is that the modulation signal is not symmetrical about the center of the PWM period, and each pulse width can only affect the output waveform from one side of its pulse. Fig.10 A waveform diagram of a symmetrical PWM signal provided by an embodiment of the present disclosure; Fig.10 As shown in the figure, the characteristic of symmetrical PWM signal is that the modulated signal is symmetrical about the center of each PWM cycle. Compared with asymmetrical PWM signal, the advantage of symmetrical PWM signal is that there are two inactive areas of equal length at the beginning and end of each PWM cycle. When using sinusoidal pulse modulation, the symmetrical waveform produces less harmonics in the output signal than the asymmetrical waveform.

[0145] In some embodiments, since the two output PWM signals are exactly the same, it is necessary to avoid the damage of the NMOS to the instantaneous short-circuit peak current when the positive and negative conversion of the same half-bridge switch submodule in the second voltage conversion module is performed, so it is necessary to set a "dead zone" event. A time interval that can be defined by the corresponding bit in the register DBTCONX can separate the transition edges of the two signals, and this time interval is called a "dead zone". By setting the "dead zone" corresponding to the programmable dead zone unit based on the complementary alternating on-off moments corresponding to the same group of two half-bridge switch submodules in the second voltage conversion module, the situation in which the second voltage conversion module forms a short circuit and causes device damage can be reduced.

[0146] For example, if the value of DBTCONX[11-8] is m, and the value in DBTCON[4-2] is the corresponding pre-scaling factor P, then the duration of the "dead zone" is [m×p] CPU clock cycles.

[0147] Taking a scenario as an example, when it is determined that the signal type of the generated initial pulse width modulation drive signal is an asymmetric PWM signal, a general timer in the event manager must be set to continuous up-counting mode, and its period register must be loaded with the corresponding value of the required PWM carrier period. Then set the COMCONX bit to enable the comparison operation, set the selected output pin as PWM output, and enable the output. If the dead zone operation is enabled, the corresponding value of the required dead zone time must be written to the DBT[3~0] bits in DBTCONX[11~8], which will be used as the period of the 4-bit dead zone timer. One dead zone value will be used for all PWM output channels, while the other outputs will remain low (off) or high (on) at the beginning, middle or end of a PWM cycle. After the general timer is started, the compare register will be rewritten with the new compare value in each PWM cycle to control the conduction time of the NMOS by adjusting the width (duty cycle) of the PWM output.

[0148] Similarly, the process of using a comparison unit to generate a symmetrical PWM waveform is similar to the process of generating an asymmetrical PWM waveform. The only difference is that the general timer is set to a continuous up / down counting mode. That is to say, when the signal type of the initial pulse width modulation drive signal is selected as a symmetrical PWM signal, the general timer GP in the event manager EV can be used to generate an independent time base for PWM. The corresponding bit combination of the logic control register TXCON can set the four timing modes of the timer. When BIT6 of TXCON = '1', the timer is enabled and the timer starts timing according to the set mode. Each event manager EV can provide a time base for 8 channels (4 groups) of PWM, that is, it can control four second voltage conversion modules in combination with sufficient general I / O.

[0149] It should be noted that when generating a symmetrical PWM waveform, there are two comparison matches in one PWM cycle, one occurs during the up-counting period before the cycle match, and the other occurs during the down-counting period after the cycle match. When the cycle matches, the new cycle value becomes valid (cycle reload). In this way, it can advance or delay the second edge of the PWM pulse. Because the comparison register is a buffer register image, a new value can be written to it at any time in a cycle. The new value can be written to the action register at any time in the cycle to change the PWM cycle or force the definition of the PWM output to change, which brings great convenience to the application.

[0150] Take a scenario as an example. Fig.11 A schematic diagram of a closed-loop control process provided by an embodiment of the present disclosure. Fig.11 As shown, during the operation of the variable frequency switching power supply system, first, the CPU in the DSP chip is initialized. Then, the DSP chip reads the parameter table from the FLASH for PWM output, and outputs the first pulse width modulation drive signal corresponding to the first reference frequency. After that, the 25Hz sine wave is output to the load after being filtered by the isolation transformer and the EMI filter module; at the same time, the output 25Hz sine wave is transformed by the transformer and sampled by A / D, and then rectified by the double bridge and input to the DSP chip after the integrator; then, the parameter value obtained by the DSP chip sampling is compared with the calculated sampling value, and the parameter value changed by ADC sampling is stored in the RAM, and the comparison result is used to adjust the sine sampling amplitude with a fixed step size, and then the parameter table is read out from the FLASH again for PWM output to achieve closed-loop control.

[0151] According to some embodiments, when the first positive bias voltage of the NMOS increases, the on-state voltage decreases, the on-voltage will increase with the increase of the drain current, and the turn-on loss will increase with the increase of the junction temperature. Therefore, the characteristics of the NMOS change with the change of the gate drive capability, just like the switching characteristics and safe operating area of ​​the bipolar transistor change with the base drive capability. Therefore, for the switch drive submodule, at least one of the following design methods can be adopted:

[0152] Since NMOS is voltage driven, it has a threshold voltage of about 5V and capacitive input impedance. Therefore, NMOS has relatively high requirements for gate voltage. Due to the existence of capacitive input impedance, the circuit connection between the switch driver submodule and NMOS should be as short as possible, that is, less than the connection length threshold;

[0153] Since NMOS is mostly used in high-voltage applications in power electronic equipment, the switch drive submodule and the digital signal processing submodule should be strictly isolated in terms of potential. Each NMOS uses a separate drive circuit to improve performance, and each NMOS drive circuit is powered separately so that after the NMOS is turned on, the gate drive can provide enough power to prevent the NMOS from exiting saturation and being damaged.

[0154] Use a driving power supply with an internal resistance less than the internal resistance threshold to discharge the gate capacitance of the NMOS to ensure that the gate control voltage has a sufficiently steep leading and trailing edge transition, so that the switching loss of the NMOS is as small as possible;

[0155] The frequency of the pulse width modulation driving signal that can be transmitted by the switch driving submodule is greater than a frequency threshold, and the frequency threshold may be greater than 10 kHz, for example, and the frequency threshold may be 50 kHz, for example.

[0156] Because the switching time of NMOS cannot be too short under large inductive loads, in order to limit the peak voltage formed by di / dt and ensure the safety of NMOS, an RC filter circuit can be connected between the source and drain of the NMOS tube for overcurrent protection control;

[0157] The self-protection function circuit is added, and has a strong anti-interference ability to improve the reliability of the switch drive submodule when in use.

[0158] Taking a scenario as an example, based on the above-mentioned design methods, the designed switch driving submodule may include multiple driving circuits, and the driving circuits correspond one-to-one to the NMOS in the second voltage conversion module, such as Fig.12 As shown in the figure, each driving circuit uses the driver chip TPS2816 and cooperates with the high-speed high-isolation optocoupler H11L1 to complete. During the working process, the first pulse width modulation driving signal output by the digital signal processing submodule is firstly amplified by the high-speed high-isolation optocoupler H11L1, and then amplified by the driver chip TPS2816 to output the second pulse width modulation driving signal to the gate of the corresponding NMOS.

[0159] Among them, the driver chip TPS2816 adopts a push-pull circuit to meet the driving control requirements of NMOS.

[0160] Optionally, the variable frequency switching power supply system further includes:

[0161] The communication module is used to receive a first reference frequency and a second reference frequency.

[0162] According to some embodiments, two serial communication interfaces (Serial Communication Interface, SCI) can be derived from the DSP chip to connect the communication module to receive the first reference frequency and the second reference frequency sent by the host computer.

[0163] In some embodiments, the host computer includes but is not limited to a computer, a liquid crystal display (LCD), etc.

[0164] In some embodiments, the host computer can also perform online simulation and testing on the entire variable frequency switching power supply system through the communication module, and display system data (such as the current amplitude value of the second AC voltage, etc.).

[0165] According to some embodiments, Fig.13 This is a schematic diagram of the structure of a communication module provided by an embodiment of the present disclosure. Fig.13As shown, the SCI transmitter and receiver (are double-buffered, each with its own independent interrupt and enable flag. The two can work independently or simultaneously under full-duplex conditions. SCI uses parity checking, timeout and frame error monitoring to ensure accurate data transmission. Its transmit pin (SCIRXDA) and receive pin (SCITXDA) can be used as general I / O when there is no communication with the outside world.

[0166] Optionally, the variable frequency switching power supply system may further include:

[0167] The third voltage conversion module is used to convert the first DC voltage into a DC power supply voltage corresponding to the second voltage conversion module, the digital signal processing module, the frequency selection and filtering module and the communication module.

[0168] According to some embodiments, the third voltage conversion module may adopt a multi-stage DC / DC conversion circuit, for example.

[0169] For example, the first DC voltage can be converted into 24V through a first-level DC / DC and then converted into a +12V power supply voltage through a second-level DC / DC to power the optocoupler H11L1 and the driver TPS2816 chip.

[0170] For example, the first DC voltage may be converted into a 3.3V power supply voltage to power the communication module.

[0171] It should be noted that by using the first DC voltage as a power source to power each module in the variable frequency switching power supply system, there is no need to set up a separate power source, which can reduce the cost of the variable frequency switching power supply system.

[0172] In summary, the system provided in this embodiment can improve the controllability, stability and efficiency of the power main circuit by using high-speed NMOS as the power control device and equal-area SPWM and closed-loop control frequency conversion method based on indirect control technology, and use the 32-bit DSP chip F2812 as the control core to perform main loop control and parameter calculation processing, thereby improving the overload resistance of the variable frequency power supply and realizing a variable frequency signal power supply with less harmonics, less voltage distortion, strong overload resistance, high efficiency and small size.

[0173] The collection, storage, use, processing, transmission, provision and disclosure of user personal information involved in this disclosure shall comply with the relevant laws and regulations and shall not violate public order and good morals.

[0174] It should be noted that personal information from users should be collected for legitimate and reasonable purposes and should not be shared or sold outside of these legitimate uses. In addition, such collection / sharing should be carried out after receiving the user's informed consent, including but not limited to notifying the user to read the user agreement / user notice and sign the agreement / authorization including authorization of relevant user information before the user uses the function. In addition, any necessary steps should be taken to protect and safeguard access to such personal information data and ensure that others who have access to personal information data comply with its privacy policy and procedures.

[0175] The present disclosure contemplates providing implementation schemes for users to selectively block the use or access of personal information data. That is, the present disclosure contemplates providing hardware and / or software to prevent or block access to such personal information data. Once personal information data is no longer needed, risks can be minimized by limiting data collection and deleting data. In addition, when applicable, such personal information is de-identified to protect the privacy of users.

[0176] The acquisition, transmission, storage, use, and processing of data in the technical solution disclosed in this disclosure are in compliance with the relevant provisions of national laws and regulations.

[0177] It should be noted that in the embodiments of the present disclosure, certain software, components, models and other existing solutions in the industry may be mentioned, which should be regarded as exemplary. Their purpose is only to illustrate the feasibility of implementing the technical solution of the present application, but it does not mean that the applicant has or will necessarily use the solution.

[0178] In the description of the aforementioned embodiments, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present disclosure. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, unless they are contradictory.

[0179] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of the present disclosure, "plurality" means at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0180] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, segment or portion of code that includes one or more executable instructions for implementing the steps of a custom logical function or process, and the scope of the preferred embodiments of the present disclosure includes additional implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in reverse order depending on the functions involved, which should be understood by technicians in the technical field to which the embodiments of the present disclosure belong.

[0181] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by an instruction execution system, device or apparatus (such as a computer-based system, a system including a processor, or other system that can fetch instructions from an instruction execution system, device or apparatus and execute the instructions), or in combination with these instruction execution systems, devices or apparatuses. For the purpose of this specification, "computer-readable medium" can be any device that can contain, store, communicate, propagate or transmit a program for use by an instruction execution system, device or apparatus, or in combination with these instruction execution systems, devices or apparatuses. More specific examples of computer-readable media (a non-exhaustive list) include the following: an electrical connection with one or more wires (electronic device), a portable computer disk box (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), a fiber optic device, and a portable compact disk read-only memory (CDROM). In addition, the computer-readable medium may even be paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium and then editing, interpreting or otherwise processing in a suitable manner if necessary, and then stored in a computer memory.

[0182] It should be understood that the various parts of the present disclosure can be implemented with hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, a plurality of steps or methods can be implemented with software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented with hardware, as in another embodiment, it can be implemented with any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a complex programmable logic device (CPLD), a field programmable gate array (FPGA), etc.

[0183] A person skilled in the art may understand that all or part of the steps in the above-mentioned embodiment method may be completed by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, which, when executed, includes one or a combination of the steps of the method embodiment.

[0184] In addition, each functional unit in each embodiment of the present disclosure may be integrated into a processing module, or each unit may exist physically separately, or two or more units may be integrated into one module. The above-mentioned integrated module may be implemented in the form of hardware or in the form of a software functional module. If the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it may also be stored in a computer-readable storage medium.

[0185] The storage medium mentioned above may be a read-only memory, a disk or an optical disk, etc. Although the embodiments of the present disclosure have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations of the present disclosure. A person of ordinary skill in the art may change, modify, replace and modify the above embodiments within the scope of the present disclosure.

Claims

1. A variable frequency switching power supply system, characterized in that: include: A first voltage conversion module, a second voltage conversion module, a digital signal processing module and a frequency selection filter module; wherein, The first voltage conversion module is used to convert a first AC voltage input from an AC power source into a first DC voltage, and input the first DC voltage to the second voltage conversion module; The digital signal processing module is used to obtain a first reference frequency, and perform closed-loop control on the second voltage conversion module based on the first reference frequency, so that the second voltage conversion module converts the first DC voltage into a voltage wave controlled by a bipolar pulse width modulation signal corresponding to the first reference frequency; The frequency selection filtering module is used to obtain a second reference frequency, and perform frequency selection filtering on the voltage wave controlled by the bipolar pulse width modulation signal input by the second voltage conversion module based on the second reference frequency to obtain a second AC voltage corresponding to the second reference frequency.

2. The system according to claim 1, characterized in that The first voltage conversion module comprises: a rectifier module, used for rectifying a first AC voltage input from an AC power source to obtain a second DC voltage, and inputting the second DC voltage to the filter module; The filtering module is used to filter the second DC voltage to obtain the first DC voltage, and input the first DC voltage to the second voltage conversion module.

3. The system according to claim 2, characterized in that In the case where the AC power supply is a three-phase AC power supply, the rectifier module is a three-phase rectifier module, and the three-phase rectifier module includes a first diode, a second diode, a third diode, a fourth diode, a fifth diode and a sixth diode; wherein, A connection point between the anode of the first diode and the cathode of the second diode is connected to the first AC terminal of the AC power supply, a connection point between the anode of the third diode and the cathode of the fourth diode is connected to the second AC terminal of the AC power supply, and a connection point between the anode of the fifth diode and the cathode of the sixth diode is connected to the third AC terminal of the AC power supply; The connection points between the cathode of the first diode, the cathode of the third diode, and the cathode of the fifth diode are respectively connected to the first end of the filter module and the positive DC end of the second voltage conversion module, and the connection points between the anode of the second diode, the anode of the fourth diode, and the anode of the sixth diode are respectively connected to the second end of the filter module and the negative DC end of the second voltage conversion module.

4. The system according to claim 2, characterized in that The filtering module includes at least one polarized capacitor branch and at least one non-polarized capacitor branch; wherein, The polarized capacitor branch includes a first polarized capacitor and a second polarized capacitor connected in series, the positive electrode of the first polarized capacitor is the first end of the polarized capacitor branch, the connection point between the first polarized capacitor and the second polarized capacitor is the midpoint of the polarized capacitor branch, and the negative electrode of the second polarized capacitor is the second end of the polarized capacitor branch; The non-polar capacitor branch includes a first non-polar capacitor and a second non-polar capacitor connected in series, and a connection point between the first non-polar capacitor and the second non-polar capacitor is a branch midpoint of the non-polar capacitor branch; The midpoint of the polarized capacitor branch is connected to the midpoint of the non-polarized capacitor branch, the connection point between the first end of the polarized capacitor branch and the first end of the non-polarized capacitor branch is respectively connected to the positive DC end of the rectifier module and the positive DC end of the second voltage conversion module, and the connection point between the second end of the polarized capacitor branch and the second end of the non-polarized capacitor branch is respectively connected to the negative DC end of the rectifier module and the negative DC end of the second voltage conversion module.

5. The system according to claim 1, characterized in that The second voltage conversion module includes a first half-bridge switch submodule, a second half-bridge switch submodule, a third half-bridge switch submodule and a fourth half-bridge switch submodule; wherein, The connection point between the first end of the first half-bridge switch submodule and the first end of the third half-bridge switch submodule is connected to the positive DC end of the first voltage conversion module, the connection point between the second end of the first half-bridge switch submodule and the first end of the second half-bridge switch submodule is connected to the first input end of the frequency selection filter module, the connection point between the second end of the third half-bridge switch submodule and the first end of the fourth half-bridge switch submodule is connected to the second input end of the frequency selection filter module, and the connection point between the second end of the second half-bridge switch submodule and the second end of the fourth half-bridge switch submodule is connected to the negative DC end of the first voltage conversion module; In the process that the digital signal processing module performs closed-loop control on the second voltage conversion module based on the first reference frequency, bipolar modulation is performed on the first half-bridge switch submodule, the second half-bridge switch submodule, the third half-bridge switch submodule and the fourth half-bridge switch submodule.

6. The system according to claim 5, characterized in that The first half-bridge switch submodule, the second half-bridge switch submodule, the third half-bridge switch submodule and the fourth half-bridge switch submodule all use a half-bridge switch circuit, and the half-bridge switch circuit includes an N-type metal oxide semiconductor transistor and a protection unit; wherein, The connection point between the source of the N-type metal oxide semiconductor transistor and the first end of the protection unit is the first end of the half-bridge switch circuit, the connection point between the drain of the N-type metal oxide semiconductor transistor and the second end of the protection unit is the second end of the half-bridge switch circuit, and the gate of the N-type metal oxide semiconductor transistor is connected to the digital signal processing module.

7. The system according to claim 6, characterized in that The protection unit includes a seventh diode and a resistor-capacitor series branch, wherein the resistor-capacitor series branch includes a resistor and a third non-polar capacitor connected in series; wherein, The connection point between the cathode of the seventh diode and the first end of the resistor-capacitor series branch is the first end of the protection unit, and the connection point between the anode of the seventh diode and the second end of the resistor-capacitor series branch is the second end of the protection unit.

8. The system according to claim 1, characterized in that The frequency selection filter module includes an isolation transformer and an electromagnetic interference filter module; wherein, The first primary end of the isolation transformer is connected to the first AC end of the second voltage conversion module, the second primary end of the isolation transformer is connected to the second AC end of the second voltage conversion module, the first secondary end of the isolation transformer is connected to the first input end of the electromagnetic interference filtering module, the second secondary end of the isolation transformer is connected to the second input end of the electromagnetic interference filtering module, and the first output end and the second output end of the electromagnetic interference filtering module are used to output the second AC voltage.

9. The system according to claim 1, characterized in that The digital signal processing module comprises: A sampling submodule, used for sampling the second AC voltage output by the frequency selection and filtering module to obtain a sampled voltage, and inputting the sampled voltage into the digital signal processing submodule; The digital signal processing submodule is used to generate a first pulse width modulation drive signal based on the sampled voltage and the first reference frequency during the closed-loop control of the second voltage conversion module, and input the pulse width modulation drive signal to the switch drive submodule; The switch driving submodule is used to convert the first pulse width modulation driving signal into a second pulse width modulation driving signal that meets the driving requirements of the second voltage conversion module, and input the second pulse width modulation driving signal to the control end of the second voltage conversion module to perform closed-loop control on the second AC voltage.

10. The system according to claim 1, characterized in that The variable frequency switching power supply system also includes: The communication module is configured to receive the first reference frequency and the second reference frequency.

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