Wafer

Abstract

The invention provides a wafer which is easy to cut and process chips even if the number of chips per wafer is increased. A wafer (1) includes: a frame portion (11) surrounding a chip formation region (10) in which a plurality of chips (30) are formed; a first beam section (21), both ends of which are connected to the frame section (11); a second beam section (22), both ends of which are connected to the frame section (11), and which intersects the first beam section (21) in the chip formation region (10); a plurality of third beam sections (23) on which a plurality of chips (30) are provided so as to be cuttable, and which extend parallel to each other in the chip formation region (10); and fourth beam sections (24a-24d), one end of which is connected to the frame section (11) and the other end of which is connected to the second beam section (22). One end of the third beam section (23) is connected to one of the fourth beam sections (24a-24d), and the other end is connected to the frame section (11) or the first beam section (21).

Description

Technical Field

[0001] The present invention relates to a wafer on which a plurality of chips are formed. Background Art

[0002] FIG. 6 of Japanese Patent No. 5352777 describes a crystal substrate 9 including two orthogonal straight line frame portions 15a and 15b. An elongated branch frame portion 18 spans between the straight line frame portion 15a and the annular frame portion 14, and a plurality of device forming portions 16 are provided on the edges of both sides of the branch frame portion 18. By cutting off a portion of the device forming portion 16 from the branch frame portion 18, a crystal resonator plate 8 is obtained.

[0003] [Prior art literature]

[0004] [Patent Document]

[0005] [Patent Document 1] Japanese Patent No. 5352777 Summary of the invention

[0006] [Problems to be solved by the invention]

[0007] In the crystal substrate 9 of Japanese Patent No. 5352777, when the device forming portion 16 is cut from the branch frame portion 18, the elongated branch frame portion 18 is easily twisted or warped. In order to increase the number of crystal vibrating plates 8 per wafer, the thinner the branch frame portion 18, the easier it is for the branch frame portion 18 to deform, and the cutting process of the device forming portion 16 becomes difficult.

[0008] In addition, in recent years, with the high speed and large capacity of mobile communication systems (fifth generation mobile communication technology (5th Generation Mobile Communication Technology, 5G), sixth generation mobile communication technology (6th Generation Mobile Communication Technology, 6G), etc.), the operating frequency of electronic devices tends to be higher and higher, and the crystal oscillators used in the generation of clock signals, etc. are required to be high-frequency. Since the higher the frequency, the thinner the crystal sheet constituting the crystal oscillator, the crystal wafer used in the manufacture of the crystal sheet is required to be thinner. However, if the crystal substrate 9 (crystal wafer) is thinned in the structure shown in Japanese Patent 5352777, the branch frame portion 18 is more easily deformed when the device forming portion 16 is cut, and the cutting process of the device forming portion 16 becomes more difficult.

[0009] The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a wafer that facilitates chip cutting even when the number of chips per wafer is increased.

[0010] [Technical means to solve the problem]

[0011] A wafer according to one aspect of the present invention is a plate-shaped wafer on which a plurality of chips are formed.

[0012] The wafer comprises: a frame portion, which surrounds a chip forming area where a chip is formed; a first beam portion, whose two ends are connected to the frame portion; a second beam portion, whose two ends are connected to the frame portion and intersects with the first beam portion in the chip forming area; a plurality of third beam portions, each of which is provided with a plurality of chips in a cuttable manner and extends parallel to each other in the chip forming area; and one or more fourth beam portions, one end of which is connected to the second beam portion and the other end is connected to the frame portion, and one end of at least a portion of the third beam portions is connected to a fourth beam portion and the other end is connected to the frame portion, the first beam portion or another fourth beam portion.

[0013] According to the above configuration, since the third beam portion is supported by the fourth beam portion, it is easy to suppress large deformation of the third beam portion due to torsion or bending when cutting out the chip provided on the third beam portion.

[0014] Preferably, the first beam portion is orthogonal to the second beam portion, the third beam portion extends parallel to the second beam portion, and the fourth beam portion extends parallel to the first beam portion.

[0015] As a result, the length of the third beam portion from the first beam portion to the fourth beam portion can be easily aligned. Therefore, deformation of the third beam portion during chip cutting can be easily and uniformly suppressed.

[0016] Preferably, the frame portion has an annular shape, and the first beam portion and the second beam portion are perpendicular to each other at a central portion in the longitudinal direction of the first beam portion and a central portion in the longitudinal direction of the second beam portion.

[0017] Thus, the length of the third beam portion becomes shorter as it moves away from the second beam portion, and thus deformation during chip cutting can be easily suppressed.

[0018] Preferably, the fourth beam portion is connected to a center portion in the longitudinal direction of the second beam portion spanning between the first beam portion and the frame portion.

[0019] Thus, at a position close to the second beam, the length of the third beam between the first beam and the fourth beam is substantially equal to the length of the third beam between the frame and the fourth beam. By aligning the lengths of the third beams at positions close to the second beam, it is easier to suppress the maximum deformation of the third beams generated when the chip is cut, compared to a case where the lengths are not aligned.

[0020] Preferably, at least a portion of the inner edge of the frame portion facing the chip forming region is along an imaginary circle of diameter d, and a value d / L obtained by dividing the diameter d of the imaginary circle by the interval L between the first beam portion and the fourth beam portion is 3.5 to 4.

[0021] Thereby, the chip yield is improved, and deformation of the third beam portion during chip cutting can be easily and uniformly suppressed.

[0022] Preferably, the wafer has four fourth beam portions which are line-symmetrical with respect to the first beam portion and line-symmetrical with respect to the second beam portion.

[0023] This makes it easy to suppress variations in the length of the third beam portion, and to uniformly suppress deformation of the third beam portion during chip cutting.

[0024] It is appropriate to call the part where the first beam portion and the second beam portion intersect as the intersection portion, the part of the first beam portion that spans from the intersection portion to the frame portion as the first beam portion main body, the part of the second beam portion that spans from the intersection portion to the frame portion as the second beam portion main body, the width of the first beam portion main body in the short side direction of the first beam portion as the lateral width W1, the width of the second beam portion main body in the short side direction of the second beam portion as the lateral width W2, the width of the intersection portion in the short side direction of the first beam portion as the lateral width C1, the width of the intersection portion in the short side direction of the second beam portion as the lateral width C2, the lateral width C1 of the intersection portion is larger than the lateral width W1 of the first beam portion main body, and the lateral width C2 of the intersection portion is larger than the lateral width W2 of the second beam portion main body.

[0025] According to the above structure, stress is easily concentrated on the intersection of the first beam and the second beam, but because the lateral width C1 of the intersection is larger than the lateral width W1 of the main body of the first beam, and the lateral width W2 of the intersection is larger than the lateral width W2 of the main body of the second beam, the strength of the intersection is improved, and even if stress is concentrated, the intersection is not easily damaged. In addition, compared with the case where the first beam and the second beam are made thicker as a whole in order to improve the strength of the intersection, the chip forming area can be expanded, so the number of chips per wafer can be increased.

[0026] Preferably, the frame portion has an annular shape, and the first beam portion and the second beam portion are orthogonal at the central portion in the long side direction of the first beam portion and the central portion in the long side direction of the second beam portion, and a value C1 / W1 obtained by dividing a lateral width C1 of the intersection portion by a lateral width W1 of the first beam portion main body is 1.8 to 2.2, and a value C2 / W2 obtained by dividing a lateral width C2 of the intersection portion by a lateral width W2 of the second beam portion main body is 1.5 to 2.0.

[0027] Thus, the parts of the frame supported by the first beam and the second beam are separated at approximately equal intervals, so that deformation of the frame caused by external force can be easily suppressed. In addition, the reduction of the chip forming area caused by the thickening of the first beam body and the second beam body can be suppressed, and the strength of the intersection is increased and it is not easy to be damaged.

[0028] Preferably, the frame has an annular shape, the first beam and the second beam are orthogonal at the center of the first beam and the center of the second beam in the longitudinal direction, and the lateral width W2 of the second beam body is smaller than the lateral width W1 of the first beam body.

[0029] As a result, the parts of the frame supported by the first beam and the second beam are separated at approximately equal intervals, so it is easy to suppress the deformation of the frame caused by external force. In addition, when cutting a chip from the third beam, the external force accompanying the cutting will not directly act on the second beam via the third beam, so the lateral width W2 of the second beam body can also be smaller than the lateral width W1 of the first beam body. By reducing the lateral width W2 of the second beam body, the chip formation area becomes larger, and the number of chips per wafer can be increased.

[0030] Preferably, a value W2 / W1 obtained by dividing the lateral width W2 of the second beam portion main body by the lateral width W1 of the first beam portion main body satisfies 0.6< W2 / W1 <1.0.

[0031] Thus, the strength of the entire wafer obtained by the second beam supporting the first beam can be maintained within an appropriate range and the lateral width W2 of the second beam body can be reduced, thereby increasing the number of chips per wafer.

[0032] Preferably, a plurality of positioning holes through which a plurality of pins for positioning the wafer are inserted are formed in one of the first beam portion and the second beam portion, or one or more positioning holes are formed in both the first beam portion and the second beam portion.

[0033] According to the above structure, by inserting pins into the plurality of positioning holes, the position and posture of the wafer on the plane relative to the fixture etc. can be appropriately set. In addition, since the positioning holes are formed outside the chip forming area, it is possible to avoid the number of chips per wafer being reduced due to the positioning holes. Furthermore, since the positioning holes can be formed at a location separated from the outer edge of the wafer, it is not easy to be restricted by the fixture etc., and the pins can be appropriately inserted into the positioning holes.

[0034] Preferably, each third beam portion extends parallel to the second beam portion, one end of at least a portion of the third beam portions is connected to the first beam portion, the lateral width of the first beam portion in the short side direction is larger than the lateral width of the second beam portion in the short side direction, and a plurality of positioning holes are formed in the first beam portion.

[0035] According to the structure, when a chip is cut from the third beam portion, the external force accompanying the cutting does not directly act on the second beam portion via the third beam portion, so the lateral width of the second beam portion can also be smaller than the lateral width of the first beam portion. By reducing the lateral width of the second beam portion, the chip forming area becomes larger, and the number of chips per wafer can be increased. In addition, since a plurality of positioning holes are formed in the first beam portion whose lateral width is larger than that of the second beam portion, it is easy to suppress the reduction in the strength of the beam portion caused by the formation of the positioning holes.

[0036] Preferably, the plurality of positioning holes formed on the first beam portion include a first positioning hole and a second positioning hole, the first positioning hole and the second positioning hole being in a non-point-symmetrical and non-line-symmetrical relationship with each other when viewed from above, at least one of the first positioning hole and the second positioning hole having a non-line-symmetrical planar shape, or the first positioning hole and the second positioning hole respectively having planar shapes that are line-symmetrical about different axes of symmetry.

[0037] Therefore, when the correctly positioned chip is rotated 180 degrees or the front and back of the correctly positioned chip are reversed, the configuration of the first positioning hole and the second positioning hole becomes different from that of the correctly positioned chip, so the positioning pins cannot be inserted into these positioning holes.

[0038] Preferably, the first positioning hole and the second positioning hole have different planar shapes from each other.

[0039] Thus, the first positioning hole and the second positioning hole can be easily recognized by their planar shapes, and thus the position and posture of the wafer can be easily confirmed by visual inspection or image recognition.

[0040] Preferably, a center of a planar shape of the first positioning hole and a center of a planar shape of the second positioning hole are offset from a center in a short-side direction of the first beam portion.

[0041] Thus, it is easy to identify whether each positioning hole is the first positioning hole or the second positioning hole based on the position and planar shape of each positioning hole in the short side direction of the first beam portion, so it is easy to confirm the position and posture of the chip by visual inspection or image recognition.

[0042] Preferably, the first positioning hole has a rectangular shape, and the second positioning hole is a quadrilateral in a plan view, and has a rectangular shape in which the length of each side is shorter than the long side of the rectangle and longer than the short side.

[0043] Thus, a pin suitable for the first positioning hole cannot be inserted into the second positioning hole, and a pin suitable for the second positioning hole cannot be inserted into the first positioning hole. In addition, by making the first positioning hole and the second positioning hole respectively have a simple rectangular shape, it is easy to form a precise shape, and the positioning accuracy is improved.

[0044] Suitably, the wafer is a crystalline wafer.

[0045] This makes it easy to cut crystal chips from a thin crystal wafer. In addition, even with a thin crystal wafer, it is easy to avoid damage to the intersection caused by stress concentration.

[0046] [Effects of the Invention]

[0047] According to the present invention, it is possible to provide a wafer in which chip cutting processing can be easily performed even when the number of chips per wafer is increased. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] Figure 1 This is a diagram showing an example of a wafer according to this embodiment.

[0049] Figure 2 This is an enlarged view of the third beam portion where the chip is provided.

[0050] Figure 3A and Figure 3B This is an enlarged view of the area around the positioning hole.

[0051] Figure 4 This is a diagram showing a modified example of the wafer according to the present embodiment.

[0052] Figure 5 This is a diagram showing a modified example of the wafer according to the present embodiment. DETAILED DESCRIPTION

[0053] Hereinafter, a wafer according to an embodiment of the present invention will be described with reference to the drawings. The wafer according to the present embodiment is a plate-shaped wafer on which a plurality of chips are formed, and is, for example, a crystal wafer on which a chip of a crystal vibrating piece is formed.

[0054] Figure 1 This is a diagram showing an example of a wafer according to this embodiment. Figure 1 The wafer 1 shown in the figure has: a frame portion 11 surrounding a chip forming region 10 where a plurality of chips 30 are formed; and a first beam portion 21 and a second beam portion 22 connected to the frame portion 11 at both ends. The first beam portion 21 and the second beam portion 22 intersect in the chip forming region 10. Figure 1 In the example of FIG. 1 , the first beam 21 and the second beam 22 are orthogonal to each other at the center of the long side direction of the first beam 21 and the center of the long side direction of the second beam 22. The intersection 200, which is the intersection of the first beam 21 and the second beam 22, is located approximately in the center of the chip forming region 10.

[0055] Here, in the case where the crystal vibrator plate is an AT-cut crystal vibrator plate, the first beam portion 21 is parallel to the X-axis of the crystal, and the second beam portion 22 is parallel to the Z' axis of the crystal. This is the configuration of the beam portion corresponding to the so-called AT-cut crystal vibrator plate, which is abbreviated as X long. Or, on the contrary, the first beam portion 21 is parallel to the Z' axis of the crystal, and the second beam portion 22 is parallel to the X-axis of the crystal. This is the configuration of the beam portion corresponding to the AT-cut crystal vibrator plate, which is abbreviated as Z long. In addition, in the case where the crystal vibrator plate is a tuning fork type crystal vibrator plate, the first beam portion 21 is parallel to the Y' axis of the crystal, and the second beam portion 22 is parallel to the X-axis of the crystal. In addition, in the case where the crystal vibrator plate is a crystal vibrator plate that is rotated twice, such as represented by stress compensation (SC) cutting, the first beam portion 21 is parallel to the X" axis of the crystal, and the second beam portion 22 is parallel to the Z" axis of the crystal, or vice versa. In the above-mentioned expression of the crystal axis, the crystal axis with a dash added thereto is offset from the normal crystal axis due to the cutting angle of the crystal vibrating plate.

[0056] The first beam portion 21 includes two first beam portion main bodies (210a, 210b) as a portion extending from the intersection portion 200 to the frame portion 11. In addition, the second beam portion 22 includes two second beam portion main bodies (220a, 220b) as a portion extending from the intersection portion 200 to the frame portion 11. Hereinafter, the first beam portion main body 210a and the first beam portion main body 210b may be described as "the first beam portion main body 210" without distinguishing between them, and the second beam portion main body 220a and the second beam portion main body 220b may be described as "the second beam portion main body 220".

[0057] like Figure 1 As shown, the first beam portion 21 and the second beam portion 22 both have a strip shape. The first beam portion body 210 extends in the short side direction ( Figure 1 The width W1 of the second beam body 220 in the transverse direction of the second beam 22 ( Figure 1 The horizontal width W2 in the longitudinal direction of the paper surface is roughly constant.

[0058] In addition, if Figure 1 As shown, the lateral width C1 of the intersection portion 200 in the short-side direction of the first beam portion 21 is larger than the lateral width W1 of the first beam portion main body 210. In addition, the lateral width C2 of the intersection portion 200 in the short-side direction of the second beam portion 22 is larger than the lateral width W2 of the second beam portion main body 220. That is, the width of the intersection portion 200 is larger than the first beam portion main body 210 and the second beam portion main body 220. By increasing the width of the intersection portion 200, the strength of the intersection portion 200 can be improved.

[0059] Furthermore, if Figure 1As shown, the lateral width W2 of the second beam body 220 is smaller than the lateral width W1 of the first beam body 210. Since the second beam body 220 is not directly connected to the third beam 23 described below, the force from the third beam 23 does not act directly, and thus the lateral width can be reduced compared to the first beam body 210.

[0060] Figure 1 The wafer 1 shown has a plurality of third beams 23 each provided with a plurality of chips 30 so as to be cut out. The plurality of third beams 23 extend parallel to each other in the chip forming region 10. In addition, the plurality of third beams 23 extend parallel to the second beams 22, respectively.

[0061] Figure 2 FIG. 2 is an enlarged view of the third beam portion 23 on which the chip 30 is disposed. Figure 2 As shown, the third beam portion 23 has a strip shape, and the short side direction ( Figure 2 The width W3 in the longitudinal direction of the paper is substantially constant. A plurality of chips 30 of the same size are arranged at equal intervals on one side edge of the third beam portion 23. Figure 2 In the example of , electrodes 31 are formed on the front side and the back side of the chip 30, respectively. The chip 30 has a rectangular shape, and the chip 30 is connected to the third beam portion 23 on one side of the rectangular shape. A horizontally long through hole 32 is formed between the chip 30 and the third beam portion 23. The through hole 32 narrows the width of the portion connecting the chip 30 and the third beam portion 23, so that the chip 30 can be easily folded (bent and cut) from the third beam portion 23 using an automatic machine or the like.

[0062] in addition, Figure 1 The wafer 1 shown has fourth beams 24a to 24d (hereinafter sometimes referred to as "fourth beams 24") connected to the frame 11 at one end and to the second beam 22 at the other end. Figure 1 In the example of FIG. 1 , the chip forming region 10 is divided into four regions by the first beam portion 21 and the second beam portion 22 intersecting at the central portion of the chip forming region 10. A fourth beam portion 24 spans each of the four regions. The fourth beam portion 24 has a strip shape. The short side direction ( Figure 1 The horizontal width W4 in the transverse direction of the paper surface is approximately constant.

[0063] The four fourth beams 24 are line-symmetrical with respect to the first beam 21 and line-symmetrical with respect to the second beam 22. That is, a pair of the fourth beam 24a and the fourth beam 24d, and a pair of the fourth beam 24b and the fourth beam 24c are line-symmetrical with respect to the first beam 21. In addition, a pair of the fourth beam 24a and the fourth beam 24b, and a pair of the fourth beam 24d and the fourth beam 24c are line-symmetrical with respect to the second beam 22.

[0064] One end of the third beam 23 is connected to the fourth beam 24, and the other end is connected to the first beam 21 or the frame 11. That is, the third beam 23 does not directly span from the first beam 21 to the frame 11, but is supported by the fourth beam 24 between the first beam 21 and the frame 11.

[0065] In addition, Figure 1 In the example, a portion of the third beam 23 (the third beam 23 from the top to the third row and the third beam 23 from the bottom to the fourth row) is not connected to the fourth beam 24 but is connected between the frame 11 and the first beam 21 .

[0066] exist Figure 1 In the example of , the first beam portion 21 is orthogonal to the second beam portion 22. In addition, the third beam portion 23 extends parallel to the second beam portion 22, and the fourth beam portion 24 extends parallel to the first beam portion 21. That is, the third beam portion 23 extends in a direction orthogonal to the first beam portion 21 and the fourth beam portion 24, respectively.

[0067] In addition, Figure 1 In the example, the outer shape of the wafer 1 is a circle, and the frame 11 has a ring shape. The first beam 21 and the second beam 22 are arranged so that the center of the first beam 21 in the longitudinal direction and the center of the second beam 22 in the longitudinal direction are perpendicular to each other.

[0068] One end of the fourth beam portion 24 is connected to the center portion in the longitudinal direction of the second beam portion 22 (second beam portion main body 220) spanning between the first beam portion 21 and the frame portion 11. Figure 1 In the example, the length from the connection portion between the second beam portion 22 and the fourth beam portion 24 to the connection portion between the second beam portion 22 and the frame portion 11 is substantially the same as the length from the connection portion between the second beam portion 22 and the fourth beam portion 24 to the connection portion between the second beam portion 22 and the first beam portion 21.

[0069] exist Figure 1In the example of , the frame portion 11 has two edges 110a and 110b extending parallel to the first beam portion 21 and the fourth beam portion 24. One end of the second beam portion 22 is connected to the edge 110a, and the other end of the second beam portion 22 is connected to the edge 110b. The lengths of the edge 110a and the edge 110b are approximately equal, and the two ends of the second beam portion 22 are connected to the center of the edge 110a and the edge 110b. By having the edge 110a and the edge 110b parallel to the fourth beam portion 24, the length of the third beam portion 23 spanning between these edges (110a, 110b) and the fourth beam portion 24 is approximately equal. Therefore, the deviation in the length of the entire third beam portion 23 can be suppressed.

[0070] In the wafer 1 of the present embodiment, at least a portion of the inner edge of the frame portion 11 facing the chip formation region 10 is along the imaginary circle 9 of diameter d (radius r×2). The first beam portion 21 and the second beam portion 22 intersect approximately at the center of the imaginary circle 9. In the above case, the value d / L obtained by dividing the diameter d of the imaginary circle 9 by the interval L between the first beam portion 21 and the fourth beam portion 24 is preferably 3.5 to 4.

[0071] For example, when the diameter d of the imaginary circle 9 is 92 [mm], the distance L between the first beam portion 21 and the fourth beam portion 24 is preferably 23.0 [mm] to 26.3 [mm].

[0072] When the diameter d of the imaginary circle 9 is 92 [mm], the thickness and width of each beam portion ( 21 to 24 ) are preferably within the following ranges, for example.

[0073] Thickness of each beam (21-24): 0.08 [mm] to 0.10 [mm]

[0074] The width W1 of the first beam body 210: 3.00 [mm] to 4.37 [mm]

[0075] The width W2 of the second beam body 220: 3.00 [mm] to 4.52 [mm]

[0076] Transverse width W3 of the third beam portion 23: 0.18 [mm] to 0.25 [mm]

[0077] The width W4 of the fourth beam portion 24: 0.15 [mm] to 0.30 [mm]

[0078] In the wafer 1 of the present embodiment, the value C1 / W1 obtained by dividing the lateral width C1 of the intersection portion 200 by the lateral width W1 of the first beam portion main body 210 is preferably 1.8 to 2.2, and the value C2 / W2 obtained by dividing the lateral width C2 of the intersection portion 200 by the lateral width W2 of the second beam portion main body 220 is preferably 1.5 to 2.0. That is, the intersection portion 200 is preferably about twice as wide as the first beam portion 21 and the second beam portion 22.

[0079] Furthermore, in the wafer 1 of the present embodiment, the value W2 / W1 obtained by dividing the lateral width W2 of the second beam body 220 by the lateral width W1 of the first beam body 210 is preferably 0.6<W2 / W1<1.0.

[0080] In addition, in the chip 1 of this embodiment, as Figure 1 As shown in the figure, a first positioning hole 41 and a second positioning hole 42 are formed in the first beam portion 21 having a larger width than the second beam portion 22. Pins provided on a fixture or the like for positioning the wafer 1 relative to the fixture or the like are inserted through the first positioning hole 41 and the second positioning hole 42, respectively. In the following description, when the wafer 1 is in a correctly positioned state, the first pin is inserted through the first positioning hole 41, and the second pin is inserted through the second positioning hole 42. In addition, the details will be described later, but the shapes or sizes of the first positioning hole 41 and the second positioning hole 42 are different in the above case. Correspondingly, the diameters of the first pin and the second pin are also different.

[0081] exist Figure 1 In the example, the planar shape of the first positioning hole 41 is a rectangle, and the planar shape of the second positioning hole 42 is approximately a square. The long side of the rectangle of the first positioning hole 41 is parallel to the long side direction of the first beam portion 21, and the short side of the rectangle is parallel to the short side direction of the first beam portion 21. In addition, a part of the sides of the square of the second positioning hole 42 is parallel to the long side direction of the first beam portion 21, and another part of the sides of the square is parallel to the short side direction of the first beam portion 21.

[0082] Figure 3B An enlarged view showing the vicinity of the first positioning hole 41 is shown. Figure 3A FIG. 4 is an enlarged view showing the vicinity of the second positioning hole 42. Figure 3A and Figure 3BAs shown, if the length of the long side of the rectangle of the first positioning hole 41 is set to "a", the length of the short side is set to "b", and the length of each side of the square of the second positioning hole 42 is set to "s", then the length "s" of each side of the second positioning hole 42 is shorter than the length "a" of the long side of the first positioning hole 41, and longer than the length "b" of the short side of the first positioning hole 41. Therefore, the first pin suitable for the rectangular shape of the first positioning hole 41 cannot be inserted into the second positioning hole 42 because the length "a" of the long side of the rectangle is longer than the length "s" of the side of the square of the second positioning hole 42. In addition, the second pin suitable for the square shape of the second positioning hole 42 cannot be inserted into the first positioning hole 41 because the length "s" of the side of the square is longer than the length "b" of the short side of the rectangle of the first positioning hole 41.

[0083] The following is an example of the dimensions of the first positioning hole 41 and the second positioning hole 42 when the diameter d of the imaginary circle 9 is 92 [mm].

[0084] Length a of the long side of the first positioning hole 41: 1.200 [mm]

[0085] Length b of the short side of the first positioning hole 41: 0.805 [mm]

[0086] Length s of each side of the second positioning hole 42: 1.005 [mm]

[0087] In addition, the following is an example of the diameters of the first pin and the second pin.

[0088] Diameter of the first pin: 0.8 [mm]

[0089] Diameter of the second pin: 1.0 [mm]

[0090] exist Figure 1 In the example, the center of the planar shape (square) of the first positioning hole 41 and the center of the planar shape (rectangle) of the second positioning hole 42 are respectively located in the short side direction ( Figure 1 The paper is offset from the center in the horizontal direction. Figure 1 In the example, the center of the first positioning hole 41 and the center of the second positioning hole 42 are offset in opposite directions relative to the center in the short-side direction of the first beam portion 21. That is, the center of the first positioning hole 41 is offset to the left relative to the center in the short-side direction of the first beam portion 21, and the center of the second positioning hole 42 is offset to the right relative to the center in the short-side direction of the first beam portion 21.

[0091] exist Figure 1 In the example of FIG. 1 , the first positioning hole 41 and the second positioning hole 42 in the first beam portion 21 are in a non-point-symmetric and non-line-symmetric relationship with each other in a plan view.

[0092] Since the first positioning hole 41 and the second positioning hole 42 are in a non-point symmetric relationship, even if the wafer 1 is rotated 180 degrees around an arbitrary point on the plane, the first positioning hole 41 and the second positioning hole 42 before and after the rotation will not overlap. In other words, even if the wafer 1 in the correct positioning state is rotated 180 degrees around an arbitrary point on the plane, it is impossible to insert the second pin into the first positioning hole 41 while inserting the first pin into the second positioning hole 42. Therefore, the wafer 1 is not positioned in a state rotated 180 degrees relative to the correct positioning state.

[0093] Since the first positioning hole 41 and the second positioning hole 42 are in a non-line symmetric relationship, even if the wafer 1 is rotated around an arbitrary axis on a plane and the front and back are reversed, the first positioning hole 41 and the second positioning hole 42 will not overlap before and after the front and back are reversed. In other words, even if the wafer 1 in a correctly positioned state is rotated around an arbitrary axis on a plane and the front and back are reversed, it is impossible to insert the second pin into the first positioning hole 41 while inserting the first pin into the second positioning hole 42. Therefore, the wafer 1 is not positioned in a state where the front and back are reversed relative to the correctly positioned state.

[0094] in addition, Figure 1 The first positioning hole 41 and the second positioning hole 42 shown have plane shapes that are linearly symmetrical about different symmetry axes. The plane shape of the first positioning hole 41 is a rectangle, and the plane shape of the second positioning hole 42 is a square, both of which are linearly symmetrical shapes, but their linearly symmetrical symmetry axes are different. Therefore, for example, when the wafer 1 is rotated around the rectangular symmetry axis of the first positioning hole 41 and the front and back are reversed, it is impossible to insert the first pin into the first positioning hole 41 while inserting the second pin into the second positioning hole 42. In addition, when the wafer 1 is rotated around the square symmetry axis of the second positioning hole 42 and the front and back are reversed, it is impossible to insert the first pin into the first positioning hole 41 while inserting the second pin into the second positioning hole 42. Therefore, even if the plane shapes of the first positioning hole 41 and the second positioning hole 42 are linearly symmetrical shapes, the wafer 1 will not be positioned in a state where the front and back are reversed relative to the correct positioning state.

[0095] As described above, according to the wafer 1 of the present embodiment, both ends of the first beam 21 and the second beam 22 are connected to the frame 11, the first beam 21 and the second beam intersect in the chip forming region 10, one end of the fourth beam 24 is connected to the second beam 22, and the other end of the fourth beam 24 is connected to the frame 11. In addition, one end of a plurality of third beams 23 extending in parallel to each other in the chip forming region 10 is connected to the fourth beam 24, and the other end is connected to the frame 11 or the first beam 21. Thus, the third beam 23 is supported by the fourth beam 24, so when the chip 30 set on the third beam 23 is cut, it is possible to effectively suppress the third beam 23 from being greatly deformed due to torsion or bending. Therefore, even in the case where the width of the third beam 23 is reduced in order to improve the yield of the chip, since the deformation of the third beam 23 when the chip is cut is reduced, the chip cutting process can be easily performed. Even if the wafer 1 is a thin quartz-crystal wafer, large deformation of the third beam portion 23 can be suppressed, so that quartz-crystal chips can be easily cut out.

[0096] In addition, according to the wafer 1 of the present embodiment, since the first beam 21 and the second beam 22 are orthogonal to each other, the frame 11 can be easily supported evenly by the first beam 21 and the second beam 22, and deformation of the frame 11 caused by external force can be easily suppressed. Furthermore, since the third beam 23 extends parallel to the second beam 22 and the fourth beam 24 extends parallel to the first beam 21, the length of the third beam 23 spanning from the first beam 21 to the fourth beam 24 can be easily aligned. Therefore, deformation of the third beam 23 during chip cutting can be easily uniformly suppressed.

[0097] In addition, according to the wafer 1 of the present embodiment, the frame portion 11 has an annular shape, and the first beam portion 21 and the second beam portion 22 are orthogonal to each other at the center of the long side direction of the first beam portion 21 and the center of the long side direction of the second beam portion 22. As a result, the parts of the frame portion 11 supported by the first beam portion 21 and the second beam portion 22 are separated at approximately equal intervals, so that it is easier to suppress deformation of the frame portion 11 caused by external force. Furthermore, by having the frame portion 11 have an annular shape, as shown in FIG. Figure 1 As shown, the length of the third beam portion 23 becomes shorter as it is separated from the second beam portion 22 , so that deformation during cutting of the chip 30 can be easily suppressed.

[0098] In addition, according to the wafer 1 of the present embodiment, one end of the fourth beam portion 24 is connected to the middle portion in the longitudinal direction of the second beam portion 22 spanning between the first beam portion 21 and the frame portion 11. As a result, at a position close to the second beam portion 22, the length of the third beam portion 23 between the first beam portion 21 and the fourth beam portion 24 is substantially equal to the length of the third beam portion 23 between the frame portion 11 and the fourth beam portion 24. Figure 2As shown, the third beam portion 23 located near the second beam portion 22 is the longest among the entire third beam portion 23 and is easily deformed when the chip is cut. Therefore, by aligning the lengths of the third beam portion 23 located near the second beam portion 22, the maximum deformation of the third beam portion 23 generated when the chip is cut can be suppressed compared to the case where these lengths are not aligned (one becomes longer and the other becomes shorter).

[0099] In addition, according to the wafer 1 of this embodiment, the value d / L obtained by dividing the diameter d of the imaginary circle 9 by the interval L between the first beam portion 21 and the fourth beam portion 24 is 3.5 to 4. This improves the chip yield and uniformly suppresses deformation of the third beam portion 23 when cutting chips.

[0100] In addition, according to the wafer 1 of the present embodiment, four fourth beams 24 are provided which are line-symmetrical with respect to the first beam 21 and line-symmetrical with respect to the second beam 22. Thus, the length patterns of the third beam 23 are easily aligned between the four regions of the chip forming region 10 divided by the orthogonal first beam 21 and second beam 22. Therefore, the deviation of the length of the third beam 23 can be easily suppressed, and the deformation of the third beam 23 when the chip is cut can be uniformly suppressed.

[0101] In addition, according to the wafer 1 of the present embodiment, both ends of the first beam 21 and the second beam 22 are connected to the frame 11, and the first beam 21 and the second beam 22 intersect in the chip forming region 10. Moreover, the cross section 200 of the first beam 21 and the second beam 22 is larger in the short side direction than the first beam body 210 (C1>W1), and the cross section 200 of the first beam 21 and the second beam 22 is larger in the short side direction than the second beam body 220 (C2>W2). Thus, stress is easily concentrated on the cross section 200 of the first beam 21 and the second beam 22, but since the cross section 200 has a greater cross section width C1 than the cross section width W1 of the first beam body 210, and the cross section 200 has a greater cross section width C2 than the cross section width W2 of the second beam body 220, the strength of the cross section 200 is improved, and the cross section 200 is not easily damaged even if stress is concentrated. In particular, even if the wafer 1 is a thin crystal wafer, it is easy to avoid damage to the intersection 200. In addition, compared with the case where the first beam 21 and the second beam 22 are made thicker as a whole in order to improve the strength of the intersection 200, the chip forming area 10 can be expanded, so the number of chips 30 per wafer can be increased.

[0102] In addition, according to the wafer 1 of the present embodiment, the frame portion 11 has an annular shape, and the first beam portion 21 and the second beam portion 22 are orthogonal to each other at the center portion in the longitudinal direction of the first beam portion 21 and the center portion in the longitudinal direction of the second beam portion 22. As a result, the portions of the frame portion 11 supported by the first beam portion 21 and the second beam portion 22 are separated at approximately equal intervals, so that deformation of the frame portion 11 caused by external force is easily suppressed.

[0103] In addition, according to the wafer 1 of the present embodiment, the value C1 / W1 obtained by dividing the lateral width C1 of the intersection 200 by the lateral width W1 of the first beam body 210 is 1.8 to 2.2, and the value C2 / W2 obtained by dividing the lateral width C2 of the intersection 200 by the lateral width W2 of the second beam body 220 is 1.5 to 2.0. Thus, the reduction in the chip forming area 10 caused by the thickening of the first beam body 210 and the second beam body 220 can be suppressed, and the strength of the intersection 200 is increased and it is not easy to be damaged.

[0104] In addition, according to the wafer 1 of the present embodiment, a plurality of third beams 23 each provided with a plurality of chips 30 in a cuttable manner extend in parallel with the second beam 22 in the chip forming region 10, and one end of at least a portion of the third beams 23 is connected to the first beam body 210. When the chip 30 is cut from the third beam 23, the external force accompanying the cutting acts on the first beam 21 via the third beam 23, but does not directly act on the second beam 22. Therefore, the lateral width W2 of the second beam body 220 can be smaller than the lateral width W1 of the first beam body 210. By reducing the lateral width W2 of the second beam body 220, compared with the case where the lateral width W1 is the same, the chip forming region 10 becomes larger, and the number of chips 30 per wafer can be increased.

[0105] In addition, according to the wafer 1 of the present embodiment, the value W2 / W1 obtained by dividing the lateral width W2 of the second beam body 220 by the lateral width W1 of the first beam body 210 is 0.6<W2 / W1<1.0. Thus, the strength of the entire wafer obtained by the second beam 22 supporting the first beam 21 can be maintained within an appropriate range and the lateral width W2 of the second beam body 220 can be reduced, thereby increasing the number of chips 30 per wafer.

[0106] In addition, according to the wafer 1 of the present embodiment, one end of the fourth beam portion 24 is connected to the second beam portion 22, and the other end of the fourth beam portion 24 is connected to the frame portion 11. One end of a plurality of third beam portions 23 extending parallel to the second beam portion 22 in the chip forming region 10 is connected to the fourth beam portion 24, and the other end is connected to the frame portion 11 or the first beam portion 21. Thus, the third beam portion 23 is supported by the fourth beam portion 24, so when the chip 30 provided on the third beam portion 23 is cut out, it is easy to suppress large deformation of the third beam portion 23 due to torsion or bending.

[0107] In addition, according to the chip 1 of the present embodiment, a plurality of positioning holes (41, 42) for inserting a plurality of pins for positioning the chip 1 are formed in the first beam portion 21. Therefore, by inserting pins into the plurality of positioning holes (41, 42), the position and posture of the chip 1 on the plane relative to the fixture or the like can be appropriately set. In addition, since the positioning holes (41, 42) are formed outside the chip forming area 10, it is possible to avoid the number of chips 30 per chip being reduced due to the positioning holes (41, 42). Furthermore, since the positioning holes (41, 42) can be formed at a location separated from the outer edge of the chip 1, it is not easy to be restricted by the fixture or device or the like arranged at a position close to the outer edge of the chip 1, and the positioning pins can be appropriately inserted into the positioning holes (41, 42).

[0108] In addition, according to the wafer 1 of the present embodiment, the plurality of third beams 23 each provided with a plurality of chips 30 in a cuttable manner extend in parallel with the second beam 22 in the chip forming region 10, and one end of at least a part of the third beams 23 is connected to the first beam 21. When the chip 30 is cut out from the third beam 23, the external force accompanying the cutting acts on the first beam 21 via the third beam 23, but does not directly act on the second beam 22. Therefore, the lateral width W2 of the second beam 22 can be smaller than the lateral width W1 of the first beam 21. By reducing the lateral width W2 of the second beam 22, the chip forming region 10 becomes larger than when the lateral width W2 is the same as that of the first beam 21, and the number of chips 30 per wafer can be increased. In addition, since the plurality of positioning holes (41, 42) are formed in the first beam 21 having a larger lateral width than the second beam 22, it is easy to suppress the reduction in the strength of the beam portion caused by the formation of the positioning holes.

[0109] In addition, according to the chip 1 of the present embodiment, the first positioning hole 41 and the second positioning hole 42 formed in the first beam portion 21 are in a non-point-symmetrical and non-line-symmetrical relationship with each other when viewed from above, and each has a plane shape that is line-symmetrical about different symmetry axes. As a result, when the correctly positioned chip 1 is rotated 180 degrees, or when the front and back of the correctly positioned chip 1 are reversed, the configuration of the first positioning hole 41 and the second positioning hole 42 becomes a configuration different from that of the correctly positioned chip 1. Therefore, it is impossible to insert the positioning pins into these positioning holes. Therefore, it is possible to prevent the chip 1 from being positioned in a state where the correctly positioned chip 1 is rotated 180 degrees, or when the front and back of the correctly positioned chip 1 are reversed.

[0110] In addition, according to the wafer 1 of this embodiment, the first positioning hole 41 and the second positioning hole 42 have different planar shapes. Therefore, it is easy to visually identify the first positioning hole 41 and the second positioning hole 42 based on the planar shapes, so it is easy to confirm the position and posture of the wafer 1 by visual inspection or image recognition.

[0111] In addition, according to the wafer 1 of the present embodiment, the center of the plane shape (rectangle) of the first positioning hole 41 and the center of the plane shape (square) of the second positioning hole 42 are offset from the center in the short-side direction of the first beam portion 21. Thus, it is easy to visually identify whether each positioning hole is the first positioning hole or the second positioning hole based on the position and plane shape of each positioning hole in the short-side direction of the first beam portion 21, so it is easy to confirm the position and posture of the wafer 1 by visual inspection or image recognition.

[0112] In addition, according to the wafer 1 of the present embodiment, the first positioning hole 41 has a rectangular shape, the second positioning hole 42 has a square shape, and each side of the square of the second positioning hole 42 is shorter than the long side of the rectangle of the first positioning hole 41 and longer than the short side. As a result, the first pin suitable for the first positioning hole 41 cannot be inserted into the second positioning hole 42, and the second pin suitable for the second positioning hole 42 cannot be inserted into the first positioning hole 41. Therefore, it is possible to reliably avoid the erroneous positioning state in which the first pin is inserted into the second positioning hole 42 and the second pin is inserted into the first positioning hole 41. In addition, by making the first positioning hole 41 and the second positioning hole 42 respectively have a simple rectangular shape, it is easy to form each positioning hole into a precise shape, and the positioning accuracy is improved.

[0113] In addition, the present invention is not limited to the above-described embodiment, and includes various modifications.

[0114] For example, the shape of the wafer is not limited to a circle, and may be other shapes (rectangular, etc.).

[0115] The substrate of the wafer may be other than crystal, for example, silicon.

[0116] In the above-described embodiment, four fourth beam portions 24 are provided on the wafer 1 . However, in another example of the present embodiment, the number of fourth beam portions may be five or more, or may be three or less.

[0117] When two or more fourth beams are provided between the first beam and the frame, a portion of the third beam may be connected between the two fourth beams, that is, one end of the third beam may be connected to one fourth beam, and the other end of the third beam may be connected to another fourth beam.

[0118] exist Figure 4In the variation of the wafer 1 shown, two fourth beams 24 are respectively spanned in four regions of the chip forming region 10 divided by the orthogonal first beams 21 and second beams 22. That is, in the four regions, the fourth beams 24e and 24f span the region divided by the first beam body 210a and the second beam body 220b, the fourth beams 24g and 24h span the region divided by the first beam body 210b and the second beam body 220b, the fourth beams 24i and 24j span the region divided by the first beam body 210b and the second beam body 220a, and the fourth beams 24k and 24m span the region divided by the first beam body 210a and the second beam body 220a. A portion of the third beam is connected between two fourth beams 24 in each region (between 24e and 24f, between 24g and 24h, between 24i and 24j, and between 24k and 24m).

[0119] In the example of the above-described embodiment, the number of the positioning holes is two, but in another example of the present embodiment, the number of the positioning holes may be three or more.

[0120] In the example of the above-described embodiment, a plurality of positioning holes (41, 42) are formed only in the first beam portion 21, but in another example of the present embodiment, one or more positioning holes may be formed in each of the first beam portion 21 and the second beam portion 22. Figure 5 In the illustrated modification of the wafer 1 , one positioning hole 42 a is formed in the first beam portion 21 , and another positioning hole 41 a is formed in the second beam portion 22 .

[0121] In another example of the present embodiment, a plurality of positioning holes may be formed only in the second beam portion 22 .

[0122] In the example of the embodiment, the second positioning hole 42 is a square, but in another example of the present embodiment, the second positioning hole 42 may be a rectangular shape other than a square. Even if the second positioning hole 42 is a rectangular shape other than a square, if each side of the rectangular shape is shorter than the long side of the rectangle of the first positioning hole 41 and longer than the short side, the first pin suitable for the first positioning hole 41 cannot be inserted into the second positioning hole 42, and the second pin suitable for the second positioning hole 42 cannot be inserted into the first positioning hole 41. Therefore, as described above, the wrong positioning state of the wafer 1 can be avoided.

[0123] In the example of the above-described embodiment, the positioning holes ( 41 , 42 ) are rectangular in shape. However, in another example of the present embodiment, the positioning holes may be in any shape other than the rectangular shape.

[0124] In the example of the embodiment, the first positioning hole 41 and the second positioning hole 42 each have a line-symmetrical plane shape (square, rectangle), but in another example of the present embodiment, at least one of the first positioning hole 41 and the second positioning hole 42 may also have a non-line-symmetrical plane shape. Thus, when the front and back of the wafer 1 in the correct positioning state are reversed, the pin corresponding to the positioning hole having the non-line-symmetrical plane shape cannot be inserted. Therefore, the wafer 1 can be prevented from being positioned in a state where the front and back are reversed relative to the correct positioning state.

[0125] [Explanation of Symbols]

[0126] 1: Chip

[0127] 9: Imaginary circle

[0128] 10: Chip formation area

[0129] 11: Frame

[0130] 21: First beam

[0131] 22: Second beam

[0132] 23: The third beam

[0133] 24, 24a, 24b, 24c, 24d, 24e, 24f, 24g, 24h, 24i, 24j, 24k, 24m: fourth beam

[0134] 30: Chip

[0135] 31: Electrode

[0136] 32: Through hole

[0137] 41, 41a: First positioning hole

[0138] 42, 42a: Second positioning hole

[0139] 110a, 110b: Edge

[0140] 200: Intersection

[0141] 210a, 210b: first beam body

[0142] 220a, 220b: Second beam body

[0143] a, b: length

[0144] C1, C2, W1, W2, W3, W4: Horizontal width

[0145] d: diameter

[0146] L: Interval

[0147] r: radius

[0148] s: length

Claims

1. A wafer, which is a plate-shaped wafer on which a plurality of chips are formed, wherein the wafer has: a frame portion surrounding a chip forming area where the chip is formed; A first beam portion, with two ends connected to the frame portion; a second beam portion, both ends of which are connected to the frame portion and intersect the first beam portion in the chip forming area; a plurality of third beam portions, each of which is provided with a plurality of the chips in a cuttable manner and extends parallel to each other in the chip forming region; as well as one or more fourth beams, one end of which is connected to the second beam and the other end of which is connected to the frame, At least a portion of the third beam portions has one end connected to one of the fourth beam portions, and the other end connected to the frame portion, the first beam portion, or another of the fourth beam portions.

2. The wafer according to claim 1, wherein The first beam portion is orthogonal to the second beam portion, The third beam portion extends parallel to the second beam portion, The fourth beam portion extends parallel to the first beam portion.

3. The wafer according to claim 2, wherein: The frame has a ring shape, The first beam portion and the second beam portion are orthogonal to each other at a central portion of the first beam portion and a central portion of the second beam portion in the longitudinal direction.

4. The wafer according to claim 3, wherein: The fourth beam portion is connected to a central portion in the longitudinal direction of the second beam portion spanning between the first beam portion and the frame portion.

5. The wafer according to claim 3, wherein: At least a portion of the inner edge of the frame portion facing the chip forming area is along an imaginary circle of diameter d, A value d / L obtained by dividing the diameter d of the imaginary circle by the distance L between the first beam portion and the fourth beam portion is 3.5 to 4.

6. The wafer according to claim 4, The four fourth beam portions are provided in a line-symmetric manner with respect to the first beam portion and in a line-symmetric manner with respect to the second beam portion.

7. The wafer according to claim 1, wherein: The portion where the first beam portion and the second beam portion intersect is referred to as an intersection portion. The portion of the first beam portion extending from the intersection portion to the frame portion is referred to as a first beam portion main body. The portion of the second beam portion extending from the intersection portion to the frame portion is referred to as a second beam portion main body. The width of the first beam portion main body in the short side direction of the first beam portion is referred to as a lateral width W1. The width of the second beam portion main body in the short side direction of the second beam portion is referred to as a lateral width W2. The width of the intersection in the short-side direction of the first beam portion is referred to as a lateral width C1. The width of the intersection in the short side direction of the second beam portion is referred to as a lateral width C2. The lateral width C1 of the intersection portion is larger than the lateral width W1 of the first beam portion body. The lateral width C2 of the intersection portion is greater than the lateral width W2 of the second beam portion body.

8. The wafer according to claim 7, wherein: The frame has a ring shape, The first beam portion and the second beam portion are orthogonal to each other at a central portion in the long side direction of the first beam portion and a central portion in the long side direction of the second beam portion. A value C1 / W1 obtained by dividing the lateral width C1 of the intersection by the lateral width W1 of the first beam body is 1.8 to 2.

2. A value C2 / W2 obtained by dividing the lateral width C2 of the intersection portion by the lateral width W2 of the second beam portion main body is 1.5 to 2.

0.

9. The wafer according to claim 7, wherein: The frame has a ring shape, The first beam portion and the second beam portion are orthogonal to each other at a central portion in the long side direction of the first beam portion and a central portion in the long side direction of the second beam portion. The lateral width W2 of the second beam portion main body is smaller than the lateral width W1 of the first beam portion main body.

10. The wafer according to claim 9, wherein A value W2 / W1 obtained by dividing the lateral width W2 of the second beam portion main body by the lateral width W1 of the first beam portion main body is 0.6<W2 / W1<1.

0.

11. The wafer according to claim 1, wherein: A plurality of positioning holes through which a plurality of pins for positioning the wafer are inserted are formed in one of the first beam portion and the second beam portion, or one or more positioning holes are formed in both the first beam portion and the second beam portion.

12. The wafer according to claim 11, wherein Each of the third beam portions extends parallel to the second beam portion, One end of at least a portion of the third beam portion is connected to the first beam portion, The lateral width of the first beam portion in the short side direction is greater than the lateral width of the second beam portion in the short side direction. The plurality of positioning holes are formed in the first beam portion.

13. The wafer according to claim 12, wherein: The plurality of positioning holes formed in the first beam portion include a first positioning hole and a second positioning hole, The first positioning hole and the second positioning hole are in a non-point-symmetric and non-line-symmetric relationship with each other when viewed from above. At least one of the first positioning hole and the second positioning hole has a non-line-symmetric planar shape, or the first positioning hole and the second positioning hole have planar shapes that are line-symmetric about different symmetry axes.

14. The wafer according to claim 13, wherein: The first positioning hole and the second positioning hole have different planar shapes from each other.

15. The wafer according to claim 14, wherein: A center of a planar shape of the first positioning hole and a center of a planar shape of the second positioning hole are respectively offset from a center in a short-side direction of the first beam portion.

16. The wafer according to claim 15, wherein: The first positioning hole has a rectangular shape. The second positioning hole is a quadrilateral in a plan view, and has a rectangular shape in which the length of each side is shorter than the long side of the rectangle and longer than the short side.

17. The wafer according to any one of claims 1 to 16, wherein The wafer is a crystalline wafer.

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