Radio frequency transceiver intermediate frequency loopback calibration circuit and method

Abstract

The invention provides an intermediate-frequency loopback calibration circuit and method for a radio frequency transceiver, which are applied to the technical field of wireless communication chip circuit architecture.The intermediate-frequency loopback calibration circuit comprises a receiving link, a digital baseband circuit, a transmitting link and a loopback change-over switch module; the loopback change-over switch module is used for switching between a normal working mode and a loopback calibration mode of the radio frequency transceiver, so that when the radio frequency transceiver is in the normal working mode, the loopback change-over switch module disconnects the output end of the transmitting filter and the input end of the receiving filter; in the loopback calibration mode, the loopback change-over switch module is communicated with the output end of the transmitting filter and the input end of the receiving filter to form a calibration loop, the transmitting filter and the receiving filter are multiplexed, signal amplification and higher harmonic suppression are provided for the calibration loop, and digital-to-analog converter calibration is carried out.

Description

Technical Field

[0001] The present application relates to the technical field of wireless communication chip circuit architecture, and in particular to a radio frequency transceiver intermediate frequency loopback calibration circuit and method. Background Art

[0002] RF transceivers are widely used in various wireless communication systems, such as mobile communications (mobile phones), wireless local area networks (WLAN), Bluetooth, satellite communications, radio and television, etc. With the continuous development of wireless communication technology, the application areas of RF transceivers are also expanding.

[0003] like Figure 1 As shown in the figure, the traditional architecture of RF chip is divided into TX transmission link and RX reception link. Among them, DAC (digital-to-analog converter) completes the digital-to-analog conversion in the TX transmission link, and ADC (analog-to-digital converter) completes the analog-to-digital conversion in the RX reception link. The performance of ADC and DAC is crucial to the performance of RF chip, and DAC-ADC self-loop calibration is usually performed to ensure performance stability.

[0004] The RX receiving link consists of LNA (low noise amplifier), Mixer (down mixer), LPF (low pass intermediate frequency filter) and ADC, which mainly completes the signal reception. The TX transmitting link consists of PA (power amplifier), Mixer (up mixer), LPF (low pass intermediate frequency filter), DAC and other main modules, which mainly completes the signal transmission. Under this architecture, the traditional DAC-ADC loopback circuit can be directly connected through a switch, and the DAC error can be measured through the ADC to achieve DAC calibration. However, this situation requires high ADC measurement accuracy and poor DAC calibration performance.

[0005] Based on this, a new technical solution is needed. Summary of the invention

[0006] In view of this, the present application provides a circuit and method for calibrating an intermediate frequency loopback of a radio frequency transceiver.

[0007] This application provides the following technical solutions:

[0008] According to the present application, a radio frequency transceiver intermediate frequency loopback calibration circuit includes a receiving link, a digital baseband circuit, a transmitting link and a loopback switching module;

[0009] The receiving link includes a receiving filter and an analog-to-digital converter, and the transmitting link includes a transmitting filter and a digital-to-analog converter; the output end of the receiving filter is connected to the input end of the analog-to-digital converter, the output end of the analog-to-digital converter is connected to the input end of the digital-to-analog converter through a digital baseband circuit, the output end of the digital-to-analog converter is connected to the input end of the transmitting filter, and the loopback switching module is connected between the output end of the transmitting filter and the input end of the receiving filter;

[0010] The loopback switching switch module is used to switch between the normal working mode and the loopback calibration mode of the RF transceiver, so that in the normal working mode, the loopback switching switch module disconnects the output end of the transmitting filter and the input end of the receiving filter; in the loopback calibration mode, the loopback switching switch module connects the output end of the transmitting filter and the input end of the receiving filter to form a calibration loop, multiplexes the transmitting filter and the receiving filter, provides signal amplification and high-order harmonic suppression for the calibration loop, and performs digital-to-analog converter calibration.

[0011] Preferably, the transmit filter is used as an intermediate frequency filter amplifier of the transmit link in the normal working mode, and is multiplexed as a harmonic filter for a digital-to-analog converter calibration signal in the loopback calibration mode;

[0012] The receiving filter is used as an intermediate frequency filter amplifier of the receiving link in the normal working mode, and is multiplexed as an anti-aliasing filter and an amplifier in the loopback calibration mode.

[0013] Preferably, the receiving filter includes a first receiving filter and a second receiving filter; the analog-to-digital converter includes a first analog-to-digital converter and a second analog-to-digital converter; the transmitting filter includes a first transmitting filter and a second transmitting filter, and the digital-to-analog converter includes a first digital-to-analog converter and a second digital-to-analog converter; the loopback switching switch module includes a loopback in-phase shunt switch and a loopback quadrature shunt switch;

[0014] The output end of the loopback in-phase branch switch is connected to the input end of the first receiving filter, the output end of the first receiving filter is connected to the input end of the first analog-to-digital converter, the output end of the first analog-to-digital converter is connected to the input end of the first digital-to-analog converter through the digital baseband circuit, the output end of the first digital-to-analog converter is connected to the input end of the first transmitting filter, and the output end of the first transmitting filter is connected to the input end of the loopback in-phase branch switch;

[0015] The output end of the loopback orthogonal branch switch is connected to the input end of the second receiving filter, the output end of the second receiving filter is connected to the input end of the second analog-to-digital converter, the output end of the second analog-to-digital converter is connected to the input end of the second digital-to-analog converter through the digital baseband circuit, the output end of the second digital-to-analog converter is connected to the input end of the second transmitting filter, and the output end of the second transmitting filter is connected to the input end of the loopback orthogonal branch switch.

[0016] Preferably, the receiving link further includes a low noise amplifier, a first down mixer and a second down mixer; the loopback switching module further includes a receiving in-phase branch switch and a receiving orthogonal branch switch;

[0017] The input end of the low noise amplifier is used to receive a signal, and the output end of the low noise amplifier is respectively connected to the input end of the first down mixer and the input end of the second down mixer, the output end of the first down mixer is connected to the input end of the receiving in-phase branch switch, the output end of the receiving in-phase branch switch is connected to the input end of the first receiving filter, the output end of the second down mixer is connected to the input end of the receiving orthogonal branch switch, and the output end of the receiving orthogonal branch switch is connected to the input end of the second receiving filter.

[0018] Preferably, the transmission link includes a power amplifier, a first up-mixer and a second up-mixer; the loopback switching module also includes a transmission in-phase branch switch and a transmission orthogonal branch switch;

[0019] The output end of the power amplifier is used to transmit a signal, and the input end of the power amplifier is respectively connected to the output end of the first up-mixer and the output end of the second up-mixer, the input end of the first up-mixer is connected to the output end of the transmit in-phase branch switch, the input end of the transmit in-phase branch switch is connected to the output end of the first transmit filter, the input end of the second up-mixer is connected to the output end of the transmit orthogonal branch switch, and the input end of the transmit orthogonal branch switch is connected to the output end of the second transmit filter.

[0020] Preferably, the digital baseband circuit includes a calibration detection and calculation module, a calibration signal generation module and a digital-to-analog converter calibration circuit;

[0021] The calibration signal generating module is connected to the digital-to-analog converter, the analog-to-digital converter is connected to the calibration detection and calculation module, the calibration detection and calculation module is connected to the digital-to-analog converter calibration circuit, and the digital-to-analog calibration circuit is connected to the digital-to-analog converter.

[0022] Preferably, the calibration signal generation module generates a digital-to-analog converter calibration signal, and the digital-to-analog converter calibration signal is processed by the calibration loop path; the calibration detection and calculation module is used to calibrate the calibration signal after the detection processing and calculate the digital-to-analog converter error, and the digital-to-analog calibration circuit calibrates the digital-to-analog converter according to the digital-to-analog converter error.

[0023] Preferably, the calibration loop is also used for bandwidth calibration of the transmit filter and the receive filter, and when the transmit filter performs bandwidth calibration, the receive filter is configured for bypass processing; when the receive filter performs bandwidth calibration, the transmit filter is configured for bypass processing.

[0024] Preferably, the calibration signal generating module generates a single-tone signal of a preset frequency, the single-tone signal of the preset frequency is processed through a calibration loop, the power of the processed single-tone signal is measured through the calibration detection and calculation module, and the bandwidth parameters of the transmitting filter or the receiving filter in the bandwidth calibration state are iteratively adjusted by calculation to perform bandwidth calibration.

[0025] According to a radio frequency transceiver intermediate frequency loopback calibration method provided by the present application, any of the above-mentioned radio frequency transceiver intermediate frequency loopback calibration circuits is applied. When the radio frequency transceiver is in a loopback calibration mode, the loopback switching switch module connects the output end of the transmitting filter and the input end of the receiving filter to form a calibration loop, and the transmitting filter and the receiving filter are multiplexed to provide signal amplification and high-order harmonic suppression for the calibration loop, so as to perform digital-to-analog converter calibration.

[0026] Compared with the prior art, the beneficial effects that can be achieved by at least one of the above technical solutions adopted in the present application include at least:

[0027] The RF transceiver DAC-ADC intermediate frequency loopback calibration circuit architecture of the present application builds a calibration loop by multiplexing the TX and RX link intermediate frequency filters and amplifiers, thereby improving the DAC calibration performance while avoiding the introduction of additional amplifiers to reduce the chip area. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0029] Figure 1 A schematic diagram of the circuit design architecture of the existing RF chip TRX link and DAC-ADC calibration loop;

[0030] Figure 2 A schematic diagram of the circuit design architecture of the DAC-ADC calibration loop of the present application;

[0031] Figure 3 This is a schematic diagram of the calibration loop switch switching in normal TX / RX business mode;

[0032] Figure 4Figure 2 is a schematic diagram of the calibration loop switch switching in the DAC-ADC loopback calibration mode.

[0033] Explanation of the reference numerals: 10, transmitting link; 20, receiving link; 30, digital baseband circuit; 40, loopback switching switch module; 410, receiving in-phase branch switch; 420, receiving quadrature branch switch; 430, loopback in-phase branch switch; 440, loopback quadrature branch switch; 450, transmitting in-phase branch switch; 460, transmitting quadrature branch switch. DETAILED DESCRIPTION

[0034] The embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0035] The following describes the implementation methods of the present application through specific examples, and those skilled in the art can easily understand other advantages and effects of the present application from the contents disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. The present application can also be implemented or applied through other different specific implementation methods, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present application. It should be noted that, in the absence of conflict, the following embodiments and the features in the embodiments can be combined with each other. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work belong to the scope of protection of the present application.

[0036] It should be noted that various aspects of the embodiments within the scope of the appended claims are described below. It should be apparent that the aspects described herein can be embodied in a wide variety of forms, and any specific structure and / or function described herein is merely illustrative. Based on the present application, it should be understood by those skilled in the art that an aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number and aspect described herein can be used to implement the device and / or practice the method. In addition, other structures and / or functionalities other than one or more of the aspects described herein can be used to implement this device and / or practice this method.

[0037] It should also be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present application. The drawings only show components related to the present application rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0038] Additionally, in the following description, specific details are provided to facilitate a thorough understanding of the examples. However, it will be understood by those skilled in the art that the examples can be practiced without these specific details.

[0039] In view of this, the applicant conducted in-depth research and improvement exploration on the radio frequency transceiver and found that: Figure 1 As shown in the figure, the traditional DAC-ADC loopback calibration architecture, in which the amplifier Amp is located between the DAC and the ADC, and its presence or absence is optional. For the architecture without Amp, the cost is lower, but the DAC calibration performance is poor; for the architecture with Amp, the DAC calibration performance is better, but Amp adds additional cost. In this architecture, the traditional DAC-ADC loopback circuit is directly connected through a switch, or connected after passing through an independent amplifier, and the DAC error is measured through the ADC to achieve DAC calibration. The former has a relatively simple architecture, high requirements for ADC measurement accuracy, and poor DAC calibration performance; the latter requires the addition of an additional amplifier, which increases the chip area and cost. Figure 1 Here, Digital represents the digital baseband circuit.

[0040] Based on this, the technical solutions provided by the embodiments of the present application are described below in conjunction with the accompanying drawings.

[0041] The embodiment of this specification proposes a radio frequency transceiver intermediate frequency loopback calibration circuit, such as Figure 2 , Figure 3 as well as Figure 4 As shown, it includes a receiving chain 20, a digital baseband circuit 30, a transmitting chain 10 and a loopback switching module 40.

[0042] The receiving link 20 includes a receiving filter and an analog-to-digital converter, and the transmitting link 10 includes a transmitting filter and a digital-to-analog converter; the output end of the receiving filter is connected to the input end of the analog-to-digital converter, the output end of the analog-to-digital converter is connected to the input end of the digital-to-analog converter through the digital baseband circuit 30, the output end of the digital-to-analog converter is connected to the input end of the transmitting filter, and the loopback switching module 40 is connected between the output end of the transmitting filter and the input end of the receiving filter.

[0043] The loopback switching switch module 40 is used to switch the RF transceiver between a normal operating mode and a loopback calibration mode, so that in the normal operating mode, the loopback switching switch module 40 disconnects the output end of the transmitting filter and the input end of the receiving filter; in the loopback calibration mode, the loopback switching switch module 40 connects the output end of the transmitting filter and the input end of the receiving filter to form a calibration loop, multiplexes the transmitting filter and the receiving filter, provides signal amplification and high-order harmonic suppression for the calibration loop, and performs digital-to-analog converter calibration.

[0044] In RF chips, ADC and DAC do not exist independently of the TX and RX links, and the TX and RX links themselves already contain amplifiers and filters. Therefore, the DAC-ADC loop can reuse the devices in the TX and RX links, improving the DAC calibration performance while reducing the chip area.

[0045] The present application relates to a DAC-ADC self-loopback calibration circuit architecture. By designing a DAC-ADC loopback calibration circuit architecture that reuses the intermediate frequency amplifier and filter of the radio frequency transceiver, the calibration performance is improved and the area of ​​the radio frequency chip is optimized. The DAC-ADC intermediate frequency loopback calibration circuit architecture suitable for the radio frequency transceiver chip is used to achieve low-cost and high-performance DAC calibration. Among them, the DAC-ADC intermediate frequency loopback circuit includes SW (intermediate frequency loopback switching switch), TX LPF intermediate frequency filter amplifier, and RX LPF intermediate frequency filter amplifier. SW is used to select and switch between normal working mode and DAC-ADC loopback calibration mode. TX LPF is an intermediate frequency filter for multiplexing the TX link, and RX LPF is an intermediate frequency filter amplifier for multiplexing the RX link. In the normal working mode of the radio frequency chip, TX LPF and RX LPF work as TX link and RX link modules; in the loopback calibration mode, a loop is formed by switching the SW to form a DAC-ADC calibration loopback circuit, which provides high-order harmonic suppression and signal amplification functions for the calibration loop, and improves the DAC calibration performance. Due to device reuse, the chip area and cost are reduced.

[0046] In one embodiment, if Figure 2 , Figure 3 as well as Figure 4 As shown, the transmitting filter is used as the intermediate frequency filter amplifier of the transmitting chain 10 in the normal working mode, and is multiplexed as the harmonic filter of the digital-to-analog converter calibration signal in the loopback calibration mode; the receiving filter is used as the intermediate frequency filter amplifier of the receiving chain 20 in the normal working mode, and is multiplexed as the anti-aliasing filter and amplifier in the loopback calibration mode.

[0047] In one embodiment, if Figure 2 , Figure 3 as well as Figure 4 As shown, the receiving filter includes a first receiving filter and a second receiving filter; the analog-to-digital converter includes a first analog-to-digital converter and a second analog-to-digital converter; the transmitting filter includes a first transmitting filter and a second transmitting filter, and the digital-to-analog converter includes a first digital-to-analog converter and a second digital-to-analog converter; the loopback switching switch module 40 includes a loopback in-phase branch switch 430 and a loopback orthogonal branch switch 440.

[0048] The output end of the loopback in-phase branch switch 430 is connected to the input end of the first receiving filter, the output end of the first receiving filter is connected to the input end of the first analog-to-digital converter, the output end of the first analog-to-digital converter is connected to the input end of the first digital-to-analog converter through the digital baseband circuit 30, the output end of the first digital-to-analog converter is connected to the input end of the first transmitting filter, and the output end of the first transmitting filter is connected to the input end of the loopback in-phase branch switch 430.

[0049] The output end of the loopback orthogonal branch switch 440 is connected to the input end of the second receiving filter, the output end of the second receiving filter is connected to the input end of the second analog-to-digital converter, the output end of the second analog-to-digital converter is connected to the input end of the second digital-to-analog converter through the digital baseband circuit 30, the output end of the second digital-to-analog converter is connected to the input end of the second transmitting filter, and the output end of the second transmitting filter is connected to the input end of the loopback orthogonal branch switch 440.

[0050] In one embodiment, if Figure 2 , Figure 3 as well as Figure 4 As shown, the receiving chain 20 further includes a low noise amplifier, a first down mixer and a second down mixer; the loopback switching module 40 further includes a receiving in-phase branch switch 410 and a receiving orthogonal branch switch 420 .

[0051] The input end of the low noise amplifier is used to receive signals, and the output end of the low noise amplifier is respectively connected to the input end of the first down mixer and the input end of the second down mixer, the output end of the first down mixer is connected to the input end of the receiving in-phase branch switch 410, the output end of the receiving in-phase branch switch 410 is connected to the input end of the first receiving filter, the output end of the second down mixer is connected to the input end of the receiving orthogonal branch switch 420, and the output end of the receiving orthogonal branch switch 420 is connected to the input end of the second receiving filter.

[0052] In one embodiment, if Figure 2 , Figure 3 as well as Figure 4 As shown, the transmission link 10 includes a power amplifier, a first up-mixer, and a second up-mixer; the loopback switching module 40 also includes a transmission in-phase branch switch 450 and a transmission orthogonal branch switch 460. The output end of the power amplifier is used to transmit a signal, the input end of the power amplifier is connected to the output end of the first up-mixer and the output end of the second up-mixer respectively, the input end of the first up-mixer is connected to the output end of the transmission in-phase branch switch 450, the input end of the transmission in-phase branch switch 450 is connected to the output end of the first transmission filter, the input end of the second up-mixer is connected to the output end of the transmission orthogonal branch switch 460, and the input end of the transmission orthogonal branch switch 460 is connected to the output end of the second transmission filter.

[0053] Among them, the receiving in-phase branch switch 410 is the in-phase I-way switch of the RX receiving link; the receiving orthogonal branch switch 420 is the orthogonal Q-way switch of the RX receiving link; the loopback in-phase branch switch 430 is the DAC-ADC intermediate frequency loopback in-phase I-way switch; the loopback orthogonal branch switch 440 is the DAC-ADC intermediate frequency loopback orthogonal Q-way switch; the transmitting in-phase branch switch 450 is the TX transmitting link in-phase I-way switch; and the transmitting orthogonal branch switch 460 is the TX transmitting link orthogonal Q-way switch.

[0054] The present application is implemented by multiplexing the calibration loop of the intermediate frequency filter of the radio frequency transceiver. The calibration loop module includes various input and output intermediate frequency switching switches SW and multiplexed intermediate frequency filters and amplifiers. The intermediate frequency switching switch is used to maintain an open or closed state according to normal business and loopback calibration mode to achieve switching between the two modes and multiplexing of filters. TXLPF is used as an intermediate frequency filter amplifier for the TX link in normal business, and is multiplexed as a DAC calibration signal harmonic filter under loopback calibration. RXLPF is used as an intermediate frequency filter amplifier for the RX link in normal business, and is multiplexed as an anti-aliasing filter and amplifier under loopback calibration.

[0055] In one embodiment, if Figure 2 , Figure 3 as well as Figure 4 As shown, the digital baseband circuit 30 includes a calibration detection and calculation module, a calibration signal generation module and a digital-to-analog converter calibration circuit. The calibration signal generation module is connected to the digital-to-analog converter, the analog-to-digital converter is connected to the calibration detection and calculation module, the calibration detection and calculation module is connected to the digital-to-analog converter calibration circuit, and the digital-to-analog calibration circuit is connected to the digital-to-analog converter.

[0056] In one embodiment, if Figure 2 , Figure 3 as well as Figure 4 As shown, the calibration signal generation module generates a digital-to-analog converter calibration signal, and the digital-to-analog converter calibration signal is processed by a calibration loop path; the calibration detection and calculation module is used to calibrate the calibration signal after the detection processing and calculate the digital-to-analog converter error, and the digital-to-analog calibration circuit calibrates the digital-to-analog converter according to the digital-to-analog converter error.

[0057] like Figure 3 As shown, the switching effect of the multiplexing circuit in the normal business mode is achieved by disconnecting the loopback in-phase branch switch 430 and the loopback orthogonal branch switch 440 to ensure that other branches are not affected, the receiving in-phase branch switch 410 and the receiving orthogonal branch switch 420 are closed to realize the RX link, and the transmitting in-phase branch switch 450 and the transmitting orthogonal branch switch 460 are closed to realize the RX link.

[0058] like Figure 4As shown, the final switching effect of the multiplexing circuit in the DAC-ADC loopback calibration mode is achieved by disconnecting the receiving in-phase branch switch 410, receiving quadrature branch switch 420, transmitting in-phase branch switch 450, and transmitting quadrature branch switch 460 to ensure that other branches are not affected, and the loopback in-phase branch switch 430 and the loopback quadrature branch switch 440 are closed to form a DAC-TXLPF-RXLPF-ADC loopback calibration path. The DAC calibration process is specifically as follows: sending a DAC calibration signal through a calibration signal generator, processing through a DAC-TXLPF-RXLPF-ADC path, detecting and calculating DAC errors through calibration, and realizing DAC calibration by compensating the DAC calibration circuit.

[0059] In one embodiment, if Figure 2 , Figure 3 as well as Figure 4 As shown, the calibration loop is also used for bandwidth calibration of the transmit filter and the receive filter, and when the transmit filter performs bandwidth calibration, the receive filter is configured for bypass processing; when the receive filter performs bandwidth calibration, the transmit filter is configured for bypass processing. The DAC-ADC intermediate frequency loopback calibration circuit architecture of the present application, by multiplexing the intermediate frequency amplifier and filter of the RF transceiver, provides additional gain and high-order harmonic suppression on the one hand, and on the other hand, does not add additional amplifiers, thereby reducing chip area and cost. In addition, the loop can be used for TX LPF and RX LPF bandwidth calibration, reducing the calibration cost of mass production ATE (automated test equipment).

[0060] In one embodiment, if Figure 2 , Figure 3 as well as Figure 4 As shown, the calibration signal generation module generates a single-tone signal of a preset frequency, the single-tone signal of the preset frequency is processed by a calibration loop, the power of the processed single-tone signal is measured by the calibration detection and calculation module, and the bandwidth parameters of the transmitting filter or the receiving filter in the bandwidth calibration state are iteratively adjusted to perform bandwidth calibration.

[0061] like Figure 4As shown, the loop can be reused for BWT calibration. BWT calibration is divided into TXLPF bandwidth calibration and RXLPF bandwidth calibration. In TXLPF calibration mode, RXLPF is configured for bypass processing, and a single-tone signal of a specific frequency is generated by the calibration signal generator. The single-tone signal power is measured through the DAC-TXLPF-RXLPF-ADC loopback path processing, and the single-tone signal power is measured through the calibration detection circuit. For example, the single-tone of the passband center frequency and the single-tone of the filter cutoff frequency are measured respectively, and the error between the power difference between the two and the theoretical difference of 3dB is calculated. The bandwidth parameters of the TXLPF circuit are calculated and iteratively adjusted to achieve TXLPF bandwidth calibration. In RXLPF calibration mode, TXLPF is configured for bypass processing, and the same processing is performed to achieve RXLPF bandwidth calibration. For example, in practical applications, the expected 3dB cutoff bandwidth of RXLPF is 10MHz, that is, it is expected that at f=10MHz, the filter response is 3dB lower than the gain in the passband. In actual projects, due to errors such as chip technology, the 3dB cutoff frequency may fluctuate to 9MHz or 11MHz. For this purpose, the calibration signal can select 5MHz single tone and 10MHz single tone, measure their signal power respectively, and adjust the filter bandwidth parameters so that the difference between the two is 3dB to achieve the calibration target.

[0062] The above bypass processing can be achieved by adjusting the LPF filter circuit parameters or internal switches. For example, the calibration detection and calculation module is connected to the second receiving filter and the first transmitting filter to maximize the adjustment of the corresponding filter circuit bandwidth parameters to achieve bypass processing of its filtering function. In practical applications, there are usually two ways to bypass processing: one is to directly short-circuit the input and output ports of the LPF filter, and the other is to adjust the bandwidth parameters, usually the size of the connected capacitor, so that the filter works at the maximum adjustable bandwidth, such as 4 times or more of the working bandwidth, so that it is approximately full-pass within the frequency range involved in the calibration.

[0063] The RF transceiver DAC-ADC intermediate frequency loopback calibration circuit architecture of the present application builds a calibration loop by multiplexing the TX and RX link intermediate frequency filters and amplifiers, thereby improving the DAC calibration performance, while avoiding the introduction of additional amplifiers to reduce the chip area. In addition, it can be used for BWT calibration (TXLPF, RXLPF bandwidth calibration) to reduce the chip ATE calibration cost, and the optimization effect is particularly obvious in chips with a large number of channels.

[0064] The embodiment of this specification also discloses a method for calibrating the intermediate frequency loopback of a radio frequency transceiver. Figure 2 , Figure 3 as well as Figure 4As shown, an RF transceiver intermediate frequency loopback calibration circuit using any of the above embodiments is used. When the RF transceiver is in a loopback calibration mode, the loopback switching switch module 40 connects the output end of the transmit filter and the input end of the receive filter to form a calibration loop, multiplexes the transmit filter and the receive filter, provides signal amplification and high-order harmonic suppression for the calibration loop, and performs digital-to-analog converter calibration.

[0065] It should be noted that, although the above embodiments have been described in this article, they are not intended to limit the scope of patent protection of this application. Therefore, based on the innovative concept of this application, changes and modifications to the embodiments described herein, or equivalent structural or equivalent process transformations made using the description and drawings of this application, directly or indirectly applying the above technical solutions to other related technical fields, are all included in the scope of patent protection of this application.

[0066] In this specification, the same or similar parts between the various embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the embodiments described later, the description is relatively simple, and the relevant parts can be referred to the partial description of the previous embodiments.

[0067] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.

Claims

1. A radio frequency transceiver intermediate frequency loopback calibration circuit, characterized in that: It includes a receiving link, a digital baseband circuit, a transmitting link and a loopback switching module; The receiving link includes a receiving filter and an analog-to-digital converter, and the transmitting link includes a transmitting filter and a digital-to-analog converter; the output end of the receiving filter is connected to the input end of the analog-to-digital converter, the output end of the analog-to-digital converter is connected to the input end of the digital-to-analog converter through a digital baseband circuit, the output end of the digital-to-analog converter is connected to the input end of the transmitting filter, and the loopback switching module is connected between the output end of the transmitting filter and the input end of the receiving filter; The loopback switching module is used to switch between the normal working mode and the loopback calibration mode of the radio frequency transceiver, so that in the normal working mode, the loopback switching module disconnects the output end of the transmitting filter and the input end of the receiving filter; In the loopback calibration mode, the loopback switching module connects the output end of the transmitting filter and the input end of the receiving filter to form a calibration loop, multiplexes the transmitting filter and the receiving filter, provides signal amplification and high-order harmonic suppression for the calibration loop, and performs digital-to-analog converter calibration.

2. The RF transceiver intermediate frequency loopback calibration circuit according to claim 1, characterized in that: The transmit filter is used as an intermediate frequency filter amplifier of the transmit link in the normal working mode, and is multiplexed as a harmonic filter of the digital-to-analog converter calibration signal in the loopback calibration mode; The receiving filter is used as an intermediate frequency filter amplifier of the receiving link in the normal working mode, and is multiplexed as an anti-aliasing filter and an amplifier in the loopback calibration mode.

3. The RF transceiver intermediate frequency loopback calibration circuit according to claim 1, characterized in that: The receiving filter includes a first receiving filter and a second receiving filter; the analog-to-digital converter includes a first analog-to-digital converter and a second analog-to-digital converter; the transmitting filter includes a first transmitting filter and a second transmitting filter, and the digital-to-analog converter includes a first digital-to-analog converter and a second digital-to-analog converter; the loopback switching switch module includes a loopback in-phase shunt switch and a loopback quadrature shunt switch; The output end of the loopback in-phase branch switch is connected to the input end of the first receiving filter, the output end of the first receiving filter is connected to the input end of the first analog-to-digital converter, the output end of the first analog-to-digital converter is connected to the input end of the first digital-to-analog converter through the digital baseband circuit, the output end of the first digital-to-analog converter is connected to the input end of the first transmitting filter, and the output end of the first transmitting filter is connected to the input end of the loopback in-phase branch switch; The output end of the loopback orthogonal branch switch is connected to the input end of the second receiving filter, the output end of the second receiving filter is connected to the input end of the second analog-to-digital converter, the output end of the second analog-to-digital converter is connected to the input end of the second digital-to-analog converter through the digital baseband circuit, the output end of the second digital-to-analog converter is connected to the input end of the second transmitting filter, and the output end of the second transmitting filter is connected to the input end of the loopback orthogonal branch switch.

4. The RF transceiver intermediate frequency loopback calibration circuit according to claim 3, characterized in that: The receiving link further includes a low noise amplifier, a first down mixer and a second down mixer; the loopback switching module further includes a receiving in-phase branch switch and a receiving quadrature branch switch; The input end of the low noise amplifier is used to receive a signal, and the output end of the low noise amplifier is respectively connected to the input end of the first down mixer and the input end of the second down mixer, the output end of the first down mixer is connected to the input end of the receiving in-phase branch switch, the output end of the receiving in-phase branch switch is connected to the input end of the first receiving filter, the output end of the second down mixer is connected to the input end of the receiving orthogonal branch switch, and the output end of the receiving orthogonal branch switch is connected to the input end of the second receiving filter.

5. The RF transceiver intermediate frequency loopback calibration circuit according to claim 4, characterized in that: The transmission link includes a power amplifier, a first up-mixer and a second up-mixer; the loopback switching module also includes a transmission in-phase branch switch and a transmission orthogonal branch switch; The output end of the power amplifier is used to transmit a signal, and the input end of the power amplifier is respectively connected to the output end of the first up-mixer and the output end of the second up-mixer, the input end of the first up-mixer is connected to the output end of the transmit in-phase branch switch, the input end of the transmit in-phase branch switch is connected to the output end of the first transmit filter, the input end of the second up-mixer is connected to the output end of the transmit orthogonal branch switch, and the input end of the transmit orthogonal branch switch is connected to the output end of the second transmit filter.

6. The RF transceiver intermediate frequency loopback calibration circuit according to claim 1, characterized in that: The digital baseband circuit includes a calibration detection and calculation module, a calibration signal generation module and a digital-to-analog converter calibration circuit; The calibration signal generating module is connected to the digital-to-analog converter, the analog-to-digital converter is connected to the calibration detection and calculation module, the calibration detection and calculation module is connected to the digital-to-analog converter calibration circuit, and the digital-to-analog calibration circuit is connected to the digital-to-analog converter.

7. The RF transceiver intermediate frequency loopback calibration circuit according to claim 6, characterized in that: The calibration signal generation module generates a digital-to-analog converter calibration signal, and the digital-to-analog converter calibration signal is processed by the calibration loop path; the calibration detection and calculation module is used to calibrate the calibration signal after the detection processing and calculate the digital-to-analog converter error, and the digital-to-analog calibration circuit calibrates the digital-to-analog converter according to the digital-to-analog converter error.

8. The RF transceiver intermediate frequency loopback calibration circuit according to claim 6, characterized in that: The calibration loop is also used for bandwidth calibration of the transmitting filter and the receiving filter, and when the transmitting filter performs bandwidth calibration, the receiving filter is configured for bypass processing; when the receiving filter performs bandwidth calibration, the transmitting filter is configured for bypass processing.

9. The RF transceiver intermediate frequency loopback calibration circuit according to claim 8, characterized in that: The calibration signal generation module generates a single-tone signal of a preset frequency, the single-tone signal of the preset frequency is processed by a calibration loop, the power of the processed single-tone signal is measured by the calibration detection and calculation module, and the bandwidth parameters of the transmitting filter or the receiving filter in the bandwidth calibration state are calculated and iteratively adjusted to perform bandwidth calibration.

10. A method for intermediate frequency loopback calibration of a radio frequency transceiver, applying the intermediate frequency loopback calibration circuit of the radio frequency transceiver described in any one of claims 1 to 9, when the radio frequency transceiver is in a loopback calibration mode, the loopback switching switch module connects the output end of the transmitting filter and the input end of the receiving filter to form a calibration loop, multiplexes the transmitting filter and the receiving filter, provides signal amplification and high-order harmonic suppression for the calibration loop, and performs digital-to-analog converter calibration.

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