Filtering unit, signal detection circuit, driving chip and driving control system

Abstract

The invention provides a filtering unit, a signal detection circuit, a driving chip and a driving control system. The filtering unit comprises a first current source, a first P-type transistor and a capacitor, one end of the first P-type transistor is grounded, the other end is connected with the capacitor upper pole plate, and the control end receives sampling voltage; along with the increase of the sampling voltage, the voltage on the capacitor is gradually increased; when the sampling voltage drops, the voltage on the capacitor drops synchronously and quickly; when the rising speed of the sampling voltage is greater than a preset value, the voltage on the capacitor also linearly rises according to the set value and reaches a trigger value, so that the output of the comparator is overturned; the first current source is connected with the capacitor upper polar plate; the upper electrode plate of the capacitor outputs filtered signals, and the lower electrode plate is grounded. The built-in filtering unit structure is adopted, high-frequency clutters in sampling voltage are effectively filtered out, detection built-in integration is achieved, a peripheral circuit is simplified, and the cost performance is improved; in addition, a conventional filtering mode can be reserved, double insurance is formed by the conventional filtering mode and an internal filtering mode, and protection for current abnormity is enhanced.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuit design, and in particular to a filter unit, a signal detection circuit, a driver chip and a drive control system. Background Technology

[0002] If Figure 1 As shown in , sampling signals (especially switching current sampling signals) often carry noise signals such as clutter, and RC filtering structures are often added to filter out noise signals. This RC filtering structure is easy to add and implement in system-level design.

[0003] With the development of technology, the integration of products is getting higher and higher, and more and more functions are integrated into the circuit, making the peripheral system more and more simplified. For the RC filter structure, external resistors or capacitors are very easy to implement, but if you want to improve the integration (simplify the peripheral system) and integrate the filter resistors and capacitors into the circuit, it will occupy a very considerable area, greatly increase the cost of the chip, and reduce the cost performance.

[0004] Therefore, how to propose a filtering structure with small volume and easy to integrate into a chip has become one of the technical problems that technicians in this field need to solve urgently.

[0005] It should be noted that the above introduction to the technical background is only for the convenience of providing a clear and complete description of the technical solutions of the present invention and facilitating the understanding of those skilled in the art. It cannot be considered that the above technical solutions are well known to those skilled in the art simply because they are described in the background technology section of the present invention. SUMMARY OF THE INVENTION

[0006] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a filter unit, a signal detection circuit, a driver chip and a drive control system to solve the problem that the filter structure in the prior art is large in size and difficult to integrate into the chip.

[0007] To achieve the above-mentioned purpose and other related purposes, the present invention provides a filtering unit for filtering the sampled voltage, and the filtering unit at least comprises:

[0008] A first current source, a first P-type transistor and a capacitor;

[0009] One end of the first P-type transistor is connected to the first reference ground, the other end is connected to the upper plate of the capacitor, and the control end receives the sampling voltage; wherein, as the sampling voltage increases, the voltage on the capacitor gradually increases; when the sampling voltage rises faster than a preset value, the current flowing through the first P-type transistor is zero;

[0010] One end of the first current source is connected to the power supply voltage, and the other end is connected to the upper plate of the capacitor;

[0011] The upper plate of the capacitor outputs a filtered signal, and the lower plate is connected to the first reference ground.

[0012] Optionally, the first P-type transistor is a PNP triode or a PMOS transistor.

[0013] To achieve the above and other related purposes, the present invention also provides a signal detection circuit, which at least includes:

[0014] A comparator and a filtering unit;

[0015] The filtering unit is the above-mentioned filtering unit, which receives the sampling voltage and filters the sampling voltage;

[0016] The first inverting input terminal of the comparator is connected to the output terminal of the filtering unit, the non-inverting input terminal receives a reference voltage, and a detection signal is output.

[0017] Optionally, the signal detection circuit further includes a second current source and a second P-type transistor; one end of the second current source is connected to the power supply voltage, and the other end is connected to the first reference ground via the second P-type transistor; the control terminal of the second P-type transistor receives the filtered signal of the externally provided sampling voltage; the connection node of the second current source and the second P-type transistor is connected to the second inverting input terminal of the comparator.

[0018] More optionally, the second P-type transistor is a PNP triode or a PMOS transistor.

[0019] More optionally, the input stage of the comparator is an N-type transistor.

[0020] To achieve the above and other related purposes, the present invention also provides a driving chip, which at least includes: a driving control circuit, a first power transistor, a second power transistor, and the above-mentioned signal detection circuit; the signal detection circuit is connected to the DC negative terminal, obtains a current sampling voltage from the DC negative terminal, and performs filtering and overcurrent detection;

[0021] The driving control circuit is connected to the output terminal of the signal detection circuit, and is connected to the high-side driving input terminal and the low-side driving input terminal, and generates a high-side driving output signal and a low-side driving output signal;

[0022] One end of the first power transistor is connected to the DC positive terminal, the other end is connected to the high-side floating ground terminal, and the control terminal receives the high-side driving output signal;

[0023] One end of the second power transistor is connected to the high-side floating ground terminal, the other end is connected to the DC negative terminal, and the control terminal receives the low-side drive output signal.

[0024] Optionally, when the signal detection circuit includes the second current source and the second P-type transistor, the control terminal of the second P-type transistor is connected to the sampling terminal.

[0025] To achieve the above and other related objectives, the present invention further provides a drive control system, which at least includes:

[0026] A sampling module, a microcontroller unit, a device to be driven, and the above-mentioned drive chip;

[0027] One end of the sampling module is connected to the DC negative terminal of the drive chip, and the other end is connected to the second reference ground, for sampling the current of the device to be driven;

[0028] The microcontroller unit provides a high-side drive input signal and a low-side drive input signal for the drive chip;

[0029] The device to be driven is connected to the high-side floating ground terminal of the drive chip and operates based on the drive control of the drive chip.

[0030] Optionally, when the drive chip is provided with a sampling terminal, the drive control system further includes a filtering module, and the filtering module is connected to the sampling module to filter the sampling voltage and provide it to the sampling terminal of the drive chip.

[0031] More optionally, the device to be driven is a motor.

[0032] As described above, the filtering unit, signal detection circuit, drive chip, and drive control system of the present invention have the following beneficial effects:

[0033] 1. The filtering unit, signal detection circuit, drive chip, and drive control system of the present invention adopt a built-in filtering unit structure, which can effectively filter out high-frequency clutter in the sampling voltage, realize built-in integration of detection, simplify the peripheral circuit, and improve the cost performance.

[0034] 2. The filtering unit, signal detection circuit, drive chip, and drive control system of the present invention can also retain the conventional filtering method, forming a double insurance with the internal filtering method to enhance the protection against current anomalies.

[0035] 3. The filtering unit, signal detection circuit, drive chip, and drive control system of the present invention have a simple structure and are easy to integrate, and are very suitable for sampling and detection of signals. Description of the Drawings

[0036] Figure 1It is shown as a schematic diagram of the principle that the sampling signal is affected by noise during the switching operation.

[0037] Figure 2 It is shown as a schematic diagram of the structure of a drive control system with an external filter structure.

[0038] Figure 3 It is shown as a schematic diagram of the structure of the filter unit of the present invention.

[0039] Figure 4 It is shown as a schematic diagram of a structure of the signal detection circuit of the present invention.

[0040] Figure 5 It is shown as another schematic diagram of the structure of the signal detection circuit of the present invention.

[0041] Figure 6 It is shown as a schematic diagram of the structure of the comparator of the present invention.

[0042] Figure 7 It is shown as a schematic diagram of the circuit structure of the drive chip of the present invention.

[0043] Figure 8 It is shown as a schematic diagram of the structure of the drive control system of the present invention.

[0044] Description of component labels

[0045] 1a, 1b, 1c Drive circuits

[0046] 1 Signal detection circuit

[0047] 11 Filter unit

[0048] 12 Comparator

[0049] 2 Drive control circuit

[0050] 3 Microcontroller unit

[0051] 4 Device to be driven

[0052] 5 Filter module

[0053] 6 DC power supply Specific implementation manners

[0054] The following uses specific specific examples to illustrate the implementation manners of the present invention. Those skilled in the art can easily understand the other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0055] Please refer to Figures 2 to 8It should be noted that the illustrations provided in this embodiment only schematically illustrate the basic concept of the present invention. Therefore, only the components related to the present invention are shown in the drawings, rather than being drawn according to the number, shape, and size of the components in actual implementation. The types, quantities, and proportions of the components in actual implementation can be arbitrarily changed, and the component layout type may also be more complex.

[0056] For systems composed of multiple drive circuits and power devices, it is necessary to detect the output drive current. Taking a three-phase motor drive system as an example, as Figure 2 shown, drive circuits 1a, 1b, and 1c respectively generate a drive signal. Each drive circuit includes a drive control circuit, a comparator, and a power device; by detecting the voltage signal flowing through the sampling resistors (R11, R21, R31) and transmitting this signal to the input end of the comparator inside the drive, and comparing it with the set threshold voltage REF. When the detected signal exceeds the threshold voltage REF, the output of the comparator flips, and the drive circuit shuts off the output to prevent the current from rising further, thereby playing a protective role.

[0057] However, the current sampling signal often has noise signals such as clutter. Therefore, a three-way filter circuit composed of filter resistors (R12, R22, R32) and filter capacitors (C11, C21, C31) is used to filter the three-way sampling signals. Generally, these three-way filter circuits are set outside the chip (which is very easy to implement). If they are to be integrated into the chip, it will require a large chip area and increase costs. It is also possible to add a blanking circuit in the circuit to shield the signal at the moment when the power transistor is turned on, and then sample the current signal after the blanking time ends; but this structure is more suitable for a one-way control system and will be limited for a multi-way system (such as a three-phase motor system) because there are cases where the turn-on times of two paths are close in a multi-way system, and it is impossible to accurately implement blanking protection for each drive.

[0058] For the above reasons, the present invention proposes a filter unit, a signal detection circuit, a drive chip, and a drive control system. The filter unit can be very conveniently integrated into the chip, thereby simplifying the peripheral circuit, realizing function integration, and improving the performance-price ratio of the circuit.

[0059] Embodiment 1

[0060] As Figure 3 shown, this embodiment provides a filter unit 11 for filtering the sampled voltage. The filter unit 11 includes:

[0061] A first current source I1, a first P-type transistor Q1, and a capacitor C1.

[0062] As Figure 3As shown, one end of the first P-type transistor Q1 is connected to the first reference ground GND1, and the other end is connected to the upper plate of the capacitor C1. The control terminal receives the sampling voltage Vs. Wherein, as the sampling voltage Vs increases, the current flowing through the first P-type transistor Q1 continuously decreases, and the voltage on the capacitor C1 also gradually increases. When the rising speed of the sampling voltage Vs is greater than a preset value, the current flowing through the first P-type transistor Q1 is zero. One end of the first current source I1 is connected to the power supply voltage VCC, and the other end is connected to the upper plate of the capacitor C1. The upper plate of the capacitor C1 outputs a filtered signal, and the lower plate is connected to the first reference ground GND1.

[0063] Specifically, in this embodiment, the first P-type transistor Q1 is a PNP triode, denoted as the first PNP triode. The collector of the first PNP triode is connected to the first reference ground GND1, the emitter is connected to the upper plate of the capacitor C1, and the base is connected to the sampling voltage Vs. In actual use, as the sampling voltage Vs increases, the voltage on the capacitor C1 gradually rises, and after the sampling voltage Vs reaches the reference value (VREF) (greater than the reference value), the devices that turn off the output are applicable to the first P-type transistor, including but not limited to PMOS transistors, and this embodiment is not restrictive. It should be noted that in this embodiment, the filtering unit 1 is used to implement low-pass filtering, and the preset value corresponds to the filtering upper limit, that is, the values exceeding the filtering upper limit are filtered out. The preset value can be set as needed and will not be elaborated here one by one.

[0064] Specifically, as the sampling voltage Vs increases, the base voltage of the first P-type transistor Q1 rises. Since the voltage difference between the emitter and the base of the first P-type transistor Q1 decreases, the current of the first current source I1 charges the capacitor C1, and the voltage Vc1 on the capacitor C1 gradually rises. The rising speed of the voltage Vc1 on the capacitor C1 will be limited by the charging speed of the first current source I1 to the capacitor C1. The maximum rising speed Vv of the voltage Vc1 satisfies the following relationship: Vv = dVc1 / dt = I1 / C1. Therefore, ΔVc1 = I1*Δt / C1. When the rising speed of the sampling voltage Vcs is less than Vv, the voltage Vc1 on the capacitor C1 rises linearly and synchronously with the sampling voltage Vs. When the rising speed of the sampling voltage Vs is greater than Vv, the voltage Vc1 on the capacitor C1 does not rise synchronously with the sampling voltage Vs, and its rising rate is I1 / C1. That is, the first P-type transistor Q1 plays the role of level shift. The voltage Vc1 on the capacitor C1 will rise with the rise of the sampling voltage Vs, but the rising speed will be limited by the charging speed. When the sampling voltage Vs drops, the voltage Vc1 on the capacitor C1 will quickly drop following the sampling voltage Vs. Therefore, the influence of abnormal spike noise can be effectively shielded. In actual use, an appropriate dVc1 / dt can be selected according to needs. For normal current changes, it can follow the changes, while for the pulse noise of switch mutation products, the circuit does not respond or responds slowly, so as to filter out abnormal voltage signals.

[0065] As an example, assume that the sampling voltage Vs is the voltage of the motor current passing through the sampling resistor, the equivalent inductance of the motor coil is L, and the power voltage is Vp. After the second power transistor in the drive module is turned on, the change of the inductor current can be approximated as: ΔI L = Vp / L*Δt. Therefore, the corresponding sampling voltage Vs satisfies: ΔVs = Vp / L*Rs*Δt, where Rs is the resistance value of the sampling resistor. Let ΔVc1 = ΔVs, then: I1*Δt / C1 = Vp / L*Rs*Δt, that is, I1 / C1 = Vp*Rs / L. When the conditions are fixed, Vp*Rs / L can be regarded as a constant. Since the value of I1 can be set very small, the capacitance value of the capacitor C1 is also greatly reduced. The area occupied by the filtering unit 11 is small, which is convenient for integration.

[0066] Embodiment 2

[0067] As Figure 4 shown, this embodiment provides a signal detection circuit 1, and the signal detection circuit 1 includes: a comparator 12 and the filtering unit 11.

[0068] As Figure 4As shown, the filtering unit 11 receives the sampled voltage Vs and filters the sampled voltage Vs. As the sampled voltage Vs increases, the first current source I1 charges the capacitor C1, and the voltage across the capacitor C1 also gradually rises; when the sampled voltage Vs drops, the voltage across the capacitor C1 can drop rapidly synchronously; when the rising speed of the sampled voltage Vs is greater than a preset value, the voltage across the capacitor C1 will also rise gradually according to a set value and approach the trigger value of the comparator 12; the circuit structure and working principle of the filtering unit 11 are as described above and will not be elaborated here one by one.

[0069] As Figure 4 shown, the first inverting input terminal of the comparator 12 is connected to the output terminal of the filtering unit 11, the non-inverting input terminal receives the reference voltage Vref, and outputs a detection signal VOUT.

[0070] Specifically, in this embodiment, the signal detection circuit 1 is used for overcurrent detection. When the voltage Vc1 across the capacitor C1 is less than the reference voltage Vref, the comparator 12 outputs a high level (indicating no overcurrent); when the voltage Vc1 across the capacitor C1 is greater than or equal to the reference voltage Vref, the comparator 12 outputs a low level (indicating overcurrent); subsequent circuits make corresponding actions based on the high and low levels of the detection signal VOUT. Any comparator structure that can implement the comparison function is applicable to the present invention.

[0071] Specifically, in this embodiment, the reference voltage Vref is provided by the third current source I3 and the third P-type transistor Q3; one end of the third current source I3 is connected to the power supply voltage VCC, and the other end is connected to the first reference ground GND1 via the third P-type transistor Q3; the connection node of the third current source I3 and the third P-type transistor Q3 outputs the reference voltage Vref. As an example, the third P-type transistor Q3 is implemented by a PNP triode, denoted as the third PNP triode. The emitter of the third PNP triode is connected to the third current source I3, the collector is connected to the first reference ground GND1, and the base is connected to the preset signal VREF; in actual use, the third P-type transistor Q3 can also be implemented by other transistors such as a PMOS transistor as long as it can provide the reference voltage.

[0072] As another implementation manner of the present invention, as Figure 5As shown, the signal detection circuit 1 further includes a second current source I2 and a second P-type transistor Q2. One end of the second current source I2 is connected to the power supply voltage VCC, and the other end is connected to the first reference ground GND1 via the second P-type transistor Q2; the control end of the second P-type transistor Q2 receives the filtered signal Vs_f of the sampling voltage provided externally; the connection node (output voltage Vc2) of the second current source I2 and the second P-type transistor Q2 is connected to the second inverting input end of the comparator 12. In this example, the second P-type transistor Q2 is a PNP triode, denoted as the second PNP triode, the collector of the second PNP triode is connected to the first reference ground GND1, the emitter is connected to the second current source I2, and the collector receives the filtered signal Vs_f of the sampling voltage; in actual use, the second P-type transistor Q2 can also be implemented by a PMOS transistor. The second current source I2 and the second P-type transistor Q2 convert the filtered signal Vs_f of the sampling voltage into a signal recognizable by the comparator 12. When the voltage Vc2 after conversion of the filtered signal Vs_f of the sampling voltage is greater than or equal to the reference voltage Vref, the comparator 12 also outputs a detection signal indicating overcurrent; the present invention realizes double protection through two filtered signals (Vs_f and Vs), improving the reliability of current abnormal protection. Further, in order to adapt to the filtering unit 11, the second current source I2 and the second P-type transistor Q2, in this embodiment, the input stage of the comparator 12 is set as an NMOS transistor. As Figure 6 shown, as an example, the comparator 12 includes a first NMOS transistor N1, a second NMOS transistor N2, a third NMOS transistor N3, a first PMOS transistor P1, a second PMOS transistor P2, and a third PMOS transistor P3; the sources of the first NMOS transistor N1, the second NMOS transistor N2, and the third NMOS transistor N3 are connected to the first reference ground GND1 via a current source; the gate of the first NMOS transistor N1 serves as the first inverting input end Vin1, the gate of the second NMOS transistor N2 serves as the second inverting input end Vin2, and the gate of the third NMOS transistor N3 serves as the non-inverting input end Vip; the drains of the first NMOS transistor N1 and the second NMOS transistor N2 are connected to the drain of the first PMOS transistor P1; the gate and the drain of the first PMOS transistor P1 are connected, and the source is connected to the power supply voltage VCC; the source of the second PMOS transistor P2 is connected to the power supply voltage VCC, the gate is connected to the gate of the first PMOS transistor P1, and the drain is connected to the drain of the third NMOS transistor N3; the source of the third PMOS transistor P3 is connected to the power supply voltage VCC, the gate is connected to the drain of the second PMOS transistor P2, and the source outputs a comparison result and is connected to the first reference ground GND1 via a current source.

[0073] The signal detection circuit 1 of the present invention can filter and detect the sampled voltage, and also perform double detection on two filtered signals to improve safety.

[0074] Embodiment 3

[0075] As Figure 7 shown, this embodiment provides a driving chip, which at least includes: the signal detection circuit 1, a driving control circuit 2, a first power transistor M1, and a second power transistor M2.

[0076] As Figure 7 shown, the signal detection circuit 1 is connected to the DC negative terminal PGND, obtains the current sampling voltage from the DC negative terminal PGND, and performs filtering and overcurrent detection.

[0077] Specifically, the signal detection circuit 1 is connected to the DC negative terminal PGND (i.e., the source of the second power transistor M2) by pulling a wire inside the chip to obtain the sampling voltage Vs (the external sampling resistor is connected to the DC negative terminal PGND), without adding new chip pins, which is easy to implement and has low cost. For the specific structure and working principle of the signal detection circuit 1, refer to the above, and details will not be repeated here.

[0078] As Figure 7 shown, the driving control circuit 2 is connected to the output terminal of the signal detection circuit 1, and is connected to the high-side driving input terminal INH and the low-side driving input terminal INL, and generates a high-side driving output signal HO and a low-side driving output signal LO.

[0079] Specifically, the driving control circuit 2 generates the high-side driving output signal HO and the low-side driving output signal LO based on the signals provided by the high-side driving input terminal INH and the low-side driving input terminal INL; at the same time, when the signal detection circuit 1 detects overcurrent, as an example, the high-side driving output signal HO and the low-side driving output signal LO are configured to be turned off to prevent the current from rising further and achieve a protection effect.

[0080] As Figure 7 shown, one end of the first power transistor M1 is connected to the DC positive terminal P, the other end is connected to the high-side floating ground terminal VS, and the control terminal receives the high-side driving output signal HO. In this example, the first power transistor M1 is an NMOS transistor, the drain is connected to the DC positive terminal P, the source is connected to the high-side floating ground terminal VS, and the gate is connected to the high-side driving output signal HO.

[0081] As Figure 7As shown, one end of the second power transistor M2 is connected to the high-side floating ground terminal VS, the other end is connected to the DC negative terminal PGND, and the control terminal receives the low-side drive output signal LO. In this example, the second power transistor M2 is an NMOS transistor, the drain is connected to the high-side floating ground terminal VS, the source is connected to the DC negative terminal PGND, and the gate is connected to the low-side drive output signal LO.

[0082] As Figure 7 shown, when the signal detection circuit 1 includes the second current source I2 and the second P-type transistor Q2, the control terminal of the second P-type transistor Q2 is connected to the sampling terminal CSC.

[0083] As Figure 7 shown, in this embodiment, the first reference ground GND1 is connected to the ground terminal GND, the filtering unit 1 and the drive control circuit 2 use the same power supply voltage VCC, and the power supply voltage VCC is connected to the power supply terminal VCC. As an example, the drive control circuit 2 is also connected to the high-side floating power supply terminal VB.

[0084] It should be noted that the drive chip of the present invention may also include multiple drive circuits. As an example, each drive circuit includes a signal detection circuit 1, a drive control circuit 2, a first power transistor M1, and a second power transistor M2; as another example, at least one of the multiple drive circuits includes a signal detection circuit 1, a drive control circuit 2, a first power transistor M1, and a second power transistor M2, and the other drive circuits only include a drive control circuit 2, a first power transistor M1, and a second power transistor M2; details are not described one by one here.

[0085] Embodiment 4

[0086] As Figure 8 shown, this embodiment provides a drive control system, and the drive control system includes:

[0087] The drive chip, the sampling module 2, the microcontroller unit 3, and the device to be driven 4.

[0088] As Figure 8 shown, one end of the sampling module 2 is connected to the DC negative terminal of the drive chip, and the other end is connected to the second reference ground GND2, and is used to sample the current of the device to be driven 4. The microcontroller unit 3 provides a high-side drive input signal and a low-side drive input signal for the drive chip. The device to be driven 4 is connected to the high-side floating ground terminal of the drive chip and operates based on the drive control of the drive chip.

[0089] Specifically, in this example, the device 4 to be driven is a three-phase motor, and the driving chip provides three driving signals. The first and second paths each include a driving control circuit 2, a first power transistor M1, and a second power transistor M2. The third path further includes the signal detection circuit 1 of the present invention. In actual use, the signal detection circuit 1 of the present invention can be provided in each path. As an example, the sampling module 2 includes three sampling resistors, denoted as Ra, Rb, and Rc respectively. One end of each sampling resistor is connected to the DC negative terminal of the corresponding path driving circuit, and the other end is connected to the second reference ground GND2. The potential of the second reference ground GND2 is equal to or different from that of the first reference ground GND1, which is configured according to actual needs.

[0090] As Figure 8 shown, the drive control system further includes a DC power supply 6 for supplying power to each power transistor. One end of the DC power supply 6 is connected to each DC positive terminal P of the driving chip, and the other end is connected to the second reference ground GND2. In this example, the DC power supply 6 includes a power supply and a capacitor connected in parallel with the power supply. Any structure capable of providing a DC power supply is applicable to the present invention.

[0091] As Figure 8 shown, when the driving chip is provided with a sampling terminal CSC, the drive control system further includes a filtering module 5. The filtering module 5 is connected to the sampling module, filters the sampling voltage, and provides it to the sampling terminal CSC of the driving chip.

[0092] Specifically, in this embodiment, the filtering module 5 includes a filtering resistor R and a filtering capacitor C2. One end of the filtering resistor receives the sampling voltage, and the other end is connected to the sampling terminal CSC. One end of the filtering capacitor C2 is connected to the sampling terminal CSC, and the other end is connected to the second reference ground GND2.

[0093] It should be noted that the drive control system is also applicable to the switching power supply field and other fields where sampling signals have noise, not limited to motors, and will not be elaborated here one by one.

[0094] In summary, the present invention provides a filtering unit, a signal detection circuit, a driving chip and a driving control system, including: a first current source, a first P-type transistor and a capacitor; one end of the first P-type transistor is connected to a first reference ground, the other end is connected to the upper plate of the capacitor, and the control end receives the sampling voltage; wherein, as the sampling voltage increases, the voltage on the capacitor also gradually rises; when the rising speed of the sampling voltage is greater than a preset value, the current flowing through the first P-type transistor is zero; one end of the first current source is connected to the power supply voltage, and the other end is connected to the upper plate of the capacitor; the upper plate of the capacitor outputs the filtered signal, and the lower plate is connected to the first reference ground. The filtering unit, signal detection circuit, driving chip and driving control system of the present invention adopt a built-in filtering unit structure, which can effectively filter out high-frequency clutter in the sampling voltage, realize integrated detection, simplify the peripheral circuit, and improve the cost performance; it can also retain the conventional filtering method and form a double insurance with the internal filtering method to enhance the protection against current anomalies; the structure is simple and easy to integrate, and is very suitable for signal sampling and detection. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial utilization value.

[0095] The above embodiments are only illustrative of the principles and effects of the present invention, and are not used to limit the present invention. Any person familiar with this technology can modify or change the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by those with ordinary knowledge in the technical field without departing from the spirit and technical ideas disclosed by the present invention should still be covered by the claims of the present invention.

Claims

1. A filtering unit for filtering a sampled voltage, characterized in that: The filtering unit at least comprises: A first current source, a first P-type transistor and a capacitor; One end of the first P-type transistor is connected to the first reference ground, the other end is connected to the upper plate of the capacitor, and the control end receives the sampling voltage; wherein, as the sampling voltage increases, the voltage on the capacitor also gradually increases; when the sampling voltage rises faster than a preset value, the current flowing through the first P-type transistor is zero; One end of the first current source is connected to the power supply voltage, and the other end is connected to the upper plate of the capacitor; The upper plate of the capacitor outputs the filtered signal, and the lower plate is connected to the first reference ground.

2. The filter unit according to claim 1, characterized in that: The first P-type transistor is a PNP transistor or a PMOS transistor.

3. A signal detection circuit, characterized in that: The signal detection circuit at least comprises: Comparator and filter unit; The filtering unit is the filtering unit according to any one of claims 1 to 2, receiving a sampled voltage and filtering the sampled voltage; The first inverting input terminal of the comparator is connected to the output terminal of the filter unit, and the non-inverting input terminal receives a reference voltage and outputs a detection signal.

4. The signal detection circuit according to claim 3, characterized in that: The signal detection circuit also includes a second current source and a second P-type transistor; one end of the second current source is connected to the power supply voltage, and the other end is connected to the first reference ground via the second P-type transistor; the control end of the second P-type transistor receives a filtered signal of the sampling voltage provided externally; the connection node between the second current source and the second P-type transistor is connected to the second inverting input end of the comparator.

5. The signal detection circuit according to claim 4, characterized in that: The second P-type transistor is a PNP transistor or a PMOS transistor.

6. The signal detection circuit according to any one of claims 3 to 5, characterized in that: The input stage of the comparator is an N-type transistor.

7. A driver chip, characterized in that: The driving chip at least comprises: a driving control circuit, a first power tube, a second power tube and a signal detection circuit as claimed in any one of claims 3 to 6; The signal detection circuit is connected to the DC negative terminal, obtains the current sampling voltage from the DC negative terminal, and performs filtering and overcurrent detection; The drive control circuit is connected to the output end of the signal detection circuit and is connected to the high-side drive input end and the low-side drive input end to generate a high-side drive output signal and a low-side drive output signal; One end of the first power tube is connected to the DC positive terminal, the other end is connected to the high-side floating terminal, and the control end receives the high-side drive output signal; One end of the second power tube is connected to the high-side floating end, the other end is connected to the DC negative end, and the control end receives the low-side drive output signal.

8. The driver chip according to claim 7, characterized in that: When the signal detection circuit includes the second current source and the second P-type transistor, the control end of the second P-type transistor is connected to the sampling end.

9. A drive control system, characterized in that: The drive control system at least comprises: A sampling module, a micro-control unit, a device to be driven, and a driving chip as claimed in claim 7 or 8; One end of the sampling module is connected to the DC negative terminal of the driving chip, and the other end is connected to the second reference ground, and is used to sample the current of the device to be driven; The micro-control unit provides a high-side driving input signal and a low-side driving input signal for the driving chip; The device to be driven is connected to the high-side floating terminal of the driving chip and operates based on the driving control of the driving chip.

10. The driving control system according to claim 9, characterized in that: When the driving chip is provided with a sampling terminal, the driving control system further comprises a filtering module, which is connected to the sampling module, filters the sampling voltage and provides the filtering voltage to the sampling terminal of the driving chip.

Images