Capacitive pressure sensor, manufacturing method thereof and electronic device

Abstract

A capacitive pressure sensor and a manufacturing method thereof, and an electronic device, the method comprising: providing a device substrate comprising a first substrate, a capacitance layer formed on a first surface of the first substrate, a first region and a second region, the capacitance layer comprising a first capacitance structure and a second capacitance structure, the first capacitance structure being located in the first region, the second capacitance structure being located in the second region; comprising a fixed electrode and a movable electrode, a first dielectric layer is arranged between the fixed electrode and the movable electrode, the second capacitor structure is located in the second area and comprises a first electrode and a second electrode, a second dielectric layer is arranged between the first electrode and the second electrode, and release holes are formed in the fixed electrode; part of the first substrate in the first area is etched to form a first cavity, and the fixed electrode is exposed out of the first cavity; etching and removing part of the first dielectric layer by using an etching agent through the release hole and the first cavity so as to form a second cavity between the fixed electrode and the movable electrode; a second substrate is provided, and the second surface of the first substrate is bonded to the surface of the second substrate to seal the first cavity.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and more specifically to a capacitive pressure sensor, a manufacturing method thereof, and an electronic device. Background Art

[0002] Micro-Electro-Mechanical System (MEMS) technology is a high-tech that has developed rapidly in recent years. It uses advanced semiconductor manufacturing processes to achieve mass production of sensors, actuators and other devices. Compared with corresponding traditional devices, MEMS devices have very obvious advantages in size, power consumption, weight and price. In the market, the main application examples of MEMS devices include pressure sensors, accelerometers and silicon microphones.

[0003] At present, most commercial pressure sensors are based on the piezoresistive effect, but they have disadvantages such as low sensitivity, severe temperature drift, and high power consumption. Compared with piezoresistive pressure sensors, capacitive pressure sensors are more suitable for the development of high-precision pressure sensors due to their advantages such as high sensitivity, low power consumption, and good temperature characteristics. At present, the main capacitive pressure sensors are composed of flat plate capacitors. When external pressure acts on the movable plate, the distance between the two plates changes, thereby changing the capacitance value. ASIC then obtains the signal for amplification and post-processing, but it has high output impedance and weak load capacity. Therefore, compared with piezoresistive pressure sensors, it has higher requirements for the ASIC part. Summary of the invention

[0004] A series of simplified concepts are introduced in the Summary of the Invention section, which will be further described in detail in the Detailed Description of the Invention section. The Summary of the Invention section of this application does not mean to attempt to define the key features and essential technical features of the claimed technical solution, nor does it mean to attempt to determine the scope of protection of the claimed technical solution.

[0005] The present application provides a method for manufacturing a capacitive pressure sensor, comprising: providing a device substrate, the device substrate comprising a first substrate and a capacitor layer, the capacitor layer being formed on a first surface of the first substrate, the capacitor layer comprising a first capacitor structure and a second capacitor structure, the device substrate comprising a first region and a second region, the first capacitor structure being located in the first region, the first capacitor structure comprising a fixed electrode and a movable electrode, a first dielectric layer being arranged between the fixed electrode and the movable electrode, the second capacitor structure being located in the second region, the second capacitor structure comprising a first electrode and a second electrode, a second dielectric layer being arranged between the first electrode and the second electrode, wherein a release hole is formed in the fixed electrode; etching a portion of the first substrate in the first region to form a first cavity, the first cavity exposing the fixed electrode; etching and removing a portion of the first dielectric layer by using an etchant through the release hole and the first cavity to form a second cavity between the fixed electrode and the movable electrode; providing a second substrate, and bonding the second surface of the first substrate to the surface of the second substrate to seal the first cavity.

[0006] Furthermore, the method for forming the capacitor layer includes: forming a first electrode layer on the first substrate, the first electrode layer including the fixed electrode and the first electrode, wherein the fixed electrode is insulated from the first electrode; forming a dielectric layer on the first electrode layer, the dielectric layer including the first dielectric layer and the second dielectric layer, wherein the first dielectric layer is located in the first region, the second dielectric layer is located in the second region, and the first dielectric layer is isolated from the second dielectric layer; forming a second electrode layer on the dielectric layer, the second electrode layer covers the second dielectric layer and is connected to the first electrode layer.

[0007] Furthermore, the manufacturing method further includes: before forming the capacitor layer, forming a first sacrificial layer on the first surface of the first substrate.

[0008] Further, the method for forming the first electrode layer includes: forming a first conductive material layer on the first surface of the first substrate; etching the first conductive material layer to form the fixed electrode and the first electrode, wherein the fixed electrode is provided with a fixed electrode connecting terminal and a fixed electrode lead-out terminal, and the first electrode is provided with a first electrode lead-out terminal; forming a first passivation layer on the first conductive material layer, the first passivation layer covering the fixed electrode and the first electrode; etching the first passivation layer and the first conductive material layer to form the release hole and expose the fixed electrode lead-out terminal, the fixed electrode connecting terminal and the first electrode lead-out terminal.

[0009] Furthermore, the method for forming the first dielectric layer and the second dielectric layer includes: forming a second sacrificial layer on the first passivation layer, wherein the second sacrificial layer fills the release hole; etching and removing at least a portion of the second sacrificial layer to form the first dielectric layer and the second dielectric layer, and exposing the fixed electrode connection terminal and the first electrode lead terminal.

[0010] Furthermore, the method for forming the second electrode layer includes: forming a second conductive material layer on the first dielectric layer and the second dielectric layer; etching the second conductive material layer to form the movable electrode and the second electrode, wherein the movable electrode is insulated from the second electrode.

[0011] Further, the movable electrode covers the surface of the first dielectric layer, the side wall of the first dielectric layer and a portion of the surface of the first passivation layer, and the second electrode is formed to cover the surface of the second dielectric layer, the side wall of the second dielectric layer, a portion of the surface of the first passivation layer and the fixed electrode within the fixed electrode connection end.

[0012] Furthermore, an interconnection structure is formed between the first capacitor structure and the second capacitor structure.

[0013] Furthermore, before forming the first cavity, the manufacturing method further includes: performing a thinning process on the first substrate from the second surface of the first substrate.

[0014] The present application also provides a capacitive pressure sensor, comprising: a first substrate, comprising a first area and a second area; a first sensing capacitor, formed in the first area, the first sensing capacitor comprising a fixed electrode and a movable electrode, a first cavity being arranged between the fixed electrode and the movable electrode, a second cavity being further formed in the first area of ​​the first substrate, the second cavity being away from the movable electrode, and the second cavity being connected to the first cavity; a first reference capacitor, formed in the second area, the first reference capacitor comprising a first electrode and a second electrode, a second dielectric layer being filled between the first electrode and the second electrode of the first reference capacitor; and a second substrate, the second substrate being combined with a side of the first substrate where the first cavity is formed to seal the first cavity.

[0015] Exemplarily, the fixed electrode is provided with a fixed electrode connection terminal, and the fixed electrode connection terminal is electrically connected to the second electrode.

[0016] Exemplarily, the capacitive pressure sensor also includes: a second sensing capacitor and a second reference capacitor, the second sensing capacitor is located in the first area, the second reference capacitor is located in the second area, and the first sensing capacitor, the first reference capacitor, the second sensing capacitor and the second reference capacitor are electrically connected in a bridge manner.

[0017] The present application also provides an electronic device, comprising the aforementioned capacitive pressure sensor.

[0018] According to the capacitive pressure sensor and its manufacturing method and electronic device provided by the present application, the vacuum degree of the first capacitor structure is guaranteed by adopting a bonding method, and the performance drift or degradation caused by the stress caused by the packaging and the temperature and humidity differences is avoided, thereby ensuring the accuracy of the first capacitor structure as a sensing capacitor, so that the capacitive pressure sensor can measure absolute pressure and reduce the process difficulty of manufacturing the capacitive pressure sensor. The manufacturing method of the capacitive pressure sensor provided by the present application has a simple process, a great cost advantage, is suitable for large-scale mass production, and is compatible with the CMOS process. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The following drawings of the present application are used as a part of the present application for understanding the present application. The drawings show the embodiments of the present application and their descriptions, which are used to explain the principle of the present application.

[0020] In the attached figure:

[0021] Figure 1 and Figure 3 is a flow chart of a method for manufacturing a capacitive pressure sensor according to an embodiment of the present application;

[0022] Figure 2 and Figure 4A-Figure 9 A cross-sectional schematic diagram of a structure obtained by sequentially implementing a method for manufacturing a capacitive pressure sensor according to an embodiment of the present application;

[0023] Fig.10 is a circuit diagram according to an embodiment of the present application;

[0024] In the accompanying drawings,

[0025] First substrate 100, first sacrificial layer 110, first sensing capacitor 410, fixed electrode 411, fixed electrode lead-out terminal 411a, fixed electrode connection terminal 411b, movable electrode 412, movable electrode lead-out terminal 412a, first cavity 401, second cavity 402, first reference capacitor 420, first electrode 421, first electrode lead-out terminal 421a, second electrode 422, second electrode lead-out terminal 422a, second sensing capacitor 430, fixed electrode 431, movable electrode 432, second reference capacitor 440, first electrode 441, first electrode connection terminal 441b, second electrode 442, first passivation layer 140, first conductive material layer 130, second passivation layer 120, release hole 403, first dielectric layer 151, second dielectric layer 152, solder joint 170, device base 700, first region I, second region II, second substrate 200, capacitive pressure sensor 900. DETAILED DESCRIPTION

[0026] In the following description, a large number of specific details are provided to provide a more thorough understanding of the present application. However, it is apparent to those skilled in the art that the present application can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present application, some technical features well known in the art are not described.

[0027] It should be understood that the present application can be implemented in different forms and should not be construed as being limited to the embodiments presented herein. On the contrary, providing these embodiments will make the disclosure thorough and complete and fully convey the scope of the present application to those skilled in the art. In the accompanying drawings, the sizes and relative sizes of layers and regions may be exaggerated for clarity. The same reference numerals throughout represent the same elements.

[0028] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present application, the first element, component, region, layer or part discussed below can be represented as a second element, component, region, layer or part.

[0029] Spatially relative terms such as "under," "below," "below," "under," "above," "above," etc., may be used herein for ease of description to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that in addition to the orientations shown in the figures, the spatially relative terms are intended to include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, then the elements or features described as "under other elements" or "under" or "under" will be oriented as "on" the other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device may be oriented otherwise (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0030] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be limiting of the present application. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0031] In order to thoroughly understand the present application, detailed steps and detailed structures will be presented in the following description to illustrate the technical solution proposed by the present application. The preferred embodiments of the present application are described in detail below, but in addition to these detailed descriptions, the present application may also have other implementation methods.

[0032] In view of the above problems, the present application provides a method for manufacturing a capacitive pressure sensor, such as Figure 1 As shown, the following steps are included:

[0033] Step S11: providing a device substrate, the device substrate comprising a first substrate and a capacitor layer, the capacitor layer being formed on a first surface of the first substrate, the capacitor layer comprising a first capacitor structure and a second capacitor structure, the device substrate comprising a first region and a second region, the first capacitor structure being located in the first region, the first capacitor structure comprising a fixed electrode and a movable electrode, a first dielectric layer being disposed between the fixed electrode and the movable electrode, the second capacitor structure being located in the second region, the second capacitor structure comprising a first electrode and a second electrode, a second dielectric layer being disposed between the first electrode and the second electrode, wherein the fixed electrode is formed with a release hole;

[0034] Step S12: etching a portion of the first substrate in the first region to form a first cavity, wherein the first cavity exposes the fixed electrode;

[0035] Step S13: using an etchant to etch and remove a portion of the first dielectric layer through the release hole and the first cavity, so as to form a second cavity between the fixed electrode and the movable electrode;

[0036] Step S14: providing a second substrate, and bonding the second surface of the first substrate to the surface of the second substrate to seal the first cavity.

[0037] By way of example, one or more first capacitor structures may be manufactured in the first region at the same time, and one or more second capacitor structures may be manufactured in the second region at the same time.

[0038] Exemplarily, the first substrate may be any suitable semiconductor substrate, such as a silicon substrate, and may also be at least one of the following materials: Si, Ge, SiGe, SiC, SiGeC, InAs, GaAs, InP or other III / V compound semiconductors, including multilayer structures composed of these semiconductor materials, or silicon on insulator (SOI), stacked silicon on insulator (SSOI), stacked silicon germanium on insulator (S-SiGeOI), silicon germanium on insulator (SiGeOI) and germanium on insulator (GeOI), or may also be double-sided polished silicon wafers (DSP), or may be ceramic substrates such as aluminum oxide, quartz or glass substrates, etc. In some embodiments, the first substrate is selected to have a crystal orientation of <100> of single crystal silicon.

[0039] Furthermore, before forming the capacitor layer, that is, before executing step S11, a first sacrificial layer is formed on the first surface of the first substrate. Figure 2 As shown, a first sacrificial layer 110 is formed on the first substrate 100. Specifically, the first sacrificial layer 110 is formed on the substrate 100 by conventional semiconductor process methods such as thermal oxidation or low pressure chemical vapor deposition (LPCVD) or plasma enhanced chemical deposition (PECVD). Exemplarily, the material of the first sacrificial layer 110 includes silicon dioxide.

[0040] like Figure 3 As shown, the method for forming the capacitor layer on the first surface of the first substrate 100 includes:

[0041] Step S31: forming a first electrode layer on the first substrate, wherein the first electrode layer includes the fixed electrode and the first electrode, wherein the fixed electrode is insulated from the first electrode;

[0042] Step S32: forming a dielectric layer on the first electrode layer, the dielectric layer comprising the first dielectric layer and the second dielectric layer, wherein the first dielectric layer is located in the first region, the second dielectric layer is located in the second region, and the first dielectric layer is isolated from the second dielectric layer;

[0043] Step S33: forming a second electrode layer on the dielectric layer, wherein the second electrode layer covers the dielectric layer and is connected to the first electrode layer.

[0044] Below, reference FIG. 4A to FIG. 9 The manufacturing method of the capacitive pressure sensor of the present application is described in detail, wherein: FIG. 4A to FIG. 9 The cross-sectional schematic diagram is a structure obtained by sequentially implementing the method for manufacturing a capacitive pressure sensor according to an embodiment of the present application.

[0045] First, execute step S31, such as Figure 4A ( Figure 4A For along Figure 4B The dotted broken line section in Figure 4B As shown, a first substrate 100 is formed as shown in FIG. Figure 4A The first electrode layer includes a fixed electrode 411 and a first electrode 421, wherein the fixed electrode 411 is insulated from the first electrode 421, and the fixed electrode 411 and the first electrode 421 are provided with a release hole penetrating the electrode layer. In some embodiments, the first electrode layer includes a first passivation layer 140, a first conductive material layer 130, and a second passivation layer 120, wherein the second passivation layer 120 is formed on the first sacrificial layer 110, the first conductive material layer 130 is formed on the second passivation layer 120, and the first passivation layer 140 is formed on the first conductive layer. In other embodiments, the first electrode layer does not include the second passivation layer 120.

[0046] Specifically, in some embodiments, the method for forming the first electrode layer includes: forming a first conductive material layer 130 on the first surface of the first substrate 100; etching the first conductive material layer 130 to form a fixed electrode 411 and a first electrode 421, wherein the fixed electrode 411 is provided with a fixed electrode connecting terminal 411b and a fixed electrode lead-out terminal 411a, and the first electrode 421 is provided with a first electrode lead-out terminal 421a; forming a first passivation layer 140 on the first conductive material layer 130, the first passivation layer 140 covering the fixed electrode 411 and the first electrode 421; etching the first passivation layer 140 and the first conductive material layer 130 to form a release hole, and exposing the fixed electrode connecting terminal 411b, the fixed electrode lead-out terminal 411a and the first electrode lead-out terminal 421a.

[0047] Exemplarily, the second passivation layer 120 is deposited on the first sacrificial layer 110 by low pressure chemical vapor deposition (LPCVD) or plasma enhanced chemical deposition (PECVD) or other suitable semiconductor process methods, wherein the material of the passivation layer includes but is not limited to silicon nitride, silicon carbide, silicon oxynitride, etc. In other embodiments, the second passivation layer 120 may not be deposited on the first sacrificial layer 110, and those skilled in the art may choose whether to deposit the second passivation layer 120 according to actual needs, and the present application does not limit this.

[0048] Exemplarily, the first conductive material layer 130 is deposited on the second passivation layer 120 by low pressure chemical vapor deposition (LPCVD) or other suitable semiconductor process methods, and a patterned photoresist layer is formed on the first conductive material layer 130, and the first conductive material layer 130 is etched using the patterned photoresist layer as a mask to form the fixed electrode 411 and the first electrode 421, thereby defining the fixed electrode 411 and the first electrode 421, respectively. Figure 4B The effective areas of the first capacitor structure and the second capacitor structure on the first electrode layer are shown to serve as the lower electrode plate of the capacitive pressure sensor. Optionally, the material of the first conductive material layer 130 includes doped polysilicon.

[0049] Exemplarily, the first passivation layer 140 is deposited on the surface of the first conductive material layer 130 by low pressure chemical vapor deposition (LPCVD) or plasma enhanced chemical deposition (PECVD) or other suitable semiconductor process methods, and the first passivation layer 140 covers the fixed electrode 411 and the first electrode 421, wherein the material of the passivation layer includes but is not limited to silicon nitride, silicon carbide, silicon oxynitride, etc. Next, a photoresist layer (not shown) having a release hole pattern is formed on the first passivation layer 140. Exemplarily, the photoresist layer having the diaphragm hole pattern can be a photoresist formed by a spin coating process, and then formed by processes such as exposure, development, and cleaning. Then, the first passivation layer 140 and the first conductive material layer 130 are etched using the photoresist layer having the release hole pattern as a mask to form a Figure 4A The release hole 403 shown in FIG. 4 is formed, and the fixed electrode lead terminal 411 a , the fixed electrode connecting terminal 411 b and the first electrode lead terminal 421 a are exposed.

[0050] In some embodiments, Figure 4BAs shown, the first electrode layer includes: a fixed electrode 411, a fixed electrode 431, a first electrode 421 and a first electrode 441, wherein the fixed electrode 431 is electrically connected to the first electrode 421, the fixed electrode 411 is provided with a fixed electrode lead-out terminal 411a and a fixed electrode connecting terminal 411b, the first electrode 421 is provided with a first electrode lead-out terminal 421a, the first electrode 441 is provided with a first electrode connecting terminal 441b, the fixed electrode 411 is insulated from the fixed electrode 431, the first electrode 411 or the first electrode 431 respectively, the first electrode 421 and the first electrode 441 are insulated from each other, and the fixed electrode 431 and the first electrode 441 are insulated from each other.

[0051] Next, execute step S32, such as Figure 5 As shown, a dielectric layer is formed on the first electrode layer, and the dielectric layer includes a first dielectric layer 151 and a second dielectric layer 152 , wherein the first dielectric layer 151 is located in the first region I, the second dielectric layer 152 is located in the second region II, and the first dielectric layer 151 is isolated from the second dielectric layer 152 .

[0052] Specifically, in some embodiments, the method of forming the first dielectric layer 151 and the second dielectric layer 152 includes: forming a second sacrificial layer on the first passivation layer 140, wherein the second sacrificial layer fills the release hole 403; etching and removing at least a portion of the second sacrificial layer to form the first dielectric layer 151 and the second dielectric layer 152, and exposing the fixed electrode connection terminal 411b and the first electrode lead terminal 421a.

[0053] Exemplarily, a second sacrificial layer is deposited on the first passivation layer 140 by low pressure chemical vapor deposition (LPCVD) or plasma enhanced chemical deposition (PECVD) or other suitable semiconductor process methods, and the release hole 403 formed in the front-end process is filled. Then, a part of the second sacrificial layer is removed to prepare for the subsequent sidewall protection of the first dielectric layer 151 and the second dielectric layer 152 and the lead connection between the first capacitor structure and the second capacitor structure.

[0054] Next, execute step S33, such as Fig. 6A ( Fig. 6A along Figure 6B As shown in FIG. 1 , a second electrode layer is formed on the dielectric layer, and the second electrode layer covers the dielectric layer and is connected to the first electrode layer.

[0055] Specifically, in some embodiments, the method of forming the second electrode layer includes: forming a second conductive material layer on the first dielectric layer 151 and the second dielectric layer 152; etching the second conductive material layer to form the movable electrode and the second electrode, wherein the movable electrode is insulated from the second electrode.

[0056] Exemplarily, a second conductive material layer is deposited on the second sacrificial layer by low pressure chemical vapor deposition (LPCVD) or other suitable semiconductor process methods to form a movable upper electrode of the capacitive pressure sensor. Then, a patterned photoresist mask is formed on the second conductive material layer, and the second conductive material layer is etched through the photoresist mask to pattern the second conductive material layer and isolate the movable electrode from the second electrode. Optionally, the material of the second electrode layer includes doped polysilicon.

[0057] In some embodiments, Figure 6B As shown, the second electrode layer includes: a movable electrode 412, a movable electrode 432, a second electrode 422 and a second electrode 442, wherein the movable electrode 412 is electrically connected to the second electrode 442, the movable electrode 412 is provided with a movable electrode lead-out end 412a, the second electrode 422 is provided with a second electrode lead-out end 422a, the movable electrode 412 and the movable electrode 432 or the second electrode 422 are insulated from each other, the second electrode 442 and the movable electrode 432 or the second electrode 422 are insulated from each other, and the second electrode 422 and the movable electrode 432 are insulated from each other.

[0058] In some embodiments, the manufacturing method further includes: forming an interconnection structure between the first capacitor structure and the second capacitor structure. Specifically, the first capacitor structure includes a first sensing capacitor 410 and a second sensing capacitor 430, and the second capacitor structure includes a first reference capacitor 420 and a second reference capacitor 440. The first sensing capacitor 410 and the second sensing capacitor 430 are located in the first region I, and the first reference capacitor 420 and the second reference capacitor 440 are located in the second region II, and the first sensing capacitor 410 and the first reference capacitor 420 are electrically connected to the second sensing capacitor 430 and the second reference capacitor 440 in a bridge manner. Exemplarily, by sputtering or lift-off process, such as Fig. 8A and Figure 8B As shown, metal lead connections are formed between the fixed electrode 411 and the second electrode 422, and between the movable electrode 432 and the first electrode 441; and welding points 170 are formed on the fixed electrode lead-out terminal 411a, the movable electrode lead-out terminal 412a, the first electrode lead-out terminal 421a and the second electrode lead-out terminal 422a.

[0059] In some embodiments, before forming the first cavity 401, the manufacturing method further includes: performing a thinning process on the first substrate 100 from the second surface of the first substrate 100. Exemplarily, the thinning process is performed on the first substrate 100 from the second surface of the first substrate 100 by chemical mechanical polishing (CMP) or other suitable thinning processes to reduce the thickness of the first substrate 100 to a predetermined thickness.

[0060] Continue to refer Fig. 6A , Figure 6B and Figure 7 The movable electrode 412 covers the surface of the first dielectric layer 151, the sidewall of the first dielectric layer 151 and a portion of the surface of the first passivation layer 140, and the second electrode 422 is formed to cover the surface of the second dielectric layer 152, the sidewall of the second dielectric layer 152, a portion of the surface of the first passivation layer 140 and the fixed electrode 411 in the connection end of the fixed electrode 411.

[0061] At this point, the device substrate 700 required for performing step S11 is obtained. Figure 7 As shown, the device substrate 700 includes a first substrate 100 and a capacitor layer, the capacitor layer is formed on the first surface of the first substrate 100, the capacitor layer includes a first capacitor structure and a second capacitor structure, the device substrate 700 includes a first region I and a second region II, the first capacitor structure is located in the first region I, the first capacitor structure includes a fixed electrode 411 and a movable electrode 412, a first dielectric layer 151 is arranged between the fixed electrode 411 and the movable electrode 412, the second capacitor structure is located in the second region II, the second capacitor structure includes a first electrode 421 and a second electrode 422, a second dielectric layer 152 is arranged between the first electrode 421 and the second electrode 422, wherein the fixed electrode 411 is formed with a release hole 403.

[0062] Then, step S12 is performed to etch a portion of the first substrate 100 in the first region I to form a first cavity 401, wherein the first cavity 401 exposes the fixed electrode 411. Exemplarily, the portion of the first substrate 100 in the first region I is selectively etched by double-sided photolithography and deep trench etching.

[0063] Then, step S13 is performed, and a portion of the first dielectric layer 151 is removed by etching with an etchant through the release hole 403 and the first cavity 401, so as to form a second cavity 402 between the fixed electrode 411 and the movable electrode 412. For example, after the first cavity 401 is formed, a highly selective wet etching (hydrofluoric acid (HF) or BOE solution) or vapor etching (hydrofluoric acid vapor (Vapor HF) etc.) or other suitable semiconductor process technology is used to etch and release the first sacrificial layer 110 and the second sacrificial layer in the first region I, so as to form a second cavity 402 as shown in FIG. Fig. 8A ( Fig. 8A For along Figure 8B The second cavity 402 is shown in FIG. 1 .

[0064] Then, step S14 is performed to provide a second substrate 200, and the second surface of the first substrate 100 is bonded to the surface of the second substrate 200 to seal the first cavity 401. Fig. 9 As shown, the first substrate 100 is bonded to the second substrate 200 by a bonding process, so that the first cavity 401 and the second cavity 402 are in a vacuum state, and the first capacitor structure can better sense pressure. Exemplarily, the material of the second substrate 200 includes glass or silicon. In some embodiments, the pressure in the first cavity 401 and the second cavity 402 can be set as needed, for example, to a low pressure state or a vacuum state.

[0065] The key steps of the method for manufacturing the capacitive pressure sensor of the present application have been introduced so far. Multiple other process steps may be required for complete device preparation, which will not be described one by one here.

[0066] It is worth mentioning that the order of the above steps is only an example. Under the premise of no conflict, the order of the above steps can also be swapped or performed alternately.

[0067] According to the manufacturing method of the capacitive pressure sensor provided in the present application, the vacuum degree of the first capacitor structure is ensured by adopting a bonding method, thereby avoiding performance drift or degradation caused by stress caused by packaging and temperature and humidity differences, thereby ensuring the accuracy of the first capacitor structure as a sensing capacitor, so that the capacitive pressure sensor can measure absolute pressure, improve the performance of the capacitive pressure sensor, and reduce the process difficulty of manufacturing the capacitive pressure sensor. The manufacturing method of the capacitive pressure sensor provided in the present application is suitable for mass production and is compatible with CMOS technology.

[0068] The present application also provides a capacitive pressure sensor, such as Figure 4B , Fig. 8A , Fig. 9 and Fig.10As shown, the capacitive pressure sensor 900 includes: a first substrate 100, including a first region I and a second region II; a first sensing capacitor 410, formed in the first region I, the first sensing capacitor 410 includes a fixed electrode 411 and a movable electrode 412, a first cavity 401 is arranged between the fixed electrode 411 and the movable electrode 412, a second cavity 402 is further formed in the first region I of the first substrate 100, the second cavity 402 is away from the movable electrode 412, and the second cavity 402 is connected to the first cavity 401; a first reference capacitor, formed in the second region II, the first reference capacitor 420 includes a first electrode 421 and a second electrode 422, and a second dielectric layer 152 is filled between the first electrode 421 and the second electrode 422 of the first reference capacitor; a second substrate 200, the second substrate 200 is combined with a side of the first substrate 100 where the first cavity 401 is formed, so as to seal the first cavity 401. In some embodiments, the pressure in the first cavity 401 and the second cavity 402 can be set as needed, for example, to a low pressure state or a vacuum state.

[0069] Continue to refer Fig. 9 The fixed electrode 411 is provided with a fixed electrode connecting end 411 b , and the fixed electrode connecting end 411 b of the fixed electrode 411 is electrically connected to the second electrode 422 .

[0070] In some embodiments, reference Figure 4B , Fig. 8A and Figure 8B and Fig.10 , the capacitive pressure sensor 900 further includes: a second sensing capacitor 430 and a second reference capacitor 440, the second sensing capacitor 430 is located in the first region I, the second reference capacitor 440 is located in the second region II, the first sensing capacitor 410, the first reference capacitor 420, the second sensing capacitor 430 and the second reference capacitor 440 are electrically connected in a bridge manner and constitute a sensing unit of the capacitive pressure sensor 900. In some embodiments, the capacitive pressure sensor 900 includes a plurality of the sensing units, and the plurality of the sensing units are connected in series. Continue to refer to Figure 4B , Figure 8B and Fig.10The first sensing capacitor 410 includes a fixed electrode 411 and a movable electrode 412, the second sensing capacitor 430 includes a fixed electrode 431 and a movable electrode 432, the first reference capacitor 420 includes a first electrode 421 and a second electrode 422, and the second reference capacitor 440 includes a first electrode 441 and a second electrode 442, wherein the fixed electrode connecting terminal 411b is electrically connected to the second electrode 422, the first electrode connecting terminal 441b is electrically connected to the movable electrode 432, and the movable electrode lead-out terminal 412a, the fixed electrode lead-out terminal 411a, the first electrode lead-out terminal 421a and the second electrode lead-out terminal 422a are provided with welding points 170 for electrical connection with other circuits or devices.

[0071] According to the capacitive pressure sensor provided by the present application, the vacuum degree of the first capacitor structure can be guaranteed, and the performance drift or degradation caused by the stress caused by the packaging and the temperature and humidity differences can be avoided, thereby ensuring the accuracy of the first capacitor structure as a sensing capacitor, so that the capacitive pressure sensor can measure absolute pressure, and a second capacitor structure is set as a reference capacitor. When pressure is applied, the second capacitor structure remains unchanged as a reference capacitor, thereby improving the performance of the capacitive pressure sensor, so that the capacitive pressure sensor provided by the present application has high sensitivity, low power consumption, good temperature characteristics, and a large output signal, which is conducive to ASIC processing.

[0072] The present application also provides an electronic device, including the aforementioned capacitive pressure sensor. For example, the aforementioned capacitive pressure sensor can be applied to mobile devices such as smart phones as a touch screen technology. By setting multiple capacitive pressure sensors on the screen, the user's touch intensity and position on the screen can be detected, thereby realizing different functions and interaction methods; the aforementioned capacitive pressure sensor can also be applied to wearable devices such as smart watches as a method of heart rate monitoring. By setting a capacitive pressure sensor on the back of the watch, the user's pulse waveform can be measured, thereby calculating the user's health indicators such as heart rate and blood pressure; the aforementioned capacitive pressure sensor can also be applied to IoT devices such as smart homes as a component of a security system. By installing capacitive pressure sensors in locations such as doors and windows, external intrusion or prying can be detected, thereby triggering an alarm or notifying the user. The electronic device provided in the present application has better performance due to the use of the aforementioned capacitive pressure sensor.

[0073] The present application has been described through the above-mentioned embodiments, but it should be understood that the above-mentioned embodiments are only for the purpose of example and illustration, and are not intended to limit the present application to the scope of the described embodiments. In addition, it can be understood by those skilled in the art that the present application is not limited to the above-mentioned embodiments, and more variations and modifications can be made according to the teachings of the present application, and these variations and modifications all fall within the scope of protection claimed by the present application. The scope of protection of the present application is defined by the attached claims and their equivalents.

Claims

1. A method for manufacturing a capacitive pressure sensor, It is characterized in that include: A device substrate is provided, wherein the device substrate comprises a first substrate and a capacitor layer, wherein the capacitor layer is formed on a first surface of the first substrate, wherein the capacitor layer comprises a first capacitor structure and a second capacitor structure, wherein the device substrate comprises a first region and a second region, wherein the first capacitor structure is located in the first region, wherein the first capacitor structure comprises a fixed electrode and a movable electrode, wherein a first dielectric layer is disposed between the fixed electrode and the movable electrode, wherein the second capacitor is located in the second region, wherein the second capacitor structure comprises a first electrode and a second electrode, wherein a second dielectric layer is disposed between the first electrode and the second electrode, wherein a release hole is formed on the fixed electrode; Etching a portion of the first substrate in the first region to form a first cavity, wherein the first cavity exposes the fixed electrode; Using an etchant to etch and remove a portion of the first dielectric layer through the release hole and the first cavity, so as to form a second cavity between the fixed electrode and the movable electrode; A second substrate is provided, and a second surface of the first substrate is bonded to a surface of the second substrate to seal the first cavity.

2. The manufacturing method according to claim 1, It is characterized in that The method of forming the capacitor layer includes: forming a first electrode layer on the first substrate, wherein the first electrode layer includes the fixed electrode and the first electrode, wherein the fixed electrode is insulated from the first electrode; forming a dielectric layer on the first electrode layer, the dielectric layer comprising the first dielectric layer and the second dielectric layer, wherein the first dielectric layer is located in the first region, the second dielectric layer is located in the second region, and the first dielectric layer is isolated from the second dielectric layer; A second electrode layer is formed on the dielectric layer, wherein the second electrode layer covers the dielectric layer and is connected to the first electrode layer.

3. The manufacturing method according to claim 1, It is characterized in that The manufacturing method further includes: before forming the capacitor layer, forming a first sacrificial layer on the first surface of the first substrate.

4. The manufacturing method according to claim 2, It is characterized in that The method of forming the first electrode layer includes: forming a first conductive material layer on the first surface of the first substrate: Etching the first conductive material layer to form the fixed electrode and the first electrode, wherein the fixed electrode is provided with a fixed electrode connecting terminal and a fixed electrode lead-out terminal, and the first electrode is provided with a first electrode lead-out terminal; forming a first passivation layer on the first conductive material layer, wherein the first passivation layer covers the fixed electrode and the first electrode; The first passivation layer and the first conductive material layer are etched to form the release hole and expose the fixed electrode connection terminal, the fixed electrode lead-out terminal, and the first electrode lead-out terminal.

5. The manufacturing method according to claim 2, It is characterized in that The method of forming the first dielectric layer and the second dielectric layer includes: forming a second sacrificial layer on the first passivation layer, wherein the second sacrificial layer fills the release hole; At least a portion of the second sacrificial layer is removed by etching to form the first dielectric layer and the second dielectric layer, and to expose the fixed electrode connection terminal and the first electrode lead-out terminal.

6. The manufacturing method according to claim 2, It is characterized in that The method of forming the second electrode layer includes: forming a second conductive material layer on the first dielectric layer and the second dielectric layer; The second conductive material layer is etched to form the movable electrode and the second electrode, wherein the movable electrode is insulated from the second electrode.

7. The manufacturing method according to claim 6, It is characterized in that The movable electrode covers the surface of the first dielectric layer, the side wall of the first dielectric layer and a portion of the surface of the first passivation layer, and the second electrode is formed to cover the surface of the second dielectric layer, the side wall of the second dielectric layer, a portion of the surface of the first passivation layer and the fixed electrode in the fixed electrode connection end.

8. The manufacturing method according to claim 1, It is characterized in that The manufacturing method further includes: forming an interconnection structure between the first capacitor structure and the second capacitor structure.

9. The manufacturing method according to any one of claims 1 to 8, It is characterized in that Before forming the first cavity, the manufacturing method further includes: performing a thinning process on the first substrate from the second surface of the first substrate.

10. A capacitive pressure sensor, It is characterized in that include: A first substrate including a first region and a second region; a first inductive capacitor formed in the first region, the first inductive capacitor comprising a fixed electrode and a movable electrode, a first cavity being provided between the fixed electrode and the movable electrode, a second cavity being further formed in the first region of the first substrate, the second cavity being away from the movable electrode, and the second cavity being connected to the first cavity; A first reference capacitor is formed in the second region, the first reference capacitor comprises a first electrode and a second electrode, and a second dielectric layer is filled between the first electrode and the second electrode of the first reference capacitor; A second substrate is combined with a side of the first substrate where the first cavity is formed, so as to seal the first cavity.

11. The capacitive pressure sensor according to claim 10, It is characterized in that The fixed electrode is provided with a fixed electrode connection end, and the fixed electrode connection end is electrically connected to the second electrode.

12. The capacitive pressure sensor according to claim 11, It is characterized in that Also includes: a second sensing capacitor and a second reference capacitor, wherein the second sensing capacitor is located in the first region, the second reference capacitor is located in the second region, and the first sensing capacitor, the first reference capacitor, the second sensing capacitor and the second reference capacitor are electrically connected in a bridge manner.

13. An electronic device, It is characterized in that Comprising a capacitive pressure sensor as described in any one of claims 10-12.

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