Gold template construction method and device and wafer detection method and device

Abstract

The invention relates to the technical field of semiconductor detection, provides a wafer detection method, and particularly relates to a gold template construction method and device and a wafer detection method and device. According to the method, the non-abnormal features existing in the technological process are determined by screening the features of the unit wafers, the non-abnormal feature database is established to be combined with the precise template image to construct the gold template, and matching over-detection caused by the technological features in the wafer detection process is reduced. And the detection efficiency is improved and the detection cost is reduced while the detection accuracy is ensured.

Description

Technical Field

[0001] The present application relates to the field of semiconductor detection technology, and is a wafer detection method, and specifically relates to a golden template construction method and device, and a wafer detection method and device. Background Art

[0002] Template matching algorithm is a commonly used method in image processing, which is used to find the part in an image that best matches another template image. In the semiconductor defect detection scenario, it is often used for semiconductor surface defect detection. In order to improve the detection results, a golden die template image is often constructed when constructing the template image, that is, this template image is a "perfect image" and there are no defects in the image. Based on this template image, template matching is performed on the chip surface image to be detected.

[0003] However, in actual operation, because it involves the processing and molding of semiconductors, the surface may undergo processes such as grinding and oxidation, resulting in different oxidation structures on the chip surface. At this time, when using golden die for matching, normal oxidation characteristics will be identified as defects, resulting in a large number of over-inspections, increasing inspection costs and distorting inspection results. Summary of the invention

[0004] In order to solve the above problems, the present application provides a wafer inspection method, system, device and storage medium based on template matching, which can reduce the number of over-inspections during the template matching process by constructing a whitelist.

[0005] In order to achieve the above purpose, the technical solution adopted in the embodiment of the present application is as follows:

[0006] In a first aspect, a golden template construction method is provided, the method comprising: acquiring surface features in each collected unit chip image, screening out high-frequency features based on the distribution frequency of each surface feature, constructing a non-abnormal feature database based on the high-frequency features, and configuring a current process label in the non-abnormal feature database; combining the non-abnormal feature database with a precision template image to obtain a chip golden template related to a current process scenario and current process features; the precision template image is an image of a standard chip.

[0007] In some specific implementations, the acquiring of features in each unit chip image includes: segmenting the unit chip image to obtain a plurality of foreground images; and calculating an energy value corresponding to each of the foreground images, wherein the energy value is used to characterize the surface features.

[0008] In some specific implementations, the high-frequency features are screened out based on the distribution frequency of each surface feature, including: statistically analyzing the distribution of multiple energy values, taking the surface features corresponding to discrete energy values ​​as low-frequency features, and eliminating the corresponding surface features to obtain screened high-frequency features.

[0009] In some specific implementations, the method further includes: acquiring low-frequency features in a plurality of the unit chip images as an initial abnormal feature group, and determining the proportion of each of the low-frequency features in the initial abnormal feature group, taking low-frequency features whose proportion is less than a preset proportion threshold as target low-frequency features, and eliminating the target low-frequency features to obtain screened high-frequency features.

[0010] In some specific implementations, the unit chip image is segmented to obtain multiple foreground images, including: obtaining the pixel ratio of the number of pixels corresponding to each gray value in the unit chip image to the total number of pixels; performing initial binary segmentation on the unit chip image based on an initial threshold, and obtaining an initial foreground pixel ratio, an initial background pixel ratio and a corresponding average gray value based on each pixel ratio; obtaining a target threshold based on the initial foreground pixel ratio, the initial background pixel ratio and the corresponding average gray value and according to the maximum inter-class variance; and performing global binarization processing on the unit chip image based on the target threshold to achieve segmentation of the unit chip image.

[0011] In some specific implementations, it is characterized in that the calculation of the energy value corresponding to each of the foreground images includes: obtaining the grayscale co-occurrence matrix of each of the foreground images, and determining the sum of squares of elements in the grayscale co-occurrence matrix, wherein the sum of squares is the energy value corresponding to the foreground image.

[0012] In a second aspect, a golden template construction device is provided, the device comprising: a database construction unit, for surface features in each unit chip image, screening out high-frequency features based on the distribution frequency of each surface feature, constructing a non-abnormal feature database based on the high-frequency features, and configuring a current process label in the non-abnormal feature database; a template construction unit, for combining the non-abnormal feature database with a precision template image to obtain a chip golden template related to a current process scenario and current process features; the precision template image is an image of a standard chip.

[0013] In a third aspect, a wafer detection method based on template matching is provided, the method comprising: retrieving a golden template corresponding to a unit wafer to be detected based on a process label; constructing the golden template based on any of the methods described above; matching a collected real-time image of each unit wafer with a precise template image, and in the matching process matching a plurality of the non-abnormal feature data with the extracted features for similarity, eliminating the non-abnormal features, and obtaining abnormal features.

[0014] In some specific implementations, a plurality of the non-abnormal feature data are matched with the extracted features for similarity, including: calculating an average Euclidean distance between the extracted features and the non-abnormal features, wherein the average Euclidean distance is used to characterize the similarity between the feature and the plurality of the non-abnormal feature data.

[0015] In a fourth aspect, a wafer inspection device based on template matching is provided, the device comprising: a template retrieval unit, used to retrieve the golden template corresponding to the unit wafer to be inspected through a process label; a matching unit, used to match the collected real-time image of each unit wafer with the precision template image, and in the matching process, perform similarity matching on a plurality of the non-abnormal feature data and the extracted features, eliminate the non-abnormal features, and obtain the abnormal features.

[0016] In the technical solution provided by the embodiment of the present application, the non-abnormal features existing in the process are determined by screening the features of the unit wafer, and a non-abnormal feature database is established to combine with the precision template image to construct a golden template, thereby reducing the mismatching caused by the process features during the wafer inspection process. While ensuring the accuracy of the inspection, the inspection efficiency is improved and the inspection cost is reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0018] The methods, systems and / or programs in the accompanying drawings will be further described according to exemplary embodiments. These exemplary embodiments will be described in detail with reference to the drawings. These exemplary embodiments are non-limiting exemplary embodiments, wherein example numbers represent similar mechanisms in the various views of the accompanying drawings.

[0019] Figure 1 It is a schematic diagram of a unit chip image.

[0020] Figure 2It is a schematic diagram of the process of constructing a golden template provided in an embodiment of the present application.

[0021] Figure 3 It is a schematic diagram of the structure of the golden template construction device provided in the embodiment of the present application.

[0022] Figure 4 It is a schematic flow chart of the wafer detection method provided in an embodiment of the present application.

[0023] Figure 5 It is a schematic diagram of the structure of a wafer detection device provided in an embodiment of the present application.

[0024] Figure 6 It is a schematic diagram of the server structure provided in an embodiment of the present application. DETAILED DESCRIPTION

[0025] In order to better understand the above technical scheme, the technical scheme of the present application is described in detail below through the accompanying drawings and specific embodiments. It should be understood that the embodiments of the present application and the specific features in the embodiments are detailed descriptions of the technical scheme of the present application, rather than limitations on the technical scheme of the present application. In the absence of conflict, the embodiments of the present application and the technical features in the embodiments can be combined with each other.

[0026] In the following detailed description, numerous specific details are set forth by way of example in order to provide a comprehensive understanding of the relevant guidance. However, it will be apparent to those skilled in the art that the present application may be practiced without these details. In other cases, well-known methods, procedures, systems, compositions and / or circuits have been described at a relatively high level, without detail, in order to avoid unnecessarily obscuring aspects of the present application.

[0027] Flowcharts are used in the present application to illustrate the execution process performed by the system according to the embodiment of the present application. It should be clearly understood that the execution process of the flowchart may not be performed in order. On the contrary, these execution processes may be performed in reverse order or simultaneously. In addition, at least one other execution process may be added to the flowchart. One or more execution processes may be deleted from the flowchart.

[0028] Before further describing the embodiments of the present invention in detail, the nouns and terms involved in the embodiments of the present invention are described. The nouns and terms involved in the embodiments of the present invention are subject to the following interpretations.

[0029] (1) In response, it is used to indicate the conditions or states on which the executed operations depend. When the dependent conditions or states are met, one or more operations executed may be in real time or with a set delay. Unless otherwise specified, there is no restriction on the order in which the multiple operations executed are executed.

[0030] (2) Based on is used to indicate the conditions or states on which the executed operations depend. When the dependent conditions or states are met, one or more operations executed may be in real time or have a set delay. Unless otherwise specified, there is no restriction on the order in which the multiple operations executed are executed.

[0031] See also Figure 1 , is an image of a unit wafer as the detection object in this embodiment, which is collected by an optical device. In other scenarios, it can also be called a die, which is a single unit on a wafer without a printed circuit. Figure 1 It can be seen that due to the semiconductor process, the surface of the unit wafer may be ground, oxidized, and other processes, resulting in different surface oxidation structures. If the commonly used golden die image (standard template image) in the prior art is used to directly perform template matching for detection, the oxide particles will be identified as defects, resulting in a large number of failed inspections. In addition, the oxide structure on the unit wafer cannot be completely eliminated.

[0032] Therefore, in order to reduce the problem of template matching over-detection due to the existence of surface process features, this embodiment provides a golden template construction method, which can eliminate the interference caused by process features during the detection process by configuring a white list in the template.

[0033] For details, see Figure 2 This embodiment provides a golden template construction method for constructing a golden template used in template matching, which specifically includes the following steps:

[0034] Step S21. Acquire the surface features in each collected unit wafer image, screen out high-frequency features based on the distribution frequency of each surface feature, build a non-abnormal feature database based on the high-frequency features, and configure the current process label in the non-abnormal feature database.

[0035] In this embodiment, high-frequency features refer to features with high frequency of occurrence, and low-frequency features refer to features with low frequency of occurrence. Figure 1 ,about Figure 1The points with lower grayscale in the bubble structure that exist in large numbers are oxide structures, while the black dots are defective particles that need to be identified in practice. Therefore, it can be seen that in actual situations, the distribution of normal oxide structures caused by the process should be large and concentrated, while the distribution of abnormal defects should be accidental and small. Therefore, according to this feature, in this embodiment, the high-frequency features should be the expression of non-abnormal particle points in the image, and the low-frequency features should be the expression of defective particles in the image. Therefore, in this embodiment, the features of the collected unit chip image are first collected, and the distribution of the current features is counted, the features are divided into high-frequency features and low-frequency features, and the high-frequency features are counted to construct a corresponding database to form a white list used in the detection, thereby solving the problem of over-inspection.

[0036] Specifically, in order to extract all features in the unit wafer image, the unit wafer image is binarized to achieve the segmentation of the background and the foreground. The segmented foreground is all images including oxide structure particles and abnormal defects. That is, multiple foreground images are obtained by binarizing the unit wafer image, and each foreground image corresponds to a feature different from the background.

[0037] The core of using binarization to segment an image is to segment the image based on the grayscale distribution of pixels on the image and the grayscale threshold. The core is to select an accurate threshold to achieve accurate segmentation. Figure 1 It can be seen that, for the oxide structure on the wafer in this embodiment, its grayscale expression is highly similar to the background. If the threshold is not selected accurately, the oxide structure will be mistakenly segmented as the background.

[0038] In order to solve this problem, this embodiment provides an adaptive threshold determination method, firstly, by obtaining the histogram of the unit chip image, and according to the histogram, the pixel ratio p(i) of the number of pixels corresponding to each gray value in the unit chip image to the total number of pixels can be obtained. And based on the initial threshold, the unit chip image is initially divided into two groups to obtain multiple initial foreground images and initial background images, and the initial foreground pixel ratio w is obtained according to the pixel ratio p(i) of the number of pixels corresponding to each gray value to the total number of pixels. 0 , initial background pixel ratio w 1 And the corresponding average gray value u 0 、u 1 , this process is expressed based on the following formula: Finally, by calculating the maximum value of g(t), the target threshold T is obtained according to the maximum inter-class variance, which is expressed based on the following formula: g(t) = w 0 (t)w 1 (t)(u 0 (t)-u 1(t)) 2 .

[0039] It is worth noting that the initial threshold may be an artificially set threshold or a threshold set without considering the oxide structure.

[0040] The unit wafer image is globally binarized according to the target threshold value obtained in the above processing process to obtain a binarized image, thereby realizing accurate segmentation of the unit wafer image. The segmented foreground includes defects and also includes oxide structures, etc. Therefore, in this embodiment, it is necessary to construct a data set for normal structures such as oxides, realize clustering, and form a database required in the detection stage.

[0041] Specifically, the feature recognition of the normal structure used in this embodiment adopts the frequency distribution method for judgment, and its logic is that when a feature appears frequently, it is considered a normal feature. Because the frequency of surface defects in the actual wafer processing process is not high, if the feature appears frequently, it should be a normal structure.

[0042] In this embodiment, according to the difference in the expression of oxide structure and abnormal defects, texture features are used as feature extraction objects. Specifically, the energy value corresponding to each foreground image is calculated. First, the gray level co-occurrence matrix of each foreground image is calculated, and the square sum of the elements in the gray level co-occurrence matrix is ​​calculated, which is the energy value of the foreground image. The expression of the gray level co-occurrence matrix is ​​based on the following formula:

[0043] Among them, the element (i, j) in the gray-level co-occurrence matrix is ​​the number of times the pixel with gray value i and the pixel with gray value j in the input foreground image appear in a specific spatial relationship. For the gray value of the image, the range is [0, L-1]. For the gray value of the pixel point (x, y) is i, and the gray value of another point (x+1, y+b) is j. The number of pixel pairs that meet the above rules in the image is counted, filled in the matrix, and its probability is calculated, and the above gray-level co-occurrence matrix can be obtained.

[0044] The energy value of each foreground image can be obtained through the above processing. The energy value is used to represent the texture features of each foreground image. Because different types of features have different texture features, the feature screening is achieved by screening the same texture features in the present invention.

[0045] After all the features of the foreground image are screened out, the distribution of the features is statistically analyzed, and the objects corresponding to the features with discrete distribution are set as abnormal objects.

[0046] In other embodiments, in order to further determine the abnormal objects and ensure the integrity of the screening, the feature distribution in multiple unit wafer images is calculated based on the above method, and the features whose distribution ratio is less than the overall distribution threshold ratio are taken as target abnormal features, and their objects are abnormal objects. All objects after excluding the abnormal objects are oxide objects in this embodiment.

[0047] The features corresponding to the oxide objects screened out above are combined to establish a non-abnormal feature database and store it in the corresponding storage space.

[0048] In this embodiment, the acquired unit wafer image is an image of the current wafer processing stage. Since the wafer processing stage is relatively complex, and the unit wafer surface corresponding to each stage presents different features, in this embodiment, when constructing the golden template, it is necessary to construct the corresponding template according to different process scenarios, so as to obtain the corresponding golden template.

[0049] Specifically, in this embodiment, the non-abnormal feature database obtained in the above processing process also needs to be configured with a current process label to determine the current process stage. The concept of process includes different wafer processing stages and different processing methods, which are divided according to the process definition and will not be repeated in this embodiment.

[0050] Step S22. Combining the non-abnormal feature database with the precise template image to obtain a wafer golden template related to the current process scenario and current process features.

[0051] In this embodiment, the detection of the wafer is implemented by a template matching method, and a precise template image, i.e., a Golden Image, must be set for the template matching. The precise template image is an image of a standard wafer, i.e., a completely clean wafer image. The acquisition of the precise template image will not be described in detail in this embodiment, and any method in the prior art may be used to obtain it.

[0052] The non-abnormal feature database obtained after step S21 is combined with the precise template image to obtain the golden template of this embodiment.

[0053] In order to better implement the above method, the embodiment of the present application also provides a golden template construction device, which can be integrated in an electronic device, and the electronic device can be a terminal, a server, etc. Among them, the terminal can be a mobile phone, a tablet computer, a smart Bluetooth device, a laptop, a personal computer, etc.; the server can be a single server or a server cluster composed of multiple servers.

[0054] For example, in this embodiment, the method of the embodiment of the present application will be described in detail by taking the chip detection device specifically integrated in an electronic device as an example.

[0055] For example, Figure 3 As shown, the golden template construction device 30 may include a database construction unit 31 and a template construction unit 32, wherein:

[0056] The database construction unit 31 is used for the surface features in each unit wafer image, screens out high-frequency features based on the distribution frequency of each surface feature, constructs a non-abnormal feature database based on the high-frequency features, and configures the current process label in the non-abnormal feature database.

[0057] In some specific implementations, the features in the unit chip image are acquired by segmenting the unit chip image to obtain a plurality of foreground images; and an energy value corresponding to each of the foreground images is calculated, and the energy value is used to characterize the surface features.

[0058] In some specific embodiments, the high-frequency features are screened by statistically analyzing the distribution of multiple energy values, taking the surface features corresponding to discrete energy values ​​as low-frequency features, and eliminating the corresponding surface features to obtain screened high-frequency features.

[0059] In some specific embodiments, the foreground image is obtained by obtaining the pixel ratio of the number of pixels corresponding to each gray value in the unit chip image to the total number of pixels, and performing initial binary segmentation on the unit chip image based on an initial threshold, and obtaining an initial foreground pixel ratio, an initial background pixel ratio and a corresponding average gray value based on each pixel ratio; obtaining a target threshold based on the initial foreground pixel ratio, the initial background pixel ratio and the corresponding average gray value and according to the maximum inter-class variance; and performing global binary processing on the unit chip image based on the target threshold to achieve segmentation of the unit chip image.

[0060] In some specific implementations, the energy value is determined by obtaining a gray level co-occurrence matrix of each of the foreground images and determining the sum of squares of elements in the gray level co-occurrence matrix, where the sum of squares is the energy value corresponding to the foreground image.

[0061] The template construction unit 32 is used to combine the non-abnormal feature database with the precise template image to obtain a wafer golden template related to the current process scenario and the current process features.

[0062] In some embodiments, the precision template image is an image of a standard wafer.

[0063] In this embodiment, a wafer detection method is also provided, which uses the golden template constructed by the above method and device to implement template matching detection of the wafer.

[0064] Specifically, please refer to 4. This method includes the following steps:

[0065] Step S41: retrieve the golden template corresponding to the unit wafer to be inspected based on the process label.

[0066] In actual process scenarios, because the non-abnormal features formed on the surface of the unit wafer are different for different process attributes, it is necessary to determine the current process attributes and retrieve the corresponding golden template according to the current process attributes.

[0067] Step S42. Match the collected real-time image of each unit chip with the precise template image, and in the matching process, perform similarity matching on a plurality of the non-abnormal feature data and the extracted features, remove the non-abnormal features, and obtain the abnormal features.

[0068] In this embodiment, the KNN algorithm is used to calculate the similarity. The multiple Euclidean distances corresponding to the multiple features on the real-time image and the features in the non-abnormal feature database are extracted, and the average Euclidean distance is calculated based on the multiple Euclidean distances. The average Euclidean distance is used to characterize the similarity between the feature and the multiple non-abnormal feature data.

[0069] The calculation of Euclidean distance is based on the following formula: Where X i and Y i are the i-th dimension feature values ​​of the real-time image feature X and the feature Y of the non-abnormal feature database respectively; the average value of the Euclidean distance is determined based on the following formula: Where N is the number of features in the non-abnormal feature database.

[0070] Similarly, in order to better implement the above method, the embodiment of the present application also provides a wafer detection device, which can be integrated in an electronic device, and the electronic device can be a terminal, a server, etc. Among them, the terminal can be a mobile phone, a tablet computer, a smart Bluetooth device, a laptop, a personal computer, etc.; the server can be a single server or a server cluster composed of multiple servers.

[0071] For example, in this embodiment, the method of the embodiment of the present application will be described in detail by taking the chip detection device specifically integrated in an electronic device as an example.

[0072] For example, Figure 5 As shown, the wafer inspection device 50 may include a template retrieval unit 51 and a matching unit 52, wherein:

[0073] The template retrieving unit 51 is used to retrieve the golden template corresponding to the unit wafer to be detected through the process label.

[0074] The matching unit 52 is used to match the collected real-time image of each unit chip with the precise template image, and in the matching process, perform similarity matching between the plurality of non-abnormal feature data and the extracted features, eliminate the non-abnormal features, and obtain the abnormal features.

[0075] With respect to the golden template construction method and wafer detection method provided in the embodiments of the present application, the non-abnormal features existing in the process are determined by screening the features of the unit wafer, and a non-abnormal feature database is established to combine with the precision template image to construct the golden template, thereby reducing the mismatching caused by the process features during the wafer detection process. While ensuring the detection accuracy, the detection efficiency is improved and the detection cost is reduced.

[0076] The embodiment of the present application also provides an electronic device, which can be a terminal, a server, etc. The terminal can be a mobile phone, a tablet computer, a smart Bluetooth device, a laptop, a personal computer, etc. The server can be a single server or a server cluster composed of multiple servers, etc.

[0077] In some embodiments, the chip detection device may also be integrated into multiple electronic devices. For example, the chip detection device may be integrated into multiple servers, and the chip detection method of the present application may be implemented by multiple servers.

[0078] In this embodiment, the electronic device of this embodiment is a server as an example for detailed description, for example, Figure 6 As shown, it shows a schematic diagram of the structure of the server involved in the embodiment of the present application, specifically:

[0079] The server may include one or more processing core processors 601, one or more computer-readable storage media memories 602, a power supply 603, an input module 604, and a communication module 605. Those skilled in the art will appreciate that Figure 6 The server structure shown in the figure does not constitute a limitation on the server, and may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently. Among them:

[0080] The processor 601 is the control center of the server, and uses various interfaces and lines to connect various parts of the entire server. It executes various functions of the server and processes data by running or executing software programs and / or modules stored in the memory 602, and calling data stored in the memory 602. In some embodiments, the processor 601 may include one or more processing cores; in some embodiments, the processor 601 may integrate an application processor and a modem processor, wherein the application processor mainly processes the operating system, user interface, and application programs, and the modem processor mainly processes wireless communications. It is understandable that the above-mentioned modem processor may not be integrated into the processor 601.

[0081] The memory 602 can be used to store software programs and modules. The processor 601 executes various functional applications and data processing by running the software programs and modules stored in the memory 602. The memory 602 may mainly include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required for at least one function (such as a sound playback function, an image playback function, etc.), etc.; the data storage area may store data created according to the use of the server, etc. In addition, the memory 602 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, or other volatile solid-state storage devices. Accordingly, the memory 602 may also include a memory controller to provide the processor 601 with access to the memory 602.

[0082] The server also includes a power supply 603 for supplying power to various components. In some embodiments, the power supply 603 may be logically connected to the processor 601 through a power management system, so that the power management system can manage charging, discharging, power consumption, and other functions. The power supply 603 may also include one or more DC or AC power supplies, recharging systems, power failure detection circuits, power converters or inverters, power status indicators, and other arbitrary components.

[0083] The server may further include an input module 604, which may be used to receive input digital or character information and generate keyboard, mouse, joystick, optical or trackball signal input related to user settings and function control.

[0084] The server may also include a communication module 605. In some embodiments, the communication module 605 may include a wireless module. The server may perform short-range wireless transmission through the wireless module of the communication module 605, thereby providing wireless broadband Internet access for users. For example, the communication module 405 may be used to help users send and receive emails, browse web pages, and access streaming media.

[0085] Although not shown, the server may also include a display unit, etc., which will not be described in detail herein. Specifically in this embodiment, the processor 601 in the server will load the executable files corresponding to the processes of one or more application programs into the memory 602 according to the following instructions, and the processor 601 will run the application programs stored in the memory 602, thereby implementing the steps in the methods of the embodiments of the present application.

[0086] The specific implementation of the above operations can be found in the previous embodiments, which will not be described in detail here.

[0087] From the above, it can be seen that the detection efficiency can be improved and the detection cost can be reduced while ensuring the detection accuracy.

[0088] A person of ordinary skill in the art will appreciate that all or part of the steps in the various methods of the above embodiments may be completed by instructions, or by controlling related hardware through instructions. The instructions may be stored in a computer-readable storage medium and loaded and executed by a processor.

[0089] To this end, an embodiment of the present application provides a computer-readable storage medium, in which a plurality of instructions are stored, and the instructions can be loaded by a processor to execute the steps in any one of the golden template construction methods provided in the embodiments of the present application. For example, the instructions can execute the following steps:

[0090] Acquire the surface features in each collected unit wafer image, screen out high-frequency features based on the distribution frequency of each surface feature, build a non-abnormal feature database based on the high-frequency features, and configure the current process label in the non-abnormal feature database;

[0091] The non-abnormal feature database is combined with a precise template image to obtain a wafer golden template related to the current process scenario and the current process features; the precise template image is an image of a standard wafer.

[0092] And, execute the steps in any one of the wafer detection methods provided in the embodiments of the present application. For example, the instruction may execute the following steps:

[0093] Retrieve the golden template corresponding to the unit wafer to be inspected based on the process label;

[0094] The collected real-time image of each unit chip is matched with the precise template image, and in the matching process, a plurality of the non-abnormal feature data are matched with the extracted features for similarity, and the non-abnormal features are eliminated to obtain the abnormal features.

[0095] The storage medium may include: a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, etc.

[0096] According to one aspect of the present application, a computer program product or computer program is provided, the computer program product or computer program including a computer program / instruction, the computer program / instruction being stored in a computer-readable storage medium. A processor of an electronic device reads the computer program / instruction from the computer-readable storage medium, and the processor executes the computer program / instruction, so that the electronic device executes the method provided in various optional implementations of the chip detection aspect provided in the above embodiments.

[0097] Since the instructions stored in the storage medium can execute the steps in any chip detection method provided in the embodiments of the present application, the beneficial effects that can be achieved by any golden template construction method and chip detection method provided in the embodiments of the present application can be achieved. Please refer to the previous embodiments for details and will not be repeated here.

[0098] In this application, "at least one" means one or more, and "more than one" means two or more. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can be represented by: a, b, c, ab, ac, bc, or abc, where a, b, c can be single or multiple.

[0099] It should be understood that in the various embodiments of the present application, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0100] The above is a detailed introduction to a golden template construction method, device, wafer detection method and device, electronic device, storage medium and program product provided in the embodiments of the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea; at the same time, for technical personnel in this field, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A method for constructing a golden template, characterized in that: The method comprises: Acquire the surface features in each collected unit wafer image, screen out high-frequency features based on the distribution frequency of each surface feature, build a non-abnormal feature database based on the high-frequency features, and configure the current process label in the non-abnormal feature database; The non-abnormal feature database is combined with a precise template image to obtain a wafer golden template related to the current process scenario and the current process features; the precise template image is an image of a standard wafer.

2. The golden template construction method according to claim 1, characterized in that: The acquiring of the features in each unit wafer image includes: segmenting the unit wafer image to obtain a plurality of foreground images; and calculating an energy value corresponding to each foreground image, wherein the energy value is used to characterize the surface features.

3. The method for constructing a golden template according to claim 2, characterized in that: The method of screening out high-frequency features based on the distribution frequency of each surface feature includes: statistically analyzing the distribution of multiple energy values, taking surface features corresponding to discrete energy values ​​as low-frequency features, and eliminating the corresponding surface features to obtain screened high-frequency features.

4. The method for constructing a golden template according to claim 3, characterized in that: The method also includes: acquiring low-frequency features in a plurality of the unit chip images as an initial abnormal feature group, and determining the proportion of each of the low-frequency features in the initial abnormal feature group, taking low-frequency features whose proportion is less than a preset proportion threshold as target low-frequency features, and eliminating the target low-frequency features to obtain screened high-frequency features.

5. The method for constructing a golden template according to claim 2, characterized in that: The unit chip image is segmented to obtain a plurality of foreground images, including: obtaining the pixel ratio of the number of pixels corresponding to each gray value in the unit chip image to the total number of pixels; performing initial binary segmentation on the unit chip image based on an initial threshold, and obtaining an initial foreground pixel ratio, an initial background pixel ratio and a corresponding average gray value based on each pixel ratio; obtaining a target threshold based on the initial foreground pixel ratio, the initial background pixel ratio and the corresponding average gray value and according to the maximum inter-class variance; and performing global binary processing on the unit chip image based on the target threshold to achieve segmentation of the unit chip image.

6. The method for constructing a golden template according to claim 2, characterized in that: The calculating of the energy value corresponding to each foreground image includes: obtaining a gray level co-occurrence matrix of each foreground image, and determining the sum of squares of elements in the gray level co-occurrence matrix, wherein the sum of squares is the energy value corresponding to the foreground image.

7. A golden template construction device, characterized in that: The device comprises: A database construction unit, for each surface feature in a unit wafer image, screens out high-frequency features based on the distribution frequency of each surface feature, constructs a non-abnormal feature database based on the high-frequency features, and configures a current process label in the non-abnormal feature database; The template construction unit is used to combine the non-abnormal feature database with the precision template image to obtain a wafer golden template related to the current process scene and the current process features; the precision template image is an image of a standard wafer.

8. A wafer detection method based on template matching, characterized in that: The method comprises: Retrieving a golden template corresponding to the unit wafer to be detected based on the process label; the golden template is constructed based on the method described in any one of claims 1 to 7; The collected real-time image of each unit chip is matched with the precise template image, and in the matching process, a plurality of non-abnormal feature data are matched with the extracted features for similarity, and the non-abnormal features are eliminated to obtain the abnormal features.

9. The wafer detection method based on template matching according to claim 8, characterized in that: The plurality of non-abnormal feature data are matched with the extracted features by similarity, including: calculating an average Euclidean distance between the extracted features and the non-abnormal features, wherein the average Euclidean distance is used to characterize the similarity between the feature and the plurality of non-abnormal feature data.

10. A wafer detection device based on template matching, characterized in that: The device comprises: A template retrieval unit, used to retrieve the golden template corresponding to the unit wafer to be tested through the process label; The matching unit is used to match the collected real-time image of each unit chip with the precise template image, and in the matching process, the plurality of non-abnormal feature data are matched with the extracted features for similarity, the non-abnormal features are eliminated, and the abnormal features are obtained.

Images