Wafer and method for regulating and controlling warping degree of wafer

Abstract

The invention provides a wafer and a method for regulating and controlling the warping degree of the wafer. The method comprises the steps that a first film layer with first direction stress is formed on the surface of a wafer, a second film layer with second direction stress is formed on the surface of the first film layer, and a third film layer with the first direction stress is formed, the first direction stress is tensile stress, and the second direction stress is compressive stress; or the stress in the first direction is compressive stress and the stress in the second direction is tensile stress, at least parts of the second film layer and the third film layer are not overlapped in the longitudinal direction, and the second film layer comprises silicon nitride films with tensile stress and silicon oxide films with a buffering effect which are alternately formed. The warping degree of the wafer in different directions can be adjusted, and the production yield can be improved. According to the method, the film thicknesses of different areas of the wafer are regulated and controlled without etching to remove the formed film, the whole technological process can be completed on the deposition equipment, the technological time is shortened, and the production cost is reduced. By adopting the wafer provided by the invention, the production yield can be improved.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuit manufacturing, and in particular to a wafer and a method for regulating wafer warpage. Background Art

[0002] During the front processing of the wafer, the change in mechanical stress will cause three-dimensional special-shaped warping (bow). When the warping exceeds the threshold, it will cause a variety of defects. For example, according to the measured data of WLCSP packaging, in the packaging process, if the warping is too large and the alignment deviation between the bottom of the chip and the substrate is >5μm, the solder joint breakage rate will increase to 12%, causing the packaging process to fail. During the device manufacturing process, excessive wafer warping will cause the FinFET transistor threshold voltage to shift >0.1V, the 3D NAND storage unit crosstalk to increase by 20%, and the device performance to deteriorate significantly. Experimental data also show that when the ΔBow of the tensile stress silicon nitride film is >300μm, rupture occurs, resulting in a cavity contamination rate of up to 8%.

[0003] In the prior art, there are many ways to prevent excessive warping of wafers due to stress, but each of these methods has different defects. For example, the traditional double-sided coating method requires wet etching / grinding to remove the front film, which has a long process cycle and increases the production cost by more than 30%; the flip PECVD method is prone to wafer damage during the flip operation (edge ​​crack rate>0.5%), and this method cannot achieve local stress regulation; the single-layer stress compensation film method cannot solve the extreme warping of ΔBow>500μm, and the control efficiency of the compressive stress / tensile stress film combination is <60%; the layered dielectric layer solution is only suitable for saddle-shaped / wavy warping, and the control accuracy of three-dimensional special-shaped warping is poor.

[0004] It should be noted that the above introduction to the technical background is only for the convenience of providing a clear and complete description of the technical solutions of the present invention and for the convenience of understanding by those skilled in the art. It cannot be considered that the above technical solutions are well known to those skilled in the art simply because these solutions are described in the background technology section of the present invention. Summary of the invention

[0005] In view of the shortcomings of the prior art mentioned above, the purpose of the present invention is to provide a wafer and a method for regulating wafer warpage, so as to solve the problems of the existing method for regulating wafer warpage, such as low efficiency, easy to cause wafer damage, and difficulty in improving three-dimensional special-shaped warpage.

[0006] To achieve the above objectives and other related objectives, the present invention provides a method for controlling wafer warpage, comprising:

[0007] forming a first film layer having a first directional stress on the surface of the wafer;

[0008] forming a second film layer having a stress in a second direction on the surface of the first film layer;

[0009] forming a third film layer having stress in a first direction;

[0010] The stress in the first direction is tensile stress and the stress in the second direction is compressive stress, or the stress in the first direction is compressive stress and the stress in the second direction is tensile stress, the second film layer and the third film layer do not overlap at least partially in the longitudinal direction, and the second film layer includes an alternating silicon nitride film with tensile stress and a silicon oxide film that acts as a buffer.

[0011] In an optional embodiment, the wafer has opposite front and back sides, the first film layer is formed on the entire back side of the wafer, the second film layer is formed on a portion of the back side of the wafer, and the third film layer is formed on a portion of the front side of the wafer.

[0012] In another optional solution, the first film layer, the second film layer and the third film layer are sequentially formed on the back side of the wafer.

[0013] Optionally, the method for regulating wafer warpage includes repeating the steps of forming the second film layer and the third film layer at least once.

[0014] Optionally, the second film layer is distributed along the X direction, and the third film layer is distributed along the Y direction, and the X direction and the Y direction are perpendicular to each other.

[0015] More optionally, both the second film layer and the third film layer are film layers including two symmetrically distributed fan-shaped areas, and the projections of the second film layer and the third film layer on the same horizontal plane are alternately distributed.

[0016] Optionally, the thickness of the first film layer is 150nm-400nm, and the second film layer includes 2-6 stacks including silicon nitride films and silicon oxide films, the thickness of the silicon nitride film in each stack is 500A-1000A, and the thickness of the silicon oxide film is 200A-300A.

[0017] Optionally, the silicon nitride film and the silicon oxide film are formed by ALD or PECVD.

[0018] Optionally, the process of forming the second film layer includes the steps of using a laser interferometer to monitor the warpage of the wafer and adjusting process parameters according to the warpage.

[0019] Optionally, during the process of forming the first film layer and / or the third film layer, the stress direction of the film layer is monitored by monitoring the refractive index of the corresponding film layer.

[0020] Optionally, the first film layer and the third film layer are both silicon-rich and / or nitrogen-rich silicon nitride layers.

[0021] Optionally, the first film layer and the third film layer are both formed by a PECVD process. In the process of forming the silicon nitride layer, the reaction gas includes multiple types of silane, ammonia, nitrogen and argon, wherein the gas flow rate of silane is 50sccm-1000sccm, the gas flow rate of ammonia is 0-1000sccm, the gas flow rate of nitrogen is 0-20000sccm, the gas flow rate of argon is 0-20000sccm, the reaction pressure is 1.0torr-10torr, the reaction temperature is 300℃-550℃, the high-frequency power supply power of the reaction is 100W-2000W, and the low-frequency power supply power is 100W-1000W; by adjusting several of the high-frequency power supply power, the low-frequency power supply power, the reaction temperature, the reaction pressure and the ammonia flow rate, the first film layer and the third film layer have stresses in corresponding directions.

[0022] The present invention also provides a wafer, which is processed by the method for regulating wafer warpage as described in any of the above schemes.

[0023] As described above, the wafer and the method for regulating the wafer warpage provided by the present invention have the following beneficial effects: the method for regulating the wafer warpage provided by the present invention can adjust the warpage of the wafer in different directions by setting a buffer layer to increase the rupture threshold of the tensile stress film layer and by adjusting the gradient of the film thickness to achieve stress distribution and transfer optimization, so that the wafer can meet the subsequent process requirements and help improve the production yield. In addition, the present invention regulates the film thickness of different areas of the wafer without etching to remove the already formed film, and the entire process can be completed on the deposition equipment, which helps to shorten the process time and reduce production costs. The use of wafers processed by the present invention helps to improve the production yield and reduce production costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 An exemplary flow chart of the method for controlling wafer warpage provided by the present invention is shown.

[0025] Figure 2 A schematic diagram of zoned deposition in an example of the method for controlling wafer warpage provided by the present invention is shown.

[0026] Figure 3 and Figure 4 It is a schematic diagram showing the improvement effect of the method for regulating wafer warpage provided by the present invention on wafers with different warpages. DETAILED DESCRIPTION

[0027] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. For example, when describing the embodiments of the present invention in detail, for the sake of convenience, the cross-sectional view showing the device structure will not be partially enlarged according to the general proportion, and the schematic diagram is only an example, which should not limit the scope of protection of the present invention. In addition, in actual production, the three-dimensional dimensions of length, width and depth should be included.

[0028] For ease of description, spatially relative terms such as "under", "below", "below", "below", "above", "on", etc. may be used herein to describe the relationship of one element or feature shown in the drawings to other elements or features. It will be understood that these spatially relative terms are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the drawings. In addition, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present.

[0029] In the context of the present invention, a structure in which a first feature is described as being "above" a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact.

[0030] It should be noted that the diagrams provided in this embodiment are only schematic illustrations of the basic concept of the present invention, and the diagrams only show the components related to the present invention rather than the number, shape and size of the components in actual implementation. The type, quantity and proportion of each component in actual implementation may be changed at will, and the layout of the components may also be more complicated. In order to make the diagrams as concise as possible, not all structures are marked in the drawings.

[0031] The present invention provides a method for controlling the warpage of a wafer, and the general steps can be referred to Figure 1 The method can be used to improve the surface warpage of a wafer, and in particular can be used to improve the three-dimensional warpage of a wafer. The present invention will be further described below in conjunction with the accompanying drawings.

[0032] First, step S1 is performed to form a first film layer having a first directional stress on a surface of a wafer.

[0033] The material of the wafer can be any of the following materials: crystalline silicon (such as Si <100> or Si <111> ), silicon oxide, strained silicon, silicon germanium, doped or undoped polysilicon, doped or undoped silicon wafers and patterned or non-patterned wafers, silicon on insulator (SOI), carbon-doped silicon oxide, silicon nitride, doped silicon, germanium, gallium arsenide, glass or sapphire. The wafer can be a bare wafer without any layer on the surface, or a device wafer with a layer on the surface. The wafer can be of any size, such as a 200mm or 300mm diameter wafer, or a rectangular or square panel. In particular, the larger the wafer size and the more film layers formed on its surface, the more severe the surface warping of the wafer due to stress accumulation will be, and the more suitable it is for the method of the present invention to improve the warping.

[0034] The wafer has two opposite surfaces, the surface used to make devices is usually defined as the front side, and the surface opposite to it is usually defined as the back side. According to different needs, the first film layer can be formed on the front side or the back side of the wafer. During the formation process of the thin film, stress will be generated in the film due to crystal defects, lattice mismatch, differences in thermal expansion coefficients between different materials, etc. Generally, stress can be divided into tensile stress and compressive stress according to the different directions of force. Tensile stress is the reaction force of an object to an external force that causes the object to have a tendency to stretch, and compressive stress refers to the stress that causes the object to have a tendency to compress. By adjusting the parameters in the thin film preparation process, the prepared film layer can have compressive stress or tensile stress. For example, in a preferred example provided by the present invention, the first film layer is formed on the back side of the wafer, and it has compressive stress.

[0035] Specifically, the wafer after cleaning can be introduced into the processing chamber through a robotic arm, and the deposition gas is supplied to the reaction chamber in the form of mixed gas or pulse alternation. By adjusting several process parameters, such as gas flow, pressure, temperature, etc., after a period of reaction, a layer of high pressure stress film is deposited on the entire surface of the wafer, forming the first film layer.

[0036] Then, step S2 is performed to form a second film layer having a stress in a second direction on the surface of the first film layer. That is, the second film layer and the first film layer are formed on the same side of the wafer, for example, they are also formed on the back side of the wafer, but the second film layer has a stress in the opposite direction to the first film layer. In other words, if the first film layer has a compressive stress, the second film layer has a tensile stress, and conversely, if the first film layer has a tensile stress, the second film layer has a compressive stress. In this embodiment, the first film layer has a compressive stress and the second film layer has a tensile stress as an example. The second film layer is preferably formed only on a local surface of the wafer, or its film layer area is smaller than the surface area of ​​the wafer. For example, in some examples, the surface area of ​​the second film layer does not exceed one-half of the surface area of ​​the wafer. That is, half of the area on the wafer is not formed with a second film layer. Preferably, the first film layer and the second film layer have at least one of the same elements, which helps to improve the interface characteristics and make the two have better adhesion.

[0037] Then, step S3 is performed to form a third film layer having a first directional stress. The third film layer can be located on the same side of the first film layer as the second film layer, that is, it is also formed on the back of the wafer. For example, if a device is made on the front of the wafer, the third film layer is made on the back of the wafer. If the wafer is a bare wafer, the third film layer can be formed on the front of the wafer, but it is preferably formed on the back of the wafer. The third film layer is also preferably formed only on the local surface of the wafer, or its film layer area is smaller than the surface area of ​​the wafer, for example, the surface area of ​​the third film layer does not exceed one-half of the surface area of ​​the wafer. In a preferred example, the third film layer and the second film layer have at least one of the same elements, which can also improve the interface characteristics and make the two have better adhesion. That is, the first film layer and the third film layer each have at least one element that is the same as the second film layer, and preferably the three film layers have at least one of the same elements, such as silicon and / or nitrogen.

[0038] In this embodiment, the second film layer and the third film layer do not overlap at least partially in the longitudinal direction, or the projections of the two on the same plane do not completely overlap, or do not overlap at all. Therefore, from a longitudinal perspective, the thickness of the wafer in each region (the sum of the thickness of the wafer itself and the thickness of the film deposited in the corresponding region) is not completely the same, or the thickness of the wafer has a gradient in different regions. By regulating the formation area and thickness of the second film layer and the third film layer, the second film layer and / or the third film layer can also have a film thickness gradient at its edge (the film layer has a slope) by adjusting the flow rate of the reaction gas during the preparation process, thereby optimizing the film thickness distribution on the wafer surface and optimizing stress transfer through the gradient film. In addition, the second film layer in this embodiment includes an alternately formed silicon nitride film with tensile stress and a silicon oxide film that acts as a buffer. The second film layer can not only enhance the adhesion between the first film layer and the third film layer, but also be used to enhance the film layer with tensile stress, including enhancing its own silicon nitride film and the rupture threshold of the first film layer or the third film layer. For example, in some examples, inserting a 5nm-20nm silicon oxide buffer layer during the preparation of the tensile stress film in each deposition cycle can increase the rupture threshold of the tensile stress film from 300μm to 700μm.

[0039] The method for regulating the wafer warpage provided by the present invention increases the rupture threshold of the tensile stress film layer by setting a second film layer having a silicon nitride film and a silicon oxide film stack having a buffering effect, and forms a gradient adjustment of the film thickness through the cooperation of the first film layer and the third film layer. Through the mutual cooperation of the three film layers, the distribution and transmission optimization of the stress are achieved, and the warpage of the wafer in different directions can be adjusted. For example, the warpage of the wafer in the horizontal and vertical directions greater than 700 μm can be reduced to within 50 μm, so that the wafer meets the subsequent process requirements, which helps to improve the production yield. By increasing the rupture threshold of the stress film, the present invention is particularly suitable for improving the three-dimensional special-shaped warpage of the wafer surface. In addition, the present invention can increase the convergence speed of the wafer warpage deviation by 40% and shorten the process time by 90 seconds. In addition, the present invention regulates the film thickness of different regions of the wafer during the thin film deposition process without etching to remove the already formed thin film. The entire process can be completed on the deposition equipment, which can avoid the contamination of the wafer during the transmission process, which helps to shorten the process time and reduce production costs. The distribution of the second film layer and the third film layer can be determined as needed, for example, according to the warpage value of the wafer surface measured in advance. Due to the accumulation of thermal stress after multiple processes, the wafer is prone to saddle-shaped warpage. Therefore, in a preferred example, the second film layer can be distributed along the X direction and the third film layer can be distributed along the Y direction, and the X and Y directions are perpendicular to each other. For example, the X direction is Figure 2 The horizontal direction shown in the A area, the Y direction is Figure 2 The vertical direction shown in area B. Figure 2In the scheme shown, both the second film layer and the third film layer are film layers that include two symmetrically distributed fan-shaped areas. That is, the second film layer and the third film layer do not overlap at all in the same longitudinal direction (in the actual deposition process, due to gas diffusion, there may be a small amount of local overlap in the boundary area between the two), and the projections of the two on the same horizontal plane are arranged alternately. That is, when viewed from the same direction, the second film layer and the third film layer fall on the same plane. This structure can be used to improve the saddle-shaped warping and bowl-shaped warping that are common in current wafers. And from a process perspective, the film layer distribution of this structure is easy to control, and its preparation is relatively simple. For example, under the premise that the second film layer and the third film layer do not completely overlap in the same longitudinal direction, the formation area of ​​each film layer can be effectively controlled with the help of a mask or by controlling the partitioned gas flow rate. For example, in some examples, a method similar to Figure 2 The structure has four fan-shaped areas of equal area, and the film layer of the desired structure is obtained by adjusting the spray gas in each area. If a similar multi-zoned shower head is used, the formation process of the second film layer and the third film layer can be partially synchronized. In other examples, according to the different warpage distribution of the wafer surface, the second film layer and the third film layer can also be semicircular or distributed in other shapes, and there is no strict restriction on this.

[0040] The thickness of each film layer is not only related to the process time, but also has a great influence on the effect of stress regulation. For example, in this case, the silicon oxide film mainly plays a buffering role, so the smaller the self-stress, the better. Ideally, the silicon oxide film has no internal stress, so its thickness needs to be carefully controlled. Experiments have found that the thickness of the first film layer is preferably 150nm-400nm, for example, 150, 200, 250, 300 or any value in this range. The second film layer preferably includes 2-6 stacks including silicon nitride film and silicon oxide film, and the thickness of the silicon nitride film in each stack is 500A-1000A, and the thickness of the silicon oxide film is 200A-300A. And preferably, in the formation process of each stack of the second film layer, the silicon nitride film is formed first, and then the silicon oxide film is formed. The method for forming the silicon nitride film and the silicon oxide film can be a PECVD method or an ALD method, and these two methods each have their advantages. For example, the ALD method can more accurately control the film thickness of each stacked layer and further optimize the stress distribution. The two can be formed continuously in the same ALD chamber by switching the reaction gas, which helps to enhance the adhesion between the films, avoid film stratification, and improve the film deposition quality and production efficiency. In some examples, a silicon nitride film can be formed between the silicon nitride film and the silicon oxide film by gradually reducing the nitrogen-containing gas and gradually increasing the oxygen-containing gas (the silicon-containing gas flow rate remains unchanged), which helps to further enhance the adhesion between the films and further optimize the mechanical properties and stress distribution of the film. Using the PECVD method, the first film layer, the second film layer and the third film layer can be formed continuously in the same PECVD chamber, which helps to improve the deposition efficiency and yield.

[0041] In some examples, during the process of forming the second film layer, a laser interferometer can be used to monitor the warpage of the wafer, and the process parameters can be adjusted according to the warpage. For example, if the warpage of the wafer is detected to be greater than the preset value, the gas flow rate can be increased to make the deposited film thicker, and vice versa, the gas flow rate can be reduced.

[0042] Under the premise of satisfying the required stress direction and not introducing new process pollution, the first film layer and the third film layer can be selected from the common film layers in the current semiconductor field, such as silicon oxide or silicon nitride films. However, when the second film layer includes an alternately formed silicon nitride film with tensile stress and a silicon oxide film that acts as a buffer, the first film layer and the third film layer are preferably silicon nitride film layers for multiple considerations such as optimizing film interface characteristics, simplifying processes, and reducing production costs. The first film layer and the third film layer are preferably silicon-rich and / or nitrogen-rich silicon nitride layers, which are more convenient for stress regulation during the preparation process.

[0043] In the case where both the first film layer and the third film layer are silicon nitride layers, they are preferably formed using a PECVD process, which makes it easier to adjust process parameters during the deposition process to adjust the stress distribution of the film. The deposition parameters of the first film layer and the third film layer are substantially the same. For example, the reaction gases include a variety of silane, ammonia, nitrogen and argon. Among them, the gas flow rate of silane is 50sccm-1000sccm, and the optimal value is 200sccm; the gas flow rate of ammonia is 0-1000sccm, and the optimal value is 600sccm; the gas flow rate of nitrogen is 0-20000sccm, and the optimal value is 2000sccm; the gas flow rate of argon is 0-20000sccm, and the optimal value is 1000sccm; the reaction pressure is 1.0torr-10torr, and the optimal value is 1.5torr; the reaction temperature can be selected between 300℃-550℃, and the optimal value is 500℃; the high-frequency power supply power of the reaction can be 100W-2000W, and the optimal value is 750W, and the frequency of the high-frequency power supply can be between 13.56MHZ and 21.12MHZ The power of the low-frequency power supply can be selected from 100W-1000W, and 150W is the most preferred. The frequency of the low-frequency power supply is selected to be 400KHZ. By adjusting several of the high-frequency power supply power, the low-frequency power supply power, the reaction temperature, the reaction pressure and the ammonia flow rate, the first film layer and the third film layer have stresses in corresponding directions. For example, by increasing the high-frequency power supply and appropriately reducing the ammonia feed ratio, the film can have compressive stress. A higher power supply can make the silane nitride hydrogen bond dissociate more fully, thereby increasing the film density and reducing the hanging H bonds of the NH bonds of silicon nitride, which helps to improve the mechanical properties of the compressive stress silicon nitride film. High tensile stress film can be achieved by reducing the H% of SIN by lowering the reaction temperature. The specific principle is to allow the nitrogen radicals in the plasma to extract H bonds and release ammonia, leaving the SI-N bonds separated by the gaps and suspended, and these elongated SI-N bonds are bound by the surrounding materials and cannot relax, resulting in tensile stress, so reducing the H% content can increase the tensile stress of silicon nitride.

[0044] In the prior art, the non-destructive testing method of film stress is mainly to infer by measuring its bending degree. For example, it is measured by a film stress meter, or by a cantilever beam method, Newton ring method and other methods. These methods are currently offline detection methods. That is to say, under the prior art, when these methods are used, it is necessary to transfer the wafer with the film deposited to the measuring instrument outside the deposition chamber for measurement. This will complicate the process, and the wafer is easily contaminated or damaged during the transfer process between the measuring equipment and the deposition chamber. In a preferred example provided by the present invention, during the preparation process of the first film layer and / or the third film layer, the film refractive index of the first film layer and / or the third film layer can be monitored by an online instrument to monitor the stress direction of the film online in real time, and the process parameters can be adjusted according to the monitoring results. For example, an optical measuring instrument can be integrated into the deposition chamber, and the film refractive index can be measured at the end of each deposition cycle to determine the stress direction of the film. If the film refractive index is monitored to have an increasing trend, it means that the compressive stress of the film is increasing, and vice versa, the tensile stress is increasing. Compared with offline detection methods, the method of monitoring film stress by monitoring the film refractive index can achieve online non-destructive detection, which helps to improve production yield and efficiency.

[0045] Next, the solution of the present invention will be further described in conjunction with specific embodiments.

[0046] This experiment was conducted on two wafers (wafer 1 and wafer 2) with different initial pre-warpage values. The first film layer deposited had compressive stress and the third film layer had compressive stress.

[0047] Step 1: Pre-deposition of full-surface compressive stress film

[0048] The PECVD process is used to deposit a 300±10 nm compressive stress silicon nitride film on the back of the wafer. 4 / NH 3 flow ratio and RF power (800 W) achieved a stress value of -1.2 GPa.

[0049] Step 2: Preparation of vertical gradient buffer layer

[0050] Silicon nitride film and silicon oxide film are alternately deposited on the back of the wafer through a four-partition independent gas supply nozzle. A 5-15 nm silicon oxide buffer layer is inserted at the interface between the tensile stress silicon nitride film and the wafer. Atomic-level thickness control is achieved using ALD technology. The gradient buffer layer can absorb stress concentration energy and increase the rupture threshold of the tensile stress film from 300μm to 700μm.

[0051] Step 3: Horizontal compressive stress film deposition

[0052] Compressive stress silicon nitride film is deposited on the back of the wafer through four-zone independent gas supply nozzles. Each zone can independently adjust the gas composition (SiH4 / NH 3 =50:50) and RF power (1200W), achieving ±10μm partition control accuracy.

[0053] Step 4: Multi-directional stress iterative control

[0054] Repeat steps 2-3 for multiple cycles. After each cycle, monitor the ΔBow value in real time using a laser interferometer (λ=633 nm). The process is terminated when Δ|Bow_X - Bow_Y|≤50μm.

[0055] Figure 3 and Figure 4 The experimental results of this embodiment for two wafers with different initial warpage values ​​are shown in the figure. The numerical units in the figure are all μm. Figure 3 and Figure 4 In the table, the pre-warpage value refers to the warpage value of the two wafers before being processed by the method of this embodiment, and the measured warpage value is the latest wafer warpage value measured by the instrument after completing the film deposition of each step. The value corresponding to the 100s plating of the compressive stress film refers to the corresponding improved warpage value after the deposition of the first film layer. These values ​​are the difference between the measured warpage value and the previous warpage value, such as the pre-warpage value, and are obtained by calculation rather than instrument measurement. Six Y-direction deposition cycles refer to the deposition of a Y-direction tensile stress silicon nitride film, in which the tensile stress film is deposited 6 times with a silicon oxide film plus a silicon nitride film (i.e., (SiO2+Si3N4)×6), and the other meanings are similar. From Figure 3 and Figure 4 It can be seen that as the control is gradually carried out, the difference in the warpage of the wafer in the X and Y directions is continuously reduced, and eventually the difference can be controlled within the target range, for example, within 50μm. Figure 4 As shown in , by using the method of the present invention, the warpage of a wafer with an initial warpage difference of 736 μm can be controlled to 30 μm, which will significantly improve the yield of subsequent processes.

[0056] In other experiments, the thickness of each film layer was adjusted accordingly for wafers with different pre-warpage values, and similar improvement effects were obtained, which will not be elaborated one by one.

[0057] If a shower head with other structures is used to change the gas distribution, thereby preparing a second film layer and a third film layer with other structures, it can be used to control the three-dimensional special-shaped warping of the wafer to meet more diverse production needs.

[0058] The present invention can combine AI algorithms to dynamically adjust gas components to adjust film thickness and stress, thereby achieving precise control of multi-directional special-shaped warping. The deposited film does not need to undergo high-temperature treatment such as annealing to avoid film damage.

[0059] The present invention also provides a wafer, which is processed by the method for regulating wafer warpage as described in any of the above schemes, and the above content can be quoted here in its entirety.

[0060] As mentioned above, the surface of the wafer of this embodiment has a first film layer, a second film layer and a third film layer. The wafer can be made of common semiconductor materials such as silicon, silicon on insulator, silicon carbide, sapphire, etc. It can be a bare wafer without any pattern on the surface, or a wafer with partial patterns on the surface. The first film layer is, for example, a silicon nitride layer with compressive stress, which is formed on the entire back side of the wafer; the second film layer is formed on the local surface of the first film layer, and includes alternating silicon nitride films with tensile stress and silicon oxide films that act as buffers; the third film layer is, for example, a silicon nitride film with tensile stress, which is formed on the front side of the wafer or on the same side of the wafer as the second film layer, but it does not overlap or does not completely overlap with the second film layer in the longitudinal direction. In the case where the second film layer and the third film layer do not overlap at all and are formed on the same side of the wafer, the second film layer and the third film layer can have substantially the same horizontal plane. For example, the second film layer and the third film layer are formed as follows Figure 2 In the structure shown, the two are formed on the same circular horizontal plane in an alternating distribution. The thickness of the first film layer is 150nm-400nm, and the second film layer includes 2-6 stacks including silicon nitride film and silicon oxide film, the thickness of the silicon nitride film in each stack is 500A-1000A, and the thickness of the silicon oxide film is 200A-300A. In some examples, in each stacked structure of the second film layer, a silicon nitride oxide film may also be formed between the silicon nitride film and the silicon oxide film. In some examples, the silicon oxide film may be a porous silicon oxide film, which helps to further optimize the stress distribution of the thin film. The second film layer and the third film layer may also have more than two alternating stacks. The wafer may also have other characteristics, which depends on the specific method of stress regulation. For this, please refer to the above content, and the content will not be repeated for the sake of brevity.

[0061] Since the method for controlling wafer warpage of the present invention is used for processing, the warpage of the wafer of the present invention can be greatly improved, which helps to improve the yield of subsequent processes, and the wafer processed by the method of the present invention is relatively more cost-effective.

[0062] In summary, the method for regulating the curvature of a wafer provided by the present invention forms a first film layer with a first direction stress on the surface of the wafer, forms a second film layer with a second direction stress on the surface of the first film layer, and forms a third film layer with a first direction stress, and the first direction stress is tensile stress and the second direction stress is compressive stress, or the first direction stress is compressive stress and the second direction stress is tensile stress, the second film layer and the third film layer do not overlap at least partially in the longitudinal direction, and the second film layer includes an alternately formed silicon nitride film with tensile stress and a silicon oxide film that acts as a buffer. The present invention increases the rupture threshold of the tensile stress film layer by setting a second film layer with an alternately stacked silicon nitride film and a silicon oxide film that acts as a buffer, and forms a gradient adjustment of the film thickness through the cooperation of the first film layer and the third film layer. Through the mutual cooperation of the three film layers, the distribution and transmission optimization of the stress are achieved, and the curvature of the wafer in different directions can be adjusted, which helps to improve the production yield. At the same time, the present invention regulates the film thickness of different regions of the wafer during the deposition process without etching to remove the already formed thin film. The entire process can be completed on the deposition equipment, which helps to shorten the process time and reduce production costs. The wafer processed by the present invention is helpful to improve the production yield and reduce the production cost.

[0063] Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial utilization value.

[0064] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A method for regulating wafer warpage, characterized in that: include: forming a first film layer having a first directional stress on the surface of the wafer; forming a second film layer having a stress in a second direction on the surface of the first film layer; forming a third film layer having stress in a first direction; The stress in the first direction is tensile stress and the stress in the second direction is compressive stress, or the stress in the first direction is compressive stress and the stress in the second direction is tensile stress, the second film layer and the third film layer do not overlap at least partially in the longitudinal direction, and the second film layer includes alternately formed silicon nitride films with tensile stress and silicon oxide films that act as buffers.

2. The method for controlling wafer warpage according to claim 1, characterized in that: The wafer has a relative front side and back side, the first film layer is formed on the entire back side of the wafer, the second film layer is formed on the partial back side of the wafer, and the third film layer is formed on the partial front side of the wafer; or the first film layer, the second film layer and the third film layer are formed on the back side of the wafer in sequence.

3. The method for controlling wafer warpage according to claim 1, characterized in that: The method for regulating wafer warpage includes repeating the steps of forming a second film layer and a third film layer at least once.

4. The method for controlling wafer warpage according to claim 1, characterized in that: The second film layer and the third film layer are both film layers including two symmetrically distributed fan-shaped areas, and the projections of the second film layer and the third film layer on the same horizontal plane are alternately distributed.

5. The method for controlling wafer warpage according to claim 1, characterized in that: The thickness of the first film layer is 150nm-400nm, and the second film layer includes 2-6 stacked layers including silicon nitride film and silicon oxide film. The thickness of the silicon nitride film in each stacked layer is 500A-1000A, and the thickness of the silicon oxide film is 200A-300A.

6. The method for controlling wafer warpage according to claim 1, characterized in that: The silicon nitride film and the silicon oxide film are formed by the ALD method or the PECVD method.

7. The method for controlling wafer warpage according to claim 1, characterized in that: The process of forming the second film layer includes the steps of using a laser interferometer to monitor the warpage of the wafer and adjusting the process parameters according to the warpage; and / or, in the process of forming the first film layer and / or the third film layer, the stress direction of the film layer is monitored by monitoring the refractive index of the corresponding film layer.

8. The method for controlling wafer warpage according to any one of claims 1 to 7, characterized in that: The first film layer and the third film layer are both silicon-rich and / or nitrogen-rich silicon nitride layers.

9. The method for controlling wafer warpage according to claim 8, characterized in that: The first film layer and the third film layer are both formed by PECVD process. In the process of forming the silicon nitride layer, the reaction gas includes multiple types of silane, ammonia, nitrogen and argon, among which the gas flow rate of silane is 50sccm-1000sccm, the gas flow rate of ammonia is 0-1000sccm, the gas flow rate of nitrogen is 0-20000sccm, the gas flow rate of argon is 0-20000sccm, the reaction pressure is 1.0torr-10torr, the reaction temperature is 300℃-550℃, the high-frequency power supply power of the reaction is 100W-2000W, and the low-frequency power supply power is 100W-1000W; by adjusting several of the high-frequency power supply power, the low-frequency power supply power, the reaction temperature, the reaction pressure and the ammonia flow rate, the first film layer and the third film layer have stress in corresponding directions.

10. A wafer, characterized in that: The wafer is processed using the method for controlling wafer warpage as described in any one of claims 1-9.

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