DC side voltage stabilization control method and system of CLCC-HVDC system under power grid fault

Abstract

The present invention discloses a DC side voltage stabilization control method and system for a CLCC-HVDC system under a power grid fault, aiming to solve the problem of secondary ripple on the DC side of the CLCC-HVDC system under an unbalanced power grid condition. The method actively injects a double frequency disturbance signal into the inverter trigger angle instruction of the DC transmission system to achieve unbalanced triggering of each valve arm of the converter, thereby introducing a negative sequence component into the converter fundamental frequency switching function. This component, coupled with the positive sequence voltage of the AC power grid, can offset the DC side double frequency component caused by the unbalanced component of the receiving end power grid voltage. The present invention makes full use of the full control characteristics of the controllable commutated converter, and by actively injecting a double frequency disturbance signal, effectively reduces the DC voltage and current secondary ripples of the DC transmission system under the unbalanced power grid condition at the receiving end, improves the power transmission stability of the DC transmission system under the unbalanced power grid condition at the receiving end, and has wide applicability and good application prospects.

Description

Technical Field

[0001] The present invention relates to the field of high-voltage direct current (HVDC) transmission, and in particular to a method and system for controlling DC side voltage stability of a CLCC-HVDC system under a power grid fault. Background Art

[0002] High-voltage direct current (HVDC) transmission systems based on grid-commutated converters (LCC-HVDC) have been widely used in power grids around the world due to their advantages, including large transmission capacity, long transmission distances, and low operating losses. With the development of renewable energy, the use of LCC-HVDC technology to transmit electricity over long distances and optimize regional energy allocation has become an important means of absorbing clean energy. However, because LCC-HVDC uses semi-controlled commutation devices based on thyristors, the transient operating characteristics of LCC-HVDC systems are poor when AC grid faults occur. In particular, when an asymmetric fault occurs in the AC system on the inverter side, the unbalanced components of the AC grid will be mapped to the DC line through the converter, generating secondary ripple voltage on the DC line. If the DC transmission line and its terminal equipment are in the second harmonic resonance range, dangerous resonant overvoltage will occur. At the same time, due to the slow control response on the rectifier side, the DC secondary ripple voltage will lead to secondary ripple current, increasing the electrical stress of the converter. The corresponding low-frequency current oscillation will also affect the normal triggering of the converter valve through the LCC-HVDC controller, which is not conducive to DC system fault recovery and may even trigger the activation of DC side protection, resulting in DC system lockout. In addition, low-frequency fluctuations in the DC line have a significant impact on system communication and the reliable access of renewable energy on the sending end.

[0003] To reduce the impact of DC secondary ripple in HVDC systems operating under unbalanced AC grid conditions on the inverter side, a series of studies have been conducted in academia and industry. Currently, the most widely used secondary ripple suppression method in HVDC projects is to install passive filters on the DC side. However, due to the low frequency of secondary ripple, the required passive filters are large and expensive, and also reduce the response speed of the DC transmission system. Related research has proposed leveraging the flexible control characteristics of the HVDC system to actively suppress DC secondary ripple fluctuations. This method, which does not require the installation of passive filters, offers significant advantages in terms of cost-effectiveness and response speed. However, this method is only applicable to VSC-HVDC systems. Conventional LCC-HVDC systems using semi-controlled devices lack the required control accuracy. These studies have shown that existing secondary ripple suppression methods are difficult to apply to LCC-HVDC systems. The fundamental reason is that LCC-HVDC systems use semi-controlled thyristors as the commutation elements. System control flexibility is low, especially considering the risk of commutation failure in the receiving-end converter on the inverter side during grid imbalance faults. During faults, the system needs to reduce the firing angle to maintain sufficient commutation margin, making it difficult to adjust the firing angle over a wide range. Therefore, in practical LCC-HVDC systems, expensive passive filter solutions are often used. However, with the development of large-capacity power electronic devices, a series of new hybrid converter solutions based on the LCC-HVDC structure have been proposed. The most representative of these is the controlled commutated converter (CLCC). By constructing an auxiliary shutdown branch composed of IGBTs, it can achieve active commutation during grid faults. While retaining the operational advantages of LCC-HVDC, it eliminates commutation failures. This solution has been applied in the Gannan ±500kV project in China and has repeatedly prevented commutation failures under receiving-end grid fault conditions. Other research teams have proposed an H-LCC solution that directly connects IGCTs in series with the thyristor valve arms. By introducing fully controlled devices, this also achieves active shutdown of the converter valve arms, eliminating commutation failures.

[0004] In summary, with the development of new, high-capacity power electronic devices, controlled-commutation converter-based high-voltage direct current (HVDC) systems eliminate the risk of commutation failure. During receiving-end grid faults, the inverter trigger angle can be adjusted over a wide range, providing new opportunities for research on secondary ripple suppression in HVDC systems operating under unbalanced grid conditions. However, leveraging the operational characteristics of controlled-commutation converters to actively suppress secondary ripple under unbalanced receiving-end grid conditions, ensuring DC-side voltage stability and further improving the operational stability of HVDC systems under unbalanced grid conditions remains a key and challenging issue. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to address the deficiencies of the existing technology and provide a DC side voltage stabilization control method and system for a CLCC-HVDC system under a power grid fault, so as to solve the instability problem caused by DC side secondary ripple interference under unbalanced power grid conditions.

[0006] To solve the above technical problems, the present invention adopts a technical solution: a method for controlling the DC side voltage stability of a CLCC-HVDC system under a power grid fault, wherein the CLCC-HVDC system includes a controllable commutation converter, which is connected to a receiving power grid via a grid impedance; the controllable commutation converter includes three parallel bridge arms, each bridge arm includes two converter valve groups connected in series; each converter valve group includes two parallel branches, one branch includes a thyristor and a first fully-controlled device connected in series with the thyristor, and the other branch includes a second fully-controlled device and a diode connected in series with the second fully-controlled device; the method comprises the following steps:

[0007] Detect the three-phase AC voltage u of the receiving end power grid a 、u b 、u c and CLCC-HVDC system DC voltage U D ;

[0008] The three-phase AC voltage u of the receiving end power grid a 、u b 、u c Obtain the negative sequence crossover quantity through the dual synchronous decoupling coordinate system phase-locked loop The CLCC-HVDC system DC voltage U D Through the notch filter, the secondary ripple amplitude information U is extracted 2f0 ;

[0009] Using negative sequence crossover The phase information φ of the additional angle Δα to be injected into the secondary ripple disturbance is calculated based on the inverter trigger angle command α in the CLCC-HVDC system. Δα , the secondary ripple amplitude information U 2f0 The output result after the amplitude filter is input into the proportional integral controller to dynamically obtain the amplitude information A of the additional angle Δα that should be injected into the secondary ripple disturbance Δα ;

[0010] The phase information φ of the additional angle Δα to be injected into the secondary ripple disturbance is used Δα and the amplitude information A of the additional angle Δα of the secondary ripple disturbance to be injected Δα The signal of the additional angle Δα of the secondary ripple disturbance that should be injected is calculated;

[0011] The obtained secondary ripple disturbance additional angle Δα signal is superimposed on the trigger angle instruction α to obtain the final output instruction α of the controllable commutation converter.ord ;

[0012] Using the final output instruction α ord Generate trigger signals for each valve arm to control the opening and closing of the thyristors in the CLCC-HVDC system.

[0013] This invention actively injects a double-frequency disturbance signal into the DC transmission system's inverter trigger angle command, achieving unbalanced triggering of each valve arm of the converter. This introduces a negative-sequence component into the converter's fundamental frequency switching function. This component, coupled with the AC grid's positive-sequence voltage, can offset the DC-side double-frequency component caused by the unbalanced voltage component of the receiving-end grid. This invention leverages the fully controlled nature of the controllable commutated converter. By actively injecting a double-frequency disturbance signal, it effectively reduces the DC voltage and current secondary ripple of the DC transmission system operating under unbalanced receiving-end grid conditions, improving the power transmission stability of the DC transmission system under these conditions. The invention has broad applicability and promising application prospects.

[0014] The transfer function of the notch filter G notch (s) is expressed as:

[0015]

[0016] Where ω0 is the fundamental angular frequency of the grid voltage, η is the quality factor, and s is the complex frequency variable in the Laplace transform.

[0017] The amplitude information A of the additional angle Δα of the secondary ripple disturbance should be injected Δα The specific acquisition process includes:

[0018] The voltage secondary ripple information U output by the trap 2f0 After the filter, the half-period maximum value U is obtained 2f ;

[0019] Subtract the maximum value U of the filter output half cycle from 0 2f Then the control error is obtained and input into the PI controller. The upper and lower limit values ​​of the PI controller are π / 6 and -π / 6 respectively. Then the output value of the PI controller with the upper and lower limit values ​​of π / 6 and -π / 6 respectively is the amplitude information A of the additional angle Δα of the secondary ripple disturbance to be injected. Δα ;

[0020] in, U 2f_0 (n) represents the nth voltage secondary ripple information U within half a control cycle 2f0 The sampling value of N represents the number of sampling values ​​within a control cycle, that is, U 2f_0 (1) represents U 2f0 Current sampling value, Indicates the sample value half the control cycle length ago.

[0021] The phase information φ of the additional angle Δα of the secondary ripple disturbance should be injected Δα The expression is:

[0022]

[0023] in, and They respectively represent the negative-sequence q-axis double frequency component and the negative-sequence d-axis double frequency component obtained by the dual synchronous decoupling coordinate system phase-locked loop DDSRF-SPLL.

[0024] The expression of the additional angle Δα signal that should be injected into the secondary ripple disturbance is:

[0025]

[0026] in, and represents the negative-sequence q-axis voltage amplitude and d-axis voltage amplitude obtained by DDSRF-SPLL.

[0027] The final output instruction of the controllable commutation converter is α ord The expression is:

[0028]

[0029] As an inventive concept, the present invention also provides a DC side voltage stabilization control system for a CLCC-HVDC system under a power grid fault, comprising a memory, a processor, and a computer program stored in the memory; the processor executes the computer program to implement the steps of the above method.

[0030] Compared with the prior art, the present invention has the following beneficial effects: the present invention fully utilizes the wide range triggering angle adjustment characteristics of the controllable commutated converter, proposes an asymmetric triggering method for the converter valve with trigger angle secondary ripple injection, realizes active suppression of secondary ripple under unbalanced grid conditions at the receiving end, further improves the operating stability of the DC transmission system under unbalanced grid conditions, and reduces the investment in DC filters. The proposed method is also applicable to other low-frequency phase-controlled converters with flexible trigger angle adjustment capabilities, and has wider applicability. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 This is an inverter topology diagram of a DC power transmission system based on a controllable commutated converter according to an embodiment of the present invention;

[0032] Figure 2 This is the implementation process of the DC side voltage stabilization control method of the CLCC-HVDC system under power grid fault in an embodiment of the present invention;

[0033] Figure 3 This is a block diagram of a DC power transmission control system according to an embodiment of the present invention;

[0034] Figure 4 This is the real-time simulation experiment result of the embodiment of the present invention. DETAILED DESCRIPTION

[0035] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.

[0036] Example 1

[0037] Figure 1 FIG is an inverter topology diagram of a DC power transmission system based on a controllable commutated converter according to an embodiment of the present invention. Figure 1 As shown in the figure, the controllable commutation converter transforms the commutation valve group in the original grid commutation converter based on thyristor elements, introduces fully controlled devices and utilizes the full control characteristics of the fully controlled devices to achieve controllable shutdown of the commutation current without the risk of commutation failure. During the fault of the receiving end grid, the inverter trigger angle can be adjusted over a wide range, providing a basis for suppressing secondary ripple in the DC transmission system operating under unbalanced grid conditions.

[0038] Figure 2 This is the implementation process of the DC side voltage stabilization control method of the CLCC-HVDC system under power grid fault in the embodiment of the present invention. Figure 2 Describe the method. Figure 2 As shown, the method includes the following steps:

[0039] Step 1: Detect the three-phase AC voltage u of the receiving end grid abc , detect the DC voltage U of the DC transmission system D ;

[0040] Figure 3 This is a block diagram of a DC power transmission control system according to an embodiment of the present invention. Figure 3 As shown in the figure, the dual synchronous decoupling coordinate system phase-locked loop can provide negative sequence crossover information, and the original DC control system can provide initial inverter trigger angle information. The introduction of the implementation modules required by the proposed method can easily implement the application.

[0041] Step 2: The detected receiving-end grid AC voltage information u abc Obtaining negative sequence crossover using a dual synchronous decoupled frame phase-locked loop (DDSRF-SPLL) The detected DC voltage information U D Extract the secondary ripple amplitude information U through the notch filter 2f0 .

[0042] The positive sequence synchronous decoupling transfer matrix and the negative sequence synchronous decoupling transfer matrix are expressed as:

[0043]

[0044] in, is the positive sequence synchronous decoupling transfer matrix, is the negative sequence synchronous decoupling conversion matrix. After transformation, the d-axis and q-axis double frequency components under the negative sequence synchronous decoupling coordinates are obtained as follows:

[0045]

[0046] in, and They represent the d-axis and q-axis double frequency components and double frequency components under the negative sequence synchronous decoupling coordinates. n Indicates the negative sequence amplitude of the phase voltage, is the negative sequence voltage phase under this reference. Since the commutation bus zero sequence voltage has no effect on the converter output zero sequence voltage, the zero sequence voltage is ignored.

[0047] Step 3: Using negative sequence crossover The phase information φ of the additional angle Δα to be injected into the secondary ripple disturbance is calculated by the inverter trigger angle command α in the DC control system. Δα , the secondary ripple amplitude information U 2f0 After passing through the amplitude filter, the input is input into the proportional integral controller (PI) to dynamically obtain the amplitude information A of the additional angle Δα that should be injected into the secondary ripple disturbance Δα ;

[0048] pass The phase information φ of Δα is calculated with α Δα , whose expression is:

[0049]

[0050] in, and represents the negative-sequence q-axis double frequency component and the negative-sequence d-axis double frequency component obtained by DDSRF-SPLL, and α represents the trigger angle command output by the DC control system.

[0051] The detected DC voltage information U D Extract the secondary ripple amplitude information U through the notch filter 2f0 , the notch filter transfer function is as follows:

[0052]

[0053] Where ω0 is the grid voltage fundamental angular frequency, η is the quality factor;

[0054] The secondary ripple information of the voltage output of the notch filter U 2f0 After filtering, the half-period maximum value U is obtained 2f , the filter expression is:

[0055]

[0056] Among them, U 2f0 (n) represents the nth voltage secondary ripple information U within half a control cycle 2f0 The sampling value of N represents the number of sampling values ​​within a control cycle, that is, U 2f0 (1) represents U 2f0 Current sampling value, U 2f0 (N / 2) represents the sampling value before half the control cycle;

[0057] Subtract the maximum value U of the filter output half cycle from 0 2f The control error is obtained and input into the PI controller. Considering that the trigger angle of the new hybrid converter needs to be less than π, and the conventional trigger angle of the DC control system is about 130°~140°, the amplitude information A of the secondary ripple disturbance additional angle Δα should be injected. Δα It needs to be less than π / 6, so the upper and lower limits of the PI controller are π / 6 and -π / 6 respectively;

[0058] Get the output value of the PI controller with upper and lower limits of π / 6 and -π / 6 respectively as the amplitude information A of the additional angle Δα to be injected into the secondary ripple disturbance Δα .

[0059] Step 4: The phase information φ of the additional angle Δα to be injected into the secondary ripple disturbance obtained in step 3 Δα After normalization, the amplitude information A of the additional angle Δα of the secondary ripple disturbance should be injected Δ Multiplying them, we can calculate the additional angle Δα signal that should be injected into the secondary ripple disturbance, and its expression is:

[0060]

[0061] in, and It represents the negative sequence q-axis voltage amplitude and d-axis voltage amplitude obtained by DDSRF-SPLL, and the secondary ripple disturbance additional angle Δα signal should be injected with a minimum value of -π / 6 and a maximum value of π / 6;

[0062] Step 5: Superimpose the obtained secondary ripple disturbance additional angle Δα signal on the inverter side controller output trigger angle instruction α to obtain the final converter output instruction α ord Its expression is:

[0063]

[0064] The final output instruction α ord The trigger pulse generation module of the DC control system generates trigger signals for each valve arm, controlling the switching of the DC transmission system's thyristors and suppressing secondary ripple on the DC side. It should be noted that injecting the secondary ripple disturbance with an additional angle Δα increases the trigger angle, so the converter must be operating in self-shutdown mode to activate this control; otherwise, there is a risk of commutation failure. Based on these requirements, this control can be activated simultaneously with the self-shutdown mode and can be implemented in conjunction with the conventional DC system fault detection module, eliminating the need for an additional detection module.

[0065] Step 6: Output the final instruction α ord The trigger pulse generation module of the DC control system generates trigger signals for each valve arm, which can control the switching of the thyristors in the DC transmission system and suppress the secondary ripple on the DC side.

[0066] Figure 4 This is the real-time simulation experiment result of the embodiment of the present invention.

[0067] Figure 4 This demonstrates that the DC power transmission system with a controllable commutation converter according to an embodiment of the present invention can effectively suppress secondary ripple and ensure DC voltage stability under grid fault conditions. This method exhibits the following advantages when the receiving grid is unbalanced:

[0068] (1) By referring to the AC / DC voltage mapping equation of the phase-controlled converter and the self-shutdown characteristics of the controllable commutated converter, the unbalanced triggering of each valve arm is achieved by injecting a double-frequency disturbance signal into the system trigger angle, effectively reducing the double-frequency fluctuation of the DC side voltage under unbalanced conditions of the HVDC system;

[0069] (2) The suppression of the double frequency fluctuation of the DC side voltage effectively reduces the voltage and current stress of the converter valve arm.

[0070] (3) Wide applicability. The simulation results under single-phase inductive grounding and metallic grounding faults show that the proposed control strategy effectively suppresses the secondary ripple voltage under unbalanced grid conditions and improves the stability of transient power transmission in HVDC system fault conditions.

[0071] Figure 4The feasibility and practical value of this method have been verified, which can effectively improve the transient operation performance of the new hybrid converter and is conducive to the further development of the new hybrid converter in actual engineering.

[0072] Example 2

[0073] Embodiment 2 of the present invention provides a DC side voltage stabilization control system for a CLCC-HVDC system under a power grid fault corresponding to the above-mentioned embodiment 1, including a memory, a processor, and a computer program stored in the memory; the processor executes the computer program in the memory to implement the steps of the method in the above-mentioned embodiment 1.

[0074] In some implementations, the memory may be a high-speed random access memory (RAM), and may also include a non-volatile memory, such as at least one disk storage.

[0075] In other implementations, the processor may be a central processing unit (CPU), a digital signal processor (DSP), or other general-purpose processors, which are not limited herein.

[0076] Example 3

[0077] Embodiment 3 of the present invention provides a computer-readable storage medium corresponding to the above-mentioned embodiment 1, on which a computer program / instruction is stored. When the computer program / instruction is executed by a processor, the steps of the method of the above-mentioned embodiment 1 are implemented.

[0078] Computer readable storage media can be tangible devices that hold and store instructions used by instruction execution devices. Computer readable storage media can be, for example, but not limited to, electronic storage devices, magnetic storage devices, optical storage devices, electromagnetic storage devices, semiconductor storage devices, or any combination thereof.

[0079] Those skilled in the art will appreciate that the embodiments of the present application can be provided as methods, systems, or computer program products. Therefore, the application can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code. The scheme in the embodiment of the present application can be implemented in various computer languages, for example, object-oriented programming language Java and literal translation scripting language JavaScript, etc.

[0080] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the steps in the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0081] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 The steps for the function specified in one or more boxes.

[0082] Although the preferred embodiments of the present application have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present application.

[0083] Obviously, those skilled in the art may make various changes and modifications to this application without departing from the spirit and scope of this application. Thus, if these modifications and variations of this application fall within the scope of the claims of this application and their equivalents, this application is intended to include these modifications and variations.

Claims

1. A method for controlling DC-side voltage stability in a CLCC-HVDC system under a power grid fault, wherein the CLCC-HVDC system comprises a controllable commutation converter connected to a receiving-end power grid via a grid impedance; the controllable commutation converter comprises three parallel bridge arms, each bridge arm comprising two series-connected converter valve groups; each converter valve group comprises two parallel branches, one of which comprises a thyristor and a first fully-controlled device connected in series with the thyristor, and the other comprises a second fully-controlled device and a diode connected in series with the second fully-controlled device; the method is characterized in that: The method comprises the following steps: Detect the three-phase AC voltage u of the receiving end power grid a 、u b 、u c and CLCC-HVDC system DC voltage U D ; The receiving end three-phase AC voltage u a 、u b 、u c Obtain the negative sequence crossover quantity through the dual synchronous decoupling coordinate system phase-locked loop The CLCC-HVDC system DC voltage U D Through the notch filter, the secondary ripple amplitude information U is extracted 2f0 ; Using negative sequence crossover The phase information φ of the additional angle Δα to be injected into the secondary ripple disturbance is calculated based on the inverter trigger angle command α in the CLCC-HVDC system. Δα , the secondary ripple amplitude information U 2f0 The output result after the amplitude filter is input into the proportional integral controller to dynamically obtain the amplitude information A of the additional angle Δα that should be injected into the secondary ripple disturbance Δα ; The phase information φ of the additional angle Δα to be injected into the secondary ripple disturbance is used Δα and the amplitude information A of the additional angle Δα of the secondary ripple disturbance to be injected Δα The signal of the additional angle Δα of the secondary ripple disturbance that should be injected is calculated; The obtained secondary ripple disturbance additional angle Δα signal is superimposed on the trigger angle instruction α to obtain the final output instruction α of the controllable commutation converter. ord ; Using the final output instruction α ord Generate trigger signals for each valve arm to control the opening and closing of the thyristors in the CLCC-HVDC system.

2. The DC side voltage stabilization control method of the CLCC-HVDC system under power grid fault according to claim 1, characterized in that: The transfer function of the notch filter G notch (s) is expressed as: Where ω0 is the fundamental angular frequency of the grid voltage, η is the quality factor, and s is the complex frequency variable in the Laplace transform.

3. The DC side voltage stabilization control method of a CLCC-HVDC system under a power grid fault according to claim 1, characterized in that: The amplitude information A of the additional angle Δα of the secondary ripple disturbance should be injected Δα The specific acquisition process includes: The voltage secondary ripple information U output by the trap 2f0 After the filter, the half-period maximum value U is obtained 2f ; Subtract the maximum value U of the filter output half cycle from 0 2f Then the control error is obtained and input into the PI controller. The upper and lower limit values ​​of the PI controller are π / 6 and -π / 6 respectively. Then the output value of the PI controller with the upper and lower limit values ​​of π / 6 and -π / 6 respectively is the amplitude information A of the additional angle Δα of the secondary ripple disturbance to be injected. Δα ; in, U 2f_0 (n) represents the nth voltage secondary ripple information U within half a control cycle 2f0 The sampling value of N represents the number of sampling values ​​within a control cycle, that is, U 2f_0 (1) represents U 2f0 Current sampling value, Indicates the sample value half the control cycle length ago.

4. The DC side voltage stabilization control method of a CLCC-HVDC system under a power grid fault according to claim 1, characterized in that: The phase information φ of the additional angle Δα of the secondary ripple disturbance should be injected Δα The expression is: in, and They respectively represent the negative-sequence q-axis double frequency component and the negative-sequence d-axis double frequency component obtained by the dual synchronous decoupling coordinate system phase-locked loop DDSRF-SPLL.

5. The DC side voltage stabilization control method of a CLCC-HVDC system under a power grid fault according to claim 1, characterized in that: The expression of the additional angle Δα signal that should be injected into the secondary ripple disturbance is: in, and represents the negative sequence q-axis voltage amplitude and d-axis voltage amplitude obtained by DDSRF-SPLL, and They respectively represent the negative-sequence q-axis double frequency component and the negative-sequence d-axis double frequency component obtained by the dual synchronous decoupling coordinate system phase-locked loop DDSRF-SPLL.

6. The DC side voltage stabilization control method of a CLCC-HVDC system under a power grid fault according to claim 1, characterized in that: The final output instruction of the controllable commutation converter is α ord The expression is:

7. A DC side voltage stabilization control system for a CLCC-HVDC system under a power grid fault, comprising a memory, a processor, and a computer program stored in the memory; characterized in that: The processor executes the computer program to implement the steps of the method according to any one of claims 1 to 6.

8. A computer-readable storage medium having a computer program / instruction stored thereon; characterized in that: When the computer program / instructions are executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

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