Control method of active clamping circuit

Abstract

The invention discloses a control method of an active clamping circuit, which relates to the technical field of circuit control, and comprises the steps of S1, sampling peak current of input current of the active clamping circuit, S2, sampling input voltage of the active clamping circuit, S3, sampling output voltage of the active clamping circuit, S4, sampling the peak current of the input current of the active clamping circuit, and S5, sampling the output voltage of the active clamping circuit. Step S5, recording the time when the input current reaches the peak current; and step S5, calculating the time when the input current drops from the peak current to the valley current. According to the invention, accurate peak current control and negative current control can be realized only by adopting one current transformer and one low-cost digital controller, and the current of the first switch does not need to be sampled when the negative current control is realized, so that a corresponding sampling element or sampling circuit is not needed; while the circuit is simplified, the control reliability and the high working efficiency of the active clamping circuit can still be ensured.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit control, and in particular to a control method of an active clamping circuit. Background Art

[0002] Compared with passive clamping technology (such as Zener diode clamping, RCD clamping, etc.), active clamping technology can recover the leakage inductance energy of the transformer, effectively suppress voltage spike problems, and reduce the voltage stress of the device. At the same time, the switch tube can realize soft switching to reduce switching losses. Therefore, it is widely used in power conversion occasions requiring high efficiency, high switching frequency, and high power density.

[0003] like Figure 1 As shown, the active clamp circuit needs to control the current I 1 The peak current is controlled, so a current transformer CT is needed 1 For current I 1 In order to achieve zero voltage switching (ZVS) of the switch in the active clamp circuit, in addition to peak current control, accurate negative current control is also required, so a current transformer CT needs to be set. 2 and current transformer CT 3 Sample switch Q separately 1 and switch Q 2 For currents in the active clamp circuit, multiple current transformers will increase power loss and reduce the efficiency of the active clamp circuit. Summary of the invention

[0004] In order to solve the above problems, the present invention requires a current transformer and a low-cost digital controller to achieve accurate peak current control and negative current control.

[0005] In order to achieve the above object, a technical solution of an active clamping circuit of the present invention is:

[0006] Step S1, sampling the peak current of the input current of the active clamping circuit,

[0007] Step S2, sampling the input voltage of the active clamping circuit,

[0008] Step S3, sampling the output voltage of the active clamping circuit,

[0009] Step S4, recording the time when the input current reaches the peak current,

[0010] Step S5, calculating the time it takes for the input current to drop from the peak current to the valley current.

[0011] Furthermore, the formula for calculating the time Toff for the input current to drop from the peak current to the valley current in step S5 is as follows:

[0012]

[0013] Wherein V1 is the input voltage, Ton is the time when the input current reaches the peak current, N is a coefficient, and V2 is the output voltage.

[0014] An active clamping circuit adopts the control method of the active clamping circuit, comprising a current transformer,

[0015] a first inductor, wherein a first end of the first inductor is connected to a second end of the current transformer,

[0016] a second transformer, wherein the second end of the first inductor is connected to the first end of the primary winding of the second transformer,

[0017] a first switch, wherein a first end of the first switch is connected to a first end of the first inductor, and a second end of the first switch is connected to a second end of the primary winding of the second transformer,

[0018] a second switch, wherein a first end of the second switch is connected to a second end of the first switch, and a second end of the second switch is connected to a second ground end;

[0019] a first capacitor, wherein a first end of the first capacitor is connected to a first end of the first switch, a second end of the first capacitor is connected to a second end of the second switch, and an input voltage is input to a first end of the current transformer and a second end of the first capacitor.

[0020] a fourth diode, wherein an anode of the fourth diode is connected to the second end of the secondary winding of the second transformer, and a cathode of the fourth diode is connected to the third ground terminal,

[0021] A second resistor, one end of the second resistor is connected to the first end of the secondary winding of the second transformer, the other end of the second resistor is connected to the cathode of the fourth diode, and the voltage across the two ends of the second resistor is the output voltage.

[0022] Further, the current transformer includes a first transformer, the second end of the secondary winding of the first transformer is connected to the first ground end, the first end of the primary winding of the first transformer is the first end of the current transformer, and the second end of the primary winding of the first transformer is the second end of the current transformer.

[0023] a first diode, wherein a cathode of the first diode is connected to a first end of a secondary winding of the first transformer,

[0024] a second diode, wherein an anode of the second diode is connected to an anode of the first diode, and a cathode of the second diode is connected to a second end of a secondary winding of the first transformer,

[0025] a third diode, wherein the anode of the third diode is connected to the cathode of the first diode,

[0026] A first resistor, wherein the cathode of the third diode is connected to the cathode of the second diode through the first resistor.

[0027] Furthermore, the third diode and the first resistor form a sampling branch, and the peak current of the input current is sampled through the sampling branch.

[0028] Furthermore, it also includes a controller, which sends the sampled peak current of the input current, the input voltage and the output voltage to the controller.

[0029] Furthermore, the controller starts timing when the second switch is turned on, and stops timing when the input current reaches its peak current.

[0030] Furthermore, the controller is a digital signal processor.

[0031] Furthermore, the first switch and the second switch are complementarily turned on.

[0032] Furthermore, the time when the input current reaches the peak current is the on-time of the second switch in a unit cycle, and the time when the input current drops from the peak current to the valley current is the off-time of the second switch in a unit cycle.

[0033] Beneficial effect: A control method for an active clamping circuit of the present invention can achieve precise peak current control and negative current control by only using a current transformer and a low-cost digital controller. When achieving negative current control, there is no need to sample the current of the first switch, thereby eliminating the need for corresponding sampling elements or sampling circuits. While simplifying the circuit, the reliability of control and the high working efficiency of the active clamping circuit can still be guaranteed.

[0034] In order to make the above features and advantages of the invention more obvious and easy to understand, embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 The diagram is a sampling diagram of peak current control and negative current control of an active clamping circuit in the prior art.

[0036] Figure 2 The present invention is a structural diagram of an active clamping circuit in a control method of an active clamping circuit.

[0037] Figure 3 The present invention is a flow chart of a control method of an active clamping circuit.

[0038] Figure 4 Schematic diagram of the input current variation with time in the active clamping circuit within a unit cycle. DETAILED DESCRIPTION

[0039] In order to make the purpose and technical solution of the embodiment of the present invention clearer, the technical solution of the embodiment of the present invention will be clearly and completely described below in conjunction with the drawings of the embodiment of the present invention. Obviously, the described embodiment is a part of the embodiment of the present invention, not all of the embodiments. Based on the described embodiment of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0040] The present invention provides a control method for an active clamping circuit for use in Figure 2 The active clamp circuit shown includes a current transformer CT 1 , capacitor C 1 , switch Q 1 , switch Q 2 、Inductance L 1 、Transformer T 2 and diode D 4 , the transformer T 2 The primary winding N p2 The first end passes through the inductor L 1 Connect the current transformer CT 1 The second end of the switch Q 1 The first end is connected to the current transformer CT 1 The second end of the switch Q 1 The second end is connected to the primary winding N p2 The second end of the excitation inductor L m The equivalent parallel connection is in the primary winding N p2 Across the switch Q 2 The first end of the switch Q 1 The second end of the switch Q 2 The second end is connected to the ground terminal GND 2 , the capacitor C 1 The first end of the switch Q 1 The first end of the capacitor C 1 The second end of the switch Q 2 The second end, input voltage V 1 Input the current transformer CT 1 The first end and the capacitor C 1 The second end of the transformer T 2 The secondary winding N s2 The first end passes through the resistor R 2Connect the diode D 4 The cathode of the diode D 4 The cathode is connected to the ground terminal GND 3 , the diode D 4 The anode of the secondary winding N is connected s2 The second end of the resistor R 2 The voltage across the two ends is the output voltage V 2 .

[0041] Furthermore, the switch Q 2 and the switch Q 1 Complementary conduction.

[0042] The current transformer CT 1 Including transformer T 1 、Diode D 1 、Diode D 2 、Diode D 3 and resistor R 1 , the diode D 1 and the diode D 2 In reverse series, the diode D 1 The cathode of the transformer T is connected 1 The secondary winding N s1 The first end of the diode D 2 The cathode of the secondary winding N is connected s1 The second end of the secondary winding N s1 The second end is connected to the ground terminal GND 1 , the diode D 3 The cathode of the resistor R 1 The first end of the diode D 3 The anode of the diode D is connected 1 The cathode, the resistor R 1 The second end of the diode D 2 The cathode of the transformer T 1 The primary winding N p1 The first end is the current transformer CT 1 The first end of the transformer T 1 The primary winding N p1 The second end is the current transformer CT 1 The second end.

[0043] Furthermore, the diode D 2 For the clamping diode.

[0044] More specifically, the diode D 2 It could be a Zener diode.

[0045] like Figure 3 FIG. 1 is a flow chart of a control method of an active clamping circuit according to the present invention, comprising:

[0046] Step S1, combining Figure 2 , can be achieved by using the transformer T 1 The secondary winding N s1 A sampling branch is connected in parallel at both ends to sample the current I 1 The peak current I peak sent to a controller, the sampling branch includes a diode D 3 and resistor R 1 , but this sampling method is not the only one, and the present invention does not limit the sampling current I 1 The peak current I peak method.

[0047] Step S2, sampling Figure 2 The input voltage V 1 into the above controller.

[0048] Step S3, sampling Figure 2 The output voltage V of the active clamp circuit 2 into the above controller.

[0049] Step S4, combining Figure 4 , controlled by the above controller Figure 1 Middle switch Q 2 The timing starts when the conduction starts, until the current I 1 Reaching its peak current I peak Stop timing when the switch Q 2 The on time T on .

[0050] Further, the controller may be a digital signal processor (DSP).

[0051] Step S5: the input voltage V is known. 1 , the output voltage V 2 and the time T on , the switch Q is calculated by the above controller 2 The off time T off ,Depend on Figure 4 It can be seen that the time T off That is the unit period T s Internal current I 1 From the peak current I peak Drop to valley current I neg The calculation formula involved is as follows:

[0052]

[0053] Where N is Figure 1 Medium transformer T 2 The turns ratio.

[0054] In summary, the present invention only uses a current transformer CT 1 To sample the current I 1 The peak current I peak Then input the controller, and use the controller to achieve the time T off The calculation reduces the power loss of multiple current transformers connected to the active clamping circuit, while simplifying the circuit and still ensuring the reliability of control and the high working efficiency of the active clamping circuit.

[0055] Although the present invention has been disclosed as above by way of embodiments, it is not intended to limit the present invention. Any person having ordinary knowledge in the technical field may make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be determined by the scope of the attached patent application.

Claims

1. A control method for an active clamping circuit, It is characterized in that include: Step S1, sampling the peak current of the input current of the active clamping circuit, Step S2, sampling the input voltage of the active clamping circuit, Step S3, sampling the output voltage of the active clamping circuit, Step S4, recording the time when the input current reaches the peak current, Step S5, calculating the time it takes for the input current to drop from the peak current to the valley current.

2. A control method for an active clamping circuit as claimed in claim 1, It is characterized in that In step S5, the time T for the input current to drop from the peak current to the valley current is calculated. off The formula is as follows: Where V 1 is the input voltage, T on is the time it takes for the input current to reach the peak current, N is a coefficient, V 2 is the output voltage.

3. An active clamping circuit, comprising: a control method for an active clamping circuit as claimed in any one of claims 1 to 2; It is characterized in that Including current transformers, a first inductor, wherein a first end of the first inductor is connected to a second end of the current transformer, a second transformer, wherein the second end of the first inductor is connected to the first end of the primary winding of the second transformer, a first switch, wherein a first end of the first switch is connected to a first end of the first inductor, and a second end of the first switch is connected to a second end of the primary winding of the second transformer, a second switch, wherein a first end of the second switch is connected to a second end of the first switch, and a second end of the second switch is connected to a second ground end; a first capacitor, wherein a first end of the first capacitor is connected to a first end of the first switch, a second end of the first capacitor is connected to a second end of the second switch, and an input voltage is input to a first end of the current transformer and a second end of the first capacitor. a fourth diode, wherein an anode of the fourth diode is connected to the second end of the secondary winding of the second transformer, and a cathode of the fourth diode is connected to the third ground terminal, A second resistor, one end of the second resistor is connected to the first end of the secondary winding of the second transformer, the other end of the second resistor is connected to the cathode of the fourth diode, and the voltage across the two ends of the second resistor is the output voltage.

4. An active clamping circuit as claimed in claim 3, It is characterized in that The current transformer comprises a first transformer, the second end of the secondary winding of the first transformer is connected to the first ground end, the first end of the primary winding of the first transformer is the first end of the current transformer, and the second end of the primary winding of the first transformer is the second end of the current transformer. a first diode, wherein a cathode of the first diode is connected to a first end of a secondary winding of the first transformer, a second diode, wherein an anode of the second diode is connected to an anode of the first diode, and a cathode of the second diode is connected to a second end of a secondary winding of the first transformer, a third diode, wherein the anode of the third diode is connected to the cathode of the first diode, A first resistor, wherein the cathode of the third diode is connected to the cathode of the second diode through the first resistor.

5. An active clamping circuit as claimed in claim 4, It is characterized in that The third diode and the first resistor form a sampling branch, and the peak current of the input current is sampled through the sampling branch.

6. An active clamping circuit as claimed in claim 5, It is characterized in that The device also includes a controller, into which the sampled peak current of the input current, the input voltage and the output voltage are sent.

7. An active clamping circuit as claimed in claim 6, It is characterized in that The controller starts timing while controlling the second switch to be turned on, and stops timing when the input current reaches its peak current.

8. An active clamping circuit as claimed in claim 7, It is characterized in that The controller is a digital signal processor.

9. An active clamping circuit as claimed in claim 8, It is characterized in that The first switch and the second switch are complementarily turned on.

10. An active clamping circuit as claimed in claim 9, It is characterized in that The time when the input current reaches the peak current is the on-time of the second switch in a unit cycle, and the time when the input current drops from the peak current to the valley current is the off-time of the second switch in a unit cycle.

Images