Authentication method

Abstract

The embodiment of the invention relates to an authentication method. A method of performing authentication of a first device to a second device uses a signature of an analog signal of the first device. The signature corresponds to a temporal change in at least one physical quantity associated with the analog signal during implementation of the at least one particular operation. The at least one particular operation may be to implement an electronic function or program.

Description

[0001] Priority claim

[0002] This application claims the benefit of priority of European Patent Application No. 23307038.2 filed on November 23, 2023, and claims the benefit of priority of French Patent Application No. 2402393 filed on March 11, 2024, the contents of which are hereby incorporated by reference in their entirety to the maximum extent permitted by law. Technical Field

[0003] The present disclosure relates generally to electronic circuits and devices, and more particularly to the security of electronic circuits and devices. The present disclosure relates more particularly to the implementation of an authentication method that enables, for example, multiple electronic devices to begin reliable communication. Background Art

[0004] The authentication phase usually precedes communication between two electronic devices or circuits. During this phase, the authentication method implemented by the two devices enables verification that the two devices are authorized to communicate with each other.

[0005] During the communication between a terminal type device and an electronic device or device of a peripheral type (e.g. a consumable or an accessory), an authentication method is often used. In this case, the authentication method enables the access of the peripheral device to the data and / or functions of the terminal type device to be verified. The authentication method is the first line of defense against malicious devices trying to access the data and / or functions of other devices.

[0006] It would be desirable to be able to improve upon known authentication methods, at least in part.

[0007] There is a need for a more secure authentication method that allows an electronic circuit or device to more reliably authenticate another electronic circuit or device.

[0008] In particular, there is a need to prevent clones of electronic devices from being able to authenticate themselves in their place.

[0009] There is a need for more secure authentication methods for electronic circuits and devices.

[0010] There is a need in the art to overcome all or some of the disadvantages of known authentication methods. Summary of the invention

[0011] One embodiment provides an authentication method using a signature of an analog signal of an electronic device as a means of identification.

[0012] One embodiment provides a method of performing authentication of a first device to a second device, wherein a signature of a first analog signal of the first device is used for authentication.

[0013] Another embodiment provides a system for performing authentication of a first device to a second device, wherein a signature of a first analog signal of the first device is used for authentication.

[0014] According to one embodiment, the signature corresponds to a temporal variation of at least one physical quantity associated with the first signal during the implementation of at least one specific operation.

[0015] According to one embodiment, the operation is the implementation of an electronic function or procedure.

[0016] According to one embodiment, said signature is obtained by at least one circuit for measuring said analog signal.

[0017] According to an embodiment, the at least one measurement circuit forms part of the first device, part of the second device, or part of a third electronic device external to the first and second devices.

[0018] According to one embodiment, during implementation of the operations, the first device is in a safe mode.

[0019] According to one embodiment, the second device verifies the signature by using at least one signature model.

[0020] According to one embodiment, the second device verifies the signature by comparing the signature with the at least one signature model.

[0021] According to one embodiment, the second device verifies the signature by extracting data from the signature.

[0022] According to one embodiment, the second device verifies the signature by using a neural network.

[0023] According to one embodiment, the neural network has been trained based on data representing a signature model.

[0024] According to one embodiment, the signature is encrypted when it is transmitted between the first device and the second device.

[0025] According to one embodiment, the authentication method is of the verifier / prover type.

[0026] According to one embodiment, the authentication system is of the verifier / certifier type.

[0027] According to one embodiment, a signature of at least one second analog signal of said first device is used for authentication.

[0028] According to one embodiment, the first signal comprises an overcurrent rejected by a current smoothing circuit of a circuit used to power the first device.

[0029] According to one embodiment, the circuit for powering the first device comprises an analog-to-digital converter configured to measure the overcurrent, the analog-to-digital converter configured to store data in a memory.

[0030] Another embodiment provides an electronic device as the first device in the aforementioned method or the first device in the aforementioned system.

[0031] Another embodiment provides an electronic device as the second device in the aforementioned method or the second device in the aforementioned system. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] The above features and advantages and other features and advantages will be described in detail in the remainder of the disclosure of specific embodiments given by way of illustration and not limitation with reference to the accompanying drawings, in which:

[0033] Figure 1 shows a configuration to implement about Figure 2 and Figure 3 An example of an electronic device implementing the described authentication method;

[0034] Figure 2 A block diagram illustrating a first implementation mode of a method for performing authentication of a first device to a second device is shown;

[0035] Figure 3 A block diagram illustrating a second implementation mode of a method for performing authentication of a first device to a second device is shown;

[0036] Figure 4 An example of an embodiment of an electronic device power supply circuit is shown very schematically in block form;

[0037] Figure 5 Another embodiment example of an electronic device power supply circuit is shown very schematically in block form; and

[0038] Figure 6 A block diagram illustrating a third mode of realisation of a method of performing authentication of a first device to a second device is shown. DETAILED DESCRIPTION

[0039] The same features have been designated by the same reference numerals in the various figures. In particular, common structural and / or functional features between the various embodiments may have the same reference numerals, and may be provided with the same structure, dimensions, and material properties.

[0040] For clarity, only those steps and elements that are useful for understanding the described embodiments are shown and described in detail.

[0041] Unless otherwise stated, when reference is made to two elements being connected together, this means a direct connection without any intervening elements other than conductors, and when reference is made to two elements being coupled together, this means the two elements may be connected or they may be coupled via one or more other elements.

[0042] In the following description, when referring to absolute position qualifiers, such as "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as "top", "bottom", "upper", "lower", etc., or orientation qualifiers, such as "horizontal", "vertical", etc., unless otherwise specified, reference is made to the orientation of the drawing.

[0043] Unless otherwise indicated, the expressions "about", "approximately", "substantially" and "approximately" mean plus or minus 10%, preferably plus or minus 5%.

[0044] The embodiments described below relate to the implementation of an authentication method that enables authentication of a first electronic device to a second electronic device, such as for future communications between these first and second devices. These embodiments are more specifically a verifier / certifier type, also referred to as a verifier / candidate type authentication method, in which a verifier device (here the second device) sends data to a certifier (candidate) device (here the first device) so that the verifier device applies a transformation to the certifier (candidate) device. The certifier (candidate) device then sends the result of the transformation back to the verifier device so that the verifier device verifies the certifier (candidate) device. If the result of the verification is correct, the certifier (candidate) device is authenticated to the verifier device.

[0045] In this context, an authentication system is referred to as an electronic system that includes a verifier device and a prover device.

[0046] An object of these embodiments is to provide a more secure and reliable authentication method, in particular an authentication method configured to distinguish an electronic device from one of its clones. A so-called "clone" refers to an electronic device that is manufactured to have the same operation / behavior as another device with the intention of replacing it, such as for malicious purposes.

[0047] The solution provided by the embodiments described below is to use the signature of the analog signal of the first device to authenticate the first device to the second device. Reference to the "signature of the analog signal" refers to the time change of one or more physical quantities associated with the analog signal during the implementation of at least one specific operation (such as the implementation of an electronic function or program) by the first device. The quantity can be its voltage amplitude, current amplitude, frequency, etc., and the quantity is described in detail below. According to the described embodiment, the signature is obtained by using one or more measurement circuits that form a part of the first device, a part of the second device, or a part of a third device outside the first and second devices. The signature is supplied to the second device, and the second device verifies the signature by using, for example, one or more signature models. According to a specific embodiment, the second device can use a neural network to verify, classify, or even compare all or part of the signatures supplied using (multiple) signature models.

[0048] The use of such an analog signature makes it possible to distinguish an electronic device from one of its clones. In fact, the temporal variations of the analog signal depend not only on the operations implemented by the device, but also on the material reality of the device, such as the layout of the electronic components that make up the device, the manufacturing process used, etc. Therefore, multiple electronic devices from the same manufacturer will have very similar or even identical signatures, but clones will almost certainly have different signatures.

[0049] The specific solution provided by the embodiments described below is to generate a signature by using a current rejected by a current smoothing circuit of a prover device. Such a current smoothing circuit is used to smooth the supply current of an electronic device. This type of circuit is used to prevent side channel attacks that enable data to be recovered from the supply current, etc. The current smoothing circuit generally rejects an overcurrent corresponding to the difference between the fixed current and the supply current. These embodiments are about Figures 4 to 6 to describe.

[0050] In addition, the embodiments described below are specifically configured for use in any type of system that requires authentication of two electronic circuits or devices, such as, for example, a system including a terminal-type device and a peripheral or consumer-type device, or such as, for example, a system including multiple electronic circuits formed on the same chip.

[0051] Figure 1 is a block diagram showing very schematically the architecture of an example of an electronic device 100, which is configured to implement an authentication method according to one embodiment. The device 100 may indifferently be a verifier device or a prover device of the authentication method.

[0052] According to one example, the electronic device 100 includes a processor 101 (CPU), which is configured to implement different data processing operations for data stored in a memory and / or provided by other circuits of the device 100. According to one embodiment, the processor 101 is configured to implement an authentication method.

[0053] According to an example, the electronic device 100 further comprises different types of memories 102 (MEM), such as, for example, non-volatile memory, volatile memory and / or read-only memory. Each memory 102 is configured to store different types of data.

[0054] According to one example, the electronic device 100 further includes a security element 103 (SE), which is configured to process sensitive data and / or secret data. The security element 103 may include its own (multiple) processors, its own one or more memories, etc. According to one embodiment, the security element 101 is configured to implement an authentication method.

[0055] According to an example, the electronic device 100 may further include an interface circuit 104 (IN / OUT), which is configured to send and / or receive data from outside the device 100. The interface circuit 104 may also be configured to implement data display, such as a display screen.

[0056] According to one example, the electronic device 100 also includes different circuits 105 (FCT1) and 106 (FCT2) configured to perform different functions. For example, the circuits 105 and 106 may include measurement circuits, data conversion circuits, etc. According to one embodiment, the circuits 105 and 106 may include one or more circuits configured to implement the authentication method. According to a specific embodiment, the circuit 105 may include a measurement circuit, an analog-to-digital converter, a calculation circuit, etc.

[0057] According to an example, the electronic device 100 further includes one or more data buses 107 configured to transfer data between different components thereof.

[0058] According to one embodiment, a system including two devices of the type of device 100 may be configured to implement an authentication method according to one embodiment. Such a system is referred to herein as an authentication system.

[0059] Figure 2 1 is a block diagram illustrating a first implementation mode of an authentication method 200, which enables authentication of a first electronic device P (referred to as a prover device P) to a second electronic device V (referred to as a verifier device V). In other words, the authentication method 200 is configured to be implemented by an authentication system including devices P and V. According to one embodiment, devices P and V are about Figure 1 The type of device 100 is described.

[0060] As described above, the authentication method 200 is a verifier / prover type of method.

[0061] The authentication method 200 begins at an initial step 201 (Send Challenge), for which purpose the verifier device V selects a data item C (referred to as challenge data item C) to send to the prover device P. According to one example, the challenge C is a set of binary data.

[0062] According to one embodiment, the data item C is selected from a limited group of data capable of implementing the authentication method 200, and according to one embodiment, the size of the group is determined by the format of the data it includes, such as 128-bit binary data. According to one example, the group may include initialization data for a specific operation implemented by the prover device P, the initialization data being generated randomly or pseudo-randomly, for example, by using a leakage model. According to one example, when the specific operation is an encryption algorithm using the AES type, the data may be a data pair including an input value and an encryption key. According to another example, the group may include encrypted data.

[0063] At step 202 (Receive Challenge) following step 201, the prover device P receives the data item C and can start implementing the authentication method.

[0064] At step 203 (operation) following step 202, the verifier device P uses the data item C to implement a specific operation. According to one embodiment, the operation is to implement an electronic function (such as a specific circuit of the device P) or a program. According to one embodiment, the operation is an operation that includes an operation scheme that is specific to the prover device P (i.e., depends on the structure of the prover device P or its manufacturing process). According to one embodiment, the operation is an operation that causes data to be leaked. In addition, the use of the data item C must have an impact on the operation and / or the result of the operation.

[0065] According to an example, the specific operation comprises applying a data encryption algorithm, for example by using the data item C as encryption key, or for example by applying the algorithm to the data item C. According to a specific example, the specific operation comprises applying an algorithm of the AES (Advanced Encryption Standard) type.

[0066] According to a specific embodiment, during implementation of certain operations, the prover device P is in a secure mode, making it less susceptible to external attacks.

[0067] At step 204 (curve) after step 203, one or more measurement circuits of the prover device P are implemented to obtain a signature Op_Curve of at least one analog signal of the prover device P during the specific operation of implementing step 203. The so-called signature of an analog signal here refers to the time variation of one or more physical quantities associated with the analog signal within a given time period. In the present case, the signature Op_Curve of the analog signal is recorded during the implementation of the specific operation. In order to obtain such a signature, one or more analog signals can be used individually or in combination. According to one embodiment, the (multiple) measurement circuits of the device P can measure the signatures of one or more analog signals.

[0068] According to a first example, the analog signal(s) measured by the measurement circuit of the P device may come from analog circuits of the device P, such as amplifiers, oscillators, timing circuits and / or delay circuits. In this case, the measurement circuit may measure the time variation of the voltage, current, frequency and / or phase shift of these analog signals. The following is a non-exhaustive list of analog signals that can be used in this case: an internal supply voltage of the prover device P; an internal clock signal of the prover device P; an analog signal originating from an interface circuit of the prover device P; and / or an analog signal originating from a random access memory or from a non-volatile memory of the prover device P.

[0069] According to a second example, the analog signal(s) measured by the measurement circuit of the device P may come from power supplies of different circuits constituting the prover device P. Thus, the power supplies concerned may be the power supply of a processor (CPU), the power supply of one or more memories, or even the general power supply of the device P. In this case, the measurement circuit may enable the measurement of temporal variations of the voltage or current of these power supplies.

[0070] According to a third example, the analog signal(s) measured by the measurement circuit of the device P may result from the activity of transistors included in the circuits constituting the device P. Thus, the transistors of interest may be transistors of a processor, in particular circuits implementing a function such as a Figure 1 The measurement circuits may be transistors of the circuit 105 described above, or even transistors forming part of a chip forming the device P. In this case, the measurement circuits may enable the temporal variation of the photon emission from these transistors to be measured by using, for example, avalanche effect diodes triggered by individual photons and associated calculation methods. The measurement circuits may also enable the temporal variation of the electromagnetic emission from these transistors to be measured by using, for example, microcoils on a metal layer.

[0071] Once the signature Op_Curve of the simulated signal(s) has been obtained, the prover device P sends it to the verifier device. According to one embodiment, the prover device P may send said signature Op_Curve in a secure way, for example by encrypting it.

[0072] At step 205 (Receive Curve) following step 204, the verifier device V receives the signature from the prover device P.

[0073] At step 206 (SPA) after step 205 and at step 207 (Model), the verifier device V verifies the received signature Op_Curve by using one or more known signature models, for example by comparing the received signature Op_Curve with one of these models, or by extracting data from the signature. This verification can be achieved, for example, by using a simple power or current analysis (SPA), or a "template attack" where the curve model used can be found, for example, by data extracted from the curve. To achieve such an attack, the curve model is generated by performing tests on thousands of reference circuits and by detecting points of interest on these curves, or by sorting the values ​​that may be extracted or leaked in descending order of probability.

[0074] According to a preferred example, the verification of step 206 can be implemented by using artificial intelligence (AI) such as a neural network (NN) of a neural processing unit (NPU) trained based on (multiple) models. The advantage of using a neural network is that it is more difficult to grasp for those who want to understand step 206. In fact, the analysis of the structure of the circuit implementing the neural network does not enable the understanding of the (multiple) operations it performs.

[0075] Furthermore, at step 206 , according to a variant, the verifier device V may take into account the data item C.

[0076] At the end of step 206 , the verifier device V obtains the result data item R.

[0077] In step 207 prior to step 206, the signature model(s) have been obtained, for example by obtaining signatures using a plurality of devices from the same manufacturing batch in a factory of a plurality of prover devices of the type of device P.

[0078] At step 208 (BYTE), which is optional and follows step 206, the result data item R is modified (eg, by being truncated) to be the data item T(R).

[0079] At step 209 (OK?) following step 208, the verifier device V uses the data item T(R) to draw a conclusion as to whether the prover device P is authenticated. In the event that step 208 is not implemented, the result data item R is used at step 209.

[0080] As previously mentioned, an advantage of using the signature of one or more simulated signals of an electronic device to authenticate it is that it may enable clones to be distinguished from authentic devices.

[0081] Figure 3 1 is a block diagram illustrating a second implementation mode of an authentication method 300, which enables authentication of a first electronic device P (referred to as a prover device P) to a second electronic device V (referred to as a verifier device V). In other words, the authentication method 300 is configured to be implemented by an authentication system including devices P and V. According to one embodiment, devices P and V are about Figure 1 The type of device 100 is described.

[0082] Authentication method 300 has the following features: Figure 2 Elements common to the methods 200 and 300 are not described in detail below, and only the differences between the methods 200 and 300 are emphasized.

[0083] More specifically, in the authentication method 300 , the measurement circuit making it possible to obtain the signature of one or more analog signals of the prover device is not arranged on the prover device P, but on the verifier device V.

[0084] Authentication method 300 therefore includes the following consecutive steps: an initial step 301 (sending a challenge) which is the same as step 201 of method 200; a step 302 (receiving a challenge) which is the same as step 202 of method 200; a step 303 (operation) which is similar to step 203 of method 200; a step 304 (curve) which is similar to step 204 of method 200 but implemented by verifier device V; a step 305 (SPA) which is the same as step 206 of method 200; a step 306 (model) which is the same as step 207 of method 200; a step 307 (BYTE) which is the same as step 208 of method 200; and a step 308 (confirmation?) which is the same as step 209 of method 200.

[0085] In the case of method 300, step 303 also includes sending a data item to the verifier device, the data item indicating that the operation has been successfully implemented, or enabling the verifier device V to verify that the operation has been successfully performed. According to an example, the specific operation of step 203 can be an operation of encrypting the data item C using an encryption key, and the sent response can include the encrypted data item.

[0086] Figure 4 An example of an embodiment of a circuit 400 is shown very schematically in block form for providing a circuit for Figure 1 The electronic device 100 is of a type described for powering an electronic device.

[0087] According to an example, the power supply circuit 400 is configured to receive a supply voltage VDD400 , a constant supply current IDD400 , and a reference potential GND400 (eg, ground). According to an embodiment, the power supply circuit is configured to deliver a supply current ICC400 .

[0088] According to one embodiment, the power supply circuit 400 includes a current smoothing circuit 401 (ILDO) configured to receive a constant current IDD400 and deliver a supply current ICC400 at its output. The circuit 401 further suppresses an overcurrent IShunt400 corresponding to the difference between the supply currents IDD400 and ICC400. This overcurrent IShunt400 can be used to analyze the activity of an electronic device including the power supply circuit 400. In fact, since the actual supply current used by the device is not accessible, only the difference between the constant supply current IDD400 and the current ICC400, i.e., the current IShunt400, shows the fluctuations of the power supply of the electronic device.

[0089] According to an example, the supply circuit 400 comprises a resistor RShunt400 which enables the dissipation of an overcurrent IShunt400 . The resistor RShunt400 is coupled between the circuit 401 and a terminal receiving a reference potential GND400 .

[0090] According to an example, the power supply circuit 400 comprises an analog-to-digital converter 402 (ADC) arranged to enable measurement of the overcurrent IShunt400. Thus, the converter 402 is coupled across the resistor RShunt400.

[0091] According to one embodiment, the power supply circuit 400 comprises a memory 403 (RAM), and the converter 402 is configured to store data in the memory 403 (RAM), the data corresponding to the measured value of the current IShunt400.

[0092] Figure 5 Another example of a circuit 500 is shown very schematically in block form for providing a circuit for Figure 1 The electronic device 100 is of a type described for powering an electronic device.

[0093] The power supply circuit 500 has Figure 4 Similar elements of the power supply circuit 400 are described. Elements common to the circuits 400 and 500 will not be described in detail below. Only the differences between the circuits 400 and 500 are emphasized.

[0094] The difference between circuit 400 and circuit 500 is that in circuit 500 , the analog-to-digital converter is configured to store data in a memory external to circuit 500 .

[0095] Thus, similar to circuit 400 , circuit 500 includes: a current smoothing circuit 401 (ILDO); a resistor RShunt400; and an analog-to-digital converter 402 (ADC).

[0096] According to one embodiment, the supply circuit 500 comprises a direct memory access (DMA) circuit 504 enabling access to a memory 503 (RAM) external to the supply circuit 500. The converter 402 is configured to store data in the memory 503 by using the circuit 504.

[0097] Figure 6 is a block diagram illustrating a third implementation mode of an authentication method 600 that enables authentication of a first electronic device P (referred to as a prover device P) to a second electronic device V (referred to as a verifier device V). In other words, the authentication method 600 is configured to be implemented by an authentication system including devices P and V.

[0098] According to one embodiment, devices P and V are related to Figure 1 The type of device 100 described. In addition, according to one embodiment, the device P includes Figure 4 A power supply circuit of the type described in circuit 400 or with respect to Figure 5 A power supply circuit of the type described is circuit 500 .

[0099] Authentication method 600 has the following features: Figure 2 Similar elements of the authentication method 200 are described. Elements common to the methods 200 and 600 will not be described in detail below, and only the differences between the methods 200 and 600 will be emphasized.

[0100] More specifically, in the authentication method 600 , the signature of the one or more analog signals of the prover device is a measured value of an overcurrent IShunt 400 of a circuit for powering the device P.

[0101] Therefore, the authentication method 600 includes the following consecutive steps: step 201 (send challenge); step 202 (receive challenge); step 203 (operation); step 604 (curve) similar to step 204 of method 200; step 205 (receive curve); step 206 (SPA); step 207 (model); step 208 (BYTE); and step 209 (confirm?).

[0102] At step 604 following step 203 , the analog-to-digital converter 402 of the power supply circuit of the prover device P is implemented to obtain a signature Op_Curve of the overcurrent IShunt400 of the circuit 401 during the specific operation implementing step 203 .

[0103] An advantage of this embodiment is that it enables the use of a current smoothing circuit to be avoided.

[0104] Various embodiments and variations have been described. Those skilled in the art will appreciate that certain features of these various embodiments and variations may be combined, and that those skilled in the art will recognize other variations. In particular, the measurement circuit for obtaining the signature Op_Curve may form neither part of the prover device P nor part of the verifier device V, but rather part of an external device. For example, when the devices V and P are circuits arranged on the same chip, the measurement circuit may be arranged on the same chip without forming part of the device V or the device P.

[0105] Furthermore, the authentication method may include, before continuing to send the challenge data item C, an operation of authenticating the prover device P by the verifier device V.

[0106] Finally, the actual implementation of the described embodiments and variants, based on the functional indications given above, is within the capabilities of a person skilled in the art.

Claims

1. A method for authenticating a first device to a second device, comprising: generating a signature comprising a first analog signal of the first device; as well as The first analog signal is used to perform authentication of the first device to the second device. 2 . The method according to claim 1 , wherein the signature corresponds to a temporal variation of at least one physical quantity during the implementation of at least one specific operation, the at least one physical quantity being associated with the first analog signal.

3. The method according to claim 2, further comprising: During implementation of the at least one specific operation, the first device is placed in a safe mode. The method according to claim 2 , wherein the at least one specific operation is the implementation of an electronic function or program.

5. The method according to claim 1, further comprising: The signature is obtained using at least one circuit, the at least one circuit being configured to measure the first analog signal. The method of claim 5 , wherein the at least one circuit for measuring is a circuit portion of the first device.

7. The method of claim 5, wherein the at least one circuit for measuring is a circuit portion of the second device.

8. The method of claim 5, wherein the at least one circuit for measuring is a circuit portion of a third electronic device, the third electronic device being external to the first device and the second device.

9. The method according to claim 1, further comprising: The signature is verified by the second device using at least one signature model.

10. The method according to claim 1, further comprising: The signature is verified by the second device by comparing the signature to at least one signature model.

11. The method according to claim 1, further comprising: The signature is verified by the second device by extracting data from the signature.

12. The method of claim 11, wherein verifying comprises: Use a neural network.

13. The method of claim 12, wherein the neural network has been trained based on data representing a signature model.

14. The method according to claim 1, further comprising: The signature is encrypted for transmission between the first device and the second device.

15. The method of claim 1, wherein the authentication is of a verifier / certifier type.

16. The method according to claim 1, further comprising: A signature of at least one second analog signal of the first device is used for the authentication.

17. The method of claim 1, wherein the first analog signal comprises an overcurrent that is rejected by a current smoothing circuit of a circuit used to power the first device.

18. The method of claim 17, wherein the circuit for powering the first device comprises an analog-to-digital converter configured to measure the overcurrent, the analog-to-digital converter configured to store data in a memory.

19. An electronic device, configured as the first device in the method according to claim 1.

20. An electronic device, configured as the second device in the method according to claim 1.

21. A system comprising: First device; Second device; as well as An authentication system wherein a signature of a first analog signal of the first device is used to authenticate the first device to the second device.

22. The system of claim 21, wherein the signature corresponds to a temporal variation of at least one physical quantity during implementation of at least one specific operation, the at least one physical quantity being associated with the first analog signal.

23. The system of claim 22, wherein the at least one specific operation is the implementation of an electronic function or program.

24. The system of claim 21, further comprising at least one circuit configured to obtain the signature by measuring the first analog signal.

25. The system of claim 24, wherein the at least one circuit is part of the first device.

26. The system of claim 24, wherein the at least one circuit is part of the second device.

27. The system of claim 24, wherein the at least one circuit is part of a third electronic device, the third electronic device being external to the first device and the second device.

28. The system of claim 21, wherein: During implementation of the operations, the first device is in a safe mode.

29. The system of claim 21, wherein the second device is configured to verify the signature by using at least one signature model.

30. The system of claim 21, wherein the second device is configured to verify the signature by comparing the signature to the at least one signature model.

31. The system of claim 21, wherein the second device is configured to verify the signature by extracting data from the signature.

32. The system of claim 31 , wherein the second device comprises a neural network configured to verify the signature.

33. The system of claim 32, wherein the neural network has been trained based on data representing a signature model.

34. The system of claim 21, wherein: When the signature is transmitted between the first device and the second device, the signature is encrypted.

35. The system of claim 21, wherein the authentication is of a verifier / certifier type.

36. The system of claim 21, wherein a signature of at least one second analog signal of the first device is used for the authentication.

37. The system of claim 21, wherein the first analog signal comprises an overcurrent that is rejected by a current smoothing circuit of a circuit used to power the first device.

38. The system of claim 37, wherein the circuit for powering the first device comprises an analog-to-digital converter configured to measure the overcurrent, the analog-to-digital converter configured to store data in a memory.

39. An electronic device configured as the first device in the system according to claim 21.

40. An electronic device configured as the second device in the system according to claim 21.

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