Preparation method of circuit board, circuit board and display device

Abstract

The embodiment of the invention relates to the technical field of circuit boards, and provides a preparation method of a circuit board, the circuit board and a display device. The preparation method of the circuit board comprises the following steps: forming liquid inner layer printing ink on a circuit layer, and pre-baking the liquid inner layer printing ink; forming liquid surface layer printing ink on the pre-baked inner layer printing ink, and pre-baking the liquid surface layer printing ink; and exposing, developing and curing a laminated layer of the pre-baked inner layer ink and the pre-baked surface layer ink to obtain the solder mask layer. The pigments in the liquid inner-layer printing ink are carbon black and black-like pigments, and the black-like pigments are selected from at least one of red pigments, blue pigments and brown pigments; the pigment in the liquid surface printing ink is carbon black; the photoinitiators in the liquid inner-layer ink and the liquid surface-layer ink are (2, 4, 6-trimethylbenzoyl) diphenyl phosphine oxide, and the step of exposing the laminated layer comprises the step of irradiating the laminated layer by using light with the wavelength of more than 400nm.

Description

Technical Field

[0001] The present application relates to the technical field of circuit boards, and in particular to a method for preparing a circuit board, a circuit board, and a display device. Background Art

[0002] In existing circuit boards, the solder mask layer formed after ink patterning has problems such as insufficient blackness, incomplete curing of the bottom layer of the ink, excessive undercut, and insufficient adhesion. Summary of the invention

[0003] The first aspect of the present application provides a method for preparing a circuit board. The method for preparing a circuit board comprises:

[0004] Forming a liquid inner layer ink on a circuit layer, and pre-baking the liquid inner layer ink;

[0005] forming a liquid surface ink on the surface of the pre-baked inner layer ink away from the circuit layer, and pre-baking the liquid surface ink; and

[0006] Exposing, developing and curing the stack of the pre-baked inner layer ink and the pre-baked surface layer ink to obtain a solder resist layer;

[0007] Wherein, the solder resist layer includes a stacked inner layer and a surface layer, the inner layer is formed by the inner layer ink, and the surface layer is formed by the surface layer ink; the pigment in the liquid inner layer ink is carbon black and a black-like pigment, and the black-like pigment is selected from at least one of a red pigment, a blue pigment and a brown pigment; the pigment in the liquid surface layer ink is carbon black; the photoinitiators in the liquid inner layer ink and the liquid surface layer ink are both (2,4,6-trimethylbenzoyl) diphenylphosphine oxide, and exposing the stack includes irradiating the stack with light having a wavelength greater than 400nm.

[0008] In the preparation method of the circuit board of the first aspect of the present application, since the pigment in the ink forming the surface layer of the solder mask is carbon black, the solder mask has a high carbon black ratio, which is conducive to improving the blackness of the solder mask and improving the shielding property. In addition, the liquid surface ink and the liquid inner layer ink both use (2,4,6-trimethylbenzoyl) diphenylphosphine oxide as a photoinitiator. Compared with the traditional ink using AHK and / or AAK as a photoinitiator, the liquid surface ink and the liquid inner layer ink have better deep curing performance. Moreover, the step of exposing the stack includes irradiating the stack with light having a wavelength greater than 400nm, wherein the light having a wavelength greater than 400nm can penetrate deeper into the bottom layer of the stack than the short-wave light of about 230nm, thereby achieving a better deep curing effect, improving the problem of excessive side erosion and insufficient adhesion of the solder mask due to incomplete curing of the bottom layer of the ink, reducing the undercut value of the solder mask, and improving the bonding strength of the solder mask.

[0009] The second aspect of the present application provides a circuit board. The circuit board is obtained by using the method for preparing the circuit board as described in the first aspect of the present application.

[0010] The circuit board of the second aspect of the present application has the same advantages as the method for preparing the circuit board described in the first aspect of the present application, which will not be described in detail.

[0011] The third aspect of the present application provides a display device. The display device comprises the circuit board described in the second aspect of the present application and a plurality of light-emitting elements, the circuit layer comprises a pad exposed by the solder resist layer, the light-emitting element is electrically connected to the pad, and the display device has a plurality of pixels, each of which comprises at least two light-emitting elements emitting light of different colors.

[0012] The display device of the third aspect of the present application has the same advantages as the circuit board described in the second aspect of the present application, which will not be described in detail.

[0013] In a fourth aspect, the present application provides a display device. The display device includes a display panel and a backlight plate for providing backlight for the display panel, the backlight plate includes the circuit board described in the second aspect of the present application and a plurality of light-emitting elements, the circuit layer includes a solder pad exposed by the solder resist layer, and the light-emitting element is electrically connected to the solder pad.

[0014] The display device of the fourth aspect of the present application has the same advantages as the circuit board described in the second aspect of the present application, which will not be described in detail. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 The present invention is a flow chart of a method for preparing a circuit board according to an embodiment of the present invention.

[0016] Figure 2The cross-sectional schematic diagram of a copper-clad substrate provided in a method for preparing a circuit board according to an embodiment of the present application.

[0017] Figure 3 For Figure 2 A cross-sectional schematic diagram of the structure shown in FIG.

[0018] Figure 4 For Figure 3 Schematic diagram of the cross-section of the structure shown undergoing copper reduction and browning.

[0019] Figure 5 For Figure 4 A schematic cross-sectional view of the top surface of the structure shown being laser drilled.

[0020] Figure 6 For Figure 5 A schematic cross-sectional view of the bottom surface of the structure shown is subjected to laser drilling.

[0021] Figure 7 For Figure 6 Schematic diagram of the cross-section of the structure shown in the figure undergoing de-browning.

[0022] Figure 8 For Figure 7 Schematic cross-sectional view of the structure shown undergoing horizontal electroplating.

[0023] Fig. 9 For Figure 8 Schematic cross-sectional view of the structure shown undergoing vertical continuous electroplating.

[0024] Fig.10 For Fig. 9 The structure shown is a cross-sectional schematic diagram of the lamination process.

[0025] Fig.11 For Fig.10 A cross-sectional schematic diagram of the structure shown is subjected to exposure.

[0026] Fig.12 For Fig.11 A cross-sectional schematic diagram of the structure shown is developed.

[0027] Fig.13 For Fig.12 A schematic cross-sectional view of the structure shown being etched.

[0028] Fig.14 For Fig.13 The cross-sectional schematic diagram of the structure shown is for film stripping.

[0029] Fig.15 For Fig.14 The structure shown forms a cross-sectional schematic diagram of the inner layer ink and pre-baking.

[0030] Fig.16 For Fig.15 A schematic cross-sectional view of the structure shown being flattened.

[0031] Fig.17 For Fig.16 The structure shown forms a cross-sectional schematic diagram of the surface ink and pre-baking.

[0032] Fig.18 For Fig.17 A schematic cross-sectional view of the top surface of the structure shown being exposed.

[0033] Fig.19 For Fig.18 A schematic cross-sectional view of the bottom surface of the structure shown is exposed.

[0034] Fig. 20 For Fig.19 A cross-sectional schematic diagram of the structure shown in the figure is shown in the figure.

[0035] Fig.21 For Fig. 20 Schematic cross-sectional view of the structure shown in FIG.

[0036] Fig. 22 The blackness diagram of the ink of the embodiment (experimental group 4) and the comparative example (experimental groups 1 to 3) of the present application.

[0037] Fig.23 The glossiness diagram of the ink of the embodiment of the present application (experimental group 4) and the comparative example (experimental groups 1 to 3).

[0038] Fig.24 It is a blackness diagram of the ink in the product area of ​​the embodiment of the present application (experimental group 4) and the comparative example (experimental groups 1 to 3).

[0039] Fig.25 It is a glossiness diagram of the ink in the product area of ​​the embodiment of the present application (experimental group 4) and the comparative examples (experimental groups 1 to 3).

[0040] Fig.26 It is a cross-sectional view of the bottom cut of the ink of the embodiment of the present application (experimental group 4) and the comparative example (experimental groups 1 to 3).

[0041] Fig. 27 A plan view of a circuit board according to an embodiment of the present application.

[0042] Fig.28 FIG. 4 is a cross-sectional view of a display device according to an embodiment of the present application.

[0043] Description of main component symbols:

[0044] Copper clad substrate 10

[0045] Dielectric layer 11

[0046] First surface 11a

[0047] Second surface 11b

[0048] The first copper foil layer 121

[0049] The second copper foil layer 122

[0050] The first circuit layer 131

[0051] The second circuit layer 132

[0052] Gold layer 133

[0053] The first solder resist layer 141

[0054] First inner layer ink 141a

[0055] First surface ink 141b

[0056] First inner layer 141c

[0057] First surface layer 141d

[0058] Second solder resist layer 142

[0059] Second inner layer ink 142a

[0060] Second surface ink 142b

[0061] Second inner layer 142c

[0062] Second surface layer 142d

[0063] Circuit board 20

[0064] Light emitting element 30

[0065] Display device 100

[0066] First through hole H1

[0067] The second through hole H2

[0068] Blind hole B

[0069] Electroplated copper C

[0070] Via V

[0071] First via V1

[0072] The second via V2

[0073] The first dry film PR1

[0074] Second dry film PR2

[0075] Solder pad P

[0076] Opening S

[0077] First opening S1

[0078] The second opening S2 DETAILED DESCRIPTION

[0079] like Figure 1 As shown, the method for preparing a circuit board provided in the first aspect of the present application includes the following steps S1 to S3. According to different requirements, the order of the steps of the method for preparing a circuit board can be changed, and some steps can be omitted or combined.

[0080] Step S1: forming a liquid inner layer ink on a circuit layer, and pre-baking the liquid inner layer ink.

[0081] Step S2: forming a liquid surface ink on the surface of the pre-baked inner layer ink away from the circuit layer, and pre-baking the liquid surface ink.

[0082] Step S3: exposing, developing and curing the stack of the pre-baked inner layer ink and the pre-baked surface layer ink to obtain a solder resist layer.

[0083] Specifically, the pigment in the liquid inner layer ink is carbon black and a black-like pigment, and the black-like pigment is selected from at least one of a red pigment, a blue pigment and a brown pigment. The pigment in the liquid surface layer ink is carbon black. In addition, the photoinitiator in the liquid inner layer ink and the liquid surface layer ink is acyl diphenyl phosphine oxide, such as (2,4,6-trimethylbenzoyl) diphenyl phosphine oxide. Exposing the stack includes irradiating the stack with light having a wavelength greater than 400nm. The solder resist layer includes a stacked inner layer and a surface layer, the inner layer is formed by the inner layer ink, and the surface layer is formed by the surface layer ink.

[0084] In order to achieve the ideal curing speed and balanced performance in traditional ink formulation, in addition to carefully selecting UV resin, the selection of photoinitiator or combination is also a key factor. The resin system, monomer, UV lamp type, required curing speed and coating performance are the indicators for selecting photoinitiator. Generally, the selection of surface curing photoinitiator will give priority to α-amino ketone or α-hydroxy ketone series AAK and AHK, such as 184. 1173, 369. The details are shown in Table 1.

[0085] Table 1

[0086]

[0087] Traditional ink photoinitiators (such as AHK and AAK) use short-wave light polymerization around 230nm. This light source has high photon energy and is particularly useful for surface curing, but its penetration ability is not as good as long-wave light. Therefore, traditional inks need to improve their deep curing ability.

[0088] In the above-mentioned method for preparing the circuit board, the liquid surface ink and the liquid inner layer ink both use (2,4,6-trimethylbenzoyl) diphenylphosphine oxide as a photoinitiator. Compared with the traditional ink using AHK and / or AAK as a photoinitiator, the liquid surface ink and the liquid inner layer ink have better deep curing performance. Moreover, the step of exposing the stack includes irradiating the stack with light with a wavelength greater than 400nm, wherein the light with a wavelength greater than 400nm can penetrate deeper into the bottom layer of the stack than the short-wave light of about 230nm, thereby achieving a better deep curing effect, improving the problem of excessive side erosion and insufficient adhesion of the solder mask layer due to incomplete curing of the bottom layer of the ink, reducing the undercut value of the solder mask layer, and improving the bonding strength of the solder mask layer. Since the pigment in the ink forming the surface layer of the solder mask is carbon black (forming the main black), the pigment in the inner layer of the ink is added with a black-like pigment in addition to the carbon black to achieve the ink black effect, so that the solder mask has a high carbon black ratio, which is beneficial to improve the blackness of the solder mask and improve the shielding property. Furthermore, since the color and thickness of the ink will affect the penetration and polymerization effect of the exposure light source, in order to ensure the high blackness of the ink and its polymerization effect, in some embodiments, the exposure light source is a laser light source.

[0089] The technical solution of the method for preparing a circuit board in the embodiment of the present application will be clearly and completely described below in conjunction with the drawings in the embodiment of the present application. Obviously, the described embodiment is only a part of the embodiment of the present application, not all of the embodiments.

[0090] Step S1: forming a liquid inner layer ink on a circuit layer, and pre-baking the liquid inner layer ink.

[0091] In some embodiments, step S1 further includes forming a circuit layer on the dielectric layer. Figures 2 to 14 The specific steps of forming a circuit layer on a dielectric layer are described.

[0092] like Figure 2 As shown, a copper clad substrate 10 is provided. The copper clad substrate 10 includes a dielectric layer 11, a first copper foil layer 121, and a second copper foil layer 122. The dielectric layer 11 has a first surface 11a and a second surface 11b opposite to each other. The first copper foil layer 121 is located on the first surface 11a; and the second copper foil layer 122 is located on the second surface 11b.

[0093] like Figure 3As shown, after drilling (such as mechanical drilling process), a first through hole H1 penetrating the dielectric layer 11, the first copper foil layer 121 and the second copper foil layer 122 is formed. It can be understood that Figure 3 Only one first through hole H1 is illustrated in the figure, but the number of the first through holes H1 is not limited thereto.

[0094] like Figure 4 As shown, after copper reduction and browning, a uniform concave-convex microstructure is formed on the surface of the first copper foil layer 121 and the second copper foil layer 122 .

[0095] like Figure 5 As shown, after laser drilling is performed on one side of the first surface 11 a of the dielectric layer 11 , a blind hole B is formed. The blind hole B does not completely penetrate the dielectric layer 11 .

[0096] like Figure 6 As shown, after laser drilling is performed on one side of the second surface 11 b of the dielectric layer 11 , a second through hole H2 is formed at a position corresponding to the blind hole B.

[0097] like Figure 7 As shown, after de-browning, the undulating microstructures formed on the surfaces of the first copper foil layer 121 and the second copper foil layer 122 are removed.

[0098] like Figure 8 As shown, after horizontal electroplating, electroplated copper C is formed in the first through hole H1 and the second through hole H2.

[0099] like Fig. 9 As shown, after vertical continuous electroplating, the first through hole H1 is filled with conductive material to form a first via hole V1, and the second through hole H2 is filled with conductive material to form a second via hole V2.

[0100] like Fig.10 As shown, after lamination, the first dry film PR1 is formed on the side where the first surface 11 a of the dielectric layer 11 is located, and the second dry film PR2 is formed on the side where the second surface 11 b of the dielectric layer 11 is located.

[0101] like Fig.11 As shown, after exposure, the first dry film PR1 and the second dry film PR2 are patterned.

[0102] like Fig.12 , Fig.13 and Fig.14 As shown, after development, etching and film stripping, a first circuit layer 131 is formed on the first surface 11 a of the dielectric layer 11 , and a second circuit layer 132 is formed on the second surface 11 b of the dielectric layer 11 .

[0103] above Figures 2 to 14The example of forming circuit layers (i.e., the first circuit layer 131 and the second circuit layer 132) on two opposite surfaces of the dielectric layer 11 is used for description. In other embodiments, in step S1, one circuit layer may be formed on the dielectric layer instead of two circuit layers. Alternatively, step S1 does not include the above-mentioned step of preparing the circuit layer, but directly provides a circuit substrate having a circuit layer.

[0104] like Fig.15 As shown, the surface of the first circuit layer 131 away from the dielectric layer 11 and the first surface 11a of the dielectric layer 11 are covered with the first inner layer ink 141a. The surface of the second circuit layer 132 away from the dielectric layer 11 and the second surface 11b of the dielectric layer 11 are covered with the second inner layer ink 142b.

[0105] Specifically, liquid inner layer ink can be printed on the side where the first surface 11a of the dielectric layer 11 is located and on the side where the second surface 11b of the dielectric layer 11 is located, and then pre-baked to form the first inner layer ink 141a and the second inner layer ink 142b. The pigment in the liquid inner layer ink includes carbon black and a black-like pigment, and the black-like pigment is selected from at least one of a red pigment, a blue pigment (such as methylene blue) and a brown pigment, but is not limited thereto. The photoinitiator is (2,4,6-trimethylbenzoyl) diphenylphosphine oxide.

[0106] In some embodiments, the mass percentage of carbon black in the liquid inner layer ink is 0.05% to 0.3% (such as 0.05% to 0.1%, 0.1% to 0.13%, 0.13% to 0.16%, 0.16% to 0.2%, 0.2% to 0.25%, 0.25% to 0.3%), but is not limited thereto.

[0107] In some embodiments, in the liquid inner layer ink, the mass percentage of the black-like pigment is 0.1% to 1.0% (such as 0.1% to 0.13%, 0.13% to 0.16%, 0.16% to 0.18%, 0.18% to 0.2%, 0.2% to 0.3%, 0.3% to 0.5%, 0.5% to 0.6%, 0.6% to 0.7%, 0.3% to 0.8%, 0.8% to 0.9%, 0.9% to 1.0%), but is not limited to this.

[0108] In some embodiments, in the liquid inner layer ink, the mass percentage of (2,4,6-trimethylbenzoyl)diphenylphosphine oxide is 1% to 6% (such as 1% to 2%, 2% to 3%, 3% to 4%, 4% to 5%, 5% to 6%), but is not limited thereto.

[0109] Understandably, the liquid inner layer ink also includes resin (such as o-phenolic epoxy resin), additives (such as dipropylene glycol methyl ether acetate) and fillers (such as barium sulfate), but is not limited thereto. In some embodiments, the acid value of the base resin in the liquid inner layer ink is between 80 and 100, and the viscosity ranges from 30,000 to 40,000 mPa.s (25° C.), but is not limited thereto.

[0110] In some embodiments, in the step of printing the liquid inner layer ink, the viscosity of the liquid inner layer ink formed on the side where the first surface 11a of the dielectric layer 11 and the side where the second surface 11b of the dielectric layer 11 are located is 150±20dPa.s, the thickness is 20μm to 30μm, the mesh number of the screen is 120, a single scraper is used, the mesh distance is 8±1mm, and the scraper pressure is 2±1kgf / cm 2 , the scraping angle is 20±2°, the scraping speed is 200mm / s, the number of scraping times is 2, and the scraper depth is 20mm; the pre-baking temperature is 80°C and the time is 20min. In other embodiments, in the step of printing the liquid inner layer ink and in the step of pre-baking, the various numerical parameters are not limited to the above.

[0111] like Fig.16 As shown, a flattening step is performed on the side where the first inner layer ink 141a is located and the side where the second inner layer ink 142b is located. In the flattening step, the pressing time is 20s to 60s, the temperature is 60°C to 80°C, and the pressure is 4kgf / cm 2 Up to 10kgf / cm 2 In other embodiments, in the flattening step, each numerical parameter is not limited to the above.

[0112] Step S2: forming a liquid surface ink on the surface of the pre-baked inner layer ink away from the circuit layer, and pre-baking the liquid surface ink.

[0113] like Fig.17 As shown, the surface of the first inner layer ink 141a away from the dielectric layer 11 is covered with the first surface layer ink 141b. The surface of the second inner layer ink 142a away from the dielectric layer 11 is covered with the second surface layer ink 142b.

[0114] Specifically, liquid surface inks may be formed on the surface of the first inner layer ink 141a away from the dielectric layer 11 and on the surface of the second inner layer ink 142a away from the dielectric layer 11, and then pre-baked to form the first surface ink 141b and the second surface ink 142b.

[0115] In some embodiments, in the liquid surface ink, the pigment is carbon black. In the liquid surface ink, the mass percentage of carbon black is 0.1% to 1.0% (such as 0.1% to 0.13%, 0.13% to 0.16%, 0.16% to 0.18%, 0.18% to 0.2%, 0.2% to 0.3%, 0.3% to 0.5%, 0.5% to 0.6%, 0.6% to 0.7%, 0.3% to 0.8%, 0.8% to 0.9%, 0.9% to 1.0%), but not limited thereto. In some embodiments, in the liquid surface ink, the photoinitiator is (2,4,6-trimethylbenzoyl) diphenylphosphine oxide. In the liquid surface ink, the mass percentage of (2,4,6-trimethylbenzoyl)diphenylphosphine oxide is 1% to 6% (such as 1% to 2%, 2% to 3%, 3% to 4%, 4% to 5%, 5% to 6%), but is not limited thereto.

[0116] It is understandable that the liquid surface ink also includes resin (such as o-phenolic epoxy resin), additives (such as dipropylene glycol methyl ether acetate) and fillers (such as barium sulfate), but is not limited thereto. In some embodiments, the acid value of the base resin in the liquid surface ink is between 80 and 100, and the viscosity ranges from 30,000 to 40,000 mPa.s (25° C.), but is not limited thereto.

[0117] In some embodiments, the liquid surface ink may be formed on the first inner layer ink 141 a or the second inner layer ink 142 a by any one of printing, laminating or spraying processes.

[0118] In some embodiments, the liquid surface ink can be formed on the first inner layer ink 141a or the second inner layer ink 142a by a printing process. In the step of printing the liquid surface ink, the viscosity of the liquid surface ink is 130±20dPa.s, the thickness is 5μm to 10μm, the mesh number of the screen is 300, a single scraper is used, the mesh distance is 8±1mm, and the scraper pressure is 2±1kgf / cm 2 , the scraping angle is 20±2°, the scraping speed is 200mm / s, the number of scraping times is 2, and the scraper depth is 20mm. The pre-baking temperature is 75°C and the time is 16min. In other embodiments, in the step of printing the liquid surface ink and in the step of pre-baking, the various numerical parameters are not limited to the above.

[0119] In some embodiments, after pre-baking, a flattening step is further included on the side where the first surface ink 142a is located and the side where the second surface ink 142b is located. In the flattening step, the pressing time is 20s to 60s, the temperature is 60°C to 80°C, and the pressure is 4kgf / cm 2 Up to 10kgf / cm 2 In other embodiments, in the flattening step, each numerical parameter is not limited to the above.

[0120] Step S3: exposing, developing and curing the stack of the pre-baked inner layer ink and the pre-baked surface layer ink to obtain a solder resist layer.

[0121] like Fig.18 As shown, the laser light source exposes the stack of the first inner layer ink 141a and the first surface layer ink 141b on the side where the first surface 11a of the dielectric layer 11 is located. In some embodiments, exposing the stack of the first inner layer ink 141a and the first surface layer ink 141b includes irradiating the stack with light of different wavelengths. The light of different wavelengths includes light with a wavelength in the range of 360nm to 385nm and light with a wavelength in the range of 390nm to 415nm. The energy ratio of the light with a wavelength in the range of 360nm to 385nm in the light of different wavelengths is 20% to 50%. The energy ratio of the light with a wavelength in the range of 390nm to 415nm in the light of different wavelengths is 30% to 75%.

[0122] like Fig.19 As shown, the laser light source exposes the stack of the second inner layer ink 142a and the second surface layer ink 142b on the side where the second surface 11b of the dielectric layer 11 is located. In some embodiments, exposing the stack of the second inner layer ink 142a and the second surface layer ink 142b includes irradiating the stack with light of different wavelengths. The light of different wavelengths includes light with a wavelength in the range of 360nm to 385nm and light with a wavelength in the range of 390nm to 415nm. The energy ratio of the light with a wavelength in the range of 360nm to 385nm in the light of different wavelengths is 20% to 50%. The energy ratio of the light with a wavelength in the range of 390nm to 415nm in the light of different wavelengths is 30% to 75%.

[0123] In other embodiments, the stack of the first inner layer ink 141a and the first surface layer ink 141b and the stack of the second inner layer ink 142a and the second surface layer ink 142b can be exposed simultaneously on the side where the first surface 11a of the dielectric layer 11 is located and on the side where the second surface 11b of the dielectric layer 11 is located.

[0124] Please refer to Fig.18 , Fig.19 , Fig. 20After development and curing (or post-baking), the first inner layer ink 141a and the first surface layer ink 141b form the first inner layer 141c and the first surface layer 141d respectively; the second inner layer ink 142a and the second surface layer ink 142b form the second inner layer 142c and the second surface layer 142d respectively. The first solder resist layer 141 includes a stack of the first inner layer 141c and the first surface layer 141d, and the second solder resist layer 142 includes a stack of the second inner layer 142c and the second surface layer 142d. The first solder resist layer 141 has a first opening S1 exposing the first circuit layer 131, and the second solder resist layer 142 has a second opening S2 exposing the second circuit layer 132.

[0125] In some embodiments, the total thickness of the first solder resist layer 141 and the second solder resist layer 142 is 20 μm to 30 μm, the thickness of the first surface layer 141d and the second surface layer 142d is 5 μm to 10 μm, and the thickness of the first inner layer 141c and the second inner layer 142c is 20 μm to 25 μm. That is, the first surface layer 141d accounts for 17% to 33% of the thickness of the first solder resist layer 141; the second surface layer 142d accounts for 17% to 33% of the thickness of the second solder resist layer 142, but is not limited thereto.

[0126] In some embodiments, in step S3, the developing speed is 2 m / min to 3 m / min, the post-baking temperature is 150° C., and the post-baking time is 80 min. In other embodiments, in step S3, the numerical parameters are not limited to the above.

[0127] In some embodiments, after obtaining the first solder resist layer 141 and the second solder resist layer 142, the following steps are also included: Fig.21 The step of gold deposition is shown to form a gold deposition layer 133 on the first wiring layer 131 and the second wiring layer 132 .

[0128] The specific performance of the inner layer ink and the surface layer ink in the circuit board of the embodiment of the present application is described below in combination with comparative examples. Experimental Group 1: In the surface layer liquid ink and the inner layer liquid ink, the photoinitiators are AHK and BAPO, and the pigments include 0.13% carbon black and 0.18% blue pigment by mass.

[0129] Experimental Group 2: The difference from Experimental Group 1 is that the mass percentage of carbon black is increased to 0.16%. That is, in Experimental Group 2, the photoinitiators in the surface layer liquid ink and the inner layer liquid ink are AHK and BAPO, and the pigments include 0.16% carbon black and 0.18% blue pigment by mass.

[0130] Experimental Group 3: The difference from Experimental Group 1 is that the photoinitiator is (2,4,6-trimethylbenzoyl) diphenylphosphine oxide. That is, in Experimental Group 3, the photoinitiator in both the surface layer liquid ink and the inner layer liquid ink is (2,4,6-trimethylbenzoyl) diphenylphosphine oxide, and the pigment includes 0.13% carbon black and 0.18% blue pigment by mass.

[0131] Experimental Group 4: On the basis of Experimental Group 3, a surface layer of liquid ink of 5um to 10um was applied, and the pigment in the applied surface layer of liquid ink was 0.16% carbon black by mass and no black-like pigment was added. That is, in Experimental Group 4, the photoinitiator of the inner layer of liquid ink was (2,4,6-trimethylbenzoyl) diphenylphosphine oxide, the pigments included 0.13% carbon black and 0.18% blue pigment by mass, and the pigment in the surface layer of liquid ink was 0.16% carbon black by mass and no black-like pigment was added.

[0132] like Fig. 22 As shown, the photoinitiators of the inks in Experimental Group 1 and Experimental Group 2 are both AHK and BAPO, and the obtained blackness (L value) is greater than 20; while in Experimental Group 3, the photoinitiator is (2,4,6-trimethylbenzoyl) diphenylphosphine oxide, but its surface and inner layers also include 0.18% blue pigment. Therefore, the blackness value of Experimental Group 3 is lower than that of Experimental Group 1 and Experimental Group 2. In Experimental Group 4, since no black-like pigment is added to the surface ink, and the surface ink and the inner ink both use (2,4,6-trimethylbenzoyl) diphenylphosphine oxide as the photoinitiator, the blackness (L value) of Experimental Group 4 is the lowest and meets the requirement of being less than 15. In addition, the difference in blackness (L value) between Experimental Group 3 and Experimental Group 4 is less than 20. It can be inferred that in Experimental Group 4, the difference in blackness (L value) between the surface ink and the inner ink is less than 20. As Fig.23 As shown, the glossiness decreased in experimental group 1, experimental group 2, experimental group 3, and experimental group 4. The glossiness measured in experimental group 4 was the lowest, far less than 20Gu.

[0133] It should be noted that in the CIElab color space, the L value represents black and white, or light and dark. The smaller the L value, the darker the color (black). In addition, the smaller the glossiness (Gu), the lower the glossiness (dark).

[0134] like Fig.24 As shown, the opening area with a diameter of 4 mm accounts for 36.5%. After gold treatment, the blackness (L value) of experimental group 4 is the smallest. Fig.25 As shown, the opening area with a diameter of 4 mm accounts for 36.5%. After gold treatment, the glossiness of experimental group 4 was measured, and the glossiness was the lowest. Fig.26As shown, the undercut values ​​tested on the dielectric layer of Experimental Group 1, Experimental Group 2, Experimental Group 3 and Experimental Group 4 are 22 microns to 26 microns, 20 microns to 23 microns, 22 microns to 27.5 microns, and 23 microns to 25 microns, respectively; the undercut values ​​tested on the circuit layer (the material of the circuit layer is copper) of Experimental Group 1, Experimental Group 2, Experimental Group 3 and Experimental Group 4 are 13 microns to 15 microns, 15 microns to 17 microns, 14 microns to 16 microns, and 14 microns to 16 microns, respectively. It can be seen that the undercut value tested on the circuit layer (on the copper surface) of Experimental Group 4 is less than or equal to 17 microns.

[0135] The experimental parameters in the product area are summarized in Table 2.

[0136] Table 2

[0137]

[0138]

[0139] The second aspect of the present application provides a circuit board, which is obtained by the method for preparing the circuit board of the first aspect of the present application. The circuit board includes a circuit layer and a solder resist layer that exposes the circuit layer. The solder resist layer includes a stacked inner layer and a surface layer, the inner layer is formed by the inner layer ink, and the surface layer is formed by the surface layer ink.

[0140] In some embodiments, the thickness of the surface layer accounts for 17% to 33% of the thickness of the solder resist layer, but is not limited thereto.

[0141] In some embodiments, the thickness of the solder resist layer is 20 μm to 30 μm, but is not limited thereto.

[0142] In some embodiments, the L value of the solder resist layer is less than or equal to 35, but is not limited thereto.

[0143] In some embodiments, the glossiness of the solder resist layer is less than or equal to 20 Gu, but is not limited thereto.

[0144] In some embodiments, the solder resist layer has an opening exposing the circuit layer, and an undercut value of the solder resist layer at the opening is less than or equal to 17 μm, but is not limited thereto.

[0145] In a specific embodiment, Fig. 27 As shown, the circuit board 20 includes a circuit layer (i.e., the first circuit layer 131) and a solder resist layer (i.e., the first solder resist layer 141) covering the circuit layer. The first solder resist layer 141 has a plurality of openings S exposing the first circuit layer 131. Corresponding to each opening S, the first circuit layer 131 includes two solder pads P exposed by the first solder resist layer 141. The two solder pads P can be used to electrically connect to the light emitting element, but are not limited thereto.

[0146] The third aspect of the present application provides a display device. The display device includes the circuit board of the second aspect of the present application and a plurality of light-emitting elements. The circuit layer includes a pad exposed by the solder mask layer, the light-emitting element is electrically connected to the pad, and the display device has a plurality of pixels, each pixel including at least two light-emitting elements emitting light of different colors.

[0147] In a specific embodiment, Fig.28 As shown, the display device 100 includes a circuit board 20 and a plurality of light-emitting elements 30. Each light-emitting element 30 is electrically connected to two pads P at an opening S. The pixel in the display device 100 includes at least two light-emitting elements 30 that emit light of different colors. Specifically, each pixel includes, for example, a light-emitting element 30 that emits red light, a light-emitting element 30 that emits green light, and a light-emitting element 30 that emits blue light, but is not limited thereto.

[0148] In some embodiments, the light emitting element 30 is a mini light emitting diode (miniLED), or a micro light emitting diode. LED has the characteristics of self-luminescence, and produces rich and diverse colors by superimposing different proportions of the three primary colors of RGB. LED has the advantages of long life, high light efficiency, no radiation, low power consumption, and light weight.

[0149] In some embodiments, the light emitting component 30 is packaged using Micro LED In Package (MIP) packaging technology or Integrated Matrix Device (IMD) packaging technology, but is not limited thereto.

[0150] MIP is a chip-level packaging technology that can appear in the form of discrete devices or N in 1 integrated devices. The specific process is to transfer a large number of Micro LED chips on the epitaxial wafer to the carrier (or driver substrate, or circuit board), and then directly encapsulate it. After cutting, it is tested and mixed. This process can directly remove defective lamp beads without the need for subsequent repairs; the next step is to place the Micro LED lamp beads on the tape and hand them over to the display factory for assembly to make display modules. The important technical advantages of MIP are mainly: First, it has the advantages of both surface mount device (SMD) technology and chip on board (COB) technology. It has the ink color, color and easy maintenance characteristics of SMD, and the high reliability of COB. Second, there is more room for cost reduction and lower costs. MIP packaging technology can greatly reduce the cost of rework and is compatible with SMD technology, reducing transfer costs.

[0151] In a fourth aspect, the present application provides a display device. The display device includes a display panel and a backlight plate for providing backlight for the display panel. The backlight plate includes the circuit board of the second aspect of the present application and a plurality of light-emitting elements, the circuit layer includes a solder pad exposed by the solder mask layer, and the light-emitting element is electrically connected to the solder pad. The display panel is, for example, a liquid crystal display panel.

[0152] The above implementation modes are only used to illustrate the technical solutions of the present application and are not intended to limit the present application. Although the present application has been described in detail with reference to the above preferred implementation modes, a person skilled in the art should understand that the technical solutions of the present application may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present application.

Claims

1. A method for preparing a circuit board, It is characterized in that include: Forming a liquid inner layer ink on a circuit layer, and pre-baking the liquid inner layer ink; Forming a liquid surface ink on the surface of the pre-baked inner layer ink away from the circuit layer, and pre-baking the liquid surface ink; as well as Exposing, developing and curing the stack of the pre-baked inner layer ink and the pre-baked surface layer ink to obtain a solder resist layer; Wherein, the solder resist layer includes a stacked inner layer and a surface layer, the inner layer is formed by the inner layer ink, and the surface layer is formed by the surface layer ink; the pigment in the liquid inner layer ink is carbon black and a black-like pigment, and the black-like pigment is selected from at least one of a red pigment, a blue pigment and a brown pigment; the pigment in the liquid surface layer ink is carbon black; the photoinitiators in the liquid inner layer ink and the liquid surface layer ink are both (2,4,6-trimethylbenzoyl) diphenylphosphine oxide, and exposing the stack includes irradiating the stack with light having a wavelength greater than 400nm.

2. The method for preparing a circuit board according to claim 1, It is characterized in that In the liquid inner layer ink, the mass percentage of the carbon black is 0.05% to 0.3%, and the mass percentage of the black-like pigment is 0.1% to 1.0%; in the liquid surface layer ink, the mass percentage of the carbon black is 0.1% to 1.0%.

3. The method for preparing a circuit board according to claim 1 or 2, It is characterized in that In the liquid inner layer ink and the liquid surface layer ink, the mass percentage of the (2,4,6-trimethylbenzoyl)diphenylphosphine oxide is 1% to 6%.

4. The method for preparing a circuit board according to claim 1, It is characterized in that Exposing the stack includes irradiating the stack with light of different wavelengths; the light of different wavelengths includes light with a wavelength in the range of 360nm to 385nm and light with a wavelength in the range of 390nm to 415nm; the energy ratio of the light with a wavelength in the range of 360nm to 385nm in the light of different wavelengths is 20% to 50%; the energy ratio of the light with a wavelength in the range of 390nm to 415nm in the light of different wavelengths is 30% to 75%.

5. A circuit board, It is characterized in that The circuit board is obtained by the method for preparing the circuit board as claimed in any one of claims 1 to 4.

6. The circuit board as claimed in claim 5, It is characterized in that The thickness of the surface layer accounts for 17% to 33% of the thickness of the solder resist layer.

7. The circuit board as claimed in claim 5, It is characterized in that The thickness of the solder resist layer is 20 μm to 30 μm.

8. The circuit board according to any one of claims 5 to 7, It is characterized in that The L value of the solder resist layer is less than or equal to 35; and / or the glossiness of the solder resist layer is less than or equal to 20Gu; and / or the solder resist layer has an opening exposing the circuit layer, and the undercut value of the solder resist layer at the opening is less than or equal to 17μm.

9. A display device, It is characterized in that It includes a circuit board as described in any one of claims 5 to 8 and a plurality of light-emitting elements, the circuit layer includes a solder pad exposed by the solder resist layer, the light-emitting element is electrically connected to the solder pad, and the display device has a plurality of pixels, each of the pixels includes at least two light-emitting elements emitting light of different colors.

10. A display device, It is characterized in that It includes a display panel and a backlight plate for providing backlight for the display panel, the backlight plate includes the circuit board as described in any one of claims 5 to 8 and a plurality of light-emitting elements, the circuit layer includes a solder pad exposed by the solder resist layer, and the light-emitting element is electrically connected to the solder pad.

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