Probe card

Abstract

The invention provides a probe card which comprises an adapter plate, a guide plate and a plurality of probes. The guide plate is arranged on one side of the adapter plate and comprises a first guide plate part, a second guide plate part and a capacitor structure. The second guide plate parts and the first guide plate parts are arranged at intervals. The capacitor structure is arranged in the second guide plate part and is connected with the second guide plate part. The probes are electrically connected with the adapter plate and comprise at least one first grounding probe, at least one second grounding probe and a plurality of power probes. The first grounding probe penetrates through the first guide plate part and is connected to the capacitor structure and the adapter plate. The second grounding probe and the power source probe penetrate through the first guide plate part, the capacitor structure and the second guide plate part and are connected with the adapter plate. The first grounding probe is used for providing capacitance structure voltage to generate potential difference. The power supply probe draws current through the capacitor structure and forms a current loop with the second grounding probe. According to the probe card, the integrity of a test signal can be improved.

Description

Technical Field

[0001] The present invention relates to a test device, and more particularly to a probe card. Background Art

[0002] Generally, when a probe card is used for testing, a testing machine provides voltage / current to the Device Under Test (DUT) terminal. When the current extraction speed and magnitude of an integrated circuit (IC) are too fast and large, it will cause an instantaneous voltage drop (AC Voltage Drop) of the power supply. At this time, the machine terminal will provide a compensation current. Due to the large parasitic inductance between the machine terminal and the DUT, the compensation current cannot reach the DUT in time. Therefore, a de-coupling capacitor is usually placed close to the DUT, such as on a backplane or a printed circuit board. However, this will cause difficulties in the wiring design of the probe card, and the inductance of the probe path can only be improved by selecting short needles. Therefore, how to reduce the parasitic effect of the probe between the DUT and the path of the de-coupling capacitor is the main issue for improving Power Integrity (PI) at the present stage. Summary of the Invention

[0003] The present invention is directed to a probe card that can improve the integrity of test signals.

[0004] According to an embodiment of the present invention, a probe card includes a backplane, a guide plate, and a plurality of probes. The guide plate is disposed on one side of the backplane and includes a first guide plate portion, a second guide plate portion, and a capacitor structure. The second guide plate portion and the first guide plate portion are arranged at intervals to form a hollow ring, and the capacitor structure is disposed within the second guide plate portion and connected to the second guide plate portion. The probes are electrically connected to the backplane and include at least one first ground probe, at least one second ground probe, and a plurality of power probes. The first ground probe penetrates the first guide plate portion and is connected to the capacitor structure and the backplane. The second ground probe and the power probes penetrate the first guide plate portion, the capacitor structure, and the second guide plate portion and are connected to the backplane. The first ground probe is used to provide a voltage to the capacitor structure to generate a potential difference. The power probes draw current through the capacitor structure and form a current loop with the second ground probe.

[0005] In the probe card according to an embodiment of the present invention, the above-mentioned backplane includes a plurality of power pads and a plurality of ground pads. The first ground probe and the second ground probe are respectively electrically connected to the ground pads. The power probes are respectively electrically connected to the power pads.

[0006] In the probe card according to an embodiment of the present invention, the above-mentioned probe card further includes an insulating layer disposed on at least a part of each probe.

[0007] In a probe card according to an embodiment of the present invention, the above-described capacitive structure has a plurality of openings and includes a first metal layer, a second metal layer, and a dielectric layer. The dielectric layer is located between the first metal layer and the second metal layer. The openings are separated from each other and penetrate through the first metal layer, the dielectric layer, and the second metal layer.

[0008] In a probe card according to an embodiment of the present invention, the above-described first ground probe directly abuts against the first metal layer. The power probe and the second ground probe are respectively inclined and located within the openings. Each power probe indirectly contacts the first metal layer through an insulating layer and directly contacts at least the second metal layer. The second ground probe directly contacts at least the first metal layer and indirectly contacts the second metal layer through an insulating layer.

[0009] In a probe card according to an embodiment of the present invention, the above-described capacitive structure has at least one first opening and a plurality of second openings and includes a first ceramic material layer, a second ceramic material layer, a dielectric layer, a first patterned conductive layer, and a second patterned conductive layer. The dielectric layer is located between the first ceramic material layer and the second ceramic material layer. The first opening and the second openings are separated from each other and penetrate through the first ceramic material layer, the dielectric layer, and the second ceramic material layer. The first patterned conductive layer partially covers the first ceramic material layer and a part of the first opening. The second patterned conductive layer partially covers the second ceramic material layer and a part of each second opening.

[0010] In a probe card according to an embodiment of the present invention, the above-described first ground probe directly abuts against the first patterned conductive layer. The second ground probe is inclined and located within the first opening and directly contacts at least the first patterned conductive layer. The power probes are respectively inclined and located within the second openings and directly contact at least the second patterned conductive layer.

[0011] In a probe card according to an embodiment of the present invention, the above-described capacitive structure has at least one first opening and a plurality of second openings and includes a metal layer, a ceramic material layer, a dielectric layer, a patterned conductive layer, and an insulating layer. The dielectric layer is located between the metal layer and the ceramic material layer. The first opening and the second openings are separated from each other and penetrate through the metal layer, the dielectric layer, and the ceramic material layer. The patterned conductive layer partially covers the ceramic material layer and a part of each second opening. The insulating layer partially covers the metal layer and another part of each second opening.

[0012] In a probe card according to an embodiment of the present invention, the above-described first ground probe directly abuts against the metal layer. The second ground probe is inclined and located within the first opening and directly contacts at least the metal layer. The power probes are respectively inclined and located within the second openings and indirectly contact the metal layer through the insulating layer and directly contact at least the patterned conductive layer.

[0013] In a probe card according to an embodiment of the present invention, the above-described capacitive structure is a parallel plate capacitive structure.

[0014] Based on the above, in the probe card of the present invention, the first ground probe is connected to the capacitive structure to provide the voltage of the capacitive structure to generate a potential difference, and the power probe draws current through the capacitive structure and forms a current loop with the second ground probe. That is to say, the present invention instantaneously supplies power through the capacitive structure of the guide plate to solve the problem of instantaneous voltage drop in the prior art, thereby improving the integrity of the test signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 is a schematic diagram of a probe card according to an embodiment of the present invention;

[0016] Figure 2 is a schematic diagram of a probe card according to another embodiment of the present invention;

[0017] Figure 3 is a schematic diagram of a probe card according to another embodiment of the present invention.

[0018] DESCRIPTION OF REFERENCE NUMERALS

[0019] 100a, 100b, 100c: probe card;

[0020] 110: adapter board;

[0021] 112: power pad;

[0022] 114: ground pad;

[0023] 120a, 120b, 120c: guide plate;

[0024] 122: first guide plate portion;

[0025] 124: second guide plate portion;

[0026] 130: probe;

[0027] 132: first ground probe;

[0028] 134: second ground probe;

[0029] 136: power probe;

[0030] 140: insulating layer;

[0031] C1, C2, C3: capacitive structure;

[0032] CM: ceramic material layer;

[0033] CM1: first ceramic material layer;

[0034] CM2: second ceramic material layer;

[0035] D1, D2, D3: dielectric layer;

[0036] I: Insulating layer;

[0037] M: Metal layer;

[0038] M1: First metal layer;

[0039] M2: Second metal layer;

[0040] O: Opening;

[0041] O11, O21: First opening;

[0042] O12, O22: Second opening;

[0043] P: Patterned conductive layer;

[0044] P1: First patterned conductive layer;

[0045] P2: Second patterned conductive layer. Detailed implementation mode

[0046] Reference will now be made in detail to exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numerals are used in the drawings and the description to refer to the same or like parts.

[0047] The present invention can be understood by referring to the following detailed description and in conjunction with the accompanying drawings. It should be noted that, for the convenience of the reader's understanding and for the simplicity of the drawings, the elements in the drawings are not drawn to actual scale. In addition, the number and size of each element in the drawings are only for illustration and are not used to limit the scope of the present invention.

[0048] Figure 1 is a schematic diagram of a probe card according to an embodiment of the present invention. Please refer to Figure 1, in this embodiment, the probe card 100a includes an adapter board 110, a guide board 120a, and a plurality of probes 130. The guide board 120a is disposed on one side of the adapter board 110 and includes a first guide board portion 122, a second guide board portion 124, and a capacitor structure C1. The second guide board portion 124 and the first guide board portion 122 are arranged at intervals to form a hollow ring shape, and the capacitor structure C1 is disposed in the second guide board portion 124 and connected to the second guide board portion 124. The probes 130 are electrically connected to the adapter board 110 and include at least one first ground probe (schematically showing one first ground probe 132), at least one second ground probe (schematically showing one second ground probe 134), and a plurality of power probes (schematically showing two power probes 136). The first ground probe 132 penetrates the first guide board portion 122 and is connected to the capacitor structure C1 and the adapter board 110. The second ground probe 134 and the power probes 136 penetrate the first guide board portion 122, the capacitor structure C1, and the second guide board portion 124 and are connected to the adapter board 110. The first ground probe 132 is used to provide a voltage to the capacitor structure C1 to generate a potential difference. The power probes 136 draw current through the capacitor structure C1 and form a current loop with the second ground probe 134.

[0049] Specifically, the adapter board 110 of this embodiment includes a plurality of power pads 112 and a plurality of ground pads 114 that are separated from each other. The first ground probe 132 and the second ground probe 134 are respectively electrically connected to the ground pads 114. The power probes 136 are respectively electrically connected to the power pads 112. In one embodiment, the adapter board 110 is, for example, a multi-layer organic board (Multi-Layer Organic, MLO), or a multi-layer ceramic board (Multi-Layer Ceramic, MLC), or can be regarded as a space transformer (Space Transformer, ST).

[0050] Furthermore, the guide board 120a of this embodiment is located between the adapter board 110 and the device under test (not shown), wherein the shapes of the first guide board portion 122 and the second guide board portion 124 are both U-shaped and the two are in a mirror image pattern. In one embodiment, the guide board 120a is, for example, a ceramic guide board, but not limited thereto. The capacitor structure C1 of the guide board 120a is embodied as a parallel plate capacitor structure, which has a plurality of openings (schematically showing three openings O) and includes a first metal layer M1, a second metal layer M2, and a dielectric layer D1. The dielectric layer D1 is located between the first metal layer M1 and the second metal layer M2, and the openings O are separated from each other and penetrate the first metal layer M1, the dielectric layer D1, and the second metal layer M2. In one embodiment, the dielectric layer D1 is, for example, made of a material with a high dielectric constant (high Dk), but not limited thereto.

[0051] In addition, the probe card 100a of this embodiment further includes an insulating layer 140 disposed on at least a part of each probe 130. As Figure 1 shown, the first ground probe 132 directly abuts against the first metal layer M1. Since the first ground probe 132 can be used to provide the voltage of the capacitive structure C1 to generate a potential difference, the first ground probe 132 can be regarded as a kind of charging probe. In one embodiment, the first ground probe 132 can be disposed in a non-effective area or an area far from the working area to provide sufficient power for the capacitive structure C1 to charge the capacitive structure C1. The power supply probe 136 and the second ground probe 134 are respectively inclined and located within the opening O. Each power supply probe 136 indirectly contacts the first metal layer M1 through the insulating layer 140 and directly contacts at least the second metal layer M2. The second ground probe 134 directly contacts at least the first metal layer M1 and indirectly contacts the second metal layer M2 through the insulating layer 140. It should be noted that the power supply probe 136 and the second ground probe 134 are in a non-inclined state in the initial state, but during the actuation process, in order to make the actuation directions consistent, the first guide plate portion 122 and the second guide plate portion 124 are misaligned, which causes the power supply probe 136 and the second ground probe 134 to be inclined, thereby also determining the connection points between the probes and the metal layers. Herein, the first ground probe 132, the second ground probe 134, and the power supply probe 136 have different forms due to the different installation positions of the insulating layer 140, that is, there are three forms which are the mixed needle mode, but it is not limited thereto.

[0052] Since the first ground probe 132 of this embodiment is connected to the capacitive structure C1 to provide the voltage of the capacitive structure C1 to generate a potential difference, and the power supply probe 136 draws current through the capacitive structure C1 and forms a current loop with the second ground probe 134. That is to say, this embodiment instantaneously supplies power through the capacitive structure C1 of the guide plate 120a to solve the problem of instantaneous voltage drop in the prior art, and also because of the position of the capacitive structure C1, the distance between the power supply and the object to be measured is greatly reduced, the parasitic inductance can be reduced, so that the high test voltage (VIH) can be effectively identified, and the test signal can be prevented from being blurred and causing misjudgment, thereby improving the test signal integrity and test quality.

[0053] Other embodiments will be listed below for illustration. It must be noted here that the following embodiments follow the component numbers and some contents of the foregoing embodiments, where the same numbers are used to represent the same or similar components, and the description of the same technical content is omitted. For the description of the omitted parts, reference can be made to the foregoing embodiments, and the following embodiments will not be repeated.

[0054] Figure 2 is a schematic diagram of a probe card according to another embodiment of the present invention. Please refer to Figure 1 and Figure 2 simultaneously. The probe card 100b of this embodiment is the same asFigure 1 is similar to the probe card 100a, but the main difference between the two is that: in this embodiment, the capacitive structure C2 of the guide plate 120b is different from Figure 1 the capacitive structure C1 of the guide plate 120a of

[0055] Specifically, in this embodiment, the capacitive structure C2 of the guide plate 120b has at least one first opening (schematically showing a first opening O11) and a plurality of second openings (schematically showing two second openings O12), and includes a first ceramic material layer CM1, a second ceramic material layer CM2, a dielectric layer D2, a first patterned conductive layer P1, and a second patterned conductive layer P2. The dielectric layer D2 is located between the first ceramic material layer CM1 and the second ceramic material layer CM2. The first opening O11 and the second openings O12 are separated from each other and penetrate through the first ceramic material layer CM1, the dielectric layer D2, and the second ceramic material layer CM2. The first patterned conductive layer P1 partially covers the first ceramic material layer CM1 and a part of the first opening O11. The second patterned conductive layer P2 partially covers the second ceramic material layer CM2 and a part of each second opening O12.

[0056] As Figure 2 shown, the first ground probe 132, the second ground probe 134, and the power supply probe 136 have the same structural form due to the same position of the insulating layer 140, which can improve the convenience of assembly. Specifically, the first ground probe 132 directly abuts against the first patterned conductive layer P1 to provide a voltage for the capacitive structure C2 to generate a potential difference. The second ground probe 134 is inclined and located within the first opening O11 and at least directly contacts the first patterned conductive layer P1. The power supply probes 136 are respectively inclined and located within the second openings O12 and at least directly contact the second patterned conductive layer P2. By designing the guide plate 120b to be different from the aforementioned guide plate 120a, the probes of the same structural form can be distinguished according to the position where they contact the guide plate 120b. The power supply probe 136 draws current through the capacitive structure C2 and forms a current loop with the second ground probe 134. That is to say, in this embodiment, the capacitive structure C2 of the guide plate 120b supplies power instantaneously to solve the problem of instantaneous voltage drop in the prior art, and also because of the position where the capacitive structure C2 is set, the distance between the power supply and the device under test is greatly reduced, the parasitic inductance can be reduced, the high test voltage (VIH) can be effectively identified, the test signal blurring can be avoided, and the test signal integrity and test quality can be improved.

[0057] Figure 3 is a schematic diagram of a probe card according to another embodiment of the present invention. Please refer to Figure 1 and Figure 3 simultaneously. The probe card 100c of this embodiment is the same as Figure 1is similar to the probe card 100a, but the main difference between the two is that: in this embodiment, the capacitive structure C3 of the guide plate 120c is different from Figure 1 the capacitive structure C1 of the guide plate 120a.

[0058] Specifically, in this embodiment, the capacitive structure C3 has at least one first opening (schematically showing a first opening O21) and a plurality of second openings (schematically showing two second openings O22), and includes a metal layer M, a ceramic material layer CM, a dielectric layer D3, a patterned conductive layer P, and an insulating layer I. The dielectric layer D3 is located between the metal layer M and the ceramic material layer CM. The first opening O21 and the second openings O22 are separated from each other and penetrate through the metal layer M, the dielectric layer D3, and the ceramic material layer CM. The patterned conductive layer P partially covers the ceramic material layer CM and a part of each second opening O22. The insulating layer I partially covers the metal layer M and another part of each second opening O22.

[0059] As Figure 3 shown, the first ground probe 132, the second ground probe 134, and the power supply probe 136 have the same structural form because the insulating layer 140 is set at the same position, which can improve the convenience of assembly. Specifically, the first ground probe 132 directly abuts against the metal layer M to provide the voltage of the capacitive structure C3 to generate a potential difference. The second ground probe 134 is inclined and located within the first opening O21 and at least directly contacts the metal layer M. The power supply probes 136 are respectively inclined and located within the second openings O22 and indirectly contact the metal layer M through the insulating layer I and at least directly contact the patterned conductive layer P. By designing the guide plate 120c to be different from the aforementioned guide plate 120a, the probes of the same structural form are distinguished according to the positions where they contact the guide plate 120c. The power supply probe 136 draws current through the capacitive structure C3 and forms a current loop with the second ground probe 134. That is to say, in this embodiment, the capacitive structure C3 of the guide plate 120c supplies power instantaneously to solve the problem of instantaneous voltage drop in the prior art, and also because of the position where the capacitive structure C3 is set, the distance between the power supply and the object under test is greatly reduced, the parasitic inductance can be reduced, the high test voltage (VIH) can be effectively identified, the test signal blurring can be avoided to cause misjudgment, and thus the test signal integrity and test quality can be improved.

[0060] In summary, in the probe card of the present invention, the first ground probe is connected to the capacitive structure to provide the voltage of the capacitive structure to generate a potential difference, and the power supply probe draws current through the capacitive structure and forms a current loop with the second ground probe. That is to say, the present invention supplies power instantaneously through the capacitive structure of the guide plate to solve the problem of instantaneous voltage drop in the prior art, and thus the test signal integrity can be improved.

[0061] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A probe card, characterized in that, it includes: An adapter board; A guide plate, disposed on one side of the adapter board, and including a first guide plate portion, a second guide plate portion, and a capacitive structure. The second guide plate portion and the first guide plate portion are arranged at intervals to form a hollow ring shape, and the capacitive structure is disposed in the second guide plate portion and connected to the second guide plate portion; and A plurality of probes, electrically connected to the adapter board, and including at least one first ground probe, at least one second ground probe, and a plurality of power probes. The at least one first ground probe penetrates the first guide plate portion and is connected to the capacitive structure and the adapter board, and the at least one second ground probe and the plurality of power probes penetrate the first guide plate portion, the capacitive structure, and the second guide plate portion and are connected to the adapter board, wherein the at least one first ground probe is used to provide a voltage to the capacitive structure to generate a potential difference, and the plurality of power probes draw current through the capacitive structure and form a current loop with the at least one second ground probe.

2. The probe card according to claim 1, characterized in that, The adapter board includes a plurality of power pads and a plurality of ground pads. The at least one first ground probe and the at least one second ground probe are respectively electrically connected to the plurality of ground pads, and the plurality of power probes are respectively electrically connected to the plurality of power pads.

3. The probe card according to claim 1, characterized in that, It further includes: An insulating layer, disposed on at least a part of each of the probes.

4. The probe card according to claim 3, characterized in that, The capacitive structure has a plurality of openings and includes a first metal layer, a second metal layer, and a dielectric layer. The dielectric layer is located between the first metal layer and the second metal layer, and the plurality of openings are separated from each other and penetrate the first metal layer, the dielectric layer, and the second metal layer.

5. The probe card according to claim 4, characterized in that, The at least one first ground probe directly abuts against the first metal layer, and the plurality of power probes and the at least one second ground probe are respectively inclined in the plurality of openings, and each power probe indirectly contacts the first metal layer through the insulating layer and at least directly contacts the second metal layer, and the at least one second ground probe at least directly contacts the first metal layer and indirectly contacts the second metal layer through the insulating layer.

6. The probe card according to claim 1, characterized in that, The capacitive structure has at least one first opening and a plurality of second openings, and includes a first ceramic material layer, a second ceramic material layer, a dielectric layer, a first patterned conductive layer, and a second patterned conductive layer. The dielectric layer is located between the first ceramic material layer and the second ceramic material layer. The at least one first opening and the plurality of second openings are separated from each other and penetrate through the first ceramic material layer, the dielectric layer, and the second ceramic material layer. The first patterned conductive layer partially covers the first ceramic material layer and a part of the at least one first opening, and the second patterned conductive layer partially covers the second ceramic material layer and a part of each of the second openings.

7. The probe card according to claim 6, wherein, the at least one first ground probe directly abuts against the first patterned conductive layer, the at least one second ground probe is obliquely located within the at least one first opening and at least directly contacts the first patterned conductive layer, and the plurality of power probes are respectively obliquely located within the plurality of second openings and at least directly contact the second patterned conductive layer.

8. The probe card according to claim 1, wherein, the capacitive structure has at least one first opening and a plurality of second openings, and includes a metal layer, a ceramic material layer, a dielectric layer, a patterned conductive layer, and an insulating layer. The dielectric layer is located between the metal layer and the ceramic material layer. The at least one first opening and the plurality of second openings are separated from each other and penetrate through the metal layer, the dielectric layer, and the ceramic material layer. The patterned conductive layer partially covers the ceramic material layer and a part of each of the second openings, and the insulating layer partially covers the metal layer and another part of each of the second openings.

9. The probe card according to claim 8, wherein, the at least one first ground probe directly abuts against the metal layer, the at least one second ground probe is obliquely located within the at least one first opening and at least directly contacts the metal layer, and the plurality of power probes are respectively obliquely located within the plurality of second openings and indirectly contact the metal layer through the insulating layer and at least directly contact the patterned conductive layer.

10. The probe card according to claim 1, wherein, the capacitive structure is a parallel plate capacitive structure.

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