Electric heating real-time simulation-based multi-task hardware-in-loop test method and system for power electronic converter

Abstract

The invention provides a power electronic converter multi-task hardware-in-the-loop test method and system based on electric heating real-time simulation. The method comprises the following steps: establishing a power electronic converter circuit model; constructing a power semiconductor thermal network model; establishing an electric heating real-time simulation model of the power electronic converter through a loss calculation module and an electric parameter correction module; solving an electric heating real-time simulation model of the power electronic converter; and establishing a multi-task hardware-in-the-loop test platform based on the electric heating real-time simulation model, and carrying out multi-task hardware-in-the-loop test. Different from a traditional hardware-in-loop test, the method can perform multi-task hardware-in-loop test on various strategies of closed-loop control, thermal management, device protection, fault prediction, health management, fault-tolerant control and the like of the power electronic converter based on the electric heating real-time simulation model of the power electronic converter. According to the invention, comprehensive, efficient, safe and low-cost testing can be carried out on the converter, and the research and development period of the power electronic converter is shortened.

Description

Technical Field

[0001] The present invention belongs to the technical field of power electronics simulation, and particularly relates to a multi-task hardware-in-the-loop test method and system for power electronic converters based on electrothermal real-time simulation. Background Art

[0002] Compared with the traditional test bench built based on physical hardware, the hardware-in-the-loop test environment provides a controllable and reliable test environment by combining software simulation with physical hardware, enabling comprehensive, efficient, safe, and low-cost testing of converters and shortening the R & D cycle of power electronic converters. The application scenarios of hardware-in-the-loop testing depend on the accuracy of real-time simulation, and different test tasks can be carried out according to the refinement degree of the model.

[0003] However, limited by the accuracy of the real-time simulation model, the current hardware-in-the-loop testing of power electronic converters can only test the closed-loop control performance, and cannot use real-time simulation to analyze thermal stress and verify the safe operating area, making it impossible to conduct hardware-in-the-loop tests such as optimization control strategies based on temperature and efficiency, device overvoltage and overcurrent protection, electrothermal integrated management, fault pre-diagnosis and health management, and fault-tolerant control, which greatly limits the application space of hardware-in-the-loop testing. Therefore, the method of the present invention constructs a multi-task hardware-in-the-loop test based on the electrothermal coupling real-time simulation of power electronic converters, effectively expanding the single-dimensional hardware-in-the-loop test to a multi-functional hardware-in-the-loop test. Summary of the Invention

[0004] The problem to be solved by the present invention is to provide a multi-task hardware-in-the-loop test method for power electronic converters based on electrothermal real-time simulation in view of the deficiencies of the above-mentioned prior art. The specific steps are as follows: A1. Establish a circuit model of the power electronic converter; A2. Construct a thermal network model of the power semiconductor; A3. Establish an electrothermal real-time simulation model of the power electronic converter through a loss calculation module and an electrical parameter correction module; A4. Solve the electrothermal real-time simulation model of the power electronic converter; A5. Establish a multi-task hardware-in-the-loop test platform based on the electrothermal real-time simulation model and conduct multi-task hardware-in-the-loop testing.

[0005] Furthermore, the construction of the circuit model of the power electronic converter in step A1 includes two parts: component modeling based on component characteristic analysis and network modeling based on topology analysis.

[0006] The component modeling of the power electronic converter is the process of representing the characteristics of the components in the converter using mathematical relationships. The main components of the power electronic converter include power semiconductors, resistors, capacitors, inductors, power supplies, and transformers, etc.

[0007] The models of power semiconductors can be divided into transient models and steady-state models according to different application levels, and the modeling methods of steady-state models.

[0008] When the constant resistance element takes the associated reference direction for voltage and current, the voltage and current across its terminals at any moment obey Ohm's law. The current of the constant capacitance element is proportional to the rate of change of voltage, and the voltage is proportional to the capacitance charge. The value of the time-varying capacitance has a functional relationship with the voltage across its terminals. The voltage of the constant inductance element is proportional to the rate of change of current, and the current is proportional to the magnetic flux linkage. The value of the time-varying inductance is related to the current flowing through the inductor.

[0009] Transformer model, using and resistors to simulate the copper losses of the primary and secondary sides, and inductors to simulate the leakage magnetic flux, simulate the core loss resistance, simulate the magnetization effect inductance, and the ideal transformer simulates the voltage conversion relationship between the primary and secondary sides. Assuming the transformer turns ratio is k, the transformer model satisfies the following formula.

[0010] ; In the formula, is the current flowing into the inductor simulating the magnetization effect of, is the total current flowing into the core loss resistance and the inductor simulating the magnetization effect of, is the primary side voltage, is the secondary side voltage, is the primary side current, is the secondary side current.

[0011] Power supplies include independent sources and controlled sources. Among them, the voltage of an independent voltage source is a constant or function of time, the current of an independent current source is a constant or function of time, the voltages of a voltage-controlled voltage source and a current-controlled voltage source depend on the voltages and currents of other circuit elements, and the currents of a voltage-controlled current source and a current-controlled current source depend on the voltages and currents of other circuit elements.

[0012] Network modeling is the process of writing Kirchhoff's equations based on the topological structure and element models of power electronic converters to complete the analysis of electrical networks. The state space method can be used to construct equations through state variables to complete network modeling. The basic steps of the state space analysis method are: first, determine the state variables; then write Kirchhoff's equations for the state variables, use Kirchhoff's current equation to represent the relationship between the derivative of the inductor current and voltage, and use Kirchhoff's voltage equation to represent the relationship between the derivative of the capacitor voltage and current. The matrix form of the circuit equation set obtained by the state space method is: ; In the formula, is the state variable vector, is the system matrix, is the input matrix. If the output variable is not a state variable, the output equation needs to be written. In the formula, is the output variable vector, is the output matrix, is the direct transmission matrix.

[0013] Furthermore, in the power electronic converter in step A2, the components affected by temperature mainly include resistors, capacitors, inductors, power semiconductors, etc. For resistor components, the resistance of metal materials increases with the temperature rise, while some alloy materials are less affected by temperature. The influence can be reduced by selecting resistors from the same manufacturer / batch and fully considering the thermal temperature coefficient of the resistor at the beginning of the design. For capacitor components, the capacitance of aluminum electrolytic capacitors increases and the lifespan shortens when the temperature rises. The temperature characteristics of ceramic capacitors vary depending on the material. The capacitance of tantalum capacitors changes relatively little with temperature, and the capacitance of thin-film capacitors changes relatively little with temperature, and high temperature affects insulation and lifespan. Inductors are actually not sensitive to temperature. Among power semiconductors, diodes are very sensitive to temperature. The higher the temperature, the greater their forward conduction and reverse saturation currents. MOSFETs are also greatly affected by temperature, and there are situations such as thermal failure, pressure damage, and changes in output characteristics. Generally speaking, among the components of a specially designed power electronic converter, the device most affected by temperature and with difficult thermal effect evaluation is the power semiconductor device. Therefore, the thermal effect of power semiconductor devices is mainly analyzed. The basic principle of constructing the thermal network model of power semiconductors is the electro-thermal analogy theory. The heat conduction system is analogized to the resistor network in the circuit, and a network model composed of thermal resistance and heat capacity is established to analyze the heat transfer process and calculate the temperature distribution. In the thermal network model, thermal resistance is used to represent the resistance encountered by heat flow when transferring in different media, similar to the resistance in the circuit; heat capacity is used to represent the ability of an object to store heat, similar to the capacitance in the circuit. A current source is used to replace the heat source, and voltage is analogized to temperature. The thermal network model includes the Cauer model and the Foster model.

[0014] The steps to establish a Cauer thermal network model for a power semiconductor module and its heat dissipation structure are as follows: (1) Determine the nodes. According to the heat transfer process of the power semiconductor, several key nodes such as junction temperature, case temperature, and ambient temperature are divided for it. The junction temperature is the temperature of the active area inside the power semiconductor and is a key parameter to measure the thermal state of the device. The case temperature is the temperature of the surface of the power semiconductor package. The heat sink is the temperature of the surface of the module heat sink, providing a reference for heat sink design. is the temperature of the environment where the device is located, which has a direct impact on the junction temperature.

[0015] (2) Determine the branches and thermal resistances. Analyze the heat transfer paths between nodes, determine the branches connecting each node, and calculate the thermal resistances of the branches. The thermal resistance describes the degree of obstruction to heat transfer, with the unit of . The lower the thermal resistance, the better the heat dissipation effect. The heat capacity is the ability of a material to increase its temperature after absorbing heat, which affects the heat response speed. The values of the thermal resistance and heat capacity are determined by the encapsulation and the material of the radiator.

[0016] (3) Establish nodal equations, form a system of equations and solve it. According to the law of conservation of energy, write the heat balance equations for each node. Assemble the equations of all nodes into a system of equations, and solving this system of equations can obtain the temperatures of each node. The heat balance equation in the thermal network model is the Kirchhoff's law of the circuit, so the above circuit modeling and solving methods can be used for calculation. Use the method of impedance equivalence to transform the Cauer thermal network into a Foster thermal network.

[0017] Furthermore, in step A3, by analyzing the coupling relationship between the circuit model and the thermal network model, a electro-thermal coupling model of the converter is constructed. A real-time electro-thermal simulation model of the power electronic converter is established through the loss calculation module and the electrical parameter correction module.

[0018] The loss calculation module includes the calculation of conduction loss, switching loss and static power consumption. Among them, the conduction loss calculation formula is: ; where is the current flowing through the power semiconductor during conduction, is the equivalent resistance of the power semiconductor in the on state.

[0019] The general calculation formula for the average switching loss is: ; where is the switching frequency, is the turn-on energy loss, is the turn-off energy loss.

[0020] The static power consumption is mainly caused by the leakage current, and its magnitude is related to the manufacturing process and temperature of the device. With the improvement of the manufacturing process level, the static power consumption of the power semiconductors used in high-frequency power electronic converters can be almost ignored.

[0021] The function of the electrical parameter correction module is to correct the thermally sensitive electrical parameters. The thermally sensitive electrical parameters considered in the present invention are the on-state resistance of the power semiconductor and the threshold voltage of the switching transient model.

[0022] , in the typical power semiconductor data sheet, the on-state resistance and threshold voltage vary with temperature. By performing curve fitting according to the data sheet, the relationship between the on-state resistance and the junction temperature can be obtained: ; Among them, is the segmentation point temperature, is the junction temperature of the active region inside the power semiconductor, , , and are the curve fitting coefficients. From the curve, it can be seen that , .

[0023] Similarly, the relationship between the threshold voltage and the junction temperature is: ; Among them, , , and are the curve fitting coefficients.

[0024] Furthermore, in step A4 for solving the electrothermal model of the power electronic converter, first, the thermally sensitive parameters of the power electronic converter are corrected according to the junction temperature results in the previous time step, then the circuit model is solved using the corrected parameters, then the power losses of each power semiconductor are calculated through a look-up table, then the solution of the thermal network model is completed by inputting the losses into the thermal network model to obtain the junction temperature, and finally, the network is updated with the obtained electrical parameter and thermal parameter results to complete the calculation of one time step.

[0025] Furthermore, the multi-task hardware-in-the-loop test platform established based on the electrothermal coupling model in step A5 consists of a real-time simulator running a real-time model, a controller running a control strategy, a host computer, an analog output adapter module, and an oscilloscope. The real-time simulator uses an FPGA and realizes interaction with the controller through a digital interface. The host computer is connected to the real-time simulator through Ethernet, and the host computer can control and monitor the simulation. The waveform generated after the output signal is scaled by the analog output adapter module can be observed through the oscilloscope to observe the changes in the electrical parameters and junction temperature of the converter in real time. The method of the present invention uses a modular electrothermal real-time model to jointly use electrical signals and junction temperature information as the output of real-time simulation, simulating the characteristics of the converter from multiple dimensions to improve the test efficiency. Therefore, different from traditional hardware-in-the-loop tests, multi-task hardware-in-the-loop tests can be performed on various strategies such as closed-loop control, thermal management, device protection, fault prediction, health management, and fault-tolerant control of power electronic converters based on electrothermal real-time simulation.

[0026] The present invention provides a multi-task hardware-in-the-loop test system for a power electronic converter based on electrothermal real-time simulation, including: 1) A real-time simulator for running the circuit model and thermal network model of a power electronic converter, and updating the thermally sensitive electrical parameters and junction temperature in each simulation step; 2) A data processing module connected to the real-time simulator, including a loss calculation unit and an electrical parameter correction unit. The loss calculation unit calculates the conduction loss, switching loss, and static power consumption of the power semiconductor, and the electrical parameter correction unit corrects the on-state resistance and threshold voltage of the power semiconductor according to temperature changes; 3) A multi-task hardware-in-the-loop interface, including a digital interface and an analog output adapter, for data interaction with the controller and the host computer, and outputting electrical signals and junction temperature information to an oscilloscope for observation.

[0027] Furthermore, the real-time simulator includes FPGA hardware for interacting with the controller through a digital interface for circuit state variables and control quantities, and connecting to the host computer through Ethernet to receive test configuration instructions and send simulation monitoring data.

[0028] Furthermore, the data processing module obtains the equivalent resistance value and threshold voltage of the power semiconductor at different junction temperatures through a look-up table or piecewise fitting method, and after the conduction loss and switching loss calculations are completed in the loss calculation unit, transfers the obtained thermal load information to the thermal network model for real-time update.

[0029] The present invention has the following advantages compared with the prior art: The multi-task hardware-in-the-loop test method for power electronic converters based on electro-thermal real-time simulation of the present invention has the advantages of reliability, safety, comprehensiveness, generality, high efficiency, and economy.

[0030] The method of the present invention can accurately simulate the electro-thermal characteristics of power electronic converters. Through real-time simulation, the temperature changes of the converter under different operating conditions and their effects on electrical performance can be accurately reflected, which can be used to study the performance of the converter under conditions such as high temperature or thermal cycling. The multi-task hardware-in-the-loop test can comprehensively test the power electronic converter. Compared with the hardware-in-the-loop test method that only considers electrical characteristics, this method can accurately describe the electrical and thermal characteristics of the converter, thus more comprehensively reflecting the actual working state of the converter, effectively improving the accuracy and reliability of the test results.

[0031] The method of the present invention can avoid the risk of hardware damage. In traditional hardware tests, due to the complexity and uncertainty of actual operating conditions, situations such as overvoltage and overcurrent may occur, resulting in hardware damage to power electronic converters. The hardware-in-the-loop test method replaces part of the actual hardware with a real-time simulation model and conducts most of the tests in a virtual environment, greatly reducing the risk of hardware damage, protecting expensive experimental equipment, and at the same time reducing test interruptions and cost increases caused by hardware failures.

[0032] The method of the present invention can conveniently simulate various fault scenarios, such as open - circuit and short - circuit faults of power devices, as well as control circuit faults, etc. By injecting different types and degrees of faults into the simulation model, the response and fault - tolerance ability of the power electronic converter under fault conditions can be comprehensively evaluated, providing strong support for the design of fault diagnosis and protection strategies, and helping to improve the reliability and stability of the converter.

[0033] During the testing process of the method of the present invention, if it is necessary to expand or upgrade the power electronic converter system, only the real - time simulation model and the hardware interface part need to be modified and updated accordingly, without the need to reconstruct the entire testing system on a large scale. The testing system can conveniently adapt to the testing requirements of power electronic converter systems with different scales and complexities, and has strong versatility and scalability.

[0034] The method of the present invention can shorten the testing time. Compared with the traditional full - physical testing method, the hardware - in - the - loop testing method based on electro - thermal real - time simulation can quickly complete a large number of testing tasks through parallel computing and real - time simulation technologies. Different testing conditions and parameters can be quickly switched in the virtual environment, without the need to build a physical platform for cumbersome equipment adjustment and preparation work, which can improve the testing efficiency and shorten the testing cycle.

[0035] The method of the present invention can reduce the testing cost. This method reduces the dependence on actual hardware, thereby reducing the procurement, maintenance, and replacement costs of hardware devices. At the same time, by conducting most of the tests in a virtual environment, the costs in aspects such as experimental sites and energy consumption are reduced. Moreover, this method can discover and solve problems in the design of power electronic converters in advance, avoiding large - scale rework and cost increase caused by design defects in the actual production stage, and having significant economic benefits. Description of the Drawings

[0036] Figure 1 Steps of the multi - task hardware - in - the - loop testing method for power electronic converters based on electro - thermal real - time simulation of the present invention; Figure 2 Power semiconductor modeling method of the present invention; Figure 3 Resistor - capacitor - inductor element modeling method of the present invention; Figure 4 Transformer equivalent model of the present invention; Figure 5 Power supply element modeling method of the present invention; Figure 6 Electro - thermal coupling modeling method of the present invention; Figure 7 Curves of on - state resistance and threshold voltage varying with temperature in the data sheet of typical power semiconductor devices of the present invention; Figure 8 Schematic diagram of the multi-task hardware-in-the-loop test platform of the present invention; Figure 9 Solution steps of the electro-thermal coupling model of the present invention; Figure 10 Circuit topology diagram of the interleaved parallel bidirectional converter of the present invention; Figure 11 Thermal network model diagram of the power semiconductor of the present invention; Figure 12 Comparison diagram of inductor current results of the interleaved parallel bidirectional converter of the present invention; Figure 13 Comparison diagram of capacitor voltage results of the interleaved parallel bidirectional converter of the present invention; Figure 14 Circuit topology diagram of the junction temperature test of the present invention; Figure 15 Comparison diagram of junction temperature test results when the load current changes in the present invention; Figure 16 Comparison diagram of junction temperature test results when the switching frequency changes in the present invention; Figure 17 Output waveform diagram of the closed-loop test of the present invention, where a is the diagram of the reference voltage change and b is the diagram of the sudden change of the load current; Figure 18 Output waveform diagram of the fault injection test of the present invention; Figure 19 Output waveform diagram of the active thermal control test of the present invention, where a is the diagram of reducing the frequency to 20 kHz when the load current rises and b is the diagram of reducing the frequency to 4 kHz when the load current rises. Specific implementation manner

[0037] The present invention proposes an electro-thermal real-time simulation method for a power electronic converter, which improves the simulation accuracy of the converter through accurate circuit modeling and thermal network calculation. In the circuit modeling stage (A1), a circuit model including components such as power semiconductors, resistors, capacitors, inductors, power supplies, and transformers is established, and Kirchhoff's equations are written according to the topological structure or the state space method is used for modeling to ensure that the network model can accurately describe the dynamic characteristics of the converter.

[0038] In the thermal network modeling stage (A2), based on the electro-thermal analogy theory, thermal nodes such as the junction temperature, case temperature, heatsink temperature, and ambient temperature inside the converter are divided, and a network composed of thermal resistances and thermal capacitances is used to represent the heat transfer process to simulate the heat transfer path of the device during operation. Then, in the electro-thermal real-time simulation stage (A3), the dynamic power loss calculation of semiconductor devices is realized through a loss calculation module and an electrical parameter correction module. The loss calculation includes conduction loss, switching loss, and static power consumption, and thermal-sensitive parameters such as on-state resistance and threshold voltage are corrected according to the change of the device's junction temperature to improve the accuracy of the simulation.

[0039] In the simulation solution stage (A4), the system adopts an iterative calculation method. In each simulation time step, the thermal-sensitive electrical parameters are corrected using the junction temperature calculation result of the previous time step, the power loss is calculated, and the thermal network model is solved to obtain the updated junction temperature value. This method can accurately model power semiconductors under different temperature conditions, ensure that the simulation can dynamically reflect the thermal change characteristics of the device, and improve the timeliness and stability of the simulation.

[0040] In the hardware-in-the-loop test stage (A5), based on the electro-thermal real-time simulation model, a multi-task hardware-in-the-loop (HIL) test platform is constructed. The platform consists of a real-time simulator, a controller, a host computer, an analog output adapter module, and an oscilloscope. The system realizes interaction through a digital interface and outputs electrical signals and junction temperature information in real time, providing an efficient and low-cost solution for the development and test of the converter. The method of the present invention can improve the design efficiency of power electronic converters, reduce test risks, and provide high-precision electro-thermal simulation results under different working conditions, providing reliable technical support for the optimized design and engineering application of the converter.

[0041] The following examples give two specific embodiments of the "multi-task hardware-in-the-loop test system for power electronic converters based on electro-thermal real-time simulation", respectively illustrating how to apply the technical features of the system in different scenarios. The types of components, network topologies, test items, etc. can be adjusted accordingly according to actual needs.

[0042] Embodiment 1: Electro-thermal Real-time Simulation and Temperature Protection Strategy Test of Three-Phase Full-Bridge Inverter 1. System Setup Circuit Model: Select a three-phase full-bridge inverter as a typical circuit of the power electronic converter.

[0043] Thermal Network Model: For the MOSFET device in the inverter, three key nodes of junction temperature, case temperature, and heatsink temperature are divided, and the Cauer thermal network is used to represent the device's heat conduction path.

[0044] Hardware environment: Solve the state-space equation and thermal network equation of the three-phase full-bridge circuit in the FPGA real-time emulator; Build the controller hardware to implement the three-phase SVPWM or other modulation algorithms; Realize the signal interaction between the real-time emulator and the controller through the digital interface.

[0045] 2. Test process Initialization of electrical parameters and thermal sensitive parameters: Set parameters such as the initial on-state resistance, threshold voltage, thermal resistance, and heat capacity of the MOSFET in the real-time emulator.

[0046] Real-time simulation iteration: Calculate the switching loss and conduction loss of the MOSFET in each time step, and correct the on-state resistance and threshold voltage of the MOSFET according to the change of the junction temperature.

[0047] Test of temperature protection strategy: Implement the temperature threshold judgment logic at the controller end. When the junction temperature exceeds the set value, trigger the frequency reduction or shutdown action. The "junction temperature signal" output by the real-time emulator is transmitted to the controller through the digital interface, and the temperature protection behavior of the controller affects the electrical state of the inverter, forming a complete closed loop.

[0048] Multi-task hardware-in-the-loop: Observe the current and voltage waveforms of the inverter and the change of the MOSFET junction temperature at the host computer end at the same time, and record the actions of the controller at high temperature to verify the effectiveness of the temperature protection strategy.

[0049] Embodiment 2: Electro-thermal coupling and fault prediction test of bidirectional DC-DC converter 1. System construction Circuit model: Select a bidirectional DC-DC converter (such as Buck-Boost topology) for the energy storage system.

[0050] Thermal network model: Pay attention to the heat transfer process of the main switch tube (IGBT or MOSFET) and the freewheeling diode, set the junction temperature and case temperature nodes for them respectively, and establish a Cauer thermal network.

[0051] Hardware environment: Implement the switching function solution and thermal network solution of the Buck-Boost topology on the FPGA, the controller implements the bidirectional power flow management strategy, and conducts digital interaction with the real-time emulator.

[0052] 2. Test process Initialization of losses and thermal parameters: Set the switching frequency, current reference value, and initial thermal resistance and heat capacity parameters for different working conditions (such as high-power discharge, low-power charging, etc.).

[0053] Real-time simulation coupling: Calculate the turn-on and turn-off energies of IGBT / MOSFET in each time step, and obtain the correction of the on-state resistance and threshold voltage by temperature through the look-up table or curve fitting method.

[0054] Fault prediction test: Integrate a simple fault prediction algorithm at the controller or host computer end, and evaluate whether the device enters a possible thermal failure area through the junction temperature trend, device loss information, and electrical waveform changes output by real-time simulation.

[0055] Multi-task hardware-in-the-loop: In addition to the conventional closed-loop control test, it can also verify whether the controller switches to the safe mode or operates at a reduced rating when a thermal failure risk is predicted. The analog output adapter module transmits key waveforms and junction temperature information to the oscilloscope and the host computer, facilitating the observation and recording of the response of the entire system during the fault prediction stage.

[0056] Through the above two embodiments, it can be seen that the "multi-task hardware-in-the-loop test system for power electronic converters based on electrothermal real-time simulation" of the present invention is applicable to different types of power electronic converters (such as inverters, bidirectional DC-DC converters, etc.), and can simultaneously consider the electrical and thermal coupling characteristics during real-time simulation, thus playing a key role in various test tasks such as temperature protection, fault prediction, and device reliability evaluation.

[0057] As Figure 1 shown, the multi-task hardware-in-the-loop test method for power electronic converters with electrothermal real-time simulation of the present invention includes the following steps: A1. Establish a circuit model of the power electronic converter; A2. Construct a thermal network model of the power semiconductor; A3. Establish an electrothermal real-time simulation model of the power electronic converter through a loss calculation module and an electrical parameter correction module; A4. Solve the electrothermal real-time simulation model of the power electronic converter; A5. Based on the electrothermal real-time simulation model, establish a multi-task hardware-in-the-loop test platform and conduct multi-task hardware-in-the-loop tests.

[0058] In this embodiment, the construction of the power electronic converter circuit model in step A1 includes two parts: component modeling based on component characteristic analysis and network modeling based on topology analysis.

[0059] The component modeling of the power electronic converter is the process of representing the characteristics of the components in the converter using mathematical relationships. The main components of the power electronic converter include power semiconductors, resistors, capacitors, inductors, power supplies, and transformers, etc.

[0060] The model of the power semiconductor can be divided into a transient model and a steady-state model according to different application levels. The steady-state model modeling method is as Figure 2 shown.

[0061] When the constant resistance element takes the associated reference direction for voltage and current, the voltage across its terminals and the current at any moment obey Ohm's law. The current of a constant capacitance element is proportional to the rate of change of voltage, and the voltage is proportional to the capacitance charge. The value of a time-varying capacitance has a functional relationship with the voltage across its terminals. The voltage of a constant inductance element is proportional to the rate of change of current, and the current is proportional to the magnetic flux linkage. The value of a time-varying inductance is related to the current flowing through the inductance. The modeling of resistance, capacitance, and inductance elements is as shown in Figure 3 shown below.

[0062] The transformer model is as shown in Figure 4 shown below, using and resistors to simulate the copper losses of the primary and secondary sides, and inductors to simulate the leakage magnetic flux, a resistor to simulate the core loss resistance, an inductor to simulate the magnetization effect, and an ideal transformer to simulate the voltage conversion relationship between the primary and secondary sides. Assuming the transformer turns ratio is k, the transformer model satisfies the following equation.

[0063] ; where is the current flowing into the inductor simulating the magnetization effect, is the total current flowing into the core loss resistance and the inductor simulating the magnetization effect, is the primary side voltage, is the secondary side voltage, is the primary side current, is the secondary side current.

[0064] Power sources include independent sources and controlled sources, and their models are as shown in Figure 5 shown below. Among them, the voltage of an independent voltage source is a constant or function of time, the current of an independent current source is a constant or function of time, the voltages of a voltage-controlled voltage source and a current-controlled voltage source depend on the voltages and currents of other circuit elements, and the currents of a voltage-controlled current source and a current-controlled current source depend on the voltages and currents of other circuit elements.

[0065] Network modeling is the process of writing Kirchhoff's equations based on the topological structure and element models of a power electronic converter to complete the analysis of the electrical network. The state space method can be used to construct equations through state variables to complete network modeling. The basic steps of the state space analysis method are: first, determine the state variables; then write Kirchhoff's equations for the state variables, use Kirchhoff's current equation to represent the relationship between the derivative of the inductor current and the voltage, and use Kirchhoff's voltage equation to represent the relationship between the derivative of the capacitor voltage and the current. The matrix form of the circuit equations obtained by the state space method is: ; In the formula, is the state variable vector, is the system matrix, is the input matrix. If the output variable is not a state variable, the output equation needs to be written. In the formula, is the output variable vector, is the output matrix, is the direct transmission matrix.

[0066] In this embodiment, in step A2, in the power electronic converter, the components affected by temperature mainly include resistors, capacitors, inductors, power semiconductors, etc. For resistor components, the resistance of metal materials increases with the temperature rise, while some alloy materials are less affected by temperature. The influence can be reduced by selecting resistors from the same manufacturer / batch and fully considering the thermal temperature coefficient of the resistor at the beginning of the design. For capacitor components, the capacitance of aluminum electrolytic capacitors increases and the lifespan shortens when the temperature rises. The temperature characteristics of ceramic capacitors vary depending on the material. The capacitance of tantalum capacitors changes less with temperature, and the capacitance of thin-film capacitors changes relatively little with temperature, and high temperature affects insulation and lifespan; inductors are actually not sensitive to temperature; among power semiconductors, diodes are very sensitive to temperature. The higher the temperature, the greater their forward conduction and reverse saturation currents. MOSFETs are also greatly affected by temperature, and there are situations such as thermal failure, pressure damage, and changes in output characteristics. Generally speaking, among the components of a specially designed power electronic converter, the device most affected by temperature and with difficult thermal effect evaluation is the power semiconductor device. Therefore, the thermal effect of the power semiconductor device is mainly analyzed. The basic principle of constructing the thermal network model of the power semiconductor is the electro-thermal analogy theory. The heat conduction system is analogized to the resistor network in the circuit, and a network model composed of thermal resistance and heat capacity is established to analyze the heat transfer process and calculate the temperature distribution. In the thermal network model, thermal resistance is used to represent the resistance encountered by heat flow when transferring in different media, similar to the resistor in the circuit; heat capacity is used to represent the ability of an object to store heat, similar to the capacitor in the circuit. A current source is used to replace the heat source, and voltage is analogized to temperature. The thermal network model includes the Cauer model and the Foster model.

[0067] The steps to establish the Cauer thermal network model for the power semiconductor module and its heat dissipation structure are as follows: (1) Determine the nodes. According to the heat transfer process of the power semiconductor, several key nodes such as the junction temperature, case temperature, and ambient temperature are divided for it. The junction temperature is the temperature of the active area inside the power semiconductor and is a key parameter to measure the thermal state of the device. The case temperature is the temperature of the surface of the power semiconductor package. The radiator is the temperature of the surface of the module radiator, providing a reference for radiator design. is the temperature of the environment where the device is located and has a direct impact on the junction temperature.

[0068] (2) Determine the branches and thermal resistances. Analyze the heat transfer paths between nodes, determine the branches connecting each node, and calculate the thermal resistances of the branches. The thermal resistance describes the degree of obstruction to heat transfer, with the unit of . The lower the thermal resistance, the better the heat dissipation effect. The heat capacity is the ability of a material to increase its temperature after absorbing heat, which affects the heat response speed. The values of the thermal resistance and heat capacity are determined by the encapsulation and the material of the radiator.

[0069] (3) Establish node equations, form a system of equations and solve it. According to the law of conservation of energy, write the heat balance equations for each node. Assemble the equations of all nodes into a system of equations, and solving this system of equations can obtain the temperatures of each node. The heat balance equation in the thermal network model is the Kirchhoff's law of the circuit, so the above circuit modeling and solving method can be used for calculation. Use the method of impedance equivalence to transform the Cauer thermal network into a Foster thermal network. After transformation, the thermal network model of the power semiconductor module is as Figure 6 shown.

[0070] In step A3, by analyzing the coupling relationship between the circuit model and the thermal network model, a converter electro-thermal coupling model is constructed, as Figure 7 shown. Establish a real-time electro-thermal simulation model of the power electronic converter through the loss calculation module and the electrical parameter correction module.

[0071] The loss calculation module includes the calculation of conduction loss, switching loss and static power consumption. Among them, the conduction loss calculation formula is: ; where is the current flowing through the power semiconductor during conduction, is the equivalent resistance of the power semiconductor in the conduction state.

[0072] The general calculation formula for the average switching loss is: ; where is the switching frequency, is the turn-on energy loss, is the turn-off energy loss.

[0073] The static power consumption is mainly caused by the leakage current, and its magnitude is related to the manufacturing process and temperature of the device. With the improvement of the manufacturing process level, the static power consumption of the power semiconductors used in high-frequency power electronic converters can be almost ignored.

[0074] The function of the electrical parameter correction module is to correct the thermally sensitive electrical parameters. The thermally sensitive electrical parameters considered in the present invention are the on-state resistance of the power semiconductor and the threshold voltage of the switching transient model.

[0075] The curves of the on-state resistance and the threshold voltage varying with temperature in the typical power semiconductor data sheet are as Figure 7 shown. By performing curve fitting according to the data sheet, the relationship between the on-state resistance and the junction temperature can be obtained: ; where is the sectional point temperature, is the junction temperature of the active region inside the power semiconductor, , , and are the curve fitting coefficients. It can be seen from the curve that , .

[0076] Similarly, the relationship between the threshold voltage and the junction temperature is: ; where , , and are the curve fitting coefficients.

[0077] In this embodiment, the general solution steps for solving the electro-thermal model of the power electronic converter in step A4 are as Figure 8 shown. First, correct the thermal-sensitive parameters of the power electronic converter according to the junction temperature result in the previous time step, then use the corrected parameters to complete the solution of the circuit model, then calculate the power losses of each power semiconductor through the look-up table, then complete the solution of the thermal network model through the loss input thermal network model to obtain the junction temperature, and finally update the network with the obtained electrical parameter and thermal parameter results to complete the calculation of one time step.

[0078] In this embodiment, the multi-task hardware-in-the-loop test platform established based on the electro-thermal coupling model in step A5 is as Figure 9As shown in the figure, it consists of a real-time emulator running a real-time model, a controller running a control strategy, a host computer, an analog output adapter module, and an oscilloscope. The real-time emulator uses an FPGA and realizes interaction with the controller through a digital interface. The host computer is connected to the real-time emulator via Ethernet, and the host computer can control and monitor the simulation. The waveform generated after the output signal is scaled by the analog output adapter module can be observed through the oscilloscope to observe the changes in the electrical parameters and junction temperature of the converter in real time. The method of the present invention uses a modular electrothermal real-time model, takes electrical signals and junction temperature information as the output of real-time simulation together, and simulates the characteristics of the converter from multiple dimensions to improve the test efficiency. Therefore, different from traditional hardware-in-the-loop testing, multi-task hardware-in-the-loop testing of various strategies such as closed-loop control, thermal management, device protection, fault prediction, health management, and fault-tolerant control of power electronic converters can be carried out based on electrothermal real-time simulation.

[0079] Taking the Interleaved Bidirectional Converter (IBC) as an example, an electrothermal coupling model is established, and its circuit topology is as Figure 10 shown. The circuit model of the IBC is constructed using the state space method, and is selected as the state variable. The MOSFET and diode use a binary resistance model. When the converter operates in the boost state, and remain in the off state. At this time, the voltages across the switch tubes and the switch tube satisfy the equation: ; where is the gate control voltage, is the inductor current, is the equivalent conduction voltage of the diode, is the equivalent conduction resistance of the diode, is the equivalent conduction voltage of the MOSFET, is the equivalent conduction resistance of the MOSFET, is the input voltage of the converter, is the output voltage of the converter.

[0080] The current flowing into the diodes and the diode satisfies the equation: ; Writing the Kirchhoff voltage equation for the loop where the inductor is located, it can be known that: ; where is the switch tube Voltage across both ends; is the parasitic resistance of the inductor . Similarly, for the loop where the inductor is located, we have: , where is the voltage across the switching transistor , is the parasitic resistance of the inductor ; Writing the Kirchhoff's current law equation for the output node gives: ; where , are the currents flowing through the diodes and respectively, is the load current.

[0081] By arranging, the matrix form of the state - space equation is obtained as: ; The power semiconductor thermal network model is as shown in Figure 11 , which consists of multiple parallel resistor - capacitor units. Using the state - space method to model the thermal network, the voltages across all heat capacitances are selected as state variables.

[0082] Writing the Kirchhoff's current law equation for each parallel resistor - capacitor unit gives: ; where is the power loss of the MOSFET, is the power loss of the diode, then the current of the parallel resistor - capacitor unit in the radiator part of the thermal network. The temperature relationship satisfies the formula: ; where is the radiator temperature, is the ambient temperature, is the voltage across the heat capacitance of the radiator. The current of the parallel resistor - capacitor unit in the MOSFET part, and the junction temperature satisfies the formula: ; where is the voltage across the heat capacitance of the th switching transistor. Similarly, the current of the parallel resistor - capacitor unit in the diode part, and the junction temperature satisfies the formula: ; where is the voltage across the heat capacity of the th diode.

[0083] The power semiconductor loss calculation module includes conduction loss and switching loss. The conduction loss calculation formula is: ; where is the current flowing through the power semiconductor during conduction, is the equivalent resistance of the power semiconductor in the conduction state.

[0084] The general calculation formula for the average switching loss is: ; where is the switching frequency, is the turn-on energy loss, is the turn-off energy loss.

[0085] The electrical parameter correction module includes the updated calculation of the on-state resistance and the threshold voltage. The on-state resistance calculation formula is: ; The threshold voltage calculation formula is: ; By calculating the power losses of the diode and MOSFET through the loss calculation module as the input of the thermal network model and correcting the circuit model parameters by the electrical parameter correction module, the electro-thermal coupling modeling is realized.

[0086] The comparison of the inductor current and capacitor voltage of the electro-thermal coupling real-time simulation model and the off-line simulation software of the interleaved parallel bidirectional converter is as Figure 12 and Figure 13 shown, and its average relative error is shown in Table 1.

[0087] Table 1 Test simulation parameters of the interleaved parallel bidirectional converter Parameter Name Symbol Average Relative Error <![CDATA L 1 Inductor current]]> <![CDATA I L1 > 0.09% <![CDATA L 2 Inductor current]]> <![CDATA I L2 > 0.21% Capacitor Voltage <![CDATA V C > 0.78% The topology of the power semiconductor junction temperature test is as Figure 14 shown. Assuming that the heat dissipation condition around the test environment is good, so that the radiator temperature is fixed at 25 °C, changing the load current and switching frequency, observing the change of the junction temperature, the comparison of the junction temperature test results is as Figure 15 and Figure 16 shown.

[0088] The electrothermal coupling model of the power electronic converter established by the present invention is used for multi-task hardware-in-the-loop testing, that is, the real-time model established in this paper is used to replace the physical object of the interleaved parallel bidirectional converter for testing. Taking the closed-loop test, fault injection test, and active thermal control test as examples. First, the electrothermal coupling real-time simulation model of the power electronic converter established by the present invention can be used for closed-loop testing including junction temperature feedback, and can more comprehensively verify the performance of the control algorithm. During the closed-loop test of the interleaved parallel bidirectional converter, when changing the reference voltage and load current, the output voltage, input current, and power semiconductor junction temperature change oscilloscope curves are as Figure 17 shown. In the figure, the time scale is 200 or 500 milliseconds per division (div), the converter output voltage is 10 volts per division, the converter input current is 5 amperes per division, and the power semiconductor junction temperature is 5 degrees Celsius per division. During the operation of the converter, when changing the reference voltage, the output voltage changes accordingly, and the junction temperature also changes accordingly. Then, the electrothermal coupling real-time simulation model of the power electronic converter established by the present invention can be used for fault injection testing, which can simulate the fault state of the converter and be used to test the fault diagnosis and fault tolerance control capabilities of the controller. When a power semiconductor fault is injected, the output voltage, input current, and power semiconductor junction temperature change are as Figure 18 shown. In the figure, the time scale is 500 milliseconds per division, the converter output voltage is 10 volts per division, the converter input current is 5 amperes per division, and the power semiconductor junction temperature is 5 degrees Celsius per division. When a fault occurs, the faulty phase of the converter is regarded as an open circuit, and the normal phase bears all the current and continues to work. At this time, the output voltage and input current fluctuate under closed-loop control and then maintain the reference value, and the junction temperature of the power semiconductor in the normal phase rises significantly. Finally, the electrothermal coupling real-time simulation model of the power electronic converter established by the present invention can be used for testing the performance of active thermal control algorithms, comparing the regulation effects of different active thermal control algorithms on the converter junction temperature, evaluating the effects of active thermal control algorithms. When using the switching frequency adjustment for active thermal control, the power semiconductor junction temperature change is as Figure 19 shown. In this experiment, the reference voltage of the converter is set to 270V. In the figure, the time scale is 500 milliseconds per division, the converter output voltage is 100 volts per division, and the power semiconductor junction temperature is 10 degrees Celsius per division. Under the same other conditions, the results in the figure show that a low switching frequency can reduce the junction temperature and achieve active thermal control.

[0089] The above is only a preferred embodiment of the present invention, and does not impose any restrictions on the present invention. Any simple modifications, changes, and equivalent structural changes made to the above embodiments according to the technical essence of the present invention still fall within the protection scope of the technical solution of the present invention.

Claims

1. A multi-task hardware-in-the-loop test method for power electronic converter based on real-time electrothermal simulation, characterized in that: The following steps are involved: A1: Establish a circuit model of a power electronic converter by modeling components such as power semiconductors, resistors, capacitors, inductors, power supplies, and transformers, and complete network modeling by writing Kirchhoff equations based on the topological structure; A2: Construct a power semiconductor thermal network model, divide the junction temperature, shell temperature, heat sink temperature and ambient temperature nodes based on the electrothermal analogy theory, and use a network composed of thermal resistance and thermal capacitance to represent the heat transfer process; A3: Establish a real-time electrothermal simulation model of the power electronic converter through the loss calculation module and the electrical parameter correction module. The loss calculation module includes the calculation of conduction loss, switching loss and static power consumption, and the electrical parameter correction module corrects thermally sensitive electrical parameters such as the on-resistance and threshold voltage of the power semiconductor. A4: Solve the real-time electrothermal simulation model of the power electronic converter, use the junction temperature result of the previous step in each simulation step to correct the thermally sensitive electrical parameters, calculate the power loss and solve the thermal network model, obtain the updated junction temperature and iteratively update the network; A5: A multi-task hardware-in-the-loop test platform is established based on the electrothermal real-time simulation model. It consists of a real-time simulator, a controller, a host computer, an analog output adapter module and an oscilloscope. It interacts through a digital interface and outputs electrical signals and junction temperature information for multi-task hardware-in-the-loop testing.

2. The multi-task hardware-in-the-loop testing method for power electronic converter based on electric-thermal real-time simulation according to claim 1, characterized in that: In step A1, the modeling of the power semiconductor adopts the binary resistance method, the on state is regarded as a small resistance, the off state is regarded as a large resistance, and the equivalent resistance of the switching process of the MOSFET is represented in segments based on the mathematical relationship between the gate-source voltage and the threshold voltage.

3. The multi-task hardware-in-the-loop testing method for power electronic converter based on electric-thermal real-time simulation according to claim 1, characterized in that: The thermal network model in step A2 regards heat flow as a current source, temperature as a voltage, thermal resistance and thermal capacitance correspond to resistance and capacitance respectively, wherein the junction temperature node, shell temperature node, heat sink node and ambient temperature node constitute a Cauer thermal network through a combination of several thermal resistances and thermal capacitances, and can be converted into a Foster thermal network through an impedance equivalent method.

4. The multi-task hardware-in-the-loop testing method for power electronic converters based on real-time electrothermal simulation according to claim 1, characterized in that: In step A3, the loss calculation module calculates the conduction loss, switching loss and static power consumption respectively. The conduction loss is related to the current flowing through the power semiconductor and the on-state equivalent resistance. The switching loss is determined according to the turn-on energy, turn-off energy and switching frequency. The static power consumption is caused by leakage current.

5. The multi-task hardware-in-the-loop testing method for power electronic converter based on electric-thermal real-time simulation according to claim 1, characterized in that: The electrical parameter correction module in step A3 performs segmented correction on the on-resistance and threshold voltage of the power semiconductor according to the curve fitting on-resistance and junction temperature relationship, and threshold voltage and junction temperature relationship, so that the circuit model reflects the impact of temperature changes on switch characteristics in real-time simulation.

6. The multi-task hardware-in-the-loop testing method for power electronic converter based on electric-thermal real-time simulation according to claim 1, characterized in that: In step A4, in each simulation step, the thermally sensitive electrical parameters are first corrected according to the junction temperature result of the previous step, and then the corrected circuit model is used to calculate the power loss, the obtained loss is input into the thermal network model to solve the new junction temperature, and finally the electrical and thermal parameters are updated to enter the next step calculation.

7. The multi-task hardware-in-the-loop testing method for power electronic converter based on electric-thermal real-time simulation according to claim 1, characterized in that: The multi-task hardware-in-the-loop test platform described in step A5 is connected to the controller through a digital interface by a real-time simulator composed of FPGA, and the host computer and the real-time simulator exchange data through Ethernet. The analog output adapter module is used to scale and convert the electrical signal and junction temperature information output by the simulator, and the oscilloscope is used for real-time observation.

8. A power electronic converter multi-task hardware-in-the-loop test system based on electric thermal real-time simulation, which implements the power electronic converter multi-task hardware-in-the-loop test method based on electric thermal real-time simulation as described in any one of claims 1 to 6, characterized in that: include: 1) A real-time simulator that runs the circuit model and thermal network model of the power electronic converter and updates the thermally sensitive electrical parameters and junction temperature at each simulation step; 2) a data processing module connected to the real-time simulator, comprising a loss calculation unit and an electrical parameter correction unit, wherein the loss calculation unit calculates the conduction loss, switching loss and static power consumption of the power semiconductor, and the electrical parameter correction unit corrects the on-resistance and threshold voltage of the power semiconductor according to temperature changes; 3) Multi-task hardware-in-the-loop interface, including digital interface and analog output adapter, is used to interact with the controller and host computer for data, and output electrical signals and junction temperature information to the oscilloscope for observation.

9. The multi-task hardware-in-the-loop test system for power electronic converters based on real-time electrothermal simulation according to claim 8, characterized in that: The real-time simulator includes FPGA hardware, which interacts with the controller through a digital interface to obtain circuit state variables and control quantities, and is connected to a host computer through Ethernet to receive test configuration instructions and send simulation monitoring data.

10. The multi-task hardware-in-the-loop test system for power electronic converters based on real-time electrothermal simulation according to claim 8, characterized in that: The data processing module obtains the equivalent resistance and threshold voltage of the power semiconductor at different junction temperatures by a lookup table or a segmented fitting method, and after the loss calculation unit completes the conduction loss and switching loss calculation, the obtained thermal load information is transmitted to the thermal network model for real-time updating.

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