Model verification file generation method, device, medium and product

Abstract

The application discloses a model verification file generation method, device, medium and product, and relates to the technical field of semiconductor integrated circuits. The model verification file generation method comprises the following steps: acquiring a layout measurement region of a to-be-tested layout; taking a target feature point in the layout measurement region as a center, and performing splitting on the layout measurement region according to a plurality of region sizes to obtain a plurality of first layout split regions with different sizes, the target feature point being any one of feature points in the layout measurement region; for each first layout split region, performing offsetting in the to-be-tested layout to make there be no overlapping region between the offset first layout split regions, and determining the offset first layout split regions as second layout split regions; and generating a model verification file according to region features and offset features of the second layout split regions.

Description

Technical Field

[0001] This application belongs to the field of semiconductor integrated circuit technology, and in particular relates to a method, device, medium and product for generating model verification files. Background Technology

[0002] Optical Proximity Correction (OPC) is a technique to enhance photolithography results. In current semiconductor manufacturing, OPC often uses model-based dynamic simulation to obtain masks and contours. To obtain an accurate model, proximity effect verification is often required, which necessitates preparing a large amount of measurement data to form a model verification file.

[0003] In existing methods, each measurement area of ​​the layout to be tested is divided into a measurement sub-layout according to the corresponding area size, thereby forming a model verification file.

[0004] However, when a large amount of measurement data is required, a large number of layout measurement areas and corresponding area sizes need to be set. This makes the data preparation process cumbersome and the generation efficiency of model validation files low. Summary of the Invention

[0005] This application provides a method, device, medium, and product for generating model validation files, which can improve the efficiency of model validation file generation.

[0006] One aspect of this application provides a method for generating a model validation file, including:

[0007] Obtain the measurement area of ​​the layout to be tested;

[0008] Centered on the target feature point in the land area measurement area, the land area measurement area is divided according to multiple area sizes to obtain multiple first land area segmentation areas of different sizes. The target feature point is any one of the feature points in the land area measurement area.

[0009] For each first layout segmentation region, offset it in the layout to be tested so that there is no overlap between the offset first layout segmentation regions, and determine the offset first layout segmentation regions as second layout segmentation regions;

[0010] Based on the regional and offset characteristics of each segmented region in the second edition map, a model validation file is generated.

[0011] One aspect of this application provides a model validation file generation apparatus, comprising:

[0012] The area acquisition module is used to acquire the measurement area of ​​the layout to be tested;

[0013] The region segmentation module is used to segment the land measurement region according to multiple region sizes, with the target feature point as the center, to obtain multiple first land segmentation regions of different sizes. The target feature point is any one of the feature points in the land measurement region.

[0014] The region offset module is used to offset each first layout segmentation region in the layout to be tested, so that there is no overlap between the offset first layout segmentation regions, and to determine the offset first layout segmentation regions as second layout segmentation regions.

[0015] The file generation module is used to generate model verification files based on the regional and offset characteristics of each second version map segmentation area.

[0016] In one aspect of this application, an electronic device is provided, the device including: a memory and a program or instructions stored in the memory and executable on a processor, wherein when the program or instructions are executed by the processor, they implement the method for generating model verification files as provided in any aspect of the above-described embodiments of this application.

[0017] One aspect of this application provides a readable storage medium on which a program or instructions are stored. When the program or instructions are executed by a processor, they implement the method for generating model verification files as provided in any aspect of the above-described embodiments of this application.

[0018] In one aspect of the embodiments of this application, a computer program product is provided, wherein when the instructions in the computer program product are executed by the processor of an electronic device, the electronic device performs the model verification file generation method provided in any aspect of the embodiments of this application described above.

[0019] In the model verification file generation method provided in this application embodiment, multiple region sizes are pre-set, and then the layout measurement region is divided according to the set region sizes to obtain multiple first layout segmentation regions. Each first layout segmentation region is then offset to ensure that there are no overlapping areas between the offset second layout segmentation regions, thereby generating the model verification file. Thus, this application embodiment, when dealing with a large amount of required measurement data, divides a single layout measurement region into multiple layout segmentation regions, compared to existing methods where only one layout segmentation region can be divided from a single layout measurement region, reducing the number of layout measurement regions that need to be set. Simultaneously, by pre-setting multiple region sizes and dividing each layout measurement region according to these multiple region sizes, it is unnecessary to set a separate region size for each layout measurement region, significantly reducing the number of region sizes required when the number of layout measurement regions is large. Therefore, the number of layout measurement regions and their corresponding region sizes that need to be set can be reduced, thereby improving the generation efficiency of the model verification file. Attached Figure Description

[0020] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a flowchart illustrating a method for generating model verification files according to an embodiment of this application;

[0022] Figure 2 This is a schematic diagram of a first layout segmentation region provided in one embodiment of this application;

[0023] Figure 3 This is a schematic diagram of a second version drawing segmentation region provided in one embodiment of this application;

[0024] Figure 4 This is a schematic diagram of the structure of a model verification file generation device provided in one embodiment of this application;

[0025] Figure 5 This is a schematic diagram of the structure of a model verification file generation device provided in one embodiment of this application. Detailed Implementation

[0026] The features and exemplary embodiments of various aspects of this application will be described in detail below. To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain this application and not to limit it. For those skilled in the art, this application can be implemented without some of these specific details. The following description of the embodiments is merely to provide a better understanding of this application by illustrating examples.

[0027] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes said element.

[0028] It should be noted that the acquisition, storage, use, and processing of data in the technical solution of this application all comply with the relevant provisions of national laws and regulations.

[0029] It should be noted that in the embodiments of this application, certain software, components, models and other existing solutions in the industry may be mentioned. These should be regarded as exemplary and are only intended to illustrate the feasibility of implementing the technical solution of this application. However, it does not mean that the applicant has used or necessarily used the solution.

[0030] Optical proximity correction is a technique to enhance photolithography results by reducing image edge distortion caused by diffraction. Currently, in semiconductor manufacturing, optical proximity correction primarily utilizes model-based dynamic simulation to obtain masks and contours. As manufacturing node technologies become more complex, the accuracy requirements for these models also increase. Therefore, validating the model for optical proximity effects is crucial. However, validating the model for optical proximity effects requires preparing a large amount of measurement data to create a model validation file.

[0031] In existing methods, multiple measurement regions for dynamic simulation of optical proximity effect verification are selected from a pre-defined test layout. Then, a measurement sub-layout is created within each measurement region according to its corresponding size, and the measurement data from this sub-layout is used to construct a model verification file.

[0032] However, when the required measurement data is huge, the layout measurement area and the corresponding area size need to be set up, which makes the data preparation process more complicated and the generation efficiency of model validation files is low.

[0033] The purpose of this application is to provide a method, apparatus, medium, and product for generating model verification files. In the model verification file generation method provided in this application, multiple region sizes are pre-set, and then the layout measurement region is divided according to the set region sizes to obtain multiple first layout segmentation regions. Each first layout segmentation region is then offset so that there is no overlap between the offset second layout segmentation regions, thereby generating the model verification file. Thus, in cases where the required measurement data volume is large, this application embodiment can divide a single layout measurement region into multiple layout segmentation regions, compared to existing methods where only one layout segmentation region can be divided from a single layout measurement region, reducing the number of layout measurement regions that need to be set. Simultaneously, by pre-setting multiple region sizes, and dividing each layout measurement region according to these multiple region sizes, it is unnecessary to set a separate region size for each layout measurement region. This significantly reduces the number of region sizes required when the number of layout measurement regions is large. Therefore, the number of layout measurement regions and their corresponding region sizes that need to be set can be reduced, thereby improving the efficiency of model verification file generation.

[0034] The following describes specific embodiments of the model verification file generation method, device, medium, and product provided in this application. The method for generating the model verification file will be described first.

[0035] Figure 1 A flowchart illustrating a method for generating model validation files is provided. This method can be applied to the server and may include steps S101 to S104.

[0036] S101, Obtain the layout measurement area of ​​the layout to be tested.

[0037] In this embodiment, the layout to be tested is used to characterize a pre-determined layout for verifying the optical proximity effect.

[0038] The layout measurement area is used to characterize the region within the layout under test used for dynamic simulation to verify the optical proximity effect. The layout under test can be a binary file or a database file.

[0039] As an example, the server first imports the layout to be tested from a design tool or database. Then, using layout editing software or a script, it selects the measurement areas to be measured from the entire layout; specifically, this can be done manually by the user or automatically determined by a selection algorithm. Finally, the selected measurement areas are preprocessed, such as removing unnecessary graphic elements, to ensure the accuracy of subsequent processing.

[0040] S102, taking the target feature point in the layout measurement area as the center, the layout measurement area is divided into multiple areas according to multiple area sizes to obtain multiple first layout segmentation areas of different sizes. The target feature point is any one of the feature points in the layout measurement area.

[0041] In this embodiment, feature points are used to characterize locations in the layout measurement area that are critical or have significant features. For example, feature points may include the center point of the layout measurement area and each vertex.

[0042] The target feature point can be any one of the feature points. For example, the target feature point can be the center point of the layout measurement area, or any one of the vertices of the layout measurement area.

[0043] The region size is used to characterize the size of the first region obtained after dividing the measurement area of ​​the layout. The shape of the first region is not limited; for example, the first region can be a rectangular region, a square region, or a circular region.

[0044] The region size can be the side length, radius, or perimeter of the region divided by the first layout. For example, if the region divided by the first layout is a square region, the region size is used to represent the side length of the square region; if the region divided by the first layout is a circular region, the region size is used to represent the radius of the circular region.

[0045] As an example, such as Figure 2 As shown, a schematic diagram of a first layout segmentation region is provided. The layout to be tested includes two layout measurement regions, namely layout measurement region 201 and layout measurement region 202.

[0046] The server first identifies the corresponding target feature point A and target feature point B in the layout measurement region 201 and layout measurement region 202, respectively. Then, according to the requirements, multiple different region sizes are set, and the layout measurement region 201 and layout measurement region 202 are divided according to the target feature point A and target feature point B, respectively, thereby obtaining multiple first layout segmentation regions corresponding to layout measurement region 201 and multiple first layout segmentation regions corresponding to layout measurement region 202.

[0047] The map measurement area 201 can be divided into three first map segmentation areas: first map segmentation area 201a, first map segmentation area 201b, and map measurement area 201 itself can also be considered a first map segmentation area. Similarly, the map measurement area 202 can be divided into three first map segmentation areas: first map segmentation area 202a, first map segmentation area 202b, and map measurement area 202 itself can also be considered a first map segmentation area. Furthermore, the shapes of the first map segmentation areas corresponding to map measurement areas 201 and 202 can be the same or different. Figure 2 In the first map measurement area 201, the area shapes of the first map segmentation areas 201a and 201b corresponding to the first map segmentation area 201 are square, and the area shapes of the first map segmentation areas 202a and 202b corresponding to the second map measurement area 202 are rectangular.

[0048] S103, for each first layout segmentation region, offset it in the layout to be tested so that there is no overlap between the offset first layout segmentation regions, and determine the offset first layout segmentation regions as second layout segmentation regions.

[0049] In this embodiment, the second layout segmentation region is used to characterize the layout segmentation region obtained by offsetting the first layout segmentation region, which does not overlap with other first layout segmentation regions.

[0050] As an example, the server sets an appropriate offset for each first layout segmentation region to ensure they do not overlap. Then, based on the offset corresponding to each first layout segmentation region, the first layout segmentation regions are offset within the test layout, and the offset first layout segmentation regions are determined as second layout segmentation regions.

[0051] like Figure 3As shown, a schematic diagram of a second layout segmentation region is provided. Specifically, the second layout segmentation region test1_3 is obtained by offsetting the layout measurement region 202, the second layout segmentation region test1_2 is obtained by offsetting the first layout segmentation region 202a, and the second layout segmentation region test1_1 is obtained by offsetting the first layout segmentation region 202b; the second layout segmentation region test2_3 is obtained by offsetting the layout measurement region 201, the second layout segmentation region test2_2 is obtained by offsetting the first layout segmentation region 201a, and the second layout segmentation region test2_1 is obtained by offsetting the first layout segmentation region 201b.

[0052] S104. Generate model verification files based on the regional and offset characteristics of each second version map segmentation area.

[0053] In this embodiment, the model validation file is used to characterize the data file generated based on the region segmentation of the second layout, which can be used for proximity effect verification. The model validation file includes a layout file and a measurement data file. The layout file includes information about the layout regions used for optical proximity effect verification, and the measurement data file includes measurement data for each layout region used for optical proximity effect verification.

[0054] Specifically, after obtaining the model validation file, the various layout regions included in the layout file can be input into the model to obtain the corresponding simulation measurement results; then, the simulation measurement results can be compared with the actual measurement results in the measurement data file to verify the accuracy of the model.

[0055] Region features are used to characterize the spatial extent of regions segmented in the second map. For example, region features may include region shape, region size, etc.

[0056] Offset features are used to characterize the properties of offsetting a region segmented in the first layout to a region segmented in the second layout. For example, offset features may include offset amount, offset direction, etc.

[0057] As an example, the server first extracts the corresponding regional features from each segmented region of the second-page map; then, it records the offset features of each segmented region. Finally, based on the regional and offset features of the segmented regions of the second-page map, a model validation file is generated using a specific file format.

[0058] In the model verification file generation method provided in this embodiment, multiple region sizes are pre-set, and then the layout measurement region is divided according to the set region sizes to obtain multiple first layout segmentation regions. Each first layout segmentation region is then offset to ensure that there is no overlap between the offset second layout segmentation regions, thereby generating the model verification file. Thus, this embodiment, even with a large amount of required measurement data, divides a single layout measurement region into multiple layout segmentation regions. Compared to existing methods where only one layout segmentation region can be divided from a single layout measurement region, this reduces the number of layout measurement regions that need to be set. Furthermore, by pre-setting multiple region sizes and dividing each layout measurement region according to these sizes, it is unnecessary to set a separate region size for each layout measurement region. This significantly reduces the number of region sizes required when the number of layout measurement regions is large. Therefore, the number of layout measurement regions and their corresponding region sizes that need to be set can be reduced, thereby improving the efficiency of model verification file generation.

[0059] As an optional embodiment, S102 may specifically include:

[0060] Centered on the target feature point in the map measurement area, and with N times the preset length as the area size, the map measurement area is divided to obtain the Nth first map division area. The initial value of N is 1.

[0061] If the N+1 times preset length is less than or equal to the size of the layout measurement area, update N to N+1 and return to execute the division of the layout measurement area with the target feature point in the layout measurement area as the center and N times the preset length as the area division size, to obtain the Nth first layout division area.

[0062] In this embodiment, the preset length is used to characterize the length of the region pre-set by the server for determining the size of each first map segmentation area.

[0063] As an example, when the first layout segment is a square region, the region size can represent the side length of that square region. In this case, the size of the layout measurement area is the side length of the layout measurement area. The server then uses N times the preset length as the side length of the current first layout segment, with N initially set to 1. For example, if the preset length is 10 units, when N=1, the side length of the first layout segment is 10 units; when N=2, the side length is 20 units, and so on.

[0064] Then, centered on the target feature point, a square first map segmentation region is segmented from the map measurement region according to the side length of the corresponding first map segmentation region. Next, it is checked whether the preset length of N+1 times is less than or equal to the side length of the map measurement region. If so, it means the segmentation region can be further expanded; if not, it means the boundary of the map measurement region has been reached and further segmentation is not possible.

[0065] Finally, if the preset length of N+1 times is less than or equal to the side length of the layout measurement area, then N is updated to N+1, and the layout measurement area is re-divided; if the preset length of N+1 times is greater than the side length of the layout measurement area, then the iteration process stops.

[0066] As another example, when the first layout segmentation area is a circular region, the area size can represent the radius of that circular region. In this case, the length of the layout measurement area is the radius of the layout measurement area. The server then uses N times the preset length as the radius of the current first layout segmentation area, with N initially set to 1. For example, if the preset length is 10 units, when N=1, the radius of the first layout segmentation area is 10 units; when N=2, the radius of the first layout segmentation area is 20 units, and so on.

[0067] Then, centered on the target feature point, a circular first map segmentation region is segmented from the map measurement region based on the radius of the corresponding first map segmentation region. Next, it is checked whether the preset length of N+1 times is less than or equal to the radius of the map measurement region. If so, it means the segmentation region can be further expanded; otherwise, it means the boundary of the map measurement region has been reached, and further segmentation is not possible.

[0068] Finally, if the preset length of N+1 times is less than or equal to the radius of the layout measurement area, then N is updated to N+1, and the layout measurement area is re-divided; if the preset length of N+1 times is greater than the radius of the layout measurement area, then the iteration process stops.

[0069] In this embodiment, the area is gradually expanded using N times the preset length as the region size until it covers the entire layout measurement area or cannot be further divided. This allows for multiple divisions of the layout measurement area, reducing the number of layout measurement areas that need to be set and improving the efficiency of generating model verification files.

[0070] As an optional embodiment, the preset length is equal to a positive integer multiple of the model recognition accuracy in the optical proximity effect correction model.

[0071] In this embodiment, the server determines the model recognition accuracy (ambit parameter) of the optical proximity effect correction model based on the performance and process requirements of the lithography machine.

[0072] Then, based on the determined model recognition accuracy, the aforementioned preset length is set. This preset length should be a positive integer multiple of the model recognition accuracy to ensure accurate identification and correction of lithographic pattern distortion during model calibration. For example, if the model recognition accuracy of the optical proximity effect correction model is 1µm, the preset length can be set to 1µm, 2µm, 3µm, etc.

[0073] In this embodiment, a preset length is determined based on the model recognition accuracy of the optical proximity correction model. This ensures that the first map segmentation region obtained according to the preset length can be accurately recognized by the optical proximity correction model, thereby improving the accuracy of model verification.

[0074] As an optional embodiment, S103 may specifically include:

[0075] Repeat the following steps until all first-page map segments have been traversed:

[0076] According to the preset selection order, select the first first map segmentation region from each first map segmentation region;

[0077] The first map section is divided into regions, and the corresponding offset length is moved along the offset direction.

[0078] In this embodiment, the preset selection order can be either the order of the areas of the first layout segmented regions from largest to smallest, or the order of the areas of the first layout segmented regions from smallest to largest.

[0079] The offset direction can be either along the horizontal axis of the coordinate system parallel to the layout coordinate system, or along the vertical axis of the coordinate system parallel to the layout coordinate system. The layout coordinate system is a Cartesian coordinate system constructed with any feature point in the layout to be tested as its origin.

[0080] The offset length is a predefined value that determines the distance the region moves. The offset lengths between the different regions segmented in the first map are not the same.

[0081] As an example, the server can be configured to use a loop structure (such as a for loop, while loop, etc.) to iterate through each first-page map segment, where the loop terminates when all first-page map segments have been processed.

[0082] In each iteration of the loop, the server determines the first first-page image segmentation region to be processed according to a preset selection order. Then, along a preset offset direction, the first first-page image segmentation region is moved by the corresponding offset length to obtain the second-page image segmentation region.

[0083] like Figure 3 As shown, test1_1, test1_2, and test1_3 belong to the second map segmentation regions obtained after dividing the same map measurement area; test2_1, test2_2, and test2_3 belong to the second map segmentation regions obtained after dividing the same map measurement area. The second map segmentation regions obtained after dividing the same map measurement area are arranged in order of their area size.

[0084] In this embodiment, each first layout segmentation region in the layout measurement area is shifted along the offset direction by a corresponding offset length to obtain a corresponding second layout segmentation region, thus forming an array. In this way, the resulting second layout segmentation regions will not overlap, thereby improving the accuracy of model verification.

[0085] As an optional embodiment, the offset length is equal to the product of the target difference and the reference movement length. The target difference is the difference between the total number of the first layout segmentation regions and the current movement sequence of the first layout segmentation regions. The reference movement length is greater than or equal to the maximum dimension along the offset direction in each of the first layout segmentation regions.

[0086] In this embodiment, the reference moving length is set according to the maximum dimension along the offset direction in each of the first layout segmentation regions. For example, the dimensions along the offset direction in each of the first layout segmentation regions are 1µm, 2µm, and 3µm, respectively. In this case, the reference moving length is set to any length value greater than or equal to 3µm.

[0087] The offset length corresponding to each of the first map division regions is determined by subtracting the current movement sequence number of each region from the total number of regions in the first map division, and then using the baseline movement length. For example, if there are a total of 5 first map division regions, the offset length corresponding to each region in the first movement will be 4 times the baseline movement length; the offset length in the second movement will be 3 times the baseline movement length, and so on.

[0088] In this embodiment, the offset length is set as the product of the target difference and the reference movement length. The target difference is the difference between the total number of the first layout segmentation regions and the current movement sequence of the first layout segmentation regions. The reference movement length is greater than or equal to the maximum size of each first layout segmentation region along the offset direction. This ensures that there are no overlapping areas between the offset first layout segmentation regions, improving the accuracy of model validation.

[0089] As an optional embodiment, the first layout area is segmented and moved along the offset direction by a corresponding offset length, including any of the following methods:

[0090] In the Cartesian coordinate system corresponding to the layout to be tested, the first feature point in the first layout segmentation area is moved along the offset direction by the corresponding offset length;

[0091] In the polar coordinate system corresponding to the layout to be tested, the offset angle and radial distance change value are determined based on the offset direction and the corresponding offset length; and the second feature point in the first layout segmentation area is moved along the offset angle by the radial distance change value.

[0092] In this embodiment, the first feature point is used to characterize the position of the feature point in the Cartesian coordinate system corresponding to the first layout segmentation region in the layout to be tested.

[0093] The second feature point is used to characterize the position of the feature point in the polar coordinate system corresponding to the first layout segmentation region of the layout to be tested.

[0094] As an example, in the Cartesian coordinate system corresponding to the layout to be tested, each point is determined by its x-coordinate and y-coordinate. To move the segmented region of the first layout, it is only necessary to move each of the first feature points in the segmented region of the first layout individually.

[0095] Specifically, for the coordinates of the first feature point, the new coordinates after the movement are calculated using rotation and translation formulas in a two-dimensional plane, based on the offset direction and offset length. Specifically, if the offset direction is horizontal to the right or left, only the x-coordinate of the first feature point needs to be changed; if the offset direction is vertically upward or downward, only the y-coordinate of the first feature point needs to be changed.

[0096] As another example, in the polar coordinate system corresponding to the layout to be tested, each point is determined by its distance (r) from the origin and the angle (θ) between it and the positive x-axis. To move the segmented region of the first layout, it is only necessary to move each of the second feature points in the segmented region of the first layout individually. The offset angle is the change in the angle between the second feature point and the positive x-axis, and the radial distance change is the change in the distance between the second feature point and the origin.

[0097] Specifically, for the second feature point, the angle between the second feature point and the positive x-axis is updated according to the offset angle; at the same time, the distance between the second feature point and the origin is updated according to the radial distance change value, so as to obtain the new position after the movement.

[0098] This embodiment provides two methods for graphic offset: offset in a Cartesian coordinate system and offset in a polar coordinate system. This allows the server to select the appropriate offset method based on the actual conditions of the layout under test, thereby improving the convenience of graphic offsetting.

[0099] As an optional embodiment, S101 includes any of the following:

[0100] In response to the user's input of the scope of the layout measurement area, the layout measurement area is determined in the layout to be tested based on the scope of the layout measurement area;

[0101] Boolean operations are performed between the historical measurement areas to obtain the measurement area of ​​the layout to be tested.

[0102] In this embodiment, Boolean operations, also known as logical operations, are logical mathematical calculation methods for handling the relationship between two things. Through specific logical operation rules, they perform operations such as union, intersection, and subtraction on two or more objects to obtain new objects or results.

[0103] As an example, the server can provide a user interface that allows users to input the measurement area range via a graphical interface or command line. The user interface includes selection tools, input boxes, buttons, etc., to receive user input commands.

[0104] Then, the server receives the range information of the layout measurement area input by the user. This range information may include parameters such as coordinates, size, and shape. The server then parses this range information to determine the corresponding layout measurement area within the layout to be tested.

[0105] As another example, the server retrieves previously validated historical measurement regions from the database and performs operations between these regions according to preset Boolean operation rules (such as union, intersection, and difference operations). This results in one or more new regions, which are then designated as the measurement regions for the layout to be tested.

[0106] This embodiment provides two methods for obtaining the map measurement area: user input of the area's range and Boolean operations between historical measurement areas. This allows the server to select the appropriate method based on the actual situation of the map to be tested, thereby improving the ease of obtaining the map measurement area.

[0107] As an optional embodiment, the region features include region location and region size, the offset features include offset direction and offset length, and the model validation file includes layout file and measurement data file;

[0108] S104 may specifically include:

[0109] Based on the location of each second layout segmentation region in the layout to be tested, a layout file is generated;

[0110] Based on the offset direction, offset length and region size of each second-page segmentation region, the measurement data of the measurement region of the layout is updated to obtain the measurement data of each second-page segmentation region;

[0111] Measurement data files are generated based on the measurement data of each second edition map segmentation region.

[0112] In this embodiment, the server extracts the location of each second layout segmentation region within the test layout. Based on the extracted location, a layout file is generated using a specific file format. This layout file contains the location information of all second layout segmentation regions within the test layout.

[0113] Then, for each second layout segmentation region, the measurement data of the layout measurement region in the test layout is updated according to its offset direction, offset length and region size, thereby obtaining the measurement data of each second layout segmentation region.

[0114] Finally, the measurement data of each second-page map segment is summarized to generate a measurement data file (GaugeFile). This measurement data file contains the measurement data for all second-page map segment regions. For example, the measurement data file may include the start point (startx, starty), end point (endx, endy), center point (centerx, centery), and group name (groupname) of each second-page map segment region.

[0115] In this embodiment, a layout file is generated based on the location of each second layout segmentation region within the layout to be tested. Simultaneously, the measurement data of the layout measurement region is updated based on the offset direction, offset length, and region size of each second layout segmentation region, thereby generating a measurement data file. This eliminates the need to measure the location and measurement data of each second layout segmentation region separately, enabling rapid generation of model validation files and improving the efficiency of model validation file generation.

[0116] A method for generating model validation files is provided. Accordingly, this application also provides specific embodiments of a device for generating model validation files.

[0117] like Figure 4 As shown, the model verification file generation device 400 provided in this application embodiment includes a region acquisition module 410, a region segmentation module 420, a region offset module 430, and a file generation module 440.

[0118] The area acquisition module 410 is used to acquire the layout measurement area of ​​the layout to be tested.

[0119] The region segmentation module 420 is used to segment the map measurement region according to multiple region sizes, with the target feature point as the center, to obtain multiple first map segmentation regions of different sizes. The target feature point is any one of the feature points in the map measurement region.

[0120] The region offset module 430 is used to offset each first layout segmentation region in the layout to be tested so that there is no overlap between the offset first layout segmentation regions, and to determine the offset first layout segmentation regions as second layout segmentation regions.

[0121] The file generation module 440 is used to generate model verification files based on the regional features and offset features of each second version map segmentation area.

[0122] In the model verification file generation apparatus provided in this embodiment, multiple region sizes are pre-set, and then the layout measurement region is divided according to the set region sizes to obtain multiple first layout segmentation regions. Each first layout segmentation region is then offset to ensure that there are no overlapping areas between the offset second layout segmentation regions, thereby generating the model verification file. Thus, in the case of a large amount of required measurement data, this embodiment divides a single layout measurement region into multiple layout segmentation regions, which reduces the number of layout measurement regions that need to be set compared to existing methods where only one layout segmentation region can be divided from a single layout measurement region. Simultaneously, by pre-setting multiple region sizes and dividing each layout measurement region according to these multiple region sizes, it is not necessary to set a separate region size for each layout measurement region. This significantly reduces the number of region sizes required when the number of layout measurement regions is large. Therefore, the number of layout measurement regions and their corresponding region sizes that need to be set can be reduced, thereby improving the efficiency of model verification file generation.

[0123] As an optional embodiment, the region segmentation module 420 is specifically used for:

[0124] Centered on the target feature point in the map measurement area, and with N times the preset length as the area size, the map measurement area is divided to obtain the Nth first map division area. The initial value of N is 1.

[0125] If the N+1 times preset length is less than or equal to the size of the layout measurement area, update N to N+1 and return to execute the division of the layout measurement area with the target feature point in the layout measurement area as the center and N times the preset length as the area division size, to obtain the Nth first layout division area.

[0126] As an optional embodiment, the region offset module 430 is specifically used for:

[0127] Repeat the following steps until all first-page map segments have been traversed:

[0128] According to the preset selection order, select the first first map segmentation region from each first map segmentation region;

[0129] The first map section is divided into regions, and the corresponding offset length is moved along the offset direction.

[0130] As an optional embodiment, the region acquisition module 410 is specifically used for:

[0131] In response to the user's input of the scope of the layout measurement area, the layout measurement area is determined in the layout to be tested based on the scope of the layout measurement area;

[0132] Boolean operations are performed between the historical measurement areas to obtain the measurement area of ​​the layout to be tested.

[0133] As an optional embodiment, the region features include region location and region size, the offset features include offset direction and offset length, and the model validation file includes layout file and measurement data file;

[0134] The file generation module 440 is specifically used for:

[0135] Based on the location of each second layout segmentation region in the layout to be tested, a layout file is generated;

[0136] Based on the offset direction, offset length and region size of each second-page segmentation region, the measurement data of the measurement region of the layout is updated to obtain the measurement data of each second-page segmentation region;

[0137] Measurement data files are generated based on the measurement data of each second edition map segmentation region.

[0138] A method for generating model validation files is provided. Accordingly, this application also provides specific embodiments of a device for generating model validation files.

[0139] Figure 5 A schematic diagram of the hardware structure of the model verification file generation device provided in an embodiment of this application is shown.

[0140] The device for generating model validation files may include a processor 501 and a memory 502 storing computer program instructions.

[0141] Specifically, the processor 501 may include a central processing unit (CPU), an application-specific integrated circuit (ASIC), or one or more integrated circuits that can be configured to implement the embodiments of this application.

[0142] Memory 502 may include mass storage for data or instructions. For example, and not limitingly, memory 502 may include a hard disk drive (HDD), floppy disk drive, flash memory, optical disk, magneto-optical disk, magnetic tape, or Universal Serial Bus (USB) drive, or a combination of two or more of these. Where appropriate, memory 502 may include removable or non-removable (or fixed) media. Where appropriate, memory 502 may be internal or external to the integrated gateway disaster recovery device. In a particular embodiment, memory 502 is non-volatile solid-state memory.

[0143] The processor 501 reads and executes computer program instructions stored in the memory 502 to implement any of the model verification file generation methods in the above embodiments.

[0144] In one example, the device for generating model validation files may further include a communication interface 503 and a bus 510. Wherein, as Figure 5 As shown, the processor 501, memory 502, and communication interface 503 are connected through bus 510 and complete communication with each other.

[0145] The communication interface 503 is mainly used to realize communication between various modules, devices, units and / or equipment in the embodiments of this application.

[0146] Bus 510 includes hardware, software, or both, that couples components of the device for generating model verification documents together. For example, and not limitingly, the bus may include an Accelerated Graphics Port (AGP) or other graphics bus, an Enhanced Industry Standard Architecture (EISA) bus, a Front Side Bus (FSB), HyperTransport (HT) interconnect, an Industry Standard Architecture (ISA) bus, an Infinite Bandwidth Interconnect, a Low Pin Count (LPC) bus, a memory bus, a Microchannel Architecture (MCA) bus, a Peripheral Component Interconnect (PCI) bus, a PCI-Express (PCI-X) bus, a Serial Advanced Technology Attachment (SATA) bus, a Video Electronics Standards Association Local (VLB) bus, or other suitable buses, or combinations of two or more of these. Where appropriate, bus 510 may include one or more buses. Although specific buses are described and illustrated in embodiments of this application, any suitable bus or interconnect is contemplated herein.

[0147] Furthermore, in conjunction with the model verification file generation method in the above embodiments, this application embodiment can provide a computer storage medium for implementation. This computer storage medium stores computer program instructions; when these computer program instructions are executed by a processor, they implement any of the model verification file generation methods in the above embodiments.

[0148] In addition, in conjunction with the model verification file generation method in the above embodiments, this application embodiment can provide a computer program product for implementation. When the instructions in the computer program product are executed by the processor of an electronic device, the electronic device executes the model verification file generation method provided by any aspect of the above embodiments of this application.

[0149] It should be clarified that this application is not limited to the specific configurations and processes described above and shown in the figures. For the sake of brevity, detailed descriptions of known methods are omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of this application is not limited to the specific steps described and shown. Those skilled in the art can make various changes, modifications, and additions, or change the order of steps, after understanding the spirit of this application.

[0150] The functional blocks shown in the above-described structural diagram can be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, they can be, for example, electronic circuits, application-specific integrated circuits (ASICs), appropriate firmware, plug-ins, function cards, etc. When implemented in software, the elements of this application are programs or code segments used to perform the required tasks. Programs or code segments can be stored on a machine-readable medium or transmitted over a transmission medium or communication link via data signals carried on a carrier wave. "Machine-readable medium" can include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, fiber optic media, radio frequency (RF) links, etc. Code segments can be downloaded via computer networks such as the Internet, intranets, etc.

[0151] It should also be noted that the exemplary embodiments mentioned in this application describe methods or systems based on a series of steps or apparatus. However, this application is not limited to the order of the above steps; that is, the steps can be performed in the order mentioned in the embodiments, or in a different order, or several steps can be performed simultaneously.

[0152] The aspects of this disclosure have been described above with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this disclosure. It should be understood that each block in the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine such that these instructions, executable via the processor of the computer or other programmable data processing apparatus, enable the implementation of the functions / actions specified in one or more blocks of the flowchart illustrations and / or block diagrams. Such a processor can be, but is not limited to, a general-purpose processor, a special-purpose processor, a special application processor, or a field-programmable logic circuit. It is also understood that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can also be implemented by special-purpose hardware performing the specified functions or actions, or can be implemented by a combination of special-purpose hardware and computer instructions.

[0153] The above description is merely a specific implementation of this application. Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, modules, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here. It should be understood that the protection scope of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the protection scope of this application.

Claims

1. A method for generating a model validation file, characterized in that, include: Obtain the measurement area of ​​the layout to be tested; Centered on the target feature point in the land area measurement area, the land area measurement area is divided according to multiple area sizes to obtain multiple first land area segmentation areas of different sizes. The target feature point is any one of the feature points in the land area measurement area. For each of the first layout segmentation regions, offset is performed on the layout to be tested so that there is no overlap between the offset first layout segmentation regions, and the offset first layout segmentation regions are determined as the second layout segmentation regions. Based on the regional and offset characteristics of each segmented region in the second version of the map, a model validation file is generated.

2. The method according to claim 1, characterized in that, The process involves dividing the map measurement region into multiple first map segmentation regions of different sizes, centered on the target feature points within the region, and then dividing the region according to multiple region sizes. Centered on the target feature point in the map measurement area, and with N times the preset length as the area size, the map measurement area is divided to obtain the Nth first map division area, where the initial value of N is 1. If the N+1 times preset length is less than or equal to the size of the layout measurement area, N is updated to N+1, and the process returns to execute the division of the layout measurement area with the target feature point in the layout measurement area as the center and N times the preset length as the area division size, to obtain the Nth first layout division area.

3. The method according to claim 2, characterized in that, The preset length is equal to a positive integer multiple of the model recognition accuracy in the optical proximity effect correction model.

4. The method according to claim 1, characterized in that, The step of offsetting each of the first layout segmentation regions in the test layout to ensure that there is no overlap between the offset first layout segmentation regions includes: Repeat the following steps until all the first map segmentation regions have been traversed: According to the preset selection order, select the first first map segmentation region from each first map segmentation region; The first region of the first layout is moved along the offset direction by the corresponding offset length.

5. The method according to claim 4, characterized in that, The offset length is equal to the product of the target difference and the reference movement length. The target difference is the difference between the total number of the first layout segmentation regions and the current movement sequence of the first layout segmentation regions. The reference movement length is greater than or equal to the maximum size along the offset direction in each of the first layout segmentation regions.

6. The method according to claim 4, characterized in that, The step of moving the first segmented region of the first layout along the offset direction by a corresponding offset length includes any of the following methods: In the Cartesian coordinate system corresponding to the layout to be tested, the first feature point in the first segmentation region of the first layout is moved along the offset direction by a corresponding offset length; In the polar coordinate system corresponding to the layout to be tested, the offset angle and radial distance change values ​​are determined based on the offset direction and the corresponding offset length; The second feature point in the first segmented region of the first map is moved by the radial distance change value along the offset angle.

7. The method according to claim 1, characterized in that, The method for obtaining the measurement area of ​​the layout to be tested includes any of the following: In response to a user inputting the range of a layout measurement area, the layout measurement area is determined in the layout to be tested based on the range of the layout measurement area. Boolean operations are performed between the historical measurement areas to obtain the measurement area of ​​the layout to be tested.

8. The method according to any one of claims 1-7, characterized in that, The region features include region location and region size; the offset features include offset direction and offset length; and the model validation file includes layout file and measurement data file. The step of generating a model validation file based on the regional features and offset features of each segmented region of the second version map includes: A layout file is generated based on the location of each of the second layout segmentation regions in the layout to be tested; Based on the offset direction, offset length and region size of each second layout segmentation region, the measurement data of the layout measurement region is updated to obtain the measurement data of each second layout segmentation region. Based on the measurement data of each segmented region of the second version map, a measurement data file is generated.

9. An electronic device, characterized in that, The device includes: a processor and a memory storing computer program instructions; When the processor executes the computer program instructions, it implements the method for generating model verification files as described in any one of claims 1-8.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer program instructions, which, when executed by a processor, implement the method for generating model verification files as described in any one of claims 1-8.

11. A computer program product, characterized in that, When the instructions in the computer program product are executed by the processor of the electronic device, the electronic device causes the electronic device to perform the method for generating model verification files as described in any one of claims 1-8.

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